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1/*
2 * include/asm-s390/ptrace.h
3 *
4 * S390 version
5 * Copyright (C) 1999,2000 IBM Deutschland Entwicklung GmbH, IBM Corporation
6 * Author(s): Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com)
7 */
8
9#ifndef _S390_PTRACE_H
10#define _S390_PTRACE_H
11
12/*
13 * Offsets in the user_regs_struct. They are used for the ptrace
14 * system call and in entry.S
15 */
16#ifndef __s390x__
17
18#define PT_PSWMASK 0x00
19#define PT_PSWADDR 0x04
20#define PT_GPR0 0x08
21#define PT_GPR1 0x0C
22#define PT_GPR2 0x10
23#define PT_GPR3 0x14
24#define PT_GPR4 0x18
25#define PT_GPR5 0x1C
26#define PT_GPR6 0x20
27#define PT_GPR7 0x24
28#define PT_GPR8 0x28
29#define PT_GPR9 0x2C
30#define PT_GPR10 0x30
31#define PT_GPR11 0x34
32#define PT_GPR12 0x38
33#define PT_GPR13 0x3C
34#define PT_GPR14 0x40
35#define PT_GPR15 0x44
36#define PT_ACR0 0x48
37#define PT_ACR1 0x4C
38#define PT_ACR2 0x50
39#define PT_ACR3 0x54
40#define PT_ACR4 0x58
41#define PT_ACR5 0x5C
42#define PT_ACR6 0x60
43#define PT_ACR7 0x64
44#define PT_ACR8 0x68
45#define PT_ACR9 0x6C
46#define PT_ACR10 0x70
47#define PT_ACR11 0x74
48#define PT_ACR12 0x78
49#define PT_ACR13 0x7C
50#define PT_ACR14 0x80
51#define PT_ACR15 0x84
52#define PT_ORIGGPR2 0x88
53#define PT_FPC 0x90
54/*
55 * A nasty fact of life that the ptrace api
56 * only supports passing of longs.
57 */
58#define PT_FPR0_HI 0x98
59#define PT_FPR0_LO 0x9C
60#define PT_FPR1_HI 0xA0
61#define PT_FPR1_LO 0xA4
62#define PT_FPR2_HI 0xA8
63#define PT_FPR2_LO 0xAC
64#define PT_FPR3_HI 0xB0
65#define PT_FPR3_LO 0xB4
66#define PT_FPR4_HI 0xB8
67#define PT_FPR4_LO 0xBC
68#define PT_FPR5_HI 0xC0
69#define PT_FPR5_LO 0xC4
70#define PT_FPR6_HI 0xC8
71#define PT_FPR6_LO 0xCC
72#define PT_FPR7_HI 0xD0
73#define PT_FPR7_LO 0xD4
74#define PT_FPR8_HI 0xD8
75#define PT_FPR8_LO 0XDC
76#define PT_FPR9_HI 0xE0
77#define PT_FPR9_LO 0xE4
78#define PT_FPR10_HI 0xE8
79#define PT_FPR10_LO 0xEC
80#define PT_FPR11_HI 0xF0
81#define PT_FPR11_LO 0xF4
82#define PT_FPR12_HI 0xF8
83#define PT_FPR12_LO 0xFC
84#define PT_FPR13_HI 0x100
85#define PT_FPR13_LO 0x104
86#define PT_FPR14_HI 0x108
87#define PT_FPR14_LO 0x10C
88#define PT_FPR15_HI 0x110
89#define PT_FPR15_LO 0x114
90#define PT_CR_9 0x118
91#define PT_CR_10 0x11C
92#define PT_CR_11 0x120
93#define PT_IEEE_IP 0x13C
94#define PT_LASTOFF PT_IEEE_IP
95#define PT_ENDREGS 0x140-1
96
97#define GPR_SIZE 4
98#define CR_SIZE 4
99
100#define STACK_FRAME_OVERHEAD 96 /* size of minimum stack frame */
101
102#else /* __s390x__ */
103
104#define PT_PSWMASK 0x00
105#define PT_PSWADDR 0x08
106#define PT_GPR0 0x10
107#define PT_GPR1 0x18
108#define PT_GPR2 0x20
109#define PT_GPR3 0x28
110#define PT_GPR4 0x30
111#define PT_GPR5 0x38
112#define PT_GPR6 0x40
113#define PT_GPR7 0x48
114#define PT_GPR8 0x50
115#define PT_GPR9 0x58
116#define PT_GPR10 0x60
117#define PT_GPR11 0x68
118#define PT_GPR12 0x70
119#define PT_GPR13 0x78
120#define PT_GPR14 0x80
121#define PT_GPR15 0x88
122#define PT_ACR0 0x90
123#define PT_ACR1 0x94
124#define PT_ACR2 0x98
125#define PT_ACR3 0x9C
126#define PT_ACR4 0xA0
127#define PT_ACR5 0xA4
128#define PT_ACR6 0xA8
129#define PT_ACR7 0xAC
130#define PT_ACR8 0xB0
131#define PT_ACR9 0xB4
132#define PT_ACR10 0xB8
133#define PT_ACR11 0xBC
134#define PT_ACR12 0xC0
135#define PT_ACR13 0xC4
136#define PT_ACR14 0xC8
137#define PT_ACR15 0xCC
138#define PT_ORIGGPR2 0xD0
139#define PT_FPC 0xD8
140#define PT_FPR0 0xE0
141#define PT_FPR1 0xE8
142#define PT_FPR2 0xF0
143#define PT_FPR3 0xF8
144#define PT_FPR4 0x100
145#define PT_FPR5 0x108
146#define PT_FPR6 0x110
147#define PT_FPR7 0x118
148#define PT_FPR8 0x120
149#define PT_FPR9 0x128
150#define PT_FPR10 0x130
151#define PT_FPR11 0x138
152#define PT_FPR12 0x140
153#define PT_FPR13 0x148
154#define PT_FPR14 0x150
155#define PT_FPR15 0x158
156#define PT_CR_9 0x160
157#define PT_CR_10 0x168
158#define PT_CR_11 0x170
159#define PT_IEEE_IP 0x1A8
160#define PT_LASTOFF PT_IEEE_IP
161#define PT_ENDREGS 0x1B0-1
162
163#define GPR_SIZE 8
164#define CR_SIZE 8
165
166#define STACK_FRAME_OVERHEAD 160 /* size of minimum stack frame */
167
168#endif /* __s390x__ */
169
170#define NUM_GPRS 16
171#define NUM_FPRS 16
172#define NUM_CRS 16
173#define NUM_ACRS 16
174
175#define NUM_CR_WORDS 3
176
177#define FPR_SIZE 8
178#define FPC_SIZE 4
179#define FPC_PAD_SIZE 4 /* gcc insists on aligning the fpregs */
180#define ACR_SIZE 4
181
182
183#define PTRACE_OLDSETOPTIONS 21
184
185#ifndef __ASSEMBLY__
186#include <linux/stddef.h>
187#include <linux/types.h>
188
189typedef union
190{
191 float f;
192 double d;
193 __u64 ui;
194 struct
195 {
196 __u32 hi;
197 __u32 lo;
198 } fp;
199} freg_t;
200
201typedef struct
202{
203 __u32 fpc;
204 freg_t fprs[NUM_FPRS];
205} s390_fp_regs;
206
207#define FPC_EXCEPTION_MASK 0xF8000000
208#define FPC_FLAGS_MASK 0x00F80000
209#define FPC_DXC_MASK 0x0000FF00
210#define FPC_RM_MASK 0x00000003
211#define FPC_VALID_MASK 0xF8F8FF03
212
213/* this typedef defines how a Program Status Word looks like */
214typedef struct
215{
216 unsigned long mask;
217 unsigned long addr;
218} __attribute__ ((aligned(8))) psw_t;
219
220typedef struct
221{
222 __u32 mask;
223 __u32 addr;
224} __attribute__ ((aligned(8))) psw_compat_t;
225
226#ifndef __s390x__
227
228#define PSW_MASK_PER 0x40000000UL
229#define PSW_MASK_DAT 0x04000000UL
230#define PSW_MASK_IO 0x02000000UL
231#define PSW_MASK_EXT 0x01000000UL
232#define PSW_MASK_KEY 0x00F00000UL
233#define PSW_MASK_BASE 0x00080000UL /* always one */
234#define PSW_MASK_MCHECK 0x00040000UL
235#define PSW_MASK_WAIT 0x00020000UL
236#define PSW_MASK_PSTATE 0x00010000UL
237#define PSW_MASK_ASC 0x0000C000UL
238#define PSW_MASK_CC 0x00003000UL
239#define PSW_MASK_PM 0x00000F00UL
240#define PSW_MASK_EA 0x00000000UL
241#define PSW_MASK_BA 0x00000000UL
242
243#define PSW_MASK_USER 0x00003F00UL
244
245#define PSW_ADDR_AMODE 0x80000000UL
246#define PSW_ADDR_INSN 0x7FFFFFFFUL
247
248#define PSW_DEFAULT_KEY (((unsigned long) PAGE_DEFAULT_ACC) << 20)
249
250#define PSW_ASC_PRIMARY 0x00000000UL
251#define PSW_ASC_ACCREG 0x00004000UL
252#define PSW_ASC_SECONDARY 0x00008000UL
253#define PSW_ASC_HOME 0x0000C000UL
254
255#else /* __s390x__ */
256
257#define PSW_MASK_PER 0x4000000000000000UL
258#define PSW_MASK_DAT 0x0400000000000000UL
259#define PSW_MASK_IO 0x0200000000000000UL
260#define PSW_MASK_EXT 0x0100000000000000UL
261#define PSW_MASK_BASE 0x0000000000000000UL
262#define PSW_MASK_KEY 0x00F0000000000000UL
263#define PSW_MASK_MCHECK 0x0004000000000000UL
264#define PSW_MASK_WAIT 0x0002000000000000UL
265#define PSW_MASK_PSTATE 0x0001000000000000UL
266#define PSW_MASK_ASC 0x0000C00000000000UL
267#define PSW_MASK_CC 0x0000300000000000UL
268#define PSW_MASK_PM 0x00000F0000000000UL
269#define PSW_MASK_EA 0x0000000100000000UL
270#define PSW_MASK_BA 0x0000000080000000UL
271
272#define PSW_MASK_USER 0x00003F0180000000UL
273
274#define PSW_ADDR_AMODE 0x0000000000000000UL
275#define PSW_ADDR_INSN 0xFFFFFFFFFFFFFFFFUL
276
277#define PSW_DEFAULT_KEY (((unsigned long) PAGE_DEFAULT_ACC) << 52)
278
279#define PSW_ASC_PRIMARY 0x0000000000000000UL
280#define PSW_ASC_ACCREG 0x0000400000000000UL
281#define PSW_ASC_SECONDARY 0x0000800000000000UL
282#define PSW_ASC_HOME 0x0000C00000000000UL
283
284#endif /* __s390x__ */
285
286#ifdef __KERNEL__
287extern long psw_kernel_bits;
288extern long psw_user_bits;
289#endif
290
291/*
292 * The s390_regs structure is used to define the elf_gregset_t.
293 */
294typedef struct
295{
296 psw_t psw;
297 unsigned long gprs[NUM_GPRS];
298 unsigned int acrs[NUM_ACRS];
299 unsigned long orig_gpr2;
300} s390_regs;
301
302typedef struct
303{
304 psw_compat_t psw;
305 __u32 gprs[NUM_GPRS];
306 __u32 acrs[NUM_ACRS];
307 __u32 orig_gpr2;
308} s390_compat_regs;
309
310typedef struct
311{
312 __u32 gprs_high[NUM_GPRS];
313} s390_compat_regs_high;
314
315#ifdef __KERNEL__
316
317/*
318 * The pt_regs struct defines the way the registers are stored on
319 * the stack during a system call.
320 */
321struct pt_regs
322{
323 unsigned long args[1];
324 psw_t psw;
325 unsigned long gprs[NUM_GPRS];
326 unsigned long orig_gpr2;
327 unsigned int int_code;
328 unsigned long int_parm_long;
329};
330
331/*
332 * Program event recording (PER) register set.
333 */
334struct per_regs {
335 unsigned long control; /* PER control bits */
336 unsigned long start; /* PER starting address */
337 unsigned long end; /* PER ending address */
338};
339
340/*
341 * PER event contains information about the cause of the last PER exception.
342 */
343struct per_event {
344 unsigned short cause; /* PER code, ATMID and AI */
345 unsigned long address; /* PER address */
346 unsigned char paid; /* PER access identification */
347};
348
349/*
350 * Simplified per_info structure used to decode the ptrace user space ABI.
351 */
352struct per_struct_kernel {
353 unsigned long cr9; /* PER control bits */
354 unsigned long cr10; /* PER starting address */
355 unsigned long cr11; /* PER ending address */
356 unsigned long bits; /* Obsolete software bits */
357 unsigned long starting_addr; /* User specified start address */
358 unsigned long ending_addr; /* User specified end address */
359 unsigned short perc_atmid; /* PER trap ATMID */
360 unsigned long address; /* PER trap instruction address */
361 unsigned char access_id; /* PER trap access identification */
362};
363
364#define PER_EVENT_MASK 0xE9000000UL
365
366#define PER_EVENT_BRANCH 0x80000000UL
367#define PER_EVENT_IFETCH 0x40000000UL
368#define PER_EVENT_STORE 0x20000000UL
369#define PER_EVENT_STORE_REAL 0x08000000UL
370#define PER_EVENT_NULLIFICATION 0x01000000UL
371
372#define PER_CONTROL_MASK 0x00a00000UL
373
374#define PER_CONTROL_BRANCH_ADDRESS 0x00800000UL
375#define PER_CONTROL_ALTERATION 0x00200000UL
376
377#endif
378
379/*
380 * Now for the user space program event recording (trace) definitions.
381 * The following structures are used only for the ptrace interface, don't
382 * touch or even look at it if you don't want to modify the user-space
383 * ptrace interface. In particular stay away from it for in-kernel PER.
384 */
385typedef struct
386{
387 unsigned long cr[NUM_CR_WORDS];
388} per_cr_words;
389
390#define PER_EM_MASK 0xE8000000UL
391
392typedef struct
393{
394#ifdef __s390x__
395 unsigned : 32;
396#endif /* __s390x__ */
397 unsigned em_branching : 1;
398 unsigned em_instruction_fetch : 1;
399 /*
400 * Switching on storage alteration automatically fixes
401 * the storage alteration event bit in the users std.
402 */
403 unsigned em_storage_alteration : 1;
404 unsigned em_gpr_alt_unused : 1;
405 unsigned em_store_real_address : 1;
406 unsigned : 3;
407 unsigned branch_addr_ctl : 1;
408 unsigned : 1;
409 unsigned storage_alt_space_ctl : 1;
410 unsigned : 21;
411 unsigned long starting_addr;
412 unsigned long ending_addr;
413} per_cr_bits;
414
415typedef struct
416{
417 unsigned short perc_atmid;
418 unsigned long address;
419 unsigned char access_id;
420} per_lowcore_words;
421
422typedef struct
423{
424 unsigned perc_branching : 1;
425 unsigned perc_instruction_fetch : 1;
426 unsigned perc_storage_alteration : 1;
427 unsigned perc_gpr_alt_unused : 1;
428 unsigned perc_store_real_address : 1;
429 unsigned : 3;
430 unsigned atmid_psw_bit_31 : 1;
431 unsigned atmid_validity_bit : 1;
432 unsigned atmid_psw_bit_32 : 1;
433 unsigned atmid_psw_bit_5 : 1;
434 unsigned atmid_psw_bit_16 : 1;
435 unsigned atmid_psw_bit_17 : 1;
436 unsigned si : 2;
437 unsigned long address;
438 unsigned : 4;
439 unsigned access_id : 4;
440} per_lowcore_bits;
441
442typedef struct
443{
444 union {
445 per_cr_words words;
446 per_cr_bits bits;
447 } control_regs;
448 /*
449 * Use these flags instead of setting em_instruction_fetch
450 * directly they are used so that single stepping can be
451 * switched on & off while not affecting other tracing
452 */
453 unsigned single_step : 1;
454 unsigned instruction_fetch : 1;
455 unsigned : 30;
456 /*
457 * These addresses are copied into cr10 & cr11 if single
458 * stepping is switched off
459 */
460 unsigned long starting_addr;
461 unsigned long ending_addr;
462 union {
463 per_lowcore_words words;
464 per_lowcore_bits bits;
465 } lowcore;
466} per_struct;
467
468typedef struct
469{
470 unsigned int len;
471 unsigned long kernel_addr;
472 unsigned long process_addr;
473} ptrace_area;
474
475/*
476 * S/390 specific non posix ptrace requests. I chose unusual values so
477 * they are unlikely to clash with future ptrace definitions.
478 */
479#define PTRACE_PEEKUSR_AREA 0x5000
480#define PTRACE_POKEUSR_AREA 0x5001
481#define PTRACE_PEEKTEXT_AREA 0x5002
482#define PTRACE_PEEKDATA_AREA 0x5003
483#define PTRACE_POKETEXT_AREA 0x5004
484#define PTRACE_POKEDATA_AREA 0x5005
485#define PTRACE_GET_LAST_BREAK 0x5006
486#define PTRACE_PEEK_SYSTEM_CALL 0x5007
487#define PTRACE_POKE_SYSTEM_CALL 0x5008
488
489/*
490 * PT_PROT definition is loosely based on hppa bsd definition in
491 * gdb/hppab-nat.c
492 */
493#define PTRACE_PROT 21
494
495typedef enum
496{
497 ptprot_set_access_watchpoint,
498 ptprot_set_write_watchpoint,
499 ptprot_disable_watchpoint
500} ptprot_flags;
501
502typedef struct
503{
504 unsigned long lowaddr;
505 unsigned long hiaddr;
506 ptprot_flags prot;
507} ptprot_area;
508
509/* Sequence of bytes for breakpoint illegal instruction. */
510#define S390_BREAKPOINT {0x0,0x1}
511#define S390_BREAKPOINT_U16 ((__u16)0x0001)
512#define S390_SYSCALL_OPCODE ((__u16)0x0a00)
513#define S390_SYSCALL_SIZE 2
514
515/*
516 * The user_regs_struct defines the way the user registers are
517 * store on the stack for signal handling.
518 */
519struct user_regs_struct
520{
521 psw_t psw;
522 unsigned long gprs[NUM_GPRS];
523 unsigned int acrs[NUM_ACRS];
524 unsigned long orig_gpr2;
525 s390_fp_regs fp_regs;
526 /*
527 * These per registers are in here so that gdb can modify them
528 * itself as there is no "official" ptrace interface for hardware
529 * watchpoints. This is the way intel does it.
530 */
531 per_struct per_info;
532 unsigned long ieee_instruction_pointer; /* obsolete, always 0 */
533};
534
535#ifdef __KERNEL__
536/*
537 * These are defined as per linux/ptrace.h, which see.
538 */
539#define arch_has_single_step() (1)
540
541#define user_mode(regs) (((regs)->psw.mask & PSW_MASK_PSTATE) != 0)
542#define instruction_pointer(regs) ((regs)->psw.addr & PSW_ADDR_INSN)
543#define user_stack_pointer(regs)((regs)->gprs[15])
544#define profile_pc(regs) instruction_pointer(regs)
545
546static inline long regs_return_value(struct pt_regs *regs)
547{
548 return regs->gprs[2];
549}
550
551int regs_query_register_offset(const char *name);
552const char *regs_query_register_name(unsigned int offset);
553unsigned long regs_get_register(struct pt_regs *regs, unsigned int offset);
554unsigned long regs_get_kernel_stack_nth(struct pt_regs *regs, unsigned int n);
555
556static inline unsigned long kernel_stack_pointer(struct pt_regs *regs)
557{
558 return regs->gprs[15] & PSW_ADDR_INSN;
559}
560
561#endif /* __KERNEL__ */
562#endif /* __ASSEMBLY__ */
563
564#endif /* _S390_PTRACE_H */
1/*
2 * S390 version
3 * Copyright IBM Corp. 1999, 2000
4 * Author(s): Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com)
5 */
6#ifndef _S390_PTRACE_H
7#define _S390_PTRACE_H
8
9#include <uapi/asm/ptrace.h>
10
11#ifndef __ASSEMBLY__
12
13#define PSW_KERNEL_BITS (PSW_DEFAULT_KEY | PSW_MASK_BASE | PSW_ASC_HOME | \
14 PSW_MASK_EA | PSW_MASK_BA)
15#define PSW_USER_BITS (PSW_MASK_DAT | PSW_MASK_IO | PSW_MASK_EXT | \
16 PSW_DEFAULT_KEY | PSW_MASK_BASE | PSW_MASK_MCHECK | \
17 PSW_MASK_PSTATE | PSW_ASC_PRIMARY)
18
19/*
20 * The pt_regs struct defines the way the registers are stored on
21 * the stack during a system call.
22 */
23struct pt_regs
24{
25 unsigned long args[1];
26 psw_t psw;
27 unsigned long gprs[NUM_GPRS];
28 unsigned long orig_gpr2;
29 unsigned int int_code;
30 unsigned int int_parm;
31 unsigned long int_parm_long;
32};
33
34/*
35 * Program event recording (PER) register set.
36 */
37struct per_regs {
38 unsigned long control; /* PER control bits */
39 unsigned long start; /* PER starting address */
40 unsigned long end; /* PER ending address */
41};
42
43/*
44 * PER event contains information about the cause of the last PER exception.
45 */
46struct per_event {
47 unsigned short cause; /* PER code, ATMID and AI */
48 unsigned long address; /* PER address */
49 unsigned char paid; /* PER access identification */
50};
51
52/*
53 * Simplified per_info structure used to decode the ptrace user space ABI.
54 */
55struct per_struct_kernel {
56 unsigned long cr9; /* PER control bits */
57 unsigned long cr10; /* PER starting address */
58 unsigned long cr11; /* PER ending address */
59 unsigned long bits; /* Obsolete software bits */
60 unsigned long starting_addr; /* User specified start address */
61 unsigned long ending_addr; /* User specified end address */
62 unsigned short perc_atmid; /* PER trap ATMID */
63 unsigned long address; /* PER trap instruction address */
64 unsigned char access_id; /* PER trap access identification */
65};
66
67#define PER_EVENT_MASK 0xEB000000UL
68
69#define PER_EVENT_BRANCH 0x80000000UL
70#define PER_EVENT_IFETCH 0x40000000UL
71#define PER_EVENT_STORE 0x20000000UL
72#define PER_EVENT_STORE_REAL 0x08000000UL
73#define PER_EVENT_TRANSACTION_END 0x02000000UL
74#define PER_EVENT_NULLIFICATION 0x01000000UL
75
76#define PER_CONTROL_MASK 0x00e00000UL
77
78#define PER_CONTROL_BRANCH_ADDRESS 0x00800000UL
79#define PER_CONTROL_SUSPENSION 0x00400000UL
80#define PER_CONTROL_ALTERATION 0x00200000UL
81
82/*
83 * These are defined as per linux/ptrace.h, which see.
84 */
85#define arch_has_single_step() (1)
86#define arch_has_block_step() (1)
87
88#define user_mode(regs) (((regs)->psw.mask & PSW_MASK_PSTATE) != 0)
89#define instruction_pointer(regs) ((regs)->psw.addr & PSW_ADDR_INSN)
90#define user_stack_pointer(regs)((regs)->gprs[15])
91#define profile_pc(regs) instruction_pointer(regs)
92
93static inline long regs_return_value(struct pt_regs *regs)
94{
95 return regs->gprs[2];
96}
97
98int regs_query_register_offset(const char *name);
99const char *regs_query_register_name(unsigned int offset);
100unsigned long regs_get_register(struct pt_regs *regs, unsigned int offset);
101unsigned long regs_get_kernel_stack_nth(struct pt_regs *regs, unsigned int n);
102
103static inline unsigned long kernel_stack_pointer(struct pt_regs *regs)
104{
105 return regs->gprs[15] & PSW_ADDR_INSN;
106}
107
108#endif /* __ASSEMBLY__ */
109#endif /* _S390_PTRACE_H */