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1/*
2 * Copyright © 2006-2007 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
22 *
23 * Authors:
24 * Eric Anholt <eric@anholt.net>
25 */
26
27#include <linux/dmi.h>
28#include <linux/i2c.h>
29#include <linux/slab.h>
30#include "drmP.h"
31#include "drm.h"
32#include "drm_crtc.h"
33#include "drm_crtc_helper.h"
34#include "drm_edid.h"
35#include "intel_drv.h"
36#include "i915_drm.h"
37#include "i915_drv.h"
38
39/* Here's the desired hotplug mode */
40#define ADPA_HOTPLUG_BITS (ADPA_CRT_HOTPLUG_PERIOD_128 | \
41 ADPA_CRT_HOTPLUG_WARMUP_10MS | \
42 ADPA_CRT_HOTPLUG_SAMPLE_4S | \
43 ADPA_CRT_HOTPLUG_VOLTAGE_50 | \
44 ADPA_CRT_HOTPLUG_VOLREF_325MV | \
45 ADPA_CRT_HOTPLUG_ENABLE)
46
47struct intel_crt {
48 struct intel_encoder base;
49 bool force_hotplug_required;
50};
51
52static struct intel_crt *intel_attached_crt(struct drm_connector *connector)
53{
54 return container_of(intel_attached_encoder(connector),
55 struct intel_crt, base);
56}
57
58static void pch_crt_dpms(struct drm_encoder *encoder, int mode)
59{
60 struct drm_device *dev = encoder->dev;
61 struct drm_i915_private *dev_priv = dev->dev_private;
62 u32 temp;
63
64 temp = I915_READ(PCH_ADPA);
65 temp &= ~ADPA_DAC_ENABLE;
66
67 switch (mode) {
68 case DRM_MODE_DPMS_ON:
69 temp |= ADPA_DAC_ENABLE;
70 break;
71 case DRM_MODE_DPMS_STANDBY:
72 case DRM_MODE_DPMS_SUSPEND:
73 case DRM_MODE_DPMS_OFF:
74 /* Just leave port enable cleared */
75 break;
76 }
77
78 I915_WRITE(PCH_ADPA, temp);
79}
80
81static void gmch_crt_dpms(struct drm_encoder *encoder, int mode)
82{
83 struct drm_device *dev = encoder->dev;
84 struct drm_i915_private *dev_priv = dev->dev_private;
85 u32 temp;
86
87 temp = I915_READ(ADPA);
88 temp &= ~(ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE);
89 temp &= ~ADPA_DAC_ENABLE;
90
91 switch (mode) {
92 case DRM_MODE_DPMS_ON:
93 temp |= ADPA_DAC_ENABLE;
94 break;
95 case DRM_MODE_DPMS_STANDBY:
96 temp |= ADPA_DAC_ENABLE | ADPA_HSYNC_CNTL_DISABLE;
97 break;
98 case DRM_MODE_DPMS_SUSPEND:
99 temp |= ADPA_DAC_ENABLE | ADPA_VSYNC_CNTL_DISABLE;
100 break;
101 case DRM_MODE_DPMS_OFF:
102 temp |= ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE;
103 break;
104 }
105
106 I915_WRITE(ADPA, temp);
107}
108
109static int intel_crt_mode_valid(struct drm_connector *connector,
110 struct drm_display_mode *mode)
111{
112 struct drm_device *dev = connector->dev;
113
114 int max_clock = 0;
115 if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
116 return MODE_NO_DBLESCAN;
117
118 if (mode->clock < 25000)
119 return MODE_CLOCK_LOW;
120
121 if (IS_GEN2(dev))
122 max_clock = 350000;
123 else
124 max_clock = 400000;
125 if (mode->clock > max_clock)
126 return MODE_CLOCK_HIGH;
127
128 return MODE_OK;
129}
130
131static bool intel_crt_mode_fixup(struct drm_encoder *encoder,
132 struct drm_display_mode *mode,
133 struct drm_display_mode *adjusted_mode)
134{
135 return true;
136}
137
138static void intel_crt_mode_set(struct drm_encoder *encoder,
139 struct drm_display_mode *mode,
140 struct drm_display_mode *adjusted_mode)
141{
142
143 struct drm_device *dev = encoder->dev;
144 struct drm_crtc *crtc = encoder->crtc;
145 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
146 struct drm_i915_private *dev_priv = dev->dev_private;
147 int dpll_md_reg;
148 u32 adpa, dpll_md;
149 u32 adpa_reg;
150
151 dpll_md_reg = DPLL_MD(intel_crtc->pipe);
152
153 if (HAS_PCH_SPLIT(dev))
154 adpa_reg = PCH_ADPA;
155 else
156 adpa_reg = ADPA;
157
158 /*
159 * Disable separate mode multiplier used when cloning SDVO to CRT
160 * XXX this needs to be adjusted when we really are cloning
161 */
162 if (INTEL_INFO(dev)->gen >= 4 && !HAS_PCH_SPLIT(dev)) {
163 dpll_md = I915_READ(dpll_md_reg);
164 I915_WRITE(dpll_md_reg,
165 dpll_md & ~DPLL_MD_UDI_MULTIPLIER_MASK);
166 }
167
168 adpa = ADPA_HOTPLUG_BITS;
169 if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
170 adpa |= ADPA_HSYNC_ACTIVE_HIGH;
171 if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
172 adpa |= ADPA_VSYNC_ACTIVE_HIGH;
173
174 /* For CPT allow 3 pipe config, for others just use A or B */
175 if (HAS_PCH_CPT(dev))
176 adpa |= PORT_TRANS_SEL_CPT(intel_crtc->pipe);
177 else if (intel_crtc->pipe == 0)
178 adpa |= ADPA_PIPE_A_SELECT;
179 else
180 adpa |= ADPA_PIPE_B_SELECT;
181
182 if (!HAS_PCH_SPLIT(dev))
183 I915_WRITE(BCLRPAT(intel_crtc->pipe), 0);
184
185 I915_WRITE(adpa_reg, adpa);
186}
187
188static bool intel_ironlake_crt_detect_hotplug(struct drm_connector *connector)
189{
190 struct drm_device *dev = connector->dev;
191 struct intel_crt *crt = intel_attached_crt(connector);
192 struct drm_i915_private *dev_priv = dev->dev_private;
193 u32 adpa;
194 bool ret;
195
196 /* The first time through, trigger an explicit detection cycle */
197 if (crt->force_hotplug_required) {
198 bool turn_off_dac = HAS_PCH_SPLIT(dev);
199 u32 save_adpa;
200
201 crt->force_hotplug_required = 0;
202
203 save_adpa = adpa = I915_READ(PCH_ADPA);
204 DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", adpa);
205
206 adpa |= ADPA_CRT_HOTPLUG_FORCE_TRIGGER;
207 if (turn_off_dac)
208 adpa &= ~ADPA_DAC_ENABLE;
209
210 I915_WRITE(PCH_ADPA, adpa);
211
212 if (wait_for((I915_READ(PCH_ADPA) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER) == 0,
213 1000))
214 DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER");
215
216 if (turn_off_dac) {
217 I915_WRITE(PCH_ADPA, save_adpa);
218 POSTING_READ(PCH_ADPA);
219 }
220 }
221
222 /* Check the status to see if both blue and green are on now */
223 adpa = I915_READ(PCH_ADPA);
224 if ((adpa & ADPA_CRT_HOTPLUG_MONITOR_MASK) != 0)
225 ret = true;
226 else
227 ret = false;
228 DRM_DEBUG_KMS("ironlake hotplug adpa=0x%x, result %d\n", adpa, ret);
229
230 return ret;
231}
232
233/**
234 * Uses CRT_HOTPLUG_EN and CRT_HOTPLUG_STAT to detect CRT presence.
235 *
236 * Not for i915G/i915GM
237 *
238 * \return true if CRT is connected.
239 * \return false if CRT is disconnected.
240 */
241static bool intel_crt_detect_hotplug(struct drm_connector *connector)
242{
243 struct drm_device *dev = connector->dev;
244 struct drm_i915_private *dev_priv = dev->dev_private;
245 u32 hotplug_en, orig, stat;
246 bool ret = false;
247 int i, tries = 0;
248
249 if (HAS_PCH_SPLIT(dev))
250 return intel_ironlake_crt_detect_hotplug(connector);
251
252 /*
253 * On 4 series desktop, CRT detect sequence need to be done twice
254 * to get a reliable result.
255 */
256
257 if (IS_G4X(dev) && !IS_GM45(dev))
258 tries = 2;
259 else
260 tries = 1;
261 hotplug_en = orig = I915_READ(PORT_HOTPLUG_EN);
262 hotplug_en |= CRT_HOTPLUG_FORCE_DETECT;
263
264 for (i = 0; i < tries ; i++) {
265 /* turn on the FORCE_DETECT */
266 I915_WRITE(PORT_HOTPLUG_EN, hotplug_en);
267 /* wait for FORCE_DETECT to go off */
268 if (wait_for((I915_READ(PORT_HOTPLUG_EN) &
269 CRT_HOTPLUG_FORCE_DETECT) == 0,
270 1000))
271 DRM_DEBUG_KMS("timed out waiting for FORCE_DETECT to go off");
272 }
273
274 stat = I915_READ(PORT_HOTPLUG_STAT);
275 if ((stat & CRT_HOTPLUG_MONITOR_MASK) != CRT_HOTPLUG_MONITOR_NONE)
276 ret = true;
277
278 /* clear the interrupt we just generated, if any */
279 I915_WRITE(PORT_HOTPLUG_STAT, CRT_HOTPLUG_INT_STATUS);
280
281 /* and put the bits back */
282 I915_WRITE(PORT_HOTPLUG_EN, orig);
283
284 return ret;
285}
286
287static struct edid *intel_crt_get_edid(struct drm_connector *connector,
288 struct i2c_adapter *i2c)
289{
290 struct edid *edid;
291
292 edid = drm_get_edid(connector, i2c);
293
294 if (!edid && !intel_gmbus_is_forced_bit(i2c)) {
295 DRM_DEBUG_KMS("CRT GMBUS EDID read failed, retry using GPIO bit-banging\n");
296 intel_gmbus_force_bit(i2c, true);
297 edid = drm_get_edid(connector, i2c);
298 intel_gmbus_force_bit(i2c, false);
299 }
300
301 return edid;
302}
303
304/* local version of intel_ddc_get_modes() to use intel_crt_get_edid() */
305static int intel_crt_ddc_get_modes(struct drm_connector *connector,
306 struct i2c_adapter *adapter)
307{
308 struct edid *edid;
309
310 edid = intel_crt_get_edid(connector, adapter);
311 if (!edid)
312 return 0;
313
314 return intel_connector_update_modes(connector, edid);
315}
316
317static bool intel_crt_detect_ddc(struct drm_connector *connector)
318{
319 struct intel_crt *crt = intel_attached_crt(connector);
320 struct drm_i915_private *dev_priv = crt->base.base.dev->dev_private;
321
322 /* CRT should always be at 0, but check anyway */
323 if (crt->base.type != INTEL_OUTPUT_ANALOG)
324 return false;
325
326 if (intel_ddc_probe(&crt->base, dev_priv->crt_ddc_pin)) {
327 struct edid *edid;
328 bool is_digital = false;
329 struct i2c_adapter *i2c;
330
331 i2c = intel_gmbus_get_adapter(dev_priv, dev_priv->crt_ddc_pin);
332 edid = intel_crt_get_edid(connector, i2c);
333 /*
334 * This may be a DVI-I connector with a shared DDC
335 * link between analog and digital outputs, so we
336 * have to check the EDID input spec of the attached device.
337 *
338 * On the other hand, what should we do if it is a broken EDID?
339 */
340 if (edid != NULL) {
341 is_digital = edid->input & DRM_EDID_INPUT_DIGITAL;
342 connector->display_info.raw_edid = NULL;
343 kfree(edid);
344 }
345
346 if (!is_digital) {
347 DRM_DEBUG_KMS("CRT detected via DDC:0x50 [EDID]\n");
348 return true;
349 } else {
350 DRM_DEBUG_KMS("CRT not detected via DDC:0x50 [EDID reports a digital panel]\n");
351 }
352 }
353
354 return false;
355}
356
357static enum drm_connector_status
358intel_crt_load_detect(struct intel_crt *crt)
359{
360 struct drm_device *dev = crt->base.base.dev;
361 struct drm_i915_private *dev_priv = dev->dev_private;
362 uint32_t pipe = to_intel_crtc(crt->base.base.crtc)->pipe;
363 uint32_t save_bclrpat;
364 uint32_t save_vtotal;
365 uint32_t vtotal, vactive;
366 uint32_t vsample;
367 uint32_t vblank, vblank_start, vblank_end;
368 uint32_t dsl;
369 uint32_t bclrpat_reg;
370 uint32_t vtotal_reg;
371 uint32_t vblank_reg;
372 uint32_t vsync_reg;
373 uint32_t pipeconf_reg;
374 uint32_t pipe_dsl_reg;
375 uint8_t st00;
376 enum drm_connector_status status;
377
378 DRM_DEBUG_KMS("starting load-detect on CRT\n");
379
380 bclrpat_reg = BCLRPAT(pipe);
381 vtotal_reg = VTOTAL(pipe);
382 vblank_reg = VBLANK(pipe);
383 vsync_reg = VSYNC(pipe);
384 pipeconf_reg = PIPECONF(pipe);
385 pipe_dsl_reg = PIPEDSL(pipe);
386
387 save_bclrpat = I915_READ(bclrpat_reg);
388 save_vtotal = I915_READ(vtotal_reg);
389 vblank = I915_READ(vblank_reg);
390
391 vtotal = ((save_vtotal >> 16) & 0xfff) + 1;
392 vactive = (save_vtotal & 0x7ff) + 1;
393
394 vblank_start = (vblank & 0xfff) + 1;
395 vblank_end = ((vblank >> 16) & 0xfff) + 1;
396
397 /* Set the border color to purple. */
398 I915_WRITE(bclrpat_reg, 0x500050);
399
400 if (!IS_GEN2(dev)) {
401 uint32_t pipeconf = I915_READ(pipeconf_reg);
402 I915_WRITE(pipeconf_reg, pipeconf | PIPECONF_FORCE_BORDER);
403 POSTING_READ(pipeconf_reg);
404 /* Wait for next Vblank to substitue
405 * border color for Color info */
406 intel_wait_for_vblank(dev, pipe);
407 st00 = I915_READ8(VGA_MSR_WRITE);
408 status = ((st00 & (1 << 4)) != 0) ?
409 connector_status_connected :
410 connector_status_disconnected;
411
412 I915_WRITE(pipeconf_reg, pipeconf);
413 } else {
414 bool restore_vblank = false;
415 int count, detect;
416
417 /*
418 * If there isn't any border, add some.
419 * Yes, this will flicker
420 */
421 if (vblank_start <= vactive && vblank_end >= vtotal) {
422 uint32_t vsync = I915_READ(vsync_reg);
423 uint32_t vsync_start = (vsync & 0xffff) + 1;
424
425 vblank_start = vsync_start;
426 I915_WRITE(vblank_reg,
427 (vblank_start - 1) |
428 ((vblank_end - 1) << 16));
429 restore_vblank = true;
430 }
431 /* sample in the vertical border, selecting the larger one */
432 if (vblank_start - vactive >= vtotal - vblank_end)
433 vsample = (vblank_start + vactive) >> 1;
434 else
435 vsample = (vtotal + vblank_end) >> 1;
436
437 /*
438 * Wait for the border to be displayed
439 */
440 while (I915_READ(pipe_dsl_reg) >= vactive)
441 ;
442 while ((dsl = I915_READ(pipe_dsl_reg)) <= vsample)
443 ;
444 /*
445 * Watch ST00 for an entire scanline
446 */
447 detect = 0;
448 count = 0;
449 do {
450 count++;
451 /* Read the ST00 VGA status register */
452 st00 = I915_READ8(VGA_MSR_WRITE);
453 if (st00 & (1 << 4))
454 detect++;
455 } while ((I915_READ(pipe_dsl_reg) == dsl));
456
457 /* restore vblank if necessary */
458 if (restore_vblank)
459 I915_WRITE(vblank_reg, vblank);
460 /*
461 * If more than 3/4 of the scanline detected a monitor,
462 * then it is assumed to be present. This works even on i830,
463 * where there isn't any way to force the border color across
464 * the screen
465 */
466 status = detect * 4 > count * 3 ?
467 connector_status_connected :
468 connector_status_disconnected;
469 }
470
471 /* Restore previous settings */
472 I915_WRITE(bclrpat_reg, save_bclrpat);
473
474 return status;
475}
476
477static enum drm_connector_status
478intel_crt_detect(struct drm_connector *connector, bool force)
479{
480 struct drm_device *dev = connector->dev;
481 struct intel_crt *crt = intel_attached_crt(connector);
482 enum drm_connector_status status;
483 struct intel_load_detect_pipe tmp;
484
485 if (I915_HAS_HOTPLUG(dev)) {
486 if (intel_crt_detect_hotplug(connector)) {
487 DRM_DEBUG_KMS("CRT detected via hotplug\n");
488 return connector_status_connected;
489 } else {
490 DRM_DEBUG_KMS("CRT not detected via hotplug\n");
491 return connector_status_disconnected;
492 }
493 }
494
495 if (intel_crt_detect_ddc(connector))
496 return connector_status_connected;
497
498 if (!force)
499 return connector->status;
500
501 /* for pre-945g platforms use load detect */
502 if (intel_get_load_detect_pipe(&crt->base, connector, NULL,
503 &tmp)) {
504 if (intel_crt_detect_ddc(connector))
505 status = connector_status_connected;
506 else
507 status = intel_crt_load_detect(crt);
508 intel_release_load_detect_pipe(&crt->base, connector,
509 &tmp);
510 } else
511 status = connector_status_unknown;
512
513 return status;
514}
515
516static void intel_crt_destroy(struct drm_connector *connector)
517{
518 drm_sysfs_connector_remove(connector);
519 drm_connector_cleanup(connector);
520 kfree(connector);
521}
522
523static int intel_crt_get_modes(struct drm_connector *connector)
524{
525 struct drm_device *dev = connector->dev;
526 struct drm_i915_private *dev_priv = dev->dev_private;
527 int ret;
528 struct i2c_adapter *i2c;
529
530 i2c = intel_gmbus_get_adapter(dev_priv, dev_priv->crt_ddc_pin);
531 ret = intel_crt_ddc_get_modes(connector, i2c);
532 if (ret || !IS_G4X(dev))
533 return ret;
534
535 /* Try to probe digital port for output in DVI-I -> VGA mode. */
536 i2c = intel_gmbus_get_adapter(dev_priv, GMBUS_PORT_DPB);
537 return intel_crt_ddc_get_modes(connector, i2c);
538}
539
540static int intel_crt_set_property(struct drm_connector *connector,
541 struct drm_property *property,
542 uint64_t value)
543{
544 return 0;
545}
546
547static void intel_crt_reset(struct drm_connector *connector)
548{
549 struct drm_device *dev = connector->dev;
550 struct intel_crt *crt = intel_attached_crt(connector);
551
552 if (HAS_PCH_SPLIT(dev))
553 crt->force_hotplug_required = 1;
554}
555
556/*
557 * Routines for controlling stuff on the analog port
558 */
559
560static const struct drm_encoder_helper_funcs pch_encoder_funcs = {
561 .mode_fixup = intel_crt_mode_fixup,
562 .prepare = intel_encoder_prepare,
563 .commit = intel_encoder_commit,
564 .mode_set = intel_crt_mode_set,
565 .dpms = pch_crt_dpms,
566};
567
568static const struct drm_encoder_helper_funcs gmch_encoder_funcs = {
569 .mode_fixup = intel_crt_mode_fixup,
570 .prepare = intel_encoder_prepare,
571 .commit = intel_encoder_commit,
572 .mode_set = intel_crt_mode_set,
573 .dpms = gmch_crt_dpms,
574};
575
576static const struct drm_connector_funcs intel_crt_connector_funcs = {
577 .reset = intel_crt_reset,
578 .dpms = drm_helper_connector_dpms,
579 .detect = intel_crt_detect,
580 .fill_modes = drm_helper_probe_single_connector_modes,
581 .destroy = intel_crt_destroy,
582 .set_property = intel_crt_set_property,
583};
584
585static const struct drm_connector_helper_funcs intel_crt_connector_helper_funcs = {
586 .mode_valid = intel_crt_mode_valid,
587 .get_modes = intel_crt_get_modes,
588 .best_encoder = intel_best_encoder,
589};
590
591static const struct drm_encoder_funcs intel_crt_enc_funcs = {
592 .destroy = intel_encoder_destroy,
593};
594
595static int __init intel_no_crt_dmi_callback(const struct dmi_system_id *id)
596{
597 DRM_INFO("Skipping CRT initialization for %s\n", id->ident);
598 return 1;
599}
600
601static const struct dmi_system_id intel_no_crt[] = {
602 {
603 .callback = intel_no_crt_dmi_callback,
604 .ident = "ACER ZGB",
605 .matches = {
606 DMI_MATCH(DMI_SYS_VENDOR, "ACER"),
607 DMI_MATCH(DMI_PRODUCT_NAME, "ZGB"),
608 },
609 },
610 { }
611};
612
613void intel_crt_init(struct drm_device *dev)
614{
615 struct drm_connector *connector;
616 struct intel_crt *crt;
617 struct intel_connector *intel_connector;
618 struct drm_i915_private *dev_priv = dev->dev_private;
619 const struct drm_encoder_helper_funcs *encoder_helper_funcs;
620
621 /* Skip machines without VGA that falsely report hotplug events */
622 if (dmi_check_system(intel_no_crt))
623 return;
624
625 crt = kzalloc(sizeof(struct intel_crt), GFP_KERNEL);
626 if (!crt)
627 return;
628
629 intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL);
630 if (!intel_connector) {
631 kfree(crt);
632 return;
633 }
634
635 connector = &intel_connector->base;
636 drm_connector_init(dev, &intel_connector->base,
637 &intel_crt_connector_funcs, DRM_MODE_CONNECTOR_VGA);
638
639 drm_encoder_init(dev, &crt->base.base, &intel_crt_enc_funcs,
640 DRM_MODE_ENCODER_DAC);
641
642 intel_connector_attach_encoder(intel_connector, &crt->base);
643
644 crt->base.type = INTEL_OUTPUT_ANALOG;
645 crt->base.clone_mask = (1 << INTEL_SDVO_NON_TV_CLONE_BIT |
646 1 << INTEL_ANALOG_CLONE_BIT |
647 1 << INTEL_SDVO_LVDS_CLONE_BIT);
648 if (IS_HASWELL(dev))
649 crt->base.crtc_mask = (1 << 0);
650 else
651 crt->base.crtc_mask = (1 << 0) | (1 << 1);
652
653 if (IS_GEN2(dev))
654 connector->interlace_allowed = 0;
655 else
656 connector->interlace_allowed = 1;
657 connector->doublescan_allowed = 0;
658
659 if (HAS_PCH_SPLIT(dev))
660 encoder_helper_funcs = &pch_encoder_funcs;
661 else
662 encoder_helper_funcs = &gmch_encoder_funcs;
663
664 drm_encoder_helper_add(&crt->base.base, encoder_helper_funcs);
665 drm_connector_helper_add(connector, &intel_crt_connector_helper_funcs);
666
667 drm_sysfs_connector_add(connector);
668
669 if (I915_HAS_HOTPLUG(dev))
670 connector->polled = DRM_CONNECTOR_POLL_HPD;
671 else
672 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
673
674 /*
675 * Configure the automatic hotplug detection stuff
676 */
677 crt->force_hotplug_required = 0;
678 if (HAS_PCH_SPLIT(dev)) {
679 u32 adpa;
680
681 adpa = I915_READ(PCH_ADPA);
682 adpa &= ~ADPA_CRT_HOTPLUG_MASK;
683 adpa |= ADPA_HOTPLUG_BITS;
684 I915_WRITE(PCH_ADPA, adpa);
685 POSTING_READ(PCH_ADPA);
686
687 DRM_DEBUG_KMS("pch crt adpa set to 0x%x\n", adpa);
688 crt->force_hotplug_required = 1;
689 }
690
691 dev_priv->hotplug_supported_mask |= CRT_HOTPLUG_INT_STATUS;
692}
1/*
2 * Copyright © 2006-2007 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
22 *
23 * Authors:
24 * Eric Anholt <eric@anholt.net>
25 */
26
27#include <linux/dmi.h>
28#include <linux/i2c.h>
29#include <linux/slab.h>
30#include <drm/drmP.h>
31#include <drm/drm_crtc.h>
32#include <drm/drm_crtc_helper.h>
33#include <drm/drm_edid.h>
34#include "intel_drv.h"
35#include <drm/i915_drm.h>
36#include "i915_drv.h"
37
38/* Here's the desired hotplug mode */
39#define ADPA_HOTPLUG_BITS (ADPA_CRT_HOTPLUG_PERIOD_128 | \
40 ADPA_CRT_HOTPLUG_WARMUP_10MS | \
41 ADPA_CRT_HOTPLUG_SAMPLE_4S | \
42 ADPA_CRT_HOTPLUG_VOLTAGE_50 | \
43 ADPA_CRT_HOTPLUG_VOLREF_325MV | \
44 ADPA_CRT_HOTPLUG_ENABLE)
45
46struct intel_crt {
47 struct intel_encoder base;
48 /* DPMS state is stored in the connector, which we need in the
49 * encoder's enable/disable callbacks */
50 struct intel_connector *connector;
51 bool force_hotplug_required;
52 u32 adpa_reg;
53};
54
55static struct intel_crt *intel_encoder_to_crt(struct intel_encoder *encoder)
56{
57 return container_of(encoder, struct intel_crt, base);
58}
59
60static struct intel_crt *intel_attached_crt(struct drm_connector *connector)
61{
62 return intel_encoder_to_crt(intel_attached_encoder(connector));
63}
64
65static bool intel_crt_get_hw_state(struct intel_encoder *encoder,
66 enum pipe *pipe)
67{
68 struct drm_device *dev = encoder->base.dev;
69 struct drm_i915_private *dev_priv = dev->dev_private;
70 struct intel_crt *crt = intel_encoder_to_crt(encoder);
71 enum intel_display_power_domain power_domain;
72 u32 tmp;
73
74 power_domain = intel_display_port_power_domain(encoder);
75 if (!intel_display_power_enabled(dev_priv, power_domain))
76 return false;
77
78 tmp = I915_READ(crt->adpa_reg);
79
80 if (!(tmp & ADPA_DAC_ENABLE))
81 return false;
82
83 if (HAS_PCH_CPT(dev))
84 *pipe = PORT_TO_PIPE_CPT(tmp);
85 else
86 *pipe = PORT_TO_PIPE(tmp);
87
88 return true;
89}
90
91static unsigned int intel_crt_get_flags(struct intel_encoder *encoder)
92{
93 struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
94 struct intel_crt *crt = intel_encoder_to_crt(encoder);
95 u32 tmp, flags = 0;
96
97 tmp = I915_READ(crt->adpa_reg);
98
99 if (tmp & ADPA_HSYNC_ACTIVE_HIGH)
100 flags |= DRM_MODE_FLAG_PHSYNC;
101 else
102 flags |= DRM_MODE_FLAG_NHSYNC;
103
104 if (tmp & ADPA_VSYNC_ACTIVE_HIGH)
105 flags |= DRM_MODE_FLAG_PVSYNC;
106 else
107 flags |= DRM_MODE_FLAG_NVSYNC;
108
109 return flags;
110}
111
112static void intel_crt_get_config(struct intel_encoder *encoder,
113 struct intel_crtc_config *pipe_config)
114{
115 struct drm_device *dev = encoder->base.dev;
116 int dotclock;
117
118 pipe_config->adjusted_mode.flags |= intel_crt_get_flags(encoder);
119
120 dotclock = pipe_config->port_clock;
121
122 if (HAS_PCH_SPLIT(dev))
123 ironlake_check_encoder_dotclock(pipe_config, dotclock);
124
125 pipe_config->adjusted_mode.crtc_clock = dotclock;
126}
127
128static void hsw_crt_get_config(struct intel_encoder *encoder,
129 struct intel_crtc_config *pipe_config)
130{
131 intel_ddi_get_config(encoder, pipe_config);
132
133 pipe_config->adjusted_mode.flags &= ~(DRM_MODE_FLAG_PHSYNC |
134 DRM_MODE_FLAG_NHSYNC |
135 DRM_MODE_FLAG_PVSYNC |
136 DRM_MODE_FLAG_NVSYNC);
137 pipe_config->adjusted_mode.flags |= intel_crt_get_flags(encoder);
138}
139
140/* Note: The caller is required to filter out dpms modes not supported by the
141 * platform. */
142static void intel_crt_set_dpms(struct intel_encoder *encoder, int mode)
143{
144 struct drm_device *dev = encoder->base.dev;
145 struct drm_i915_private *dev_priv = dev->dev_private;
146 struct intel_crt *crt = intel_encoder_to_crt(encoder);
147 u32 temp;
148
149 temp = I915_READ(crt->adpa_reg);
150 temp &= ~(ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE);
151 temp &= ~ADPA_DAC_ENABLE;
152
153 switch (mode) {
154 case DRM_MODE_DPMS_ON:
155 temp |= ADPA_DAC_ENABLE;
156 break;
157 case DRM_MODE_DPMS_STANDBY:
158 temp |= ADPA_DAC_ENABLE | ADPA_HSYNC_CNTL_DISABLE;
159 break;
160 case DRM_MODE_DPMS_SUSPEND:
161 temp |= ADPA_DAC_ENABLE | ADPA_VSYNC_CNTL_DISABLE;
162 break;
163 case DRM_MODE_DPMS_OFF:
164 temp |= ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE;
165 break;
166 }
167
168 I915_WRITE(crt->adpa_reg, temp);
169}
170
171static void intel_disable_crt(struct intel_encoder *encoder)
172{
173 intel_crt_set_dpms(encoder, DRM_MODE_DPMS_OFF);
174}
175
176static void intel_enable_crt(struct intel_encoder *encoder)
177{
178 struct intel_crt *crt = intel_encoder_to_crt(encoder);
179
180 intel_crt_set_dpms(encoder, crt->connector->base.dpms);
181}
182
183/* Special dpms function to support cloning between dvo/sdvo/crt. */
184static void intel_crt_dpms(struct drm_connector *connector, int mode)
185{
186 struct drm_device *dev = connector->dev;
187 struct intel_encoder *encoder = intel_attached_encoder(connector);
188 struct drm_crtc *crtc;
189 int old_dpms;
190
191 /* PCH platforms and VLV only support on/off. */
192 if (INTEL_INFO(dev)->gen >= 5 && mode != DRM_MODE_DPMS_ON)
193 mode = DRM_MODE_DPMS_OFF;
194
195 if (mode == connector->dpms)
196 return;
197
198 old_dpms = connector->dpms;
199 connector->dpms = mode;
200
201 /* Only need to change hw state when actually enabled */
202 crtc = encoder->base.crtc;
203 if (!crtc) {
204 encoder->connectors_active = false;
205 return;
206 }
207
208 /* We need the pipe to run for anything but OFF. */
209 if (mode == DRM_MODE_DPMS_OFF)
210 encoder->connectors_active = false;
211 else
212 encoder->connectors_active = true;
213
214 /* We call connector dpms manually below in case pipe dpms doesn't
215 * change due to cloning. */
216 if (mode < old_dpms) {
217 /* From off to on, enable the pipe first. */
218 intel_crtc_update_dpms(crtc);
219
220 intel_crt_set_dpms(encoder, mode);
221 } else {
222 intel_crt_set_dpms(encoder, mode);
223
224 intel_crtc_update_dpms(crtc);
225 }
226
227 intel_modeset_check_state(connector->dev);
228}
229
230static enum drm_mode_status
231intel_crt_mode_valid(struct drm_connector *connector,
232 struct drm_display_mode *mode)
233{
234 struct drm_device *dev = connector->dev;
235
236 int max_clock = 0;
237 if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
238 return MODE_NO_DBLESCAN;
239
240 if (mode->clock < 25000)
241 return MODE_CLOCK_LOW;
242
243 if (IS_GEN2(dev))
244 max_clock = 350000;
245 else
246 max_clock = 400000;
247 if (mode->clock > max_clock)
248 return MODE_CLOCK_HIGH;
249
250 /* The FDI receiver on LPT only supports 8bpc and only has 2 lanes. */
251 if (HAS_PCH_LPT(dev) &&
252 (ironlake_get_lanes_required(mode->clock, 270000, 24) > 2))
253 return MODE_CLOCK_HIGH;
254
255 return MODE_OK;
256}
257
258static bool intel_crt_compute_config(struct intel_encoder *encoder,
259 struct intel_crtc_config *pipe_config)
260{
261 struct drm_device *dev = encoder->base.dev;
262
263 if (HAS_PCH_SPLIT(dev))
264 pipe_config->has_pch_encoder = true;
265
266 /* LPT FDI RX only supports 8bpc. */
267 if (HAS_PCH_LPT(dev))
268 pipe_config->pipe_bpp = 24;
269
270 /* FDI must always be 2.7 GHz */
271 if (HAS_DDI(dev))
272 pipe_config->port_clock = 135000 * 2;
273
274 return true;
275}
276
277static void intel_crt_mode_set(struct intel_encoder *encoder)
278{
279
280 struct drm_device *dev = encoder->base.dev;
281 struct intel_crt *crt = intel_encoder_to_crt(encoder);
282 struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
283 struct drm_i915_private *dev_priv = dev->dev_private;
284 struct drm_display_mode *adjusted_mode = &crtc->config.adjusted_mode;
285 u32 adpa;
286
287 if (INTEL_INFO(dev)->gen >= 5)
288 adpa = ADPA_HOTPLUG_BITS;
289 else
290 adpa = 0;
291
292 if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
293 adpa |= ADPA_HSYNC_ACTIVE_HIGH;
294 if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
295 adpa |= ADPA_VSYNC_ACTIVE_HIGH;
296
297 /* For CPT allow 3 pipe config, for others just use A or B */
298 if (HAS_PCH_LPT(dev))
299 ; /* Those bits don't exist here */
300 else if (HAS_PCH_CPT(dev))
301 adpa |= PORT_TRANS_SEL_CPT(crtc->pipe);
302 else if (crtc->pipe == 0)
303 adpa |= ADPA_PIPE_A_SELECT;
304 else
305 adpa |= ADPA_PIPE_B_SELECT;
306
307 if (!HAS_PCH_SPLIT(dev))
308 I915_WRITE(BCLRPAT(crtc->pipe), 0);
309
310 I915_WRITE(crt->adpa_reg, adpa);
311}
312
313static bool intel_ironlake_crt_detect_hotplug(struct drm_connector *connector)
314{
315 struct drm_device *dev = connector->dev;
316 struct intel_crt *crt = intel_attached_crt(connector);
317 struct drm_i915_private *dev_priv = dev->dev_private;
318 u32 adpa;
319 bool ret;
320
321 /* The first time through, trigger an explicit detection cycle */
322 if (crt->force_hotplug_required) {
323 bool turn_off_dac = HAS_PCH_SPLIT(dev);
324 u32 save_adpa;
325
326 crt->force_hotplug_required = 0;
327
328 save_adpa = adpa = I915_READ(crt->adpa_reg);
329 DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", adpa);
330
331 adpa |= ADPA_CRT_HOTPLUG_FORCE_TRIGGER;
332 if (turn_off_dac)
333 adpa &= ~ADPA_DAC_ENABLE;
334
335 I915_WRITE(crt->adpa_reg, adpa);
336
337 if (wait_for((I915_READ(crt->adpa_reg) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER) == 0,
338 1000))
339 DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER");
340
341 if (turn_off_dac) {
342 I915_WRITE(crt->adpa_reg, save_adpa);
343 POSTING_READ(crt->adpa_reg);
344 }
345 }
346
347 /* Check the status to see if both blue and green are on now */
348 adpa = I915_READ(crt->adpa_reg);
349 if ((adpa & ADPA_CRT_HOTPLUG_MONITOR_MASK) != 0)
350 ret = true;
351 else
352 ret = false;
353 DRM_DEBUG_KMS("ironlake hotplug adpa=0x%x, result %d\n", adpa, ret);
354
355 return ret;
356}
357
358static bool valleyview_crt_detect_hotplug(struct drm_connector *connector)
359{
360 struct drm_device *dev = connector->dev;
361 struct intel_crt *crt = intel_attached_crt(connector);
362 struct drm_i915_private *dev_priv = dev->dev_private;
363 u32 adpa;
364 bool ret;
365 u32 save_adpa;
366
367 save_adpa = adpa = I915_READ(crt->adpa_reg);
368 DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", adpa);
369
370 adpa |= ADPA_CRT_HOTPLUG_FORCE_TRIGGER;
371
372 I915_WRITE(crt->adpa_reg, adpa);
373
374 if (wait_for((I915_READ(crt->adpa_reg) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER) == 0,
375 1000)) {
376 DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER");
377 I915_WRITE(crt->adpa_reg, save_adpa);
378 }
379
380 /* Check the status to see if both blue and green are on now */
381 adpa = I915_READ(crt->adpa_reg);
382 if ((adpa & ADPA_CRT_HOTPLUG_MONITOR_MASK) != 0)
383 ret = true;
384 else
385 ret = false;
386
387 DRM_DEBUG_KMS("valleyview hotplug adpa=0x%x, result %d\n", adpa, ret);
388
389 return ret;
390}
391
392/**
393 * Uses CRT_HOTPLUG_EN and CRT_HOTPLUG_STAT to detect CRT presence.
394 *
395 * Not for i915G/i915GM
396 *
397 * \return true if CRT is connected.
398 * \return false if CRT is disconnected.
399 */
400static bool intel_crt_detect_hotplug(struct drm_connector *connector)
401{
402 struct drm_device *dev = connector->dev;
403 struct drm_i915_private *dev_priv = dev->dev_private;
404 u32 hotplug_en, orig, stat;
405 bool ret = false;
406 int i, tries = 0;
407
408 if (HAS_PCH_SPLIT(dev))
409 return intel_ironlake_crt_detect_hotplug(connector);
410
411 if (IS_VALLEYVIEW(dev))
412 return valleyview_crt_detect_hotplug(connector);
413
414 /*
415 * On 4 series desktop, CRT detect sequence need to be done twice
416 * to get a reliable result.
417 */
418
419 if (IS_G4X(dev) && !IS_GM45(dev))
420 tries = 2;
421 else
422 tries = 1;
423 hotplug_en = orig = I915_READ(PORT_HOTPLUG_EN);
424 hotplug_en |= CRT_HOTPLUG_FORCE_DETECT;
425
426 for (i = 0; i < tries ; i++) {
427 /* turn on the FORCE_DETECT */
428 I915_WRITE(PORT_HOTPLUG_EN, hotplug_en);
429 /* wait for FORCE_DETECT to go off */
430 if (wait_for((I915_READ(PORT_HOTPLUG_EN) &
431 CRT_HOTPLUG_FORCE_DETECT) == 0,
432 1000))
433 DRM_DEBUG_KMS("timed out waiting for FORCE_DETECT to go off");
434 }
435
436 stat = I915_READ(PORT_HOTPLUG_STAT);
437 if ((stat & CRT_HOTPLUG_MONITOR_MASK) != CRT_HOTPLUG_MONITOR_NONE)
438 ret = true;
439
440 /* clear the interrupt we just generated, if any */
441 I915_WRITE(PORT_HOTPLUG_STAT, CRT_HOTPLUG_INT_STATUS);
442
443 /* and put the bits back */
444 I915_WRITE(PORT_HOTPLUG_EN, orig);
445
446 return ret;
447}
448
449static struct edid *intel_crt_get_edid(struct drm_connector *connector,
450 struct i2c_adapter *i2c)
451{
452 struct edid *edid;
453
454 edid = drm_get_edid(connector, i2c);
455
456 if (!edid && !intel_gmbus_is_forced_bit(i2c)) {
457 DRM_DEBUG_KMS("CRT GMBUS EDID read failed, retry using GPIO bit-banging\n");
458 intel_gmbus_force_bit(i2c, true);
459 edid = drm_get_edid(connector, i2c);
460 intel_gmbus_force_bit(i2c, false);
461 }
462
463 return edid;
464}
465
466/* local version of intel_ddc_get_modes() to use intel_crt_get_edid() */
467static int intel_crt_ddc_get_modes(struct drm_connector *connector,
468 struct i2c_adapter *adapter)
469{
470 struct edid *edid;
471 int ret;
472
473 edid = intel_crt_get_edid(connector, adapter);
474 if (!edid)
475 return 0;
476
477 ret = intel_connector_update_modes(connector, edid);
478 kfree(edid);
479
480 return ret;
481}
482
483static bool intel_crt_detect_ddc(struct drm_connector *connector)
484{
485 struct intel_crt *crt = intel_attached_crt(connector);
486 struct drm_i915_private *dev_priv = crt->base.base.dev->dev_private;
487 struct edid *edid;
488 struct i2c_adapter *i2c;
489
490 BUG_ON(crt->base.type != INTEL_OUTPUT_ANALOG);
491
492 i2c = intel_gmbus_get_adapter(dev_priv, dev_priv->vbt.crt_ddc_pin);
493 edid = intel_crt_get_edid(connector, i2c);
494
495 if (edid) {
496 bool is_digital = edid->input & DRM_EDID_INPUT_DIGITAL;
497
498 /*
499 * This may be a DVI-I connector with a shared DDC
500 * link between analog and digital outputs, so we
501 * have to check the EDID input spec of the attached device.
502 */
503 if (!is_digital) {
504 DRM_DEBUG_KMS("CRT detected via DDC:0x50 [EDID]\n");
505 return true;
506 }
507
508 DRM_DEBUG_KMS("CRT not detected via DDC:0x50 [EDID reports a digital panel]\n");
509 } else {
510 DRM_DEBUG_KMS("CRT not detected via DDC:0x50 [no valid EDID found]\n");
511 }
512
513 kfree(edid);
514
515 return false;
516}
517
518static enum drm_connector_status
519intel_crt_load_detect(struct intel_crt *crt)
520{
521 struct drm_device *dev = crt->base.base.dev;
522 struct drm_i915_private *dev_priv = dev->dev_private;
523 uint32_t pipe = to_intel_crtc(crt->base.base.crtc)->pipe;
524 uint32_t save_bclrpat;
525 uint32_t save_vtotal;
526 uint32_t vtotal, vactive;
527 uint32_t vsample;
528 uint32_t vblank, vblank_start, vblank_end;
529 uint32_t dsl;
530 uint32_t bclrpat_reg;
531 uint32_t vtotal_reg;
532 uint32_t vblank_reg;
533 uint32_t vsync_reg;
534 uint32_t pipeconf_reg;
535 uint32_t pipe_dsl_reg;
536 uint8_t st00;
537 enum drm_connector_status status;
538
539 DRM_DEBUG_KMS("starting load-detect on CRT\n");
540
541 bclrpat_reg = BCLRPAT(pipe);
542 vtotal_reg = VTOTAL(pipe);
543 vblank_reg = VBLANK(pipe);
544 vsync_reg = VSYNC(pipe);
545 pipeconf_reg = PIPECONF(pipe);
546 pipe_dsl_reg = PIPEDSL(pipe);
547
548 save_bclrpat = I915_READ(bclrpat_reg);
549 save_vtotal = I915_READ(vtotal_reg);
550 vblank = I915_READ(vblank_reg);
551
552 vtotal = ((save_vtotal >> 16) & 0xfff) + 1;
553 vactive = (save_vtotal & 0x7ff) + 1;
554
555 vblank_start = (vblank & 0xfff) + 1;
556 vblank_end = ((vblank >> 16) & 0xfff) + 1;
557
558 /* Set the border color to purple. */
559 I915_WRITE(bclrpat_reg, 0x500050);
560
561 if (!IS_GEN2(dev)) {
562 uint32_t pipeconf = I915_READ(pipeconf_reg);
563 I915_WRITE(pipeconf_reg, pipeconf | PIPECONF_FORCE_BORDER);
564 POSTING_READ(pipeconf_reg);
565 /* Wait for next Vblank to substitue
566 * border color for Color info */
567 intel_wait_for_vblank(dev, pipe);
568 st00 = I915_READ8(VGA_MSR_WRITE);
569 status = ((st00 & (1 << 4)) != 0) ?
570 connector_status_connected :
571 connector_status_disconnected;
572
573 I915_WRITE(pipeconf_reg, pipeconf);
574 } else {
575 bool restore_vblank = false;
576 int count, detect;
577
578 /*
579 * If there isn't any border, add some.
580 * Yes, this will flicker
581 */
582 if (vblank_start <= vactive && vblank_end >= vtotal) {
583 uint32_t vsync = I915_READ(vsync_reg);
584 uint32_t vsync_start = (vsync & 0xffff) + 1;
585
586 vblank_start = vsync_start;
587 I915_WRITE(vblank_reg,
588 (vblank_start - 1) |
589 ((vblank_end - 1) << 16));
590 restore_vblank = true;
591 }
592 /* sample in the vertical border, selecting the larger one */
593 if (vblank_start - vactive >= vtotal - vblank_end)
594 vsample = (vblank_start + vactive) >> 1;
595 else
596 vsample = (vtotal + vblank_end) >> 1;
597
598 /*
599 * Wait for the border to be displayed
600 */
601 while (I915_READ(pipe_dsl_reg) >= vactive)
602 ;
603 while ((dsl = I915_READ(pipe_dsl_reg)) <= vsample)
604 ;
605 /*
606 * Watch ST00 for an entire scanline
607 */
608 detect = 0;
609 count = 0;
610 do {
611 count++;
612 /* Read the ST00 VGA status register */
613 st00 = I915_READ8(VGA_MSR_WRITE);
614 if (st00 & (1 << 4))
615 detect++;
616 } while ((I915_READ(pipe_dsl_reg) == dsl));
617
618 /* restore vblank if necessary */
619 if (restore_vblank)
620 I915_WRITE(vblank_reg, vblank);
621 /*
622 * If more than 3/4 of the scanline detected a monitor,
623 * then it is assumed to be present. This works even on i830,
624 * where there isn't any way to force the border color across
625 * the screen
626 */
627 status = detect * 4 > count * 3 ?
628 connector_status_connected :
629 connector_status_disconnected;
630 }
631
632 /* Restore previous settings */
633 I915_WRITE(bclrpat_reg, save_bclrpat);
634
635 return status;
636}
637
638static enum drm_connector_status
639intel_crt_detect(struct drm_connector *connector, bool force)
640{
641 struct drm_device *dev = connector->dev;
642 struct drm_i915_private *dev_priv = dev->dev_private;
643 struct intel_crt *crt = intel_attached_crt(connector);
644 struct intel_encoder *intel_encoder = &crt->base;
645 enum intel_display_power_domain power_domain;
646 enum drm_connector_status status;
647 struct intel_load_detect_pipe tmp;
648
649 intel_runtime_pm_get(dev_priv);
650
651 DRM_DEBUG_KMS("[CONNECTOR:%d:%s] force=%d\n",
652 connector->base.id, drm_get_connector_name(connector),
653 force);
654
655 power_domain = intel_display_port_power_domain(intel_encoder);
656 intel_display_power_get(dev_priv, power_domain);
657
658 if (I915_HAS_HOTPLUG(dev)) {
659 /* We can not rely on the HPD pin always being correctly wired
660 * up, for example many KVM do not pass it through, and so
661 * only trust an assertion that the monitor is connected.
662 */
663 if (intel_crt_detect_hotplug(connector)) {
664 DRM_DEBUG_KMS("CRT detected via hotplug\n");
665 status = connector_status_connected;
666 goto out;
667 } else
668 DRM_DEBUG_KMS("CRT not detected via hotplug\n");
669 }
670
671 if (intel_crt_detect_ddc(connector)) {
672 status = connector_status_connected;
673 goto out;
674 }
675
676 /* Load detection is broken on HPD capable machines. Whoever wants a
677 * broken monitor (without edid) to work behind a broken kvm (that fails
678 * to have the right resistors for HP detection) needs to fix this up.
679 * For now just bail out. */
680 if (I915_HAS_HOTPLUG(dev)) {
681 status = connector_status_disconnected;
682 goto out;
683 }
684
685 if (!force) {
686 status = connector->status;
687 goto out;
688 }
689
690 /* for pre-945g platforms use load detect */
691 if (intel_get_load_detect_pipe(connector, NULL, &tmp)) {
692 if (intel_crt_detect_ddc(connector))
693 status = connector_status_connected;
694 else
695 status = intel_crt_load_detect(crt);
696 intel_release_load_detect_pipe(connector, &tmp);
697 } else
698 status = connector_status_unknown;
699
700out:
701 intel_display_power_put(dev_priv, power_domain);
702 intel_runtime_pm_put(dev_priv);
703
704 return status;
705}
706
707static void intel_crt_destroy(struct drm_connector *connector)
708{
709 drm_connector_cleanup(connector);
710 kfree(connector);
711}
712
713static int intel_crt_get_modes(struct drm_connector *connector)
714{
715 struct drm_device *dev = connector->dev;
716 struct drm_i915_private *dev_priv = dev->dev_private;
717 struct intel_crt *crt = intel_attached_crt(connector);
718 struct intel_encoder *intel_encoder = &crt->base;
719 enum intel_display_power_domain power_domain;
720 int ret;
721 struct i2c_adapter *i2c;
722
723 power_domain = intel_display_port_power_domain(intel_encoder);
724 intel_display_power_get(dev_priv, power_domain);
725
726 i2c = intel_gmbus_get_adapter(dev_priv, dev_priv->vbt.crt_ddc_pin);
727 ret = intel_crt_ddc_get_modes(connector, i2c);
728 if (ret || !IS_G4X(dev))
729 goto out;
730
731 /* Try to probe digital port for output in DVI-I -> VGA mode. */
732 i2c = intel_gmbus_get_adapter(dev_priv, GMBUS_PORT_DPB);
733 ret = intel_crt_ddc_get_modes(connector, i2c);
734
735out:
736 intel_display_power_put(dev_priv, power_domain);
737
738 return ret;
739}
740
741static int intel_crt_set_property(struct drm_connector *connector,
742 struct drm_property *property,
743 uint64_t value)
744{
745 return 0;
746}
747
748static void intel_crt_reset(struct drm_connector *connector)
749{
750 struct drm_device *dev = connector->dev;
751 struct drm_i915_private *dev_priv = dev->dev_private;
752 struct intel_crt *crt = intel_attached_crt(connector);
753
754 if (INTEL_INFO(dev)->gen >= 5) {
755 u32 adpa;
756
757 adpa = I915_READ(crt->adpa_reg);
758 adpa &= ~ADPA_CRT_HOTPLUG_MASK;
759 adpa |= ADPA_HOTPLUG_BITS;
760 I915_WRITE(crt->adpa_reg, adpa);
761 POSTING_READ(crt->adpa_reg);
762
763 DRM_DEBUG_KMS("pch crt adpa set to 0x%x\n", adpa);
764 crt->force_hotplug_required = 1;
765 }
766
767}
768
769/*
770 * Routines for controlling stuff on the analog port
771 */
772
773static const struct drm_connector_funcs intel_crt_connector_funcs = {
774 .reset = intel_crt_reset,
775 .dpms = intel_crt_dpms,
776 .detect = intel_crt_detect,
777 .fill_modes = drm_helper_probe_single_connector_modes,
778 .destroy = intel_crt_destroy,
779 .set_property = intel_crt_set_property,
780};
781
782static const struct drm_connector_helper_funcs intel_crt_connector_helper_funcs = {
783 .mode_valid = intel_crt_mode_valid,
784 .get_modes = intel_crt_get_modes,
785 .best_encoder = intel_best_encoder,
786};
787
788static const struct drm_encoder_funcs intel_crt_enc_funcs = {
789 .destroy = intel_encoder_destroy,
790};
791
792static int __init intel_no_crt_dmi_callback(const struct dmi_system_id *id)
793{
794 DRM_INFO("Skipping CRT initialization for %s\n", id->ident);
795 return 1;
796}
797
798static const struct dmi_system_id intel_no_crt[] = {
799 {
800 .callback = intel_no_crt_dmi_callback,
801 .ident = "ACER ZGB",
802 .matches = {
803 DMI_MATCH(DMI_SYS_VENDOR, "ACER"),
804 DMI_MATCH(DMI_PRODUCT_NAME, "ZGB"),
805 },
806 },
807 {
808 .callback = intel_no_crt_dmi_callback,
809 .ident = "DELL XPS 8700",
810 .matches = {
811 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
812 DMI_MATCH(DMI_PRODUCT_NAME, "XPS 8700"),
813 },
814 },
815 { }
816};
817
818void intel_crt_init(struct drm_device *dev)
819{
820 struct drm_connector *connector;
821 struct intel_crt *crt;
822 struct intel_connector *intel_connector;
823 struct drm_i915_private *dev_priv = dev->dev_private;
824
825 /* Skip machines without VGA that falsely report hotplug events */
826 if (dmi_check_system(intel_no_crt))
827 return;
828
829 crt = kzalloc(sizeof(struct intel_crt), GFP_KERNEL);
830 if (!crt)
831 return;
832
833 intel_connector = kzalloc(sizeof(*intel_connector), GFP_KERNEL);
834 if (!intel_connector) {
835 kfree(crt);
836 return;
837 }
838
839 connector = &intel_connector->base;
840 crt->connector = intel_connector;
841 drm_connector_init(dev, &intel_connector->base,
842 &intel_crt_connector_funcs, DRM_MODE_CONNECTOR_VGA);
843
844 drm_encoder_init(dev, &crt->base.base, &intel_crt_enc_funcs,
845 DRM_MODE_ENCODER_DAC);
846
847 intel_connector_attach_encoder(intel_connector, &crt->base);
848
849 crt->base.type = INTEL_OUTPUT_ANALOG;
850 crt->base.cloneable = (1 << INTEL_OUTPUT_DVO) | (1 << INTEL_OUTPUT_HDMI);
851 if (IS_I830(dev))
852 crt->base.crtc_mask = (1 << 0);
853 else
854 crt->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
855
856 if (IS_GEN2(dev))
857 connector->interlace_allowed = 0;
858 else
859 connector->interlace_allowed = 1;
860 connector->doublescan_allowed = 0;
861
862 if (HAS_PCH_SPLIT(dev))
863 crt->adpa_reg = PCH_ADPA;
864 else if (IS_VALLEYVIEW(dev))
865 crt->adpa_reg = VLV_ADPA;
866 else
867 crt->adpa_reg = ADPA;
868
869 crt->base.compute_config = intel_crt_compute_config;
870 crt->base.mode_set = intel_crt_mode_set;
871 crt->base.disable = intel_disable_crt;
872 crt->base.enable = intel_enable_crt;
873 if (I915_HAS_HOTPLUG(dev))
874 crt->base.hpd_pin = HPD_CRT;
875 if (HAS_DDI(dev)) {
876 crt->base.get_config = hsw_crt_get_config;
877 crt->base.get_hw_state = intel_ddi_get_hw_state;
878 } else {
879 crt->base.get_config = intel_crt_get_config;
880 crt->base.get_hw_state = intel_crt_get_hw_state;
881 }
882 intel_connector->get_hw_state = intel_connector_get_hw_state;
883 intel_connector->unregister = intel_connector_unregister;
884
885 drm_connector_helper_add(connector, &intel_crt_connector_helper_funcs);
886
887 drm_sysfs_connector_add(connector);
888
889 if (!I915_HAS_HOTPLUG(dev))
890 intel_connector->polled = DRM_CONNECTOR_POLL_CONNECT;
891
892 /*
893 * Configure the automatic hotplug detection stuff
894 */
895 crt->force_hotplug_required = 0;
896
897 /*
898 * TODO: find a proper way to discover whether we need to set the the
899 * polarity and link reversal bits or not, instead of relying on the
900 * BIOS.
901 */
902 if (HAS_PCH_LPT(dev)) {
903 u32 fdi_config = FDI_RX_POLARITY_REVERSED_LPT |
904 FDI_RX_LINK_REVERSAL_OVERRIDE;
905
906 dev_priv->fdi_rx_config = I915_READ(_FDI_RXA_CTL) & fdi_config;
907 }
908
909 intel_crt_reset(connector);
910}