Loading...
1/*
2 * arch/arm/mach-at91/pm.c
3 * AT91 Power Management
4 *
5 * Copyright (C) 2005 David Brownell
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 */
12
13#include <linux/gpio.h>
14#include <linux/suspend.h>
15#include <linux/sched.h>
16#include <linux/proc_fs.h>
17#include <linux/interrupt.h>
18#include <linux/sysfs.h>
19#include <linux/module.h>
20#include <linux/platform_device.h>
21#include <linux/io.h>
22
23#include <asm/irq.h>
24#include <linux/atomic.h>
25#include <asm/mach/time.h>
26#include <asm/mach/irq.h>
27
28#include <mach/at91_pmc.h>
29#include <mach/cpu.h>
30
31#include "generic.h"
32#include "pm.h"
33
34/*
35 * Show the reason for the previous system reset.
36 */
37
38#include <mach/at91_rstc.h>
39#include <mach/at91_shdwc.h>
40
41static void __init show_reset_status(void)
42{
43 static char reset[] __initdata = "reset";
44
45 static char general[] __initdata = "general";
46 static char wakeup[] __initdata = "wakeup";
47 static char watchdog[] __initdata = "watchdog";
48 static char software[] __initdata = "software";
49 static char user[] __initdata = "user";
50 static char unknown[] __initdata = "unknown";
51
52 static char signal[] __initdata = "signal";
53 static char rtc[] __initdata = "rtc";
54 static char rtt[] __initdata = "rtt";
55 static char restore[] __initdata = "power-restored";
56
57 char *reason, *r2 = reset;
58 u32 reset_type, wake_type;
59
60 if (!at91_shdwc_base || !at91_rstc_base)
61 return;
62
63 reset_type = at91_rstc_read(AT91_RSTC_SR) & AT91_RSTC_RSTTYP;
64 wake_type = at91_shdwc_read(AT91_SHDW_SR);
65
66 switch (reset_type) {
67 case AT91_RSTC_RSTTYP_GENERAL:
68 reason = general;
69 break;
70 case AT91_RSTC_RSTTYP_WAKEUP:
71 /* board-specific code enabled the wakeup sources */
72 reason = wakeup;
73
74 /* "wakeup signal" */
75 if (wake_type & AT91_SHDW_WAKEUP0)
76 r2 = signal;
77 else {
78 r2 = reason;
79 if (wake_type & AT91_SHDW_RTTWK) /* rtt wakeup */
80 reason = rtt;
81 else if (wake_type & AT91_SHDW_RTCWK) /* rtc wakeup */
82 reason = rtc;
83 else if (wake_type == 0) /* power-restored wakeup */
84 reason = restore;
85 else /* unknown wakeup */
86 reason = unknown;
87 }
88 break;
89 case AT91_RSTC_RSTTYP_WATCHDOG:
90 reason = watchdog;
91 break;
92 case AT91_RSTC_RSTTYP_SOFTWARE:
93 reason = software;
94 break;
95 case AT91_RSTC_RSTTYP_USER:
96 reason = user;
97 break;
98 default:
99 reason = unknown;
100 break;
101 }
102 pr_info("AT91: Starting after %s %s\n", reason, r2);
103}
104
105static int at91_pm_valid_state(suspend_state_t state)
106{
107 switch (state) {
108 case PM_SUSPEND_ON:
109 case PM_SUSPEND_STANDBY:
110 case PM_SUSPEND_MEM:
111 return 1;
112
113 default:
114 return 0;
115 }
116}
117
118
119static suspend_state_t target_state;
120
121/*
122 * Called after processes are frozen, but before we shutdown devices.
123 */
124static int at91_pm_begin(suspend_state_t state)
125{
126 target_state = state;
127 return 0;
128}
129
130/*
131 * Verify that all the clocks are correct before entering
132 * slow-clock mode.
133 */
134static int at91_pm_verify_clocks(void)
135{
136 unsigned long scsr;
137 int i;
138
139 scsr = at91_pmc_read(AT91_PMC_SCSR);
140
141 /* USB must not be using PLLB */
142 if (cpu_is_at91rm9200()) {
143 if ((scsr & (AT91RM9200_PMC_UHP | AT91RM9200_PMC_UDP)) != 0) {
144 pr_err("AT91: PM - Suspend-to-RAM with USB still active\n");
145 return 0;
146 }
147 } else if (cpu_is_at91sam9260() || cpu_is_at91sam9261() || cpu_is_at91sam9263()
148 || cpu_is_at91sam9g20() || cpu_is_at91sam9g10()) {
149 if ((scsr & (AT91SAM926x_PMC_UHP | AT91SAM926x_PMC_UDP)) != 0) {
150 pr_err("AT91: PM - Suspend-to-RAM with USB still active\n");
151 return 0;
152 }
153 }
154
155#ifdef CONFIG_AT91_PROGRAMMABLE_CLOCKS
156 /* PCK0..PCK3 must be disabled, or configured to use clk32k */
157 for (i = 0; i < 4; i++) {
158 u32 css;
159
160 if ((scsr & (AT91_PMC_PCK0 << i)) == 0)
161 continue;
162
163 css = at91_pmc_read(AT91_PMC_PCKR(i)) & AT91_PMC_CSS;
164 if (css != AT91_PMC_CSS_SLOW) {
165 pr_err("AT91: PM - Suspend-to-RAM with PCK%d src %d\n", i, css);
166 return 0;
167 }
168 }
169#endif
170
171 return 1;
172}
173
174/*
175 * Call this from platform driver suspend() to see how deeply to suspend.
176 * For example, some controllers (like OHCI) need one of the PLL clocks
177 * in order to act as a wakeup source, and those are not available when
178 * going into slow clock mode.
179 *
180 * REVISIT: generalize as clk_will_be_available(clk)? Other platforms have
181 * the very same problem (but not using at91 main_clk), and it'd be better
182 * to add one generic API rather than lots of platform-specific ones.
183 */
184int at91_suspend_entering_slow_clock(void)
185{
186 return (target_state == PM_SUSPEND_MEM);
187}
188EXPORT_SYMBOL(at91_suspend_entering_slow_clock);
189
190
191static void (*slow_clock)(void __iomem *pmc, void __iomem *ramc0,
192 void __iomem *ramc1, int memctrl);
193
194#ifdef CONFIG_AT91_SLOW_CLOCK
195extern void at91_slow_clock(void __iomem *pmc, void __iomem *ramc0,
196 void __iomem *ramc1, int memctrl);
197extern u32 at91_slow_clock_sz;
198#endif
199
200static int at91_pm_enter(suspend_state_t state)
201{
202 at91_gpio_suspend();
203 at91_irq_suspend();
204
205 pr_debug("AT91: PM - wake mask %08x, pm state %d\n",
206 /* remember all the always-wake irqs */
207 (at91_pmc_read(AT91_PMC_PCSR)
208 | (1 << AT91_ID_FIQ)
209 | (1 << AT91_ID_SYS)
210 | (at91_extern_irq))
211 & at91_aic_read(AT91_AIC_IMR),
212 state);
213
214 switch (state) {
215 /*
216 * Suspend-to-RAM is like STANDBY plus slow clock mode, so
217 * drivers must suspend more deeply: only the master clock
218 * controller may be using the main oscillator.
219 */
220 case PM_SUSPEND_MEM:
221 /*
222 * Ensure that clocks are in a valid state.
223 */
224 if (!at91_pm_verify_clocks())
225 goto error;
226
227 /*
228 * Enter slow clock mode by switching over to clk32k and
229 * turning off the main oscillator; reverse on wakeup.
230 */
231 if (slow_clock) {
232 int memctrl = AT91_MEMCTRL_SDRAMC;
233
234 if (cpu_is_at91rm9200())
235 memctrl = AT91_MEMCTRL_MC;
236 else if (cpu_is_at91sam9g45())
237 memctrl = AT91_MEMCTRL_DDRSDR;
238#ifdef CONFIG_AT91_SLOW_CLOCK
239 /* copy slow_clock handler to SRAM, and call it */
240 memcpy(slow_clock, at91_slow_clock, at91_slow_clock_sz);
241#endif
242 slow_clock(at91_pmc_base, at91_ramc_base[0],
243 at91_ramc_base[1], memctrl);
244 break;
245 } else {
246 pr_info("AT91: PM - no slow clock mode enabled ...\n");
247 /* FALLTHROUGH leaving master clock alone */
248 }
249
250 /*
251 * STANDBY mode has *all* drivers suspended; ignores irqs not
252 * marked as 'wakeup' event sources; and reduces DRAM power.
253 * But otherwise it's identical to PM_SUSPEND_ON: cpu idle, and
254 * nothing fancy done with main or cpu clocks.
255 */
256 case PM_SUSPEND_STANDBY:
257 /*
258 * NOTE: the Wait-for-Interrupt instruction needs to be
259 * in icache so no SDRAM accesses are needed until the
260 * wakeup IRQ occurs and self-refresh is terminated.
261 * For ARM 926 based chips, this requirement is weaker
262 * as at91sam9 can access a RAM in self-refresh mode.
263 */
264 if (cpu_is_at91rm9200())
265 at91rm9200_standby();
266 else if (cpu_is_at91sam9g45())
267 at91sam9g45_standby();
268 else
269 at91sam9_standby();
270 break;
271
272 case PM_SUSPEND_ON:
273 cpu_do_idle();
274 break;
275
276 default:
277 pr_debug("AT91: PM - bogus suspend state %d\n", state);
278 goto error;
279 }
280
281 pr_debug("AT91: PM - wakeup %08x\n",
282 at91_aic_read(AT91_AIC_IPR) & at91_aic_read(AT91_AIC_IMR));
283
284error:
285 target_state = PM_SUSPEND_ON;
286 at91_irq_resume();
287 at91_gpio_resume();
288 return 0;
289}
290
291/*
292 * Called right prior to thawing processes.
293 */
294static void at91_pm_end(void)
295{
296 target_state = PM_SUSPEND_ON;
297}
298
299
300static const struct platform_suspend_ops at91_pm_ops = {
301 .valid = at91_pm_valid_state,
302 .begin = at91_pm_begin,
303 .enter = at91_pm_enter,
304 .end = at91_pm_end,
305};
306
307static int __init at91_pm_init(void)
308{
309#ifdef CONFIG_AT91_SLOW_CLOCK
310 slow_clock = (void *) (AT91_IO_VIRT_BASE - at91_slow_clock_sz);
311#endif
312
313 pr_info("AT91: Power Management%s\n", (slow_clock ? " (with slow clock mode)" : ""));
314
315 /* AT91RM9200 SDRAM low-power mode cannot be used with self-refresh. */
316 if (cpu_is_at91rm9200())
317 at91_ramc_write(0, AT91RM9200_SDRAMC_LPR, 0);
318
319 suspend_set_ops(&at91_pm_ops);
320
321 show_reset_status();
322 return 0;
323}
324arch_initcall(at91_pm_init);
1/*
2 * arch/arm/mach-at91/pm.c
3 * AT91 Power Management
4 *
5 * Copyright (C) 2005 David Brownell
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 */
12
13#include <linux/gpio.h>
14#include <linux/suspend.h>
15#include <linux/sched.h>
16#include <linux/proc_fs.h>
17#include <linux/interrupt.h>
18#include <linux/sysfs.h>
19#include <linux/module.h>
20#include <linux/platform_device.h>
21#include <linux/io.h>
22#include <linux/clk/at91_pmc.h>
23
24#include <asm/irq.h>
25#include <linux/atomic.h>
26#include <asm/mach/time.h>
27#include <asm/mach/irq.h>
28
29#include <mach/cpu.h>
30#include <mach/hardware.h>
31
32#include "at91_aic.h"
33#include "generic.h"
34#include "pm.h"
35
36/*
37 * Show the reason for the previous system reset.
38 */
39
40#include "at91_rstc.h"
41#include "at91_shdwc.h"
42
43static void (*at91_pm_standby)(void);
44
45static void __init show_reset_status(void)
46{
47 static char reset[] __initdata = "reset";
48
49 static char general[] __initdata = "general";
50 static char wakeup[] __initdata = "wakeup";
51 static char watchdog[] __initdata = "watchdog";
52 static char software[] __initdata = "software";
53 static char user[] __initdata = "user";
54 static char unknown[] __initdata = "unknown";
55
56 static char signal[] __initdata = "signal";
57 static char rtc[] __initdata = "rtc";
58 static char rtt[] __initdata = "rtt";
59 static char restore[] __initdata = "power-restored";
60
61 char *reason, *r2 = reset;
62 u32 reset_type, wake_type;
63
64 if (!at91_shdwc_base || !at91_rstc_base)
65 return;
66
67 reset_type = at91_rstc_read(AT91_RSTC_SR) & AT91_RSTC_RSTTYP;
68 wake_type = at91_shdwc_read(AT91_SHDW_SR);
69
70 switch (reset_type) {
71 case AT91_RSTC_RSTTYP_GENERAL:
72 reason = general;
73 break;
74 case AT91_RSTC_RSTTYP_WAKEUP:
75 /* board-specific code enabled the wakeup sources */
76 reason = wakeup;
77
78 /* "wakeup signal" */
79 if (wake_type & AT91_SHDW_WAKEUP0)
80 r2 = signal;
81 else {
82 r2 = reason;
83 if (wake_type & AT91_SHDW_RTTWK) /* rtt wakeup */
84 reason = rtt;
85 else if (wake_type & AT91_SHDW_RTCWK) /* rtc wakeup */
86 reason = rtc;
87 else if (wake_type == 0) /* power-restored wakeup */
88 reason = restore;
89 else /* unknown wakeup */
90 reason = unknown;
91 }
92 break;
93 case AT91_RSTC_RSTTYP_WATCHDOG:
94 reason = watchdog;
95 break;
96 case AT91_RSTC_RSTTYP_SOFTWARE:
97 reason = software;
98 break;
99 case AT91_RSTC_RSTTYP_USER:
100 reason = user;
101 break;
102 default:
103 reason = unknown;
104 break;
105 }
106 pr_info("AT91: Starting after %s %s\n", reason, r2);
107}
108
109static int at91_pm_valid_state(suspend_state_t state)
110{
111 switch (state) {
112 case PM_SUSPEND_ON:
113 case PM_SUSPEND_STANDBY:
114 case PM_SUSPEND_MEM:
115 return 1;
116
117 default:
118 return 0;
119 }
120}
121
122
123static suspend_state_t target_state;
124
125/*
126 * Called after processes are frozen, but before we shutdown devices.
127 */
128static int at91_pm_begin(suspend_state_t state)
129{
130 target_state = state;
131 return 0;
132}
133
134/*
135 * Verify that all the clocks are correct before entering
136 * slow-clock mode.
137 */
138static int at91_pm_verify_clocks(void)
139{
140 unsigned long scsr;
141 int i;
142
143 scsr = at91_pmc_read(AT91_PMC_SCSR);
144
145 /* USB must not be using PLLB */
146 if (cpu_is_at91rm9200()) {
147 if ((scsr & (AT91RM9200_PMC_UHP | AT91RM9200_PMC_UDP)) != 0) {
148 pr_err("AT91: PM - Suspend-to-RAM with USB still active\n");
149 return 0;
150 }
151 } else if (cpu_is_at91sam9260() || cpu_is_at91sam9261() || cpu_is_at91sam9263()
152 || cpu_is_at91sam9g20() || cpu_is_at91sam9g10()) {
153 if ((scsr & (AT91SAM926x_PMC_UHP | AT91SAM926x_PMC_UDP)) != 0) {
154 pr_err("AT91: PM - Suspend-to-RAM with USB still active\n");
155 return 0;
156 }
157 }
158
159 /* PCK0..PCK3 must be disabled, or configured to use clk32k */
160 for (i = 0; i < 4; i++) {
161 u32 css;
162
163 if ((scsr & (AT91_PMC_PCK0 << i)) == 0)
164 continue;
165
166 css = at91_pmc_read(AT91_PMC_PCKR(i)) & AT91_PMC_CSS;
167 if (css != AT91_PMC_CSS_SLOW) {
168 pr_err("AT91: PM - Suspend-to-RAM with PCK%d src %d\n", i, css);
169 return 0;
170 }
171 }
172
173 return 1;
174}
175
176/*
177 * Call this from platform driver suspend() to see how deeply to suspend.
178 * For example, some controllers (like OHCI) need one of the PLL clocks
179 * in order to act as a wakeup source, and those are not available when
180 * going into slow clock mode.
181 *
182 * REVISIT: generalize as clk_will_be_available(clk)? Other platforms have
183 * the very same problem (but not using at91 main_clk), and it'd be better
184 * to add one generic API rather than lots of platform-specific ones.
185 */
186int at91_suspend_entering_slow_clock(void)
187{
188 return (target_state == PM_SUSPEND_MEM);
189}
190EXPORT_SYMBOL(at91_suspend_entering_slow_clock);
191
192
193static void (*slow_clock)(void __iomem *pmc, void __iomem *ramc0,
194 void __iomem *ramc1, int memctrl);
195
196#ifdef CONFIG_AT91_SLOW_CLOCK
197extern void at91_slow_clock(void __iomem *pmc, void __iomem *ramc0,
198 void __iomem *ramc1, int memctrl);
199extern u32 at91_slow_clock_sz;
200#endif
201
202static int at91_pm_enter(suspend_state_t state)
203{
204 if (of_have_populated_dt())
205 at91_pinctrl_gpio_suspend();
206 else
207 at91_gpio_suspend();
208 at91_irq_suspend();
209
210 pr_debug("AT91: PM - wake mask %08x, pm state %d\n",
211 /* remember all the always-wake irqs */
212 (at91_pmc_read(AT91_PMC_PCSR)
213 | (1 << AT91_ID_FIQ)
214 | (1 << AT91_ID_SYS)
215 | (at91_get_extern_irq()))
216 & at91_aic_read(AT91_AIC_IMR),
217 state);
218
219 switch (state) {
220 /*
221 * Suspend-to-RAM is like STANDBY plus slow clock mode, so
222 * drivers must suspend more deeply: only the master clock
223 * controller may be using the main oscillator.
224 */
225 case PM_SUSPEND_MEM:
226 /*
227 * Ensure that clocks are in a valid state.
228 */
229 if (!at91_pm_verify_clocks())
230 goto error;
231
232 /*
233 * Enter slow clock mode by switching over to clk32k and
234 * turning off the main oscillator; reverse on wakeup.
235 */
236 if (slow_clock) {
237 int memctrl = AT91_MEMCTRL_SDRAMC;
238
239 if (cpu_is_at91rm9200())
240 memctrl = AT91_MEMCTRL_MC;
241 else if (cpu_is_at91sam9g45())
242 memctrl = AT91_MEMCTRL_DDRSDR;
243#ifdef CONFIG_AT91_SLOW_CLOCK
244 /* copy slow_clock handler to SRAM, and call it */
245 memcpy(slow_clock, at91_slow_clock, at91_slow_clock_sz);
246#endif
247 slow_clock(at91_pmc_base, at91_ramc_base[0],
248 at91_ramc_base[1], memctrl);
249 break;
250 } else {
251 pr_info("AT91: PM - no slow clock mode enabled ...\n");
252 /* FALLTHROUGH leaving master clock alone */
253 }
254
255 /*
256 * STANDBY mode has *all* drivers suspended; ignores irqs not
257 * marked as 'wakeup' event sources; and reduces DRAM power.
258 * But otherwise it's identical to PM_SUSPEND_ON: cpu idle, and
259 * nothing fancy done with main or cpu clocks.
260 */
261 case PM_SUSPEND_STANDBY:
262 /*
263 * NOTE: the Wait-for-Interrupt instruction needs to be
264 * in icache so no SDRAM accesses are needed until the
265 * wakeup IRQ occurs and self-refresh is terminated.
266 * For ARM 926 based chips, this requirement is weaker
267 * as at91sam9 can access a RAM in self-refresh mode.
268 */
269 if (at91_pm_standby)
270 at91_pm_standby();
271 break;
272
273 case PM_SUSPEND_ON:
274 cpu_do_idle();
275 break;
276
277 default:
278 pr_debug("AT91: PM - bogus suspend state %d\n", state);
279 goto error;
280 }
281
282 pr_debug("AT91: PM - wakeup %08x\n",
283 at91_aic_read(AT91_AIC_IPR) & at91_aic_read(AT91_AIC_IMR));
284
285error:
286 target_state = PM_SUSPEND_ON;
287 at91_irq_resume();
288 if (of_have_populated_dt())
289 at91_pinctrl_gpio_resume();
290 else
291 at91_gpio_resume();
292 return 0;
293}
294
295/*
296 * Called right prior to thawing processes.
297 */
298static void at91_pm_end(void)
299{
300 target_state = PM_SUSPEND_ON;
301}
302
303
304static const struct platform_suspend_ops at91_pm_ops = {
305 .valid = at91_pm_valid_state,
306 .begin = at91_pm_begin,
307 .enter = at91_pm_enter,
308 .end = at91_pm_end,
309};
310
311static struct platform_device at91_cpuidle_device = {
312 .name = "cpuidle-at91",
313};
314
315void at91_pm_set_standby(void (*at91_standby)(void))
316{
317 if (at91_standby) {
318 at91_cpuidle_device.dev.platform_data = at91_standby;
319 at91_pm_standby = at91_standby;
320 }
321}
322
323static int __init at91_pm_init(void)
324{
325#ifdef CONFIG_AT91_SLOW_CLOCK
326 slow_clock = (void *) (AT91_IO_VIRT_BASE - at91_slow_clock_sz);
327#endif
328
329 pr_info("AT91: Power Management%s\n", (slow_clock ? " (with slow clock mode)" : ""));
330
331 /* AT91RM9200 SDRAM low-power mode cannot be used with self-refresh. */
332 if (cpu_is_at91rm9200())
333 at91_ramc_write(0, AT91RM9200_SDRAMC_LPR, 0);
334
335 if (at91_cpuidle_device.dev.platform_data)
336 platform_device_register(&at91_cpuidle_device);
337
338 suspend_set_ops(&at91_pm_ops);
339
340 show_reset_status();
341 return 0;
342}
343arch_initcall(at91_pm_init);