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1/*
2 * Copyright 2010 Tilera Corporation. All Rights Reserved.
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation, version 2.
7 *
8 * This program is distributed in the hope that it will be useful, but
9 * WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
11 * NON INFRINGEMENT. See the GNU General Public License for
12 * more details.
13 *
14 */
15
16#ifndef _ASM_TILE_PGTABLE_32_H
17#define _ASM_TILE_PGTABLE_32_H
18
19/*
20 * The level-1 index is defined by the huge page size. A PGD is composed
21 * of PTRS_PER_PGD pgd_t's and is the top level of the page table.
22 */
23#define PGDIR_SHIFT HPAGE_SHIFT
24#define PGDIR_SIZE HPAGE_SIZE
25#define PGDIR_MASK (~(PGDIR_SIZE-1))
26#define PTRS_PER_PGD _HV_L1_ENTRIES(HPAGE_SHIFT)
27#define PGD_INDEX(va) _HV_L1_INDEX(va, HPAGE_SHIFT)
28#define SIZEOF_PGD _HV_L1_SIZE(HPAGE_SHIFT)
29
30/*
31 * The level-2 index is defined by the difference between the huge
32 * page size and the normal page size. A PTE is composed of
33 * PTRS_PER_PTE pte_t's and is the bottom level of the page table.
34 * Note that the hypervisor docs use PTE for what we call pte_t, so
35 * this nomenclature is somewhat confusing.
36 */
37#define PTRS_PER_PTE _HV_L2_ENTRIES(HPAGE_SHIFT, PAGE_SHIFT)
38#define PTE_INDEX(va) _HV_L2_INDEX(va, HPAGE_SHIFT, PAGE_SHIFT)
39#define SIZEOF_PTE _HV_L2_SIZE(HPAGE_SHIFT, PAGE_SHIFT)
40
41#ifndef __ASSEMBLY__
42
43/*
44 * Right now we initialize only a single pte table. It can be extended
45 * easily, subsequent pte tables have to be allocated in one physical
46 * chunk of RAM.
47 *
48 * HOWEVER, if we are using an allocation scheme with slop after the
49 * end of the page table (e.g. where our L2 page tables are 2KB but
50 * our pages are 64KB and we are allocating via the page allocator)
51 * we can't extend it easily.
52 */
53#define LAST_PKMAP PTRS_PER_PTE
54
55#define PKMAP_BASE ((FIXADDR_BOOT_START - PAGE_SIZE*LAST_PKMAP) & PGDIR_MASK)
56
57#ifdef CONFIG_HIGHMEM
58# define __VMAPPING_END (PKMAP_BASE & ~(HPAGE_SIZE-1))
59#else
60# define __VMAPPING_END (FIXADDR_START & ~(HPAGE_SIZE-1))
61#endif
62
63#ifdef CONFIG_HUGEVMAP
64#define HUGE_VMAP_END __VMAPPING_END
65#define HUGE_VMAP_BASE (HUGE_VMAP_END - CONFIG_NR_HUGE_VMAPS * HPAGE_SIZE)
66#define _VMALLOC_END HUGE_VMAP_BASE
67#else
68#define _VMALLOC_END __VMAPPING_END
69#endif
70
71/*
72 * Align the vmalloc area to an L2 page table, and leave a guard page
73 * at the beginning and end. The vmalloc code also puts in an internal
74 * guard page between each allocation.
75 */
76#define VMALLOC_END (_VMALLOC_END - PAGE_SIZE)
77extern unsigned long VMALLOC_RESERVE /* = CONFIG_VMALLOC_RESERVE */;
78#define _VMALLOC_START (_VMALLOC_END - VMALLOC_RESERVE)
79#define VMALLOC_START (_VMALLOC_START + PAGE_SIZE)
80
81/* This is the maximum possible amount of lowmem. */
82#define MAXMEM (_VMALLOC_START - PAGE_OFFSET)
83
84/* We have no pmd or pud since we are strictly a two-level page table */
85#include <asm-generic/pgtable-nopmd.h>
86
87/* We don't define any pgds for these addresses. */
88static inline int pgd_addr_invalid(unsigned long addr)
89{
90 return addr >= MEM_HV_INTRPT;
91}
92
93/*
94 * Provide versions of these routines that can be used safely when
95 * the hypervisor may be asynchronously modifying dirty/accessed bits.
96 * ptep_get_and_clear() matches the generic one but we provide it to
97 * be parallel with the 64-bit code.
98 */
99#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
100#define __HAVE_ARCH_PTEP_SET_WRPROTECT
101
102extern int ptep_test_and_clear_young(struct vm_area_struct *,
103 unsigned long addr, pte_t *);
104extern void ptep_set_wrprotect(struct mm_struct *,
105 unsigned long addr, pte_t *);
106
107#define __HAVE_ARCH_PTEP_GET_AND_CLEAR
108static inline pte_t ptep_get_and_clear(struct mm_struct *mm,
109 unsigned long addr, pte_t *ptep)
110{
111 pte_t pte = *ptep;
112 pte_clear(_mm, addr, ptep);
113 return pte;
114}
115
116/*
117 * pmds are wrappers around pgds, which are the same as ptes.
118 * It's often convenient to "cast" back and forth and use the pte methods,
119 * which are the methods supplied by the hypervisor.
120 */
121#define pmd_pte(pmd) ((pmd).pud.pgd)
122#define pmdp_ptep(pmdp) (&(pmdp)->pud.pgd)
123#define pte_pmd(pte) ((pmd_t){ { (pte) } })
124
125#endif /* __ASSEMBLY__ */
126
127#endif /* _ASM_TILE_PGTABLE_32_H */
1/*
2 * Copyright 2010 Tilera Corporation. All Rights Reserved.
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation, version 2.
7 *
8 * This program is distributed in the hope that it will be useful, but
9 * WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
11 * NON INFRINGEMENT. See the GNU General Public License for
12 * more details.
13 *
14 */
15
16#ifndef _ASM_TILE_PGTABLE_32_H
17#define _ASM_TILE_PGTABLE_32_H
18
19/*
20 * The level-1 index is defined by the huge page size. A PGD is composed
21 * of PTRS_PER_PGD pgd_t's and is the top level of the page table.
22 */
23#define PGDIR_SHIFT HV_LOG2_PAGE_SIZE_LARGE
24#define PGDIR_SIZE HV_PAGE_SIZE_LARGE
25#define PGDIR_MASK (~(PGDIR_SIZE-1))
26#define PTRS_PER_PGD (1 << (32 - PGDIR_SHIFT))
27#define SIZEOF_PGD (PTRS_PER_PGD * sizeof(pgd_t))
28
29/*
30 * The level-2 index is defined by the difference between the huge
31 * page size and the normal page size. A PTE is composed of
32 * PTRS_PER_PTE pte_t's and is the bottom level of the page table.
33 * Note that the hypervisor docs use PTE for what we call pte_t, so
34 * this nomenclature is somewhat confusing.
35 */
36#define PTRS_PER_PTE (1 << (HV_LOG2_PAGE_SIZE_LARGE - HV_LOG2_PAGE_SIZE_SMALL))
37#define SIZEOF_PTE (PTRS_PER_PTE * sizeof(pte_t))
38
39#ifndef __ASSEMBLY__
40
41/*
42 * Right now we initialize only a single pte table. It can be extended
43 * easily, subsequent pte tables have to be allocated in one physical
44 * chunk of RAM.
45 *
46 * HOWEVER, if we are using an allocation scheme with slop after the
47 * end of the page table (e.g. where our L2 page tables are 2KB but
48 * our pages are 64KB and we are allocating via the page allocator)
49 * we can't extend it easily.
50 */
51#define LAST_PKMAP PTRS_PER_PTE
52
53#define PKMAP_BASE ((FIXADDR_BOOT_START - PAGE_SIZE*LAST_PKMAP) & PGDIR_MASK)
54
55#ifdef CONFIG_HIGHMEM
56# define __VMAPPING_END (PKMAP_BASE & ~(HPAGE_SIZE-1))
57#else
58# define __VMAPPING_END (FIXADDR_START & ~(HPAGE_SIZE-1))
59#endif
60
61#ifdef CONFIG_HUGEVMAP
62#define HUGE_VMAP_END __VMAPPING_END
63#define HUGE_VMAP_BASE (HUGE_VMAP_END - CONFIG_NR_HUGE_VMAPS * HPAGE_SIZE)
64#define _VMALLOC_END HUGE_VMAP_BASE
65#else
66#define _VMALLOC_END __VMAPPING_END
67#endif
68
69/*
70 * Align the vmalloc area to an L2 page table, and leave a guard page
71 * at the beginning and end. The vmalloc code also puts in an internal
72 * guard page between each allocation.
73 */
74#define VMALLOC_END (_VMALLOC_END - PAGE_SIZE)
75extern unsigned long VMALLOC_RESERVE /* = CONFIG_VMALLOC_RESERVE */;
76#define _VMALLOC_START (_VMALLOC_END - VMALLOC_RESERVE)
77#define VMALLOC_START (_VMALLOC_START + PAGE_SIZE)
78
79/* This is the maximum possible amount of lowmem. */
80#define MAXMEM (_VMALLOC_START - PAGE_OFFSET)
81
82/* We have no pmd or pud since we are strictly a two-level page table */
83#include <asm-generic/pgtable-nopmd.h>
84
85/* We don't define any pgds for these addresses. */
86static inline int pgd_addr_invalid(unsigned long addr)
87{
88 return addr >= MEM_HV_INTRPT;
89}
90
91/*
92 * Provide versions of these routines that can be used safely when
93 * the hypervisor may be asynchronously modifying dirty/accessed bits.
94 * ptep_get_and_clear() matches the generic one but we provide it to
95 * be parallel with the 64-bit code.
96 */
97#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
98#define __HAVE_ARCH_PTEP_SET_WRPROTECT
99
100extern int ptep_test_and_clear_young(struct vm_area_struct *,
101 unsigned long addr, pte_t *);
102extern void ptep_set_wrprotect(struct mm_struct *,
103 unsigned long addr, pte_t *);
104
105#define __HAVE_ARCH_PTEP_GET_AND_CLEAR
106static inline pte_t ptep_get_and_clear(struct mm_struct *mm,
107 unsigned long addr, pte_t *ptep)
108{
109 pte_t pte = *ptep;
110 pte_clear(_mm, addr, ptep);
111 return pte;
112}
113
114static inline void __set_pmd(pmd_t *pmdp, pmd_t pmdval)
115{
116 set_pte(&pmdp->pud.pgd, pmdval.pud.pgd);
117}
118
119/* Create a pmd from a PTFN. */
120static inline pmd_t ptfn_pmd(unsigned long ptfn, pgprot_t prot)
121{
122 return (pmd_t){ { hv_pte_set_ptfn(prot, ptfn) } };
123}
124
125/* Return the page-table frame number (ptfn) that a pmd_t points at. */
126#define pmd_ptfn(pmd) hv_pte_get_ptfn((pmd).pud.pgd)
127
128static inline void pmd_clear(pmd_t *pmdp)
129{
130 __pte_clear(&pmdp->pud.pgd);
131}
132
133#endif /* __ASSEMBLY__ */
134
135#endif /* _ASM_TILE_PGTABLE_32_H */