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1#ifndef _SPARC64_UPA_H
2#define _SPARC64_UPA_H
3
4#include <asm/asi.h>
5
6/* UPA level registers and defines. */
7
8/* UPA Config Register */
9#define UPA_CONFIG_RESV 0xffffffffc0000000 /* Reserved. */
10#define UPA_CONFIG_PCON 0x000000003fc00000 /* Depth of various sys queues. */
11#define UPA_CONFIG_MID 0x00000000003e0000 /* Module ID. */
12#define UPA_CONFIG_PCAP 0x000000000001ffff /* Port Capabilities. */
13
14/* UPA Port ID Register */
15#define UPA_PORTID_FNP 0xff00000000000000 /* Hardcoded to 0xfc on ultra. */
16#define UPA_PORTID_RESV 0x00fffff800000000 /* Reserved. */
17#define UPA_PORTID_ECCVALID 0x0000000400000000 /* Zero if mod can generate ECC */
18#define UPA_PORTID_ONEREAD 0x0000000200000000 /* Set if mod generates P_RASB */
19#define UPA_PORTID_PINTRDQ 0x0000000180000000 /* # outstanding P_INT_REQ's */
20#define UPA_PORTID_PREQDQ 0x000000007e000000 /* slave-wr's to mod supported */
21#define UPA_PORTID_PREQRD 0x0000000001e00000 /* # incoming P_REQ's supported */
22#define UPA_PORTID_UPACAP 0x00000000001f0000 /* UPA capabilities of mod */
23#define UPA_PORTID_ID 0x000000000000ffff /* Module Identification bits */
24
25/* UPA I/O space accessors */
26#if defined(__KERNEL__) && !defined(__ASSEMBLY__)
27static inline unsigned char _upa_readb(unsigned long addr)
28{
29 unsigned char ret;
30
31 __asm__ __volatile__("lduba\t[%1] %2, %0\t/* upa_readb */"
32 : "=r" (ret)
33 : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
34
35 return ret;
36}
37
38static inline unsigned short _upa_readw(unsigned long addr)
39{
40 unsigned short ret;
41
42 __asm__ __volatile__("lduha\t[%1] %2, %0\t/* upa_readw */"
43 : "=r" (ret)
44 : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
45
46 return ret;
47}
48
49static inline unsigned int _upa_readl(unsigned long addr)
50{
51 unsigned int ret;
52
53 __asm__ __volatile__("lduwa\t[%1] %2, %0\t/* upa_readl */"
54 : "=r" (ret)
55 : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
56
57 return ret;
58}
59
60static inline unsigned long _upa_readq(unsigned long addr)
61{
62 unsigned long ret;
63
64 __asm__ __volatile__("ldxa\t[%1] %2, %0\t/* upa_readq */"
65 : "=r" (ret)
66 : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
67
68 return ret;
69}
70
71static inline void _upa_writeb(unsigned char b, unsigned long addr)
72{
73 __asm__ __volatile__("stba\t%0, [%1] %2\t/* upa_writeb */"
74 : /* no outputs */
75 : "r" (b), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
76}
77
78static inline void _upa_writew(unsigned short w, unsigned long addr)
79{
80 __asm__ __volatile__("stha\t%0, [%1] %2\t/* upa_writew */"
81 : /* no outputs */
82 : "r" (w), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
83}
84
85static inline void _upa_writel(unsigned int l, unsigned long addr)
86{
87 __asm__ __volatile__("stwa\t%0, [%1] %2\t/* upa_writel */"
88 : /* no outputs */
89 : "r" (l), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
90}
91
92static inline void _upa_writeq(unsigned long q, unsigned long addr)
93{
94 __asm__ __volatile__("stxa\t%0, [%1] %2\t/* upa_writeq */"
95 : /* no outputs */
96 : "r" (q), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
97}
98
99#define upa_readb(__addr) (_upa_readb((unsigned long)(__addr)))
100#define upa_readw(__addr) (_upa_readw((unsigned long)(__addr)))
101#define upa_readl(__addr) (_upa_readl((unsigned long)(__addr)))
102#define upa_readq(__addr) (_upa_readq((unsigned long)(__addr)))
103#define upa_writeb(__b, __addr) (_upa_writeb((__b), (unsigned long)(__addr)))
104#define upa_writew(__w, __addr) (_upa_writew((__w), (unsigned long)(__addr)))
105#define upa_writel(__l, __addr) (_upa_writel((__l), (unsigned long)(__addr)))
106#define upa_writeq(__q, __addr) (_upa_writeq((__q), (unsigned long)(__addr)))
107#endif /* __KERNEL__ && !__ASSEMBLY__ */
108
109#endif /* !(_SPARC64_UPA_H) */
1#ifndef _SPARC64_UPA_H
2#define _SPARC64_UPA_H
3
4#include <asm/asi.h>
5
6/* UPA level registers and defines. */
7
8/* UPA Config Register */
9#define UPA_CONFIG_RESV 0xffffffffc0000000 /* Reserved. */
10#define UPA_CONFIG_PCON 0x000000003fc00000 /* Depth of various sys queues. */
11#define UPA_CONFIG_MID 0x00000000003e0000 /* Module ID. */
12#define UPA_CONFIG_PCAP 0x000000000001ffff /* Port Capabilities. */
13
14/* UPA Port ID Register */
15#define UPA_PORTID_FNP 0xff00000000000000 /* Hardcoded to 0xfc on ultra. */
16#define UPA_PORTID_RESV 0x00fffff800000000 /* Reserved. */
17#define UPA_PORTID_ECCVALID 0x0000000400000000 /* Zero if mod can generate ECC */
18#define UPA_PORTID_ONEREAD 0x0000000200000000 /* Set if mod generates P_RASB */
19#define UPA_PORTID_PINTRDQ 0x0000000180000000 /* # outstanding P_INT_REQ's */
20#define UPA_PORTID_PREQDQ 0x000000007e000000 /* slave-wr's to mod supported */
21#define UPA_PORTID_PREQRD 0x0000000001e00000 /* # incoming P_REQ's supported */
22#define UPA_PORTID_UPACAP 0x00000000001f0000 /* UPA capabilities of mod */
23#define UPA_PORTID_ID 0x000000000000ffff /* Module Identification bits */
24
25/* UPA I/O space accessors */
26#if defined(__KERNEL__) && !defined(__ASSEMBLY__)
27static inline unsigned char _upa_readb(unsigned long addr)
28{
29 unsigned char ret;
30
31 __asm__ __volatile__("lduba\t[%1] %2, %0\t/* upa_readb */"
32 : "=r" (ret)
33 : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
34
35 return ret;
36}
37
38static inline unsigned short _upa_readw(unsigned long addr)
39{
40 unsigned short ret;
41
42 __asm__ __volatile__("lduha\t[%1] %2, %0\t/* upa_readw */"
43 : "=r" (ret)
44 : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
45
46 return ret;
47}
48
49static inline unsigned int _upa_readl(unsigned long addr)
50{
51 unsigned int ret;
52
53 __asm__ __volatile__("lduwa\t[%1] %2, %0\t/* upa_readl */"
54 : "=r" (ret)
55 : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
56
57 return ret;
58}
59
60static inline unsigned long _upa_readq(unsigned long addr)
61{
62 unsigned long ret;
63
64 __asm__ __volatile__("ldxa\t[%1] %2, %0\t/* upa_readq */"
65 : "=r" (ret)
66 : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
67
68 return ret;
69}
70
71static inline void _upa_writeb(unsigned char b, unsigned long addr)
72{
73 __asm__ __volatile__("stba\t%0, [%1] %2\t/* upa_writeb */"
74 : /* no outputs */
75 : "r" (b), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
76}
77
78static inline void _upa_writew(unsigned short w, unsigned long addr)
79{
80 __asm__ __volatile__("stha\t%0, [%1] %2\t/* upa_writew */"
81 : /* no outputs */
82 : "r" (w), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
83}
84
85static inline void _upa_writel(unsigned int l, unsigned long addr)
86{
87 __asm__ __volatile__("stwa\t%0, [%1] %2\t/* upa_writel */"
88 : /* no outputs */
89 : "r" (l), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
90}
91
92static inline void _upa_writeq(unsigned long q, unsigned long addr)
93{
94 __asm__ __volatile__("stxa\t%0, [%1] %2\t/* upa_writeq */"
95 : /* no outputs */
96 : "r" (q), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
97}
98
99#define upa_readb(__addr) (_upa_readb((unsigned long)(__addr)))
100#define upa_readw(__addr) (_upa_readw((unsigned long)(__addr)))
101#define upa_readl(__addr) (_upa_readl((unsigned long)(__addr)))
102#define upa_readq(__addr) (_upa_readq((unsigned long)(__addr)))
103#define upa_writeb(__b, __addr) (_upa_writeb((__b), (unsigned long)(__addr)))
104#define upa_writew(__w, __addr) (_upa_writew((__w), (unsigned long)(__addr)))
105#define upa_writel(__l, __addr) (_upa_writel((__l), (unsigned long)(__addr)))
106#define upa_writeq(__q, __addr) (_upa_writeq((__q), (unsigned long)(__addr)))
107#endif /* __KERNEL__ && !__ASSEMBLY__ */
108
109#endif /* !(_SPARC64_UPA_H) */