1#ifndef __ASM_CPU_SH4_DMA_H
 2#define __ASM_CPU_SH4_DMA_H
 3
 4#include <linux/sh_intc.h>
 5
 
 
 
 
 
 6/*
 7 * SH7750/SH7751/SH7760
 8 */
 9#define DMTE0_IRQ	evt2irq(0x640)
10#define DMTE4_IRQ	evt2irq(0x780)
11#define DMTE6_IRQ	evt2irq(0x7c0)
12#define DMAE0_IRQ	evt2irq(0x6c0)
13
14#define SH_DMAC_BASE0	0xffa00000
15#define SH_DMAC_BASE1	0xffa00070
 
 
 
 
 
 
 
 
 
 
16
17#endif /* __ASM_CPU_SH4_DMA_H */

 1#ifndef __ASM_CPU_SH4_DMA_H
 2#define __ASM_CPU_SH4_DMA_H
 3
 4/* SH7751/7760/7780 DMA IRQ sources */
 5
 6#ifdef CONFIG_CPU_SH4A
 7
 8#include <cpu/dma-sh4a.h>
 9
10#else /* CONFIG_CPU_SH4A */
11/*
12 * SH7750/SH7751/SH7760
13 */
14#define DMTE0_IRQ	34
15#define DMTE4_IRQ	44
16#define DMTE6_IRQ	46
17#define DMAE0_IRQ	38
18
19#define SH_DMAC_BASE0	0xffa00000
20#define SH_DMAC_BASE1	0xffa00070
21/* Definitions for the SuperH DMAC */
22#define TM_BURST	0x00000080
23#define TS_8		0x00000010
24#define TS_16		0x00000020
25#define TS_32		0x00000030
26#define TS_64		0x00000000
27
28#define DMAOR_COD	0x00000008
29
30#endif
31
32#endif /* __ASM_CPU_SH4_DMA_H */