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v3.5.6
  1/*
  2 *  Copyright (C) 1995, 1996, 2001  Ralf Baechle
  3 *  Copyright (C) 2001, 2004  MIPS Technologies, Inc.
  4 *  Copyright (C) 2004  Maciej W. Rozycki
  5 */
  6#include <linux/delay.h>
  7#include <linux/kernel.h>
  8#include <linux/sched.h>
  9#include <linux/seq_file.h>
 10#include <asm/bootinfo.h>
 11#include <asm/cpu.h>
 12#include <asm/cpu-features.h>
 13#include <asm/mipsregs.h>
 14#include <asm/processor.h>
 15#include <asm/mips_machine.h>
 16
 17unsigned int vced_count, vcei_count;
 18
 19static int show_cpuinfo(struct seq_file *m, void *v)
 20{
 21	unsigned long n = (unsigned long) v - 1;
 22	unsigned int version = cpu_data[n].processor_id;
 23	unsigned int fp_vers = cpu_data[n].fpu_id;
 24	char fmt [64];
 25	int i;
 26
 27#ifdef CONFIG_SMP
 28	if (!cpu_online(n))
 29		return 0;
 30#endif
 31
 32	/*
 33	 * For the first processor also print the system type
 34	 */
 35	if (n == 0) {
 36		seq_printf(m, "system type\t\t: %s\n", get_system_type());
 37		if (mips_get_machine_name())
 38			seq_printf(m, "machine\t\t\t: %s\n",
 39				   mips_get_machine_name());
 40	}
 41
 42	seq_printf(m, "processor\t\t: %ld\n", n);
 43	sprintf(fmt, "cpu model\t\t: %%s V%%d.%%d%s\n",
 44		      cpu_data[n].options & MIPS_CPU_FPU ? "  FPU V%d.%d" : "");
 45	seq_printf(m, fmt, __cpu_name[n],
 46		      (version >> 4) & 0x0f, version & 0x0f,
 47		      (fp_vers >> 4) & 0x0f, fp_vers & 0x0f);
 48	seq_printf(m, "BogoMIPS\t\t: %u.%02u\n",
 49		      cpu_data[n].udelay_val / (500000/HZ),
 50		      (cpu_data[n].udelay_val / (5000/HZ)) % 100);
 51	seq_printf(m, "wait instruction\t: %s\n", cpu_wait ? "yes" : "no");
 52	seq_printf(m, "microsecond timers\t: %s\n",
 53		      cpu_has_counter ? "yes" : "no");
 54	seq_printf(m, "tlb_entries\t\t: %d\n", cpu_data[n].tlbsize);
 55	seq_printf(m, "extra interrupt vector\t: %s\n",
 56		      cpu_has_divec ? "yes" : "no");
 57	seq_printf(m, "hardware watchpoint\t: %s",
 58		      cpu_has_watch ? "yes, " : "no\n");
 59	if (cpu_has_watch) {
 60		seq_printf(m, "count: %d, address/irw mask: [",
 61		      cpu_data[n].watch_reg_count);
 62		for (i = 0; i < cpu_data[n].watch_reg_count; i++)
 63			seq_printf(m, "%s0x%04x", i ? ", " : "" ,
 64				cpu_data[n].watch_reg_masks[i]);
 65		seq_printf(m, "]\n");
 66	}
 67	seq_printf(m, "ASEs implemented\t:%s%s%s%s%s%s\n",
 68		      cpu_has_mips16 ? " mips16" : "",
 69		      cpu_has_mdmx ? " mdmx" : "",
 70		      cpu_has_mips3d ? " mips3d" : "",
 71		      cpu_has_smartmips ? " smartmips" : "",
 72		      cpu_has_dsp ? " dsp" : "",
 73		      cpu_has_mipsmt ? " mt" : ""
 74		);
 75	seq_printf(m, "shadow register sets\t: %d\n",
 76		      cpu_data[n].srsets);
 77	seq_printf(m, "kscratch registers\t: %d\n",
 78		      hweight8(cpu_data[n].kscratch_mask));
 79	seq_printf(m, "core\t\t\t: %d\n", cpu_data[n].core);
 80
 81	sprintf(fmt, "VCE%%c exceptions\t\t: %s\n",
 82		      cpu_has_vce ? "%u" : "not available");
 83	seq_printf(m, fmt, 'D', vced_count);
 84	seq_printf(m, fmt, 'I', vcei_count);
 85	seq_printf(m, "\n");
 86
 87	return 0;
 88}
 89
 90static void *c_start(struct seq_file *m, loff_t *pos)
 91{
 92	unsigned long i = *pos;
 93
 94	return i < NR_CPUS ? (void *) (i + 1) : NULL;
 95}
 96
 97static void *c_next(struct seq_file *m, void *v, loff_t *pos)
 98{
 99	++*pos;
100	return c_start(m, pos);
101}
102
103static void c_stop(struct seq_file *m, void *v)
104{
105}
106
107const struct seq_operations cpuinfo_op = {
108	.start	= c_start,
109	.next	= c_next,
110	.stop	= c_stop,
111	.show	= show_cpuinfo,
112};
v3.1
  1/*
  2 *  Copyright (C) 1995, 1996, 2001  Ralf Baechle
  3 *  Copyright (C) 2001, 2004  MIPS Technologies, Inc.
  4 *  Copyright (C) 2004  Maciej W. Rozycki
  5 */
  6#include <linux/delay.h>
  7#include <linux/kernel.h>
  8#include <linux/sched.h>
  9#include <linux/seq_file.h>
 10#include <asm/bootinfo.h>
 11#include <asm/cpu.h>
 12#include <asm/cpu-features.h>
 13#include <asm/mipsregs.h>
 14#include <asm/processor.h>
 15#include <asm/mips_machine.h>
 16
 17unsigned int vced_count, vcei_count;
 18
 19static int show_cpuinfo(struct seq_file *m, void *v)
 20{
 21	unsigned long n = (unsigned long) v - 1;
 22	unsigned int version = cpu_data[n].processor_id;
 23	unsigned int fp_vers = cpu_data[n].fpu_id;
 24	char fmt [64];
 25	int i;
 26
 27#ifdef CONFIG_SMP
 28	if (!cpu_isset(n, cpu_online_map))
 29		return 0;
 30#endif
 31
 32	/*
 33	 * For the first processor also print the system type
 34	 */
 35	if (n == 0) {
 36		seq_printf(m, "system type\t\t: %s\n", get_system_type());
 37		if (mips_get_machine_name())
 38			seq_printf(m, "machine\t\t\t: %s\n",
 39				   mips_get_machine_name());
 40	}
 41
 42	seq_printf(m, "processor\t\t: %ld\n", n);
 43	sprintf(fmt, "cpu model\t\t: %%s V%%d.%%d%s\n",
 44	        cpu_data[n].options & MIPS_CPU_FPU ? "  FPU V%d.%d" : "");
 45	seq_printf(m, fmt, __cpu_name[n],
 46	                           (version >> 4) & 0x0f, version & 0x0f,
 47	                           (fp_vers >> 4) & 0x0f, fp_vers & 0x0f);
 48	seq_printf(m, "BogoMIPS\t\t: %u.%02u\n",
 49	              cpu_data[n].udelay_val / (500000/HZ),
 50	              (cpu_data[n].udelay_val / (5000/HZ)) % 100);
 51	seq_printf(m, "wait instruction\t: %s\n", cpu_wait ? "yes" : "no");
 52	seq_printf(m, "microsecond timers\t: %s\n",
 53	              cpu_has_counter ? "yes" : "no");
 54	seq_printf(m, "tlb_entries\t\t: %d\n", cpu_data[n].tlbsize);
 55	seq_printf(m, "extra interrupt vector\t: %s\n",
 56	              cpu_has_divec ? "yes" : "no");
 57	seq_printf(m, "hardware watchpoint\t: %s",
 58		   cpu_has_watch ? "yes, " : "no\n");
 59	if (cpu_has_watch) {
 60		seq_printf(m, "count: %d, address/irw mask: [",
 61			   cpu_data[n].watch_reg_count);
 62		for (i = 0; i < cpu_data[n].watch_reg_count; i++)
 63			seq_printf(m, "%s0x%04x", i ? ", " : "" ,
 64				   cpu_data[n].watch_reg_masks[i]);
 65		seq_printf(m, "]\n");
 66	}
 67	seq_printf(m, "ASEs implemented\t:%s%s%s%s%s%s\n",
 68		      cpu_has_mips16 ? " mips16" : "",
 69		      cpu_has_mdmx ? " mdmx" : "",
 70		      cpu_has_mips3d ? " mips3d" : "",
 71		      cpu_has_smartmips ? " smartmips" : "",
 72		      cpu_has_dsp ? " dsp" : "",
 73		      cpu_has_mipsmt ? " mt" : ""
 74		);
 75	seq_printf(m, "shadow register sets\t: %d\n",
 76		       cpu_data[n].srsets);
 77	seq_printf(m, "kscratch registers\t: %d\n",
 78		   hweight8(cpu_data[n].kscratch_mask));
 79	seq_printf(m, "core\t\t\t: %d\n", cpu_data[n].core);
 80
 81	sprintf(fmt, "VCE%%c exceptions\t\t: %s\n",
 82	        cpu_has_vce ? "%u" : "not available");
 83	seq_printf(m, fmt, 'D', vced_count);
 84	seq_printf(m, fmt, 'I', vcei_count);
 85	seq_printf(m, "\n");
 86
 87	return 0;
 88}
 89
 90static void *c_start(struct seq_file *m, loff_t *pos)
 91{
 92	unsigned long i = *pos;
 93
 94	return i < NR_CPUS ? (void *) (i + 1) : NULL;
 95}
 96
 97static void *c_next(struct seq_file *m, void *v, loff_t *pos)
 98{
 99	++*pos;
100	return c_start(m, pos);
101}
102
103static void c_stop(struct seq_file *m, void *v)
104{
105}
106
107const struct seq_operations cpuinfo_op = {
108	.start	= c_start,
109	.next	= c_next,
110	.stop	= c_stop,
111	.show	= show_cpuinfo,
112};