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1/*
2 * drivers/pci/iov.c
3 *
4 * Copyright (C) 2009 Intel Corporation, Yu Zhao <yu.zhao@intel.com>
5 *
6 * PCI Express I/O Virtualization (IOV) support.
7 * Single Root IOV 1.0
8 * Address Translation Service 1.0
9 */
10
11#include <linux/pci.h>
12#include <linux/slab.h>
13#include <linux/mutex.h>
14#include <linux/export.h>
15#include <linux/string.h>
16#include <linux/delay.h>
17#include <linux/pci-ats.h>
18#include "pci.h"
19
20#define VIRTFN_ID_LEN 16
21
22static inline u8 virtfn_bus(struct pci_dev *dev, int id)
23{
24 return dev->bus->number + ((dev->devfn + dev->sriov->offset +
25 dev->sriov->stride * id) >> 8);
26}
27
28static inline u8 virtfn_devfn(struct pci_dev *dev, int id)
29{
30 return (dev->devfn + dev->sriov->offset +
31 dev->sriov->stride * id) & 0xff;
32}
33
34static struct pci_bus *virtfn_add_bus(struct pci_bus *bus, int busnr)
35{
36 int rc;
37 struct pci_bus *child;
38
39 if (bus->number == busnr)
40 return bus;
41
42 child = pci_find_bus(pci_domain_nr(bus), busnr);
43 if (child)
44 return child;
45
46 child = pci_add_new_bus(bus, NULL, busnr);
47 if (!child)
48 return NULL;
49
50 child->subordinate = busnr;
51 child->dev.parent = bus->bridge;
52 rc = pci_bus_add_child(child);
53 if (rc) {
54 pci_remove_bus(child);
55 return NULL;
56 }
57
58 return child;
59}
60
61static void virtfn_remove_bus(struct pci_bus *bus, int busnr)
62{
63 struct pci_bus *child;
64
65 if (bus->number == busnr)
66 return;
67
68 child = pci_find_bus(pci_domain_nr(bus), busnr);
69 BUG_ON(!child);
70
71 if (list_empty(&child->devices))
72 pci_remove_bus(child);
73}
74
75static int virtfn_add(struct pci_dev *dev, int id, int reset)
76{
77 int i;
78 int rc;
79 u64 size;
80 char buf[VIRTFN_ID_LEN];
81 struct pci_dev *virtfn;
82 struct resource *res;
83 struct pci_sriov *iov = dev->sriov;
84
85 virtfn = alloc_pci_dev();
86 if (!virtfn)
87 return -ENOMEM;
88
89 mutex_lock(&iov->dev->sriov->lock);
90 virtfn->bus = virtfn_add_bus(dev->bus, virtfn_bus(dev, id));
91 if (!virtfn->bus) {
92 kfree(virtfn);
93 mutex_unlock(&iov->dev->sriov->lock);
94 return -ENOMEM;
95 }
96 virtfn->devfn = virtfn_devfn(dev, id);
97 virtfn->vendor = dev->vendor;
98 pci_read_config_word(dev, iov->pos + PCI_SRIOV_VF_DID, &virtfn->device);
99 pci_setup_device(virtfn);
100 virtfn->dev.parent = dev->dev.parent;
101
102 for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
103 res = dev->resource + PCI_IOV_RESOURCES + i;
104 if (!res->parent)
105 continue;
106 virtfn->resource[i].name = pci_name(virtfn);
107 virtfn->resource[i].flags = res->flags;
108 size = resource_size(res);
109 do_div(size, iov->total);
110 virtfn->resource[i].start = res->start + size * id;
111 virtfn->resource[i].end = virtfn->resource[i].start + size - 1;
112 rc = request_resource(res, &virtfn->resource[i]);
113 BUG_ON(rc);
114 }
115
116 if (reset)
117 __pci_reset_function(virtfn);
118
119 pci_device_add(virtfn, virtfn->bus);
120 mutex_unlock(&iov->dev->sriov->lock);
121
122 virtfn->physfn = pci_dev_get(dev);
123 virtfn->is_virtfn = 1;
124
125 rc = pci_bus_add_device(virtfn);
126 if (rc)
127 goto failed1;
128 sprintf(buf, "virtfn%u", id);
129 rc = sysfs_create_link(&dev->dev.kobj, &virtfn->dev.kobj, buf);
130 if (rc)
131 goto failed1;
132 rc = sysfs_create_link(&virtfn->dev.kobj, &dev->dev.kobj, "physfn");
133 if (rc)
134 goto failed2;
135
136 kobject_uevent(&virtfn->dev.kobj, KOBJ_CHANGE);
137
138 return 0;
139
140failed2:
141 sysfs_remove_link(&dev->dev.kobj, buf);
142failed1:
143 pci_dev_put(dev);
144 mutex_lock(&iov->dev->sriov->lock);
145 pci_stop_and_remove_bus_device(virtfn);
146 virtfn_remove_bus(dev->bus, virtfn_bus(dev, id));
147 mutex_unlock(&iov->dev->sriov->lock);
148
149 return rc;
150}
151
152static void virtfn_remove(struct pci_dev *dev, int id, int reset)
153{
154 char buf[VIRTFN_ID_LEN];
155 struct pci_bus *bus;
156 struct pci_dev *virtfn;
157 struct pci_sriov *iov = dev->sriov;
158
159 bus = pci_find_bus(pci_domain_nr(dev->bus), virtfn_bus(dev, id));
160 if (!bus)
161 return;
162
163 virtfn = pci_get_slot(bus, virtfn_devfn(dev, id));
164 if (!virtfn)
165 return;
166
167 pci_dev_put(virtfn);
168
169 if (reset) {
170 device_release_driver(&virtfn->dev);
171 __pci_reset_function(virtfn);
172 }
173
174 sprintf(buf, "virtfn%u", id);
175 sysfs_remove_link(&dev->dev.kobj, buf);
176 /*
177 * pci_stop_dev() could have been called for this virtfn already,
178 * so the directory for the virtfn may have been removed before.
179 * Double check to avoid spurious sysfs warnings.
180 */
181 if (virtfn->dev.kobj.sd)
182 sysfs_remove_link(&virtfn->dev.kobj, "physfn");
183
184 mutex_lock(&iov->dev->sriov->lock);
185 pci_stop_and_remove_bus_device(virtfn);
186 virtfn_remove_bus(dev->bus, virtfn_bus(dev, id));
187 mutex_unlock(&iov->dev->sriov->lock);
188
189 pci_dev_put(dev);
190}
191
192static int sriov_migration(struct pci_dev *dev)
193{
194 u16 status;
195 struct pci_sriov *iov = dev->sriov;
196
197 if (!iov->nr_virtfn)
198 return 0;
199
200 if (!(iov->cap & PCI_SRIOV_CAP_VFM))
201 return 0;
202
203 pci_read_config_word(dev, iov->pos + PCI_SRIOV_STATUS, &status);
204 if (!(status & PCI_SRIOV_STATUS_VFM))
205 return 0;
206
207 schedule_work(&iov->mtask);
208
209 return 1;
210}
211
212static void sriov_migration_task(struct work_struct *work)
213{
214 int i;
215 u8 state;
216 u16 status;
217 struct pci_sriov *iov = container_of(work, struct pci_sriov, mtask);
218
219 for (i = iov->initial; i < iov->nr_virtfn; i++) {
220 state = readb(iov->mstate + i);
221 if (state == PCI_SRIOV_VFM_MI) {
222 writeb(PCI_SRIOV_VFM_AV, iov->mstate + i);
223 state = readb(iov->mstate + i);
224 if (state == PCI_SRIOV_VFM_AV)
225 virtfn_add(iov->self, i, 1);
226 } else if (state == PCI_SRIOV_VFM_MO) {
227 virtfn_remove(iov->self, i, 1);
228 writeb(PCI_SRIOV_VFM_UA, iov->mstate + i);
229 state = readb(iov->mstate + i);
230 if (state == PCI_SRIOV_VFM_AV)
231 virtfn_add(iov->self, i, 0);
232 }
233 }
234
235 pci_read_config_word(iov->self, iov->pos + PCI_SRIOV_STATUS, &status);
236 status &= ~PCI_SRIOV_STATUS_VFM;
237 pci_write_config_word(iov->self, iov->pos + PCI_SRIOV_STATUS, status);
238}
239
240static int sriov_enable_migration(struct pci_dev *dev, int nr_virtfn)
241{
242 int bir;
243 u32 table;
244 resource_size_t pa;
245 struct pci_sriov *iov = dev->sriov;
246
247 if (nr_virtfn <= iov->initial)
248 return 0;
249
250 pci_read_config_dword(dev, iov->pos + PCI_SRIOV_VFM, &table);
251 bir = PCI_SRIOV_VFM_BIR(table);
252 if (bir > PCI_STD_RESOURCE_END)
253 return -EIO;
254
255 table = PCI_SRIOV_VFM_OFFSET(table);
256 if (table + nr_virtfn > pci_resource_len(dev, bir))
257 return -EIO;
258
259 pa = pci_resource_start(dev, bir) + table;
260 iov->mstate = ioremap(pa, nr_virtfn);
261 if (!iov->mstate)
262 return -ENOMEM;
263
264 INIT_WORK(&iov->mtask, sriov_migration_task);
265
266 iov->ctrl |= PCI_SRIOV_CTRL_VFM | PCI_SRIOV_CTRL_INTR;
267 pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
268
269 return 0;
270}
271
272static void sriov_disable_migration(struct pci_dev *dev)
273{
274 struct pci_sriov *iov = dev->sriov;
275
276 iov->ctrl &= ~(PCI_SRIOV_CTRL_VFM | PCI_SRIOV_CTRL_INTR);
277 pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
278
279 cancel_work_sync(&iov->mtask);
280 iounmap(iov->mstate);
281}
282
283static int sriov_enable(struct pci_dev *dev, int nr_virtfn)
284{
285 int rc;
286 int i, j;
287 int nres;
288 u16 offset, stride, initial;
289 struct resource *res;
290 struct pci_dev *pdev;
291 struct pci_sriov *iov = dev->sriov;
292 int bars = 0;
293
294 if (!nr_virtfn)
295 return 0;
296
297 if (iov->nr_virtfn)
298 return -EINVAL;
299
300 pci_read_config_word(dev, iov->pos + PCI_SRIOV_INITIAL_VF, &initial);
301 if (initial > iov->total ||
302 (!(iov->cap & PCI_SRIOV_CAP_VFM) && (initial != iov->total)))
303 return -EIO;
304
305 if (nr_virtfn < 0 || nr_virtfn > iov->total ||
306 (!(iov->cap & PCI_SRIOV_CAP_VFM) && (nr_virtfn > initial)))
307 return -EINVAL;
308
309 pci_write_config_word(dev, iov->pos + PCI_SRIOV_NUM_VF, nr_virtfn);
310 pci_read_config_word(dev, iov->pos + PCI_SRIOV_VF_OFFSET, &offset);
311 pci_read_config_word(dev, iov->pos + PCI_SRIOV_VF_STRIDE, &stride);
312 if (!offset || (nr_virtfn > 1 && !stride))
313 return -EIO;
314
315 nres = 0;
316 for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
317 bars |= (1 << (i + PCI_IOV_RESOURCES));
318 res = dev->resource + PCI_IOV_RESOURCES + i;
319 if (res->parent)
320 nres++;
321 }
322 if (nres != iov->nres) {
323 dev_err(&dev->dev, "not enough MMIO resources for SR-IOV\n");
324 return -ENOMEM;
325 }
326
327 iov->offset = offset;
328 iov->stride = stride;
329
330 if (virtfn_bus(dev, nr_virtfn - 1) > dev->bus->subordinate) {
331 dev_err(&dev->dev, "SR-IOV: bus number out of range\n");
332 return -ENOMEM;
333 }
334
335 if (pci_enable_resources(dev, bars)) {
336 dev_err(&dev->dev, "SR-IOV: IOV BARS not allocated\n");
337 return -ENOMEM;
338 }
339
340 if (iov->link != dev->devfn) {
341 pdev = pci_get_slot(dev->bus, iov->link);
342 if (!pdev)
343 return -ENODEV;
344
345 pci_dev_put(pdev);
346
347 if (!pdev->is_physfn)
348 return -ENODEV;
349
350 rc = sysfs_create_link(&dev->dev.kobj,
351 &pdev->dev.kobj, "dep_link");
352 if (rc)
353 return rc;
354 }
355
356 iov->ctrl |= PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE;
357 pci_cfg_access_lock(dev);
358 pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
359 msleep(100);
360 pci_cfg_access_unlock(dev);
361
362 iov->initial = initial;
363 if (nr_virtfn < initial)
364 initial = nr_virtfn;
365
366 for (i = 0; i < initial; i++) {
367 rc = virtfn_add(dev, i, 0);
368 if (rc)
369 goto failed;
370 }
371
372 if (iov->cap & PCI_SRIOV_CAP_VFM) {
373 rc = sriov_enable_migration(dev, nr_virtfn);
374 if (rc)
375 goto failed;
376 }
377
378 kobject_uevent(&dev->dev.kobj, KOBJ_CHANGE);
379 iov->nr_virtfn = nr_virtfn;
380
381 return 0;
382
383failed:
384 for (j = 0; j < i; j++)
385 virtfn_remove(dev, j, 0);
386
387 iov->ctrl &= ~(PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE);
388 pci_cfg_access_lock(dev);
389 pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
390 ssleep(1);
391 pci_cfg_access_unlock(dev);
392
393 if (iov->link != dev->devfn)
394 sysfs_remove_link(&dev->dev.kobj, "dep_link");
395
396 return rc;
397}
398
399static void sriov_disable(struct pci_dev *dev)
400{
401 int i;
402 struct pci_sriov *iov = dev->sriov;
403
404 if (!iov->nr_virtfn)
405 return;
406
407 if (iov->cap & PCI_SRIOV_CAP_VFM)
408 sriov_disable_migration(dev);
409
410 for (i = 0; i < iov->nr_virtfn; i++)
411 virtfn_remove(dev, i, 0);
412
413 iov->ctrl &= ~(PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE);
414 pci_cfg_access_lock(dev);
415 pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
416 ssleep(1);
417 pci_cfg_access_unlock(dev);
418
419 if (iov->link != dev->devfn)
420 sysfs_remove_link(&dev->dev.kobj, "dep_link");
421
422 iov->nr_virtfn = 0;
423}
424
425static int sriov_init(struct pci_dev *dev, int pos)
426{
427 int i;
428 int rc;
429 int nres;
430 u32 pgsz;
431 u16 ctrl, total, offset, stride;
432 struct pci_sriov *iov;
433 struct resource *res;
434 struct pci_dev *pdev;
435
436 if (dev->pcie_type != PCI_EXP_TYPE_RC_END &&
437 dev->pcie_type != PCI_EXP_TYPE_ENDPOINT)
438 return -ENODEV;
439
440 pci_read_config_word(dev, pos + PCI_SRIOV_CTRL, &ctrl);
441 if (ctrl & PCI_SRIOV_CTRL_VFE) {
442 pci_write_config_word(dev, pos + PCI_SRIOV_CTRL, 0);
443 ssleep(1);
444 }
445
446 pci_read_config_word(dev, pos + PCI_SRIOV_TOTAL_VF, &total);
447 if (!total)
448 return 0;
449
450 ctrl = 0;
451 list_for_each_entry(pdev, &dev->bus->devices, bus_list)
452 if (pdev->is_physfn)
453 goto found;
454
455 pdev = NULL;
456 if (pci_ari_enabled(dev->bus))
457 ctrl |= PCI_SRIOV_CTRL_ARI;
458
459found:
460 pci_write_config_word(dev, pos + PCI_SRIOV_CTRL, ctrl);
461 pci_read_config_word(dev, pos + PCI_SRIOV_VF_OFFSET, &offset);
462 pci_read_config_word(dev, pos + PCI_SRIOV_VF_STRIDE, &stride);
463 if (!offset || (total > 1 && !stride))
464 return -EIO;
465
466 pci_read_config_dword(dev, pos + PCI_SRIOV_SUP_PGSIZE, &pgsz);
467 i = PAGE_SHIFT > 12 ? PAGE_SHIFT - 12 : 0;
468 pgsz &= ~((1 << i) - 1);
469 if (!pgsz)
470 return -EIO;
471
472 pgsz &= ~(pgsz - 1);
473 pci_write_config_dword(dev, pos + PCI_SRIOV_SYS_PGSIZE, pgsz);
474
475 nres = 0;
476 for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
477 res = dev->resource + PCI_IOV_RESOURCES + i;
478 i += __pci_read_base(dev, pci_bar_unknown, res,
479 pos + PCI_SRIOV_BAR + i * 4);
480 if (!res->flags)
481 continue;
482 if (resource_size(res) & (PAGE_SIZE - 1)) {
483 rc = -EIO;
484 goto failed;
485 }
486 res->end = res->start + resource_size(res) * total - 1;
487 nres++;
488 }
489
490 iov = kzalloc(sizeof(*iov), GFP_KERNEL);
491 if (!iov) {
492 rc = -ENOMEM;
493 goto failed;
494 }
495
496 iov->pos = pos;
497 iov->nres = nres;
498 iov->ctrl = ctrl;
499 iov->total = total;
500 iov->offset = offset;
501 iov->stride = stride;
502 iov->pgsz = pgsz;
503 iov->self = dev;
504 pci_read_config_dword(dev, pos + PCI_SRIOV_CAP, &iov->cap);
505 pci_read_config_byte(dev, pos + PCI_SRIOV_FUNC_LINK, &iov->link);
506 if (dev->pcie_type == PCI_EXP_TYPE_RC_END)
507 iov->link = PCI_DEVFN(PCI_SLOT(dev->devfn), iov->link);
508
509 if (pdev)
510 iov->dev = pci_dev_get(pdev);
511 else
512 iov->dev = dev;
513
514 mutex_init(&iov->lock);
515
516 dev->sriov = iov;
517 dev->is_physfn = 1;
518
519 return 0;
520
521failed:
522 for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
523 res = dev->resource + PCI_IOV_RESOURCES + i;
524 res->flags = 0;
525 }
526
527 return rc;
528}
529
530static void sriov_release(struct pci_dev *dev)
531{
532 BUG_ON(dev->sriov->nr_virtfn);
533
534 if (dev != dev->sriov->dev)
535 pci_dev_put(dev->sriov->dev);
536
537 mutex_destroy(&dev->sriov->lock);
538
539 kfree(dev->sriov);
540 dev->sriov = NULL;
541}
542
543static void sriov_restore_state(struct pci_dev *dev)
544{
545 int i;
546 u16 ctrl;
547 struct pci_sriov *iov = dev->sriov;
548
549 pci_read_config_word(dev, iov->pos + PCI_SRIOV_CTRL, &ctrl);
550 if (ctrl & PCI_SRIOV_CTRL_VFE)
551 return;
552
553 for (i = PCI_IOV_RESOURCES; i <= PCI_IOV_RESOURCE_END; i++)
554 pci_update_resource(dev, i);
555
556 pci_write_config_dword(dev, iov->pos + PCI_SRIOV_SYS_PGSIZE, iov->pgsz);
557 pci_write_config_word(dev, iov->pos + PCI_SRIOV_NUM_VF, iov->nr_virtfn);
558 pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
559 if (iov->ctrl & PCI_SRIOV_CTRL_VFE)
560 msleep(100);
561}
562
563/**
564 * pci_iov_init - initialize the IOV capability
565 * @dev: the PCI device
566 *
567 * Returns 0 on success, or negative on failure.
568 */
569int pci_iov_init(struct pci_dev *dev)
570{
571 int pos;
572
573 if (!pci_is_pcie(dev))
574 return -ENODEV;
575
576 pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_SRIOV);
577 if (pos)
578 return sriov_init(dev, pos);
579
580 return -ENODEV;
581}
582
583/**
584 * pci_iov_release - release resources used by the IOV capability
585 * @dev: the PCI device
586 */
587void pci_iov_release(struct pci_dev *dev)
588{
589 if (dev->is_physfn)
590 sriov_release(dev);
591}
592
593/**
594 * pci_iov_resource_bar - get position of the SR-IOV BAR
595 * @dev: the PCI device
596 * @resno: the resource number
597 * @type: the BAR type to be filled in
598 *
599 * Returns position of the BAR encapsulated in the SR-IOV capability.
600 */
601int pci_iov_resource_bar(struct pci_dev *dev, int resno,
602 enum pci_bar_type *type)
603{
604 if (resno < PCI_IOV_RESOURCES || resno > PCI_IOV_RESOURCE_END)
605 return 0;
606
607 BUG_ON(!dev->is_physfn);
608
609 *type = pci_bar_unknown;
610
611 return dev->sriov->pos + PCI_SRIOV_BAR +
612 4 * (resno - PCI_IOV_RESOURCES);
613}
614
615/**
616 * pci_sriov_resource_alignment - get resource alignment for VF BAR
617 * @dev: the PCI device
618 * @resno: the resource number
619 *
620 * Returns the alignment of the VF BAR found in the SR-IOV capability.
621 * This is not the same as the resource size which is defined as
622 * the VF BAR size multiplied by the number of VFs. The alignment
623 * is just the VF BAR size.
624 */
625resource_size_t pci_sriov_resource_alignment(struct pci_dev *dev, int resno)
626{
627 struct resource tmp;
628 enum pci_bar_type type;
629 int reg = pci_iov_resource_bar(dev, resno, &type);
630
631 if (!reg)
632 return 0;
633
634 __pci_read_base(dev, type, &tmp, reg);
635 return resource_alignment(&tmp);
636}
637
638/**
639 * pci_restore_iov_state - restore the state of the IOV capability
640 * @dev: the PCI device
641 */
642void pci_restore_iov_state(struct pci_dev *dev)
643{
644 if (dev->is_physfn)
645 sriov_restore_state(dev);
646}
647
648/**
649 * pci_iov_bus_range - find bus range used by Virtual Function
650 * @bus: the PCI bus
651 *
652 * Returns max number of buses (exclude current one) used by Virtual
653 * Functions.
654 */
655int pci_iov_bus_range(struct pci_bus *bus)
656{
657 int max = 0;
658 u8 busnr;
659 struct pci_dev *dev;
660
661 list_for_each_entry(dev, &bus->devices, bus_list) {
662 if (!dev->is_physfn)
663 continue;
664 busnr = virtfn_bus(dev, dev->sriov->total - 1);
665 if (busnr > max)
666 max = busnr;
667 }
668
669 return max ? max - bus->number : 0;
670}
671
672/**
673 * pci_enable_sriov - enable the SR-IOV capability
674 * @dev: the PCI device
675 * @nr_virtfn: number of virtual functions to enable
676 *
677 * Returns 0 on success, or negative on failure.
678 */
679int pci_enable_sriov(struct pci_dev *dev, int nr_virtfn)
680{
681 might_sleep();
682
683 if (!dev->is_physfn)
684 return -ENODEV;
685
686 return sriov_enable(dev, nr_virtfn);
687}
688EXPORT_SYMBOL_GPL(pci_enable_sriov);
689
690/**
691 * pci_disable_sriov - disable the SR-IOV capability
692 * @dev: the PCI device
693 */
694void pci_disable_sriov(struct pci_dev *dev)
695{
696 might_sleep();
697
698 if (!dev->is_physfn)
699 return;
700
701 sriov_disable(dev);
702}
703EXPORT_SYMBOL_GPL(pci_disable_sriov);
704
705/**
706 * pci_sriov_migration - notify SR-IOV core of Virtual Function Migration
707 * @dev: the PCI device
708 *
709 * Returns IRQ_HANDLED if the IRQ is handled, or IRQ_NONE if not.
710 *
711 * Physical Function driver is responsible to register IRQ handler using
712 * VF Migration Interrupt Message Number, and call this function when the
713 * interrupt is generated by the hardware.
714 */
715irqreturn_t pci_sriov_migration(struct pci_dev *dev)
716{
717 if (!dev->is_physfn)
718 return IRQ_NONE;
719
720 return sriov_migration(dev) ? IRQ_HANDLED : IRQ_NONE;
721}
722EXPORT_SYMBOL_GPL(pci_sriov_migration);
723
724/**
725 * pci_num_vf - return number of VFs associated with a PF device_release_driver
726 * @dev: the PCI device
727 *
728 * Returns number of VFs, or 0 if SR-IOV is not enabled.
729 */
730int pci_num_vf(struct pci_dev *dev)
731{
732 if (!dev || !dev->is_physfn)
733 return 0;
734 else
735 return dev->sriov->nr_virtfn;
736}
737EXPORT_SYMBOL_GPL(pci_num_vf);
1/*
2 * drivers/pci/iov.c
3 *
4 * Copyright (C) 2009 Intel Corporation, Yu Zhao <yu.zhao@intel.com>
5 *
6 * PCI Express I/O Virtualization (IOV) support.
7 * Single Root IOV 1.0
8 * Address Translation Service 1.0
9 */
10
11#include <linux/pci.h>
12#include <linux/slab.h>
13#include <linux/mutex.h>
14#include <linux/string.h>
15#include <linux/delay.h>
16#include <linux/pci-ats.h>
17#include "pci.h"
18
19#define VIRTFN_ID_LEN 16
20
21static inline u8 virtfn_bus(struct pci_dev *dev, int id)
22{
23 return dev->bus->number + ((dev->devfn + dev->sriov->offset +
24 dev->sriov->stride * id) >> 8);
25}
26
27static inline u8 virtfn_devfn(struct pci_dev *dev, int id)
28{
29 return (dev->devfn + dev->sriov->offset +
30 dev->sriov->stride * id) & 0xff;
31}
32
33static struct pci_bus *virtfn_add_bus(struct pci_bus *bus, int busnr)
34{
35 int rc;
36 struct pci_bus *child;
37
38 if (bus->number == busnr)
39 return bus;
40
41 child = pci_find_bus(pci_domain_nr(bus), busnr);
42 if (child)
43 return child;
44
45 child = pci_add_new_bus(bus, NULL, busnr);
46 if (!child)
47 return NULL;
48
49 child->subordinate = busnr;
50 child->dev.parent = bus->bridge;
51 rc = pci_bus_add_child(child);
52 if (rc) {
53 pci_remove_bus(child);
54 return NULL;
55 }
56
57 return child;
58}
59
60static void virtfn_remove_bus(struct pci_bus *bus, int busnr)
61{
62 struct pci_bus *child;
63
64 if (bus->number == busnr)
65 return;
66
67 child = pci_find_bus(pci_domain_nr(bus), busnr);
68 BUG_ON(!child);
69
70 if (list_empty(&child->devices))
71 pci_remove_bus(child);
72}
73
74static int virtfn_add(struct pci_dev *dev, int id, int reset)
75{
76 int i;
77 int rc;
78 u64 size;
79 char buf[VIRTFN_ID_LEN];
80 struct pci_dev *virtfn;
81 struct resource *res;
82 struct pci_sriov *iov = dev->sriov;
83
84 virtfn = alloc_pci_dev();
85 if (!virtfn)
86 return -ENOMEM;
87
88 mutex_lock(&iov->dev->sriov->lock);
89 virtfn->bus = virtfn_add_bus(dev->bus, virtfn_bus(dev, id));
90 if (!virtfn->bus) {
91 kfree(virtfn);
92 mutex_unlock(&iov->dev->sriov->lock);
93 return -ENOMEM;
94 }
95 virtfn->devfn = virtfn_devfn(dev, id);
96 virtfn->vendor = dev->vendor;
97 pci_read_config_word(dev, iov->pos + PCI_SRIOV_VF_DID, &virtfn->device);
98 pci_setup_device(virtfn);
99 virtfn->dev.parent = dev->dev.parent;
100
101 for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
102 res = dev->resource + PCI_IOV_RESOURCES + i;
103 if (!res->parent)
104 continue;
105 virtfn->resource[i].name = pci_name(virtfn);
106 virtfn->resource[i].flags = res->flags;
107 size = resource_size(res);
108 do_div(size, iov->total);
109 virtfn->resource[i].start = res->start + size * id;
110 virtfn->resource[i].end = virtfn->resource[i].start + size - 1;
111 rc = request_resource(res, &virtfn->resource[i]);
112 BUG_ON(rc);
113 }
114
115 if (reset)
116 __pci_reset_function(virtfn);
117
118 pci_device_add(virtfn, virtfn->bus);
119 mutex_unlock(&iov->dev->sriov->lock);
120
121 virtfn->physfn = pci_dev_get(dev);
122 virtfn->is_virtfn = 1;
123
124 rc = pci_bus_add_device(virtfn);
125 if (rc)
126 goto failed1;
127 sprintf(buf, "virtfn%u", id);
128 rc = sysfs_create_link(&dev->dev.kobj, &virtfn->dev.kobj, buf);
129 if (rc)
130 goto failed1;
131 rc = sysfs_create_link(&virtfn->dev.kobj, &dev->dev.kobj, "physfn");
132 if (rc)
133 goto failed2;
134
135 kobject_uevent(&virtfn->dev.kobj, KOBJ_CHANGE);
136
137 return 0;
138
139failed2:
140 sysfs_remove_link(&dev->dev.kobj, buf);
141failed1:
142 pci_dev_put(dev);
143 mutex_lock(&iov->dev->sriov->lock);
144 pci_remove_bus_device(virtfn);
145 virtfn_remove_bus(dev->bus, virtfn_bus(dev, id));
146 mutex_unlock(&iov->dev->sriov->lock);
147
148 return rc;
149}
150
151static void virtfn_remove(struct pci_dev *dev, int id, int reset)
152{
153 char buf[VIRTFN_ID_LEN];
154 struct pci_bus *bus;
155 struct pci_dev *virtfn;
156 struct pci_sriov *iov = dev->sriov;
157
158 bus = pci_find_bus(pci_domain_nr(dev->bus), virtfn_bus(dev, id));
159 if (!bus)
160 return;
161
162 virtfn = pci_get_slot(bus, virtfn_devfn(dev, id));
163 if (!virtfn)
164 return;
165
166 pci_dev_put(virtfn);
167
168 if (reset) {
169 device_release_driver(&virtfn->dev);
170 __pci_reset_function(virtfn);
171 }
172
173 sprintf(buf, "virtfn%u", id);
174 sysfs_remove_link(&dev->dev.kobj, buf);
175 sysfs_remove_link(&virtfn->dev.kobj, "physfn");
176
177 mutex_lock(&iov->dev->sriov->lock);
178 pci_remove_bus_device(virtfn);
179 virtfn_remove_bus(dev->bus, virtfn_bus(dev, id));
180 mutex_unlock(&iov->dev->sriov->lock);
181
182 pci_dev_put(dev);
183}
184
185static int sriov_migration(struct pci_dev *dev)
186{
187 u16 status;
188 struct pci_sriov *iov = dev->sriov;
189
190 if (!iov->nr_virtfn)
191 return 0;
192
193 if (!(iov->cap & PCI_SRIOV_CAP_VFM))
194 return 0;
195
196 pci_read_config_word(dev, iov->pos + PCI_SRIOV_STATUS, &status);
197 if (!(status & PCI_SRIOV_STATUS_VFM))
198 return 0;
199
200 schedule_work(&iov->mtask);
201
202 return 1;
203}
204
205static void sriov_migration_task(struct work_struct *work)
206{
207 int i;
208 u8 state;
209 u16 status;
210 struct pci_sriov *iov = container_of(work, struct pci_sriov, mtask);
211
212 for (i = iov->initial; i < iov->nr_virtfn; i++) {
213 state = readb(iov->mstate + i);
214 if (state == PCI_SRIOV_VFM_MI) {
215 writeb(PCI_SRIOV_VFM_AV, iov->mstate + i);
216 state = readb(iov->mstate + i);
217 if (state == PCI_SRIOV_VFM_AV)
218 virtfn_add(iov->self, i, 1);
219 } else if (state == PCI_SRIOV_VFM_MO) {
220 virtfn_remove(iov->self, i, 1);
221 writeb(PCI_SRIOV_VFM_UA, iov->mstate + i);
222 state = readb(iov->mstate + i);
223 if (state == PCI_SRIOV_VFM_AV)
224 virtfn_add(iov->self, i, 0);
225 }
226 }
227
228 pci_read_config_word(iov->self, iov->pos + PCI_SRIOV_STATUS, &status);
229 status &= ~PCI_SRIOV_STATUS_VFM;
230 pci_write_config_word(iov->self, iov->pos + PCI_SRIOV_STATUS, status);
231}
232
233static int sriov_enable_migration(struct pci_dev *dev, int nr_virtfn)
234{
235 int bir;
236 u32 table;
237 resource_size_t pa;
238 struct pci_sriov *iov = dev->sriov;
239
240 if (nr_virtfn <= iov->initial)
241 return 0;
242
243 pci_read_config_dword(dev, iov->pos + PCI_SRIOV_VFM, &table);
244 bir = PCI_SRIOV_VFM_BIR(table);
245 if (bir > PCI_STD_RESOURCE_END)
246 return -EIO;
247
248 table = PCI_SRIOV_VFM_OFFSET(table);
249 if (table + nr_virtfn > pci_resource_len(dev, bir))
250 return -EIO;
251
252 pa = pci_resource_start(dev, bir) + table;
253 iov->mstate = ioremap(pa, nr_virtfn);
254 if (!iov->mstate)
255 return -ENOMEM;
256
257 INIT_WORK(&iov->mtask, sriov_migration_task);
258
259 iov->ctrl |= PCI_SRIOV_CTRL_VFM | PCI_SRIOV_CTRL_INTR;
260 pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
261
262 return 0;
263}
264
265static void sriov_disable_migration(struct pci_dev *dev)
266{
267 struct pci_sriov *iov = dev->sriov;
268
269 iov->ctrl &= ~(PCI_SRIOV_CTRL_VFM | PCI_SRIOV_CTRL_INTR);
270 pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
271
272 cancel_work_sync(&iov->mtask);
273 iounmap(iov->mstate);
274}
275
276static int sriov_enable(struct pci_dev *dev, int nr_virtfn)
277{
278 int rc;
279 int i, j;
280 int nres;
281 u16 offset, stride, initial;
282 struct resource *res;
283 struct pci_dev *pdev;
284 struct pci_sriov *iov = dev->sriov;
285
286 if (!nr_virtfn)
287 return 0;
288
289 if (iov->nr_virtfn)
290 return -EINVAL;
291
292 pci_read_config_word(dev, iov->pos + PCI_SRIOV_INITIAL_VF, &initial);
293 if (initial > iov->total ||
294 (!(iov->cap & PCI_SRIOV_CAP_VFM) && (initial != iov->total)))
295 return -EIO;
296
297 if (nr_virtfn < 0 || nr_virtfn > iov->total ||
298 (!(iov->cap & PCI_SRIOV_CAP_VFM) && (nr_virtfn > initial)))
299 return -EINVAL;
300
301 pci_write_config_word(dev, iov->pos + PCI_SRIOV_NUM_VF, nr_virtfn);
302 pci_read_config_word(dev, iov->pos + PCI_SRIOV_VF_OFFSET, &offset);
303 pci_read_config_word(dev, iov->pos + PCI_SRIOV_VF_STRIDE, &stride);
304 if (!offset || (nr_virtfn > 1 && !stride))
305 return -EIO;
306
307 nres = 0;
308 for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
309 res = dev->resource + PCI_IOV_RESOURCES + i;
310 if (res->parent)
311 nres++;
312 }
313 if (nres != iov->nres) {
314 dev_err(&dev->dev, "not enough MMIO resources for SR-IOV\n");
315 return -ENOMEM;
316 }
317
318 iov->offset = offset;
319 iov->stride = stride;
320
321 if (virtfn_bus(dev, nr_virtfn - 1) > dev->bus->subordinate) {
322 dev_err(&dev->dev, "SR-IOV: bus number out of range\n");
323 return -ENOMEM;
324 }
325
326 if (iov->link != dev->devfn) {
327 pdev = pci_get_slot(dev->bus, iov->link);
328 if (!pdev)
329 return -ENODEV;
330
331 pci_dev_put(pdev);
332
333 if (!pdev->is_physfn)
334 return -ENODEV;
335
336 rc = sysfs_create_link(&dev->dev.kobj,
337 &pdev->dev.kobj, "dep_link");
338 if (rc)
339 return rc;
340 }
341
342 iov->ctrl |= PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE;
343 pci_block_user_cfg_access(dev);
344 pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
345 msleep(100);
346 pci_unblock_user_cfg_access(dev);
347
348 iov->initial = initial;
349 if (nr_virtfn < initial)
350 initial = nr_virtfn;
351
352 for (i = 0; i < initial; i++) {
353 rc = virtfn_add(dev, i, 0);
354 if (rc)
355 goto failed;
356 }
357
358 if (iov->cap & PCI_SRIOV_CAP_VFM) {
359 rc = sriov_enable_migration(dev, nr_virtfn);
360 if (rc)
361 goto failed;
362 }
363
364 kobject_uevent(&dev->dev.kobj, KOBJ_CHANGE);
365 iov->nr_virtfn = nr_virtfn;
366
367 return 0;
368
369failed:
370 for (j = 0; j < i; j++)
371 virtfn_remove(dev, j, 0);
372
373 iov->ctrl &= ~(PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE);
374 pci_block_user_cfg_access(dev);
375 pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
376 ssleep(1);
377 pci_unblock_user_cfg_access(dev);
378
379 if (iov->link != dev->devfn)
380 sysfs_remove_link(&dev->dev.kobj, "dep_link");
381
382 return rc;
383}
384
385static void sriov_disable(struct pci_dev *dev)
386{
387 int i;
388 struct pci_sriov *iov = dev->sriov;
389
390 if (!iov->nr_virtfn)
391 return;
392
393 if (iov->cap & PCI_SRIOV_CAP_VFM)
394 sriov_disable_migration(dev);
395
396 for (i = 0; i < iov->nr_virtfn; i++)
397 virtfn_remove(dev, i, 0);
398
399 iov->ctrl &= ~(PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE);
400 pci_block_user_cfg_access(dev);
401 pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
402 ssleep(1);
403 pci_unblock_user_cfg_access(dev);
404
405 if (iov->link != dev->devfn)
406 sysfs_remove_link(&dev->dev.kobj, "dep_link");
407
408 iov->nr_virtfn = 0;
409}
410
411static int sriov_init(struct pci_dev *dev, int pos)
412{
413 int i;
414 int rc;
415 int nres;
416 u32 pgsz;
417 u16 ctrl, total, offset, stride;
418 struct pci_sriov *iov;
419 struct resource *res;
420 struct pci_dev *pdev;
421
422 if (dev->pcie_type != PCI_EXP_TYPE_RC_END &&
423 dev->pcie_type != PCI_EXP_TYPE_ENDPOINT)
424 return -ENODEV;
425
426 pci_read_config_word(dev, pos + PCI_SRIOV_CTRL, &ctrl);
427 if (ctrl & PCI_SRIOV_CTRL_VFE) {
428 pci_write_config_word(dev, pos + PCI_SRIOV_CTRL, 0);
429 ssleep(1);
430 }
431
432 pci_read_config_word(dev, pos + PCI_SRIOV_TOTAL_VF, &total);
433 if (!total)
434 return 0;
435
436 ctrl = 0;
437 list_for_each_entry(pdev, &dev->bus->devices, bus_list)
438 if (pdev->is_physfn)
439 goto found;
440
441 pdev = NULL;
442 if (pci_ari_enabled(dev->bus))
443 ctrl |= PCI_SRIOV_CTRL_ARI;
444
445found:
446 pci_write_config_word(dev, pos + PCI_SRIOV_CTRL, ctrl);
447 pci_write_config_word(dev, pos + PCI_SRIOV_NUM_VF, total);
448 pci_read_config_word(dev, pos + PCI_SRIOV_VF_OFFSET, &offset);
449 pci_read_config_word(dev, pos + PCI_SRIOV_VF_STRIDE, &stride);
450 if (!offset || (total > 1 && !stride))
451 return -EIO;
452
453 pci_read_config_dword(dev, pos + PCI_SRIOV_SUP_PGSIZE, &pgsz);
454 i = PAGE_SHIFT > 12 ? PAGE_SHIFT - 12 : 0;
455 pgsz &= ~((1 << i) - 1);
456 if (!pgsz)
457 return -EIO;
458
459 pgsz &= ~(pgsz - 1);
460 pci_write_config_dword(dev, pos + PCI_SRIOV_SYS_PGSIZE, pgsz);
461
462 nres = 0;
463 for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
464 res = dev->resource + PCI_IOV_RESOURCES + i;
465 i += __pci_read_base(dev, pci_bar_unknown, res,
466 pos + PCI_SRIOV_BAR + i * 4);
467 if (!res->flags)
468 continue;
469 if (resource_size(res) & (PAGE_SIZE - 1)) {
470 rc = -EIO;
471 goto failed;
472 }
473 res->end = res->start + resource_size(res) * total - 1;
474 nres++;
475 }
476
477 iov = kzalloc(sizeof(*iov), GFP_KERNEL);
478 if (!iov) {
479 rc = -ENOMEM;
480 goto failed;
481 }
482
483 iov->pos = pos;
484 iov->nres = nres;
485 iov->ctrl = ctrl;
486 iov->total = total;
487 iov->offset = offset;
488 iov->stride = stride;
489 iov->pgsz = pgsz;
490 iov->self = dev;
491 pci_read_config_dword(dev, pos + PCI_SRIOV_CAP, &iov->cap);
492 pci_read_config_byte(dev, pos + PCI_SRIOV_FUNC_LINK, &iov->link);
493 if (dev->pcie_type == PCI_EXP_TYPE_RC_END)
494 iov->link = PCI_DEVFN(PCI_SLOT(dev->devfn), iov->link);
495
496 if (pdev)
497 iov->dev = pci_dev_get(pdev);
498 else
499 iov->dev = dev;
500
501 mutex_init(&iov->lock);
502
503 dev->sriov = iov;
504 dev->is_physfn = 1;
505
506 return 0;
507
508failed:
509 for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
510 res = dev->resource + PCI_IOV_RESOURCES + i;
511 res->flags = 0;
512 }
513
514 return rc;
515}
516
517static void sriov_release(struct pci_dev *dev)
518{
519 BUG_ON(dev->sriov->nr_virtfn);
520
521 if (dev != dev->sriov->dev)
522 pci_dev_put(dev->sriov->dev);
523
524 mutex_destroy(&dev->sriov->lock);
525
526 kfree(dev->sriov);
527 dev->sriov = NULL;
528}
529
530static void sriov_restore_state(struct pci_dev *dev)
531{
532 int i;
533 u16 ctrl;
534 struct pci_sriov *iov = dev->sriov;
535
536 pci_read_config_word(dev, iov->pos + PCI_SRIOV_CTRL, &ctrl);
537 if (ctrl & PCI_SRIOV_CTRL_VFE)
538 return;
539
540 for (i = PCI_IOV_RESOURCES; i <= PCI_IOV_RESOURCE_END; i++)
541 pci_update_resource(dev, i);
542
543 pci_write_config_dword(dev, iov->pos + PCI_SRIOV_SYS_PGSIZE, iov->pgsz);
544 pci_write_config_word(dev, iov->pos + PCI_SRIOV_NUM_VF, iov->nr_virtfn);
545 pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
546 if (iov->ctrl & PCI_SRIOV_CTRL_VFE)
547 msleep(100);
548}
549
550/**
551 * pci_iov_init - initialize the IOV capability
552 * @dev: the PCI device
553 *
554 * Returns 0 on success, or negative on failure.
555 */
556int pci_iov_init(struct pci_dev *dev)
557{
558 int pos;
559
560 if (!pci_is_pcie(dev))
561 return -ENODEV;
562
563 pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_SRIOV);
564 if (pos)
565 return sriov_init(dev, pos);
566
567 return -ENODEV;
568}
569
570/**
571 * pci_iov_release - release resources used by the IOV capability
572 * @dev: the PCI device
573 */
574void pci_iov_release(struct pci_dev *dev)
575{
576 if (dev->is_physfn)
577 sriov_release(dev);
578}
579
580/**
581 * pci_iov_resource_bar - get position of the SR-IOV BAR
582 * @dev: the PCI device
583 * @resno: the resource number
584 * @type: the BAR type to be filled in
585 *
586 * Returns position of the BAR encapsulated in the SR-IOV capability.
587 */
588int pci_iov_resource_bar(struct pci_dev *dev, int resno,
589 enum pci_bar_type *type)
590{
591 if (resno < PCI_IOV_RESOURCES || resno > PCI_IOV_RESOURCE_END)
592 return 0;
593
594 BUG_ON(!dev->is_physfn);
595
596 *type = pci_bar_unknown;
597
598 return dev->sriov->pos + PCI_SRIOV_BAR +
599 4 * (resno - PCI_IOV_RESOURCES);
600}
601
602/**
603 * pci_sriov_resource_alignment - get resource alignment for VF BAR
604 * @dev: the PCI device
605 * @resno: the resource number
606 *
607 * Returns the alignment of the VF BAR found in the SR-IOV capability.
608 * This is not the same as the resource size which is defined as
609 * the VF BAR size multiplied by the number of VFs. The alignment
610 * is just the VF BAR size.
611 */
612resource_size_t pci_sriov_resource_alignment(struct pci_dev *dev, int resno)
613{
614 struct resource tmp;
615 enum pci_bar_type type;
616 int reg = pci_iov_resource_bar(dev, resno, &type);
617
618 if (!reg)
619 return 0;
620
621 __pci_read_base(dev, type, &tmp, reg);
622 return resource_alignment(&tmp);
623}
624
625/**
626 * pci_restore_iov_state - restore the state of the IOV capability
627 * @dev: the PCI device
628 */
629void pci_restore_iov_state(struct pci_dev *dev)
630{
631 if (dev->is_physfn)
632 sriov_restore_state(dev);
633}
634
635/**
636 * pci_iov_bus_range - find bus range used by Virtual Function
637 * @bus: the PCI bus
638 *
639 * Returns max number of buses (exclude current one) used by Virtual
640 * Functions.
641 */
642int pci_iov_bus_range(struct pci_bus *bus)
643{
644 int max = 0;
645 u8 busnr;
646 struct pci_dev *dev;
647
648 list_for_each_entry(dev, &bus->devices, bus_list) {
649 if (!dev->is_physfn)
650 continue;
651 busnr = virtfn_bus(dev, dev->sriov->total - 1);
652 if (busnr > max)
653 max = busnr;
654 }
655
656 return max ? max - bus->number : 0;
657}
658
659/**
660 * pci_enable_sriov - enable the SR-IOV capability
661 * @dev: the PCI device
662 * @nr_virtfn: number of virtual functions to enable
663 *
664 * Returns 0 on success, or negative on failure.
665 */
666int pci_enable_sriov(struct pci_dev *dev, int nr_virtfn)
667{
668 might_sleep();
669
670 if (!dev->is_physfn)
671 return -ENODEV;
672
673 return sriov_enable(dev, nr_virtfn);
674}
675EXPORT_SYMBOL_GPL(pci_enable_sriov);
676
677/**
678 * pci_disable_sriov - disable the SR-IOV capability
679 * @dev: the PCI device
680 */
681void pci_disable_sriov(struct pci_dev *dev)
682{
683 might_sleep();
684
685 if (!dev->is_physfn)
686 return;
687
688 sriov_disable(dev);
689}
690EXPORT_SYMBOL_GPL(pci_disable_sriov);
691
692/**
693 * pci_sriov_migration - notify SR-IOV core of Virtual Function Migration
694 * @dev: the PCI device
695 *
696 * Returns IRQ_HANDLED if the IRQ is handled, or IRQ_NONE if not.
697 *
698 * Physical Function driver is responsible to register IRQ handler using
699 * VF Migration Interrupt Message Number, and call this function when the
700 * interrupt is generated by the hardware.
701 */
702irqreturn_t pci_sriov_migration(struct pci_dev *dev)
703{
704 if (!dev->is_physfn)
705 return IRQ_NONE;
706
707 return sriov_migration(dev) ? IRQ_HANDLED : IRQ_NONE;
708}
709EXPORT_SYMBOL_GPL(pci_sriov_migration);
710
711/**
712 * pci_num_vf - return number of VFs associated with a PF device_release_driver
713 * @dev: the PCI device
714 *
715 * Returns number of VFs, or 0 if SR-IOV is not enabled.
716 */
717int pci_num_vf(struct pci_dev *dev)
718{
719 if (!dev || !dev->is_physfn)
720 return 0;
721 else
722 return dev->sriov->nr_virtfn;
723}
724EXPORT_SYMBOL_GPL(pci_num_vf);
725
726static int ats_alloc_one(struct pci_dev *dev, int ps)
727{
728 int pos;
729 u16 cap;
730 struct pci_ats *ats;
731
732 pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ATS);
733 if (!pos)
734 return -ENODEV;
735
736 ats = kzalloc(sizeof(*ats), GFP_KERNEL);
737 if (!ats)
738 return -ENOMEM;
739
740 ats->pos = pos;
741 ats->stu = ps;
742 pci_read_config_word(dev, pos + PCI_ATS_CAP, &cap);
743 ats->qdep = PCI_ATS_CAP_QDEP(cap) ? PCI_ATS_CAP_QDEP(cap) :
744 PCI_ATS_MAX_QDEP;
745 dev->ats = ats;
746
747 return 0;
748}
749
750static void ats_free_one(struct pci_dev *dev)
751{
752 kfree(dev->ats);
753 dev->ats = NULL;
754}
755
756/**
757 * pci_enable_ats - enable the ATS capability
758 * @dev: the PCI device
759 * @ps: the IOMMU page shift
760 *
761 * Returns 0 on success, or negative on failure.
762 */
763int pci_enable_ats(struct pci_dev *dev, int ps)
764{
765 int rc;
766 u16 ctrl;
767
768 BUG_ON(dev->ats && dev->ats->is_enabled);
769
770 if (ps < PCI_ATS_MIN_STU)
771 return -EINVAL;
772
773 if (dev->is_physfn || dev->is_virtfn) {
774 struct pci_dev *pdev = dev->is_physfn ? dev : dev->physfn;
775
776 mutex_lock(&pdev->sriov->lock);
777 if (pdev->ats)
778 rc = pdev->ats->stu == ps ? 0 : -EINVAL;
779 else
780 rc = ats_alloc_one(pdev, ps);
781
782 if (!rc)
783 pdev->ats->ref_cnt++;
784 mutex_unlock(&pdev->sriov->lock);
785 if (rc)
786 return rc;
787 }
788
789 if (!dev->is_physfn) {
790 rc = ats_alloc_one(dev, ps);
791 if (rc)
792 return rc;
793 }
794
795 ctrl = PCI_ATS_CTRL_ENABLE;
796 if (!dev->is_virtfn)
797 ctrl |= PCI_ATS_CTRL_STU(ps - PCI_ATS_MIN_STU);
798 pci_write_config_word(dev, dev->ats->pos + PCI_ATS_CTRL, ctrl);
799
800 dev->ats->is_enabled = 1;
801
802 return 0;
803}
804
805/**
806 * pci_disable_ats - disable the ATS capability
807 * @dev: the PCI device
808 */
809void pci_disable_ats(struct pci_dev *dev)
810{
811 u16 ctrl;
812
813 BUG_ON(!dev->ats || !dev->ats->is_enabled);
814
815 pci_read_config_word(dev, dev->ats->pos + PCI_ATS_CTRL, &ctrl);
816 ctrl &= ~PCI_ATS_CTRL_ENABLE;
817 pci_write_config_word(dev, dev->ats->pos + PCI_ATS_CTRL, ctrl);
818
819 dev->ats->is_enabled = 0;
820
821 if (dev->is_physfn || dev->is_virtfn) {
822 struct pci_dev *pdev = dev->is_physfn ? dev : dev->physfn;
823
824 mutex_lock(&pdev->sriov->lock);
825 pdev->ats->ref_cnt--;
826 if (!pdev->ats->ref_cnt)
827 ats_free_one(pdev);
828 mutex_unlock(&pdev->sriov->lock);
829 }
830
831 if (!dev->is_physfn)
832 ats_free_one(dev);
833}
834
835/**
836 * pci_ats_queue_depth - query the ATS Invalidate Queue Depth
837 * @dev: the PCI device
838 *
839 * Returns the queue depth on success, or negative on failure.
840 *
841 * The ATS spec uses 0 in the Invalidate Queue Depth field to
842 * indicate that the function can accept 32 Invalidate Request.
843 * But here we use the `real' values (i.e. 1~32) for the Queue
844 * Depth; and 0 indicates the function shares the Queue with
845 * other functions (doesn't exclusively own a Queue).
846 */
847int pci_ats_queue_depth(struct pci_dev *dev)
848{
849 int pos;
850 u16 cap;
851
852 if (dev->is_virtfn)
853 return 0;
854
855 if (dev->ats)
856 return dev->ats->qdep;
857
858 pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ATS);
859 if (!pos)
860 return -ENODEV;
861
862 pci_read_config_word(dev, pos + PCI_ATS_CAP, &cap);
863
864 return PCI_ATS_CAP_QDEP(cap) ? PCI_ATS_CAP_QDEP(cap) :
865 PCI_ATS_MAX_QDEP;
866}