1/*
 2 * arch/arm/mach-tegra/flowctrl.c
 3 *
 4 * functions and macros to control the flowcontroller
 5 *
 6 * Copyright (c) 2010-2012, NVIDIA Corporation. All rights reserved.
 7 *
 8 * This program is free software; you can redistribute it and/or modify it
 9 * under the terms and conditions of the GNU General Public License,
10 * version 2, as published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program.  If not, see <http://www.gnu.org/licenses/>.
19 */
20
21#include <linux/init.h>
22#include <linux/kernel.h>
23#include <linux/io.h>
24
25#include <mach/iomap.h>
26
27#include "flowctrl.h"
28
29u8 flowctrl_offset_halt_cpu[] = {
30	FLOW_CTRL_HALT_CPU0_EVENTS,
31	FLOW_CTRL_HALT_CPU1_EVENTS,
32	FLOW_CTRL_HALT_CPU1_EVENTS + 8,
33	FLOW_CTRL_HALT_CPU1_EVENTS + 16,
34};
35
36u8 flowctrl_offset_cpu_csr[] = {
37	FLOW_CTRL_CPU0_CSR,
38	FLOW_CTRL_CPU1_CSR,
39	FLOW_CTRL_CPU1_CSR + 8,
40	FLOW_CTRL_CPU1_CSR + 16,
41};
42
43static void flowctrl_update(u8 offset, u32 value)
44{
45	void __iomem *addr = IO_ADDRESS(TEGRA_FLOW_CTRL_BASE) + offset;
46
47	writel(value, addr);
48
49	/* ensure the update has reached the flow controller */
50	wmb();
51	readl_relaxed(addr);
52}
53
54void flowctrl_write_cpu_csr(unsigned int cpuid, u32 value)
55{
56	return flowctrl_update(flowctrl_offset_cpu_csr[cpuid], value);
57}
58
59void flowctrl_write_cpu_halt(unsigned int cpuid, u32 value)
60{
61	return flowctrl_update(flowctrl_offset_halt_cpu[cpuid], value);
62}