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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 304 305 306 307 308 309 310 311 312 313 314 315 316 317 318 319 320 321 322 323 324 325 326 327 328 329 330 331 332 333 334 335 336 337 338 339 340 341 342 343 344 345 346 347 348 349 350 351 352 353 354 355 356 357 358 359 360 361 362 363 364 365 366 367 368 369 370 371 372 373 374 375 376 377 378 379 380 381 382 383 384 385 386 387 388 389 390 391 392 393 394 395 396 397 398 399 400 401 402 403 404 405 406 407 408 409 410 411 412 413 414 415 416 417 418 419 420 421 422 423 424 425 426 427 428 429 430 431 432 433 434 435 436 437 438 439 440 441 442 443 444 445 446 447 448 449 450 451 452 453 454 455 456 457 458 459 460 461 462 463 464 465 466 467 468 469 470 471 472 473 474 475 476 477 478 479 480 481 482 483 484 485 486 487 488 489 490 491 492 493 494 495 496 497 498 499 500 501 502 503 504 505 506 507 508 509 510 511 512 513 514 515 516 517 518 519 520 521 522 523 524 525 526 527 528 529 530 531 532 533 534 535 536 537 538 539 540 541 542 543 544 545 546 547 548 549 550 551 552 553 554 555 556 557 558 559 560 561 562 563 564 565 566 567 568 569 570 571 572 573 574 575 576 577 578 579 580 581 582 583 584 585 586 587 588 589 590 591 592 593 594 595 596 597 598 599 600 601 602 603 604 605 606 607 608 609 610 611 612 613 614 615 616 617 618 619 620 621 622 623 624 625 626 627 628 629 630 631 632 633 634 635 636 637 638 639 640 641 642 643 644 645 646 647 648 649 650 651 652 653 654 655 656 657 658 659 660 661 662 663 664 665 666 667 668 669 670 671 672 673 674 675 676 677 678 679 680 681 682 683 684 685 686 687 688 689 690 691 692 693 694 695 696 697 698 699 700 701 702 703 704 705 706 707 708 709 710 711 712 713 714 715 716 717 718 719 720 721 722 723 724 725 726 727 728 729 730 731 732 733 734 735 736 737 738 739 740 741 742 743 744 745 746 747 748 749 750 751 752 753 754 755 756 757 758 759 760 761 762 763 764 765 766 767 768 769 770 771 772 773 774 775 776 777 778 779 780 781 782 783 784 785 786 787 | /* * Intel CPU microcode early update for Linux * * Copyright (C) 2012 Fenghua Yu <fenghua.yu@intel.com> * H Peter Anvin" <hpa@zytor.com> * * This allows to early upgrade microcode on Intel processors * belonging to IA-32 family - PentiumPro, Pentium II, * Pentium III, Xeon, Pentium 4, etc. * * Reference: Section 9.11 of Volume 3, IA-32 Intel Architecture * Software Developer's Manual. * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License * as published by the Free Software Foundation; either version * 2 of the License, or (at your option) any later version. */ #include <linux/module.h> #include <linux/mm.h> #include <linux/slab.h> #include <linux/earlycpio.h> #include <linux/initrd.h> #include <linux/cpu.h> #include <asm/msr.h> #include <asm/microcode_intel.h> #include <asm/processor.h> #include <asm/tlbflush.h> #include <asm/setup.h> unsigned long mc_saved_in_initrd[MAX_UCODE_COUNT]; struct mc_saved_data { unsigned int mc_saved_count; struct microcode_intel **mc_saved; } mc_saved_data; static enum ucode_state generic_load_microcode_early(struct microcode_intel **mc_saved_p, unsigned int mc_saved_count, struct ucode_cpu_info *uci) { struct microcode_intel *ucode_ptr, *new_mc = NULL; int new_rev = uci->cpu_sig.rev; enum ucode_state state = UCODE_OK; unsigned int mc_size; struct microcode_header_intel *mc_header; unsigned int csig = uci->cpu_sig.sig; unsigned int cpf = uci->cpu_sig.pf; int i; for (i = 0; i < mc_saved_count; i++) { ucode_ptr = mc_saved_p[i]; mc_header = (struct microcode_header_intel *)ucode_ptr; mc_size = get_totalsize(mc_header); if (get_matching_microcode(csig, cpf, ucode_ptr, new_rev)) { new_rev = mc_header->rev; new_mc = ucode_ptr; } } if (!new_mc) { state = UCODE_NFOUND; goto out; } uci->mc = (struct microcode_intel *)new_mc; out: return state; } static void microcode_pointer(struct microcode_intel **mc_saved, unsigned long *mc_saved_in_initrd, unsigned long initrd_start, int mc_saved_count) { int i; for (i = 0; i < mc_saved_count; i++) mc_saved[i] = (struct microcode_intel *) (mc_saved_in_initrd[i] + initrd_start); } #ifdef CONFIG_X86_32 static void microcode_phys(struct microcode_intel **mc_saved_tmp, struct mc_saved_data *mc_saved_data) { int i; struct microcode_intel ***mc_saved; mc_saved = (struct microcode_intel ***) __pa_nodebug(&mc_saved_data->mc_saved); for (i = 0; i < mc_saved_data->mc_saved_count; i++) { struct microcode_intel *p; p = *(struct microcode_intel **) __pa_nodebug(mc_saved_data->mc_saved + i); mc_saved_tmp[i] = (struct microcode_intel *)__pa_nodebug(p); } } #endif static enum ucode_state load_microcode(struct mc_saved_data *mc_saved_data, unsigned long *mc_saved_in_initrd, unsigned long initrd_start, struct ucode_cpu_info *uci) { struct microcode_intel *mc_saved_tmp[MAX_UCODE_COUNT]; unsigned int count = mc_saved_data->mc_saved_count; if (!mc_saved_data->mc_saved) { microcode_pointer(mc_saved_tmp, mc_saved_in_initrd, initrd_start, count); return generic_load_microcode_early(mc_saved_tmp, count, uci); } else { #ifdef CONFIG_X86_32 microcode_phys(mc_saved_tmp, mc_saved_data); return generic_load_microcode_early(mc_saved_tmp, count, uci); #else return generic_load_microcode_early(mc_saved_data->mc_saved, count, uci); #endif } } static u8 get_x86_family(unsigned long sig) { u8 x86; x86 = (sig >> 8) & 0xf; if (x86 == 0xf) x86 += (sig >> 20) & 0xff; return x86; } static u8 get_x86_model(unsigned long sig) { u8 x86, x86_model; x86 = get_x86_family(sig); x86_model = (sig >> 4) & 0xf; if (x86 == 0x6 || x86 == 0xf) x86_model += ((sig >> 16) & 0xf) << 4; return x86_model; } /* * Given CPU signature and a microcode patch, this function finds if the * microcode patch has matching family and model with the CPU. */ static enum ucode_state matching_model_microcode(struct microcode_header_intel *mc_header, unsigned long sig) { u8 x86, x86_model; u8 x86_ucode, x86_model_ucode; struct extended_sigtable *ext_header; unsigned long total_size = get_totalsize(mc_header); unsigned long data_size = get_datasize(mc_header); int ext_sigcount, i; struct extended_signature *ext_sig; x86 = get_x86_family(sig); x86_model = get_x86_model(sig); x86_ucode = get_x86_family(mc_header->sig); x86_model_ucode = get_x86_model(mc_header->sig); if (x86 == x86_ucode && x86_model == x86_model_ucode) return UCODE_OK; /* Look for ext. headers: */ if (total_size <= data_size + MC_HEADER_SIZE) return UCODE_NFOUND; ext_header = (struct extended_sigtable *) mc_header + data_size + MC_HEADER_SIZE; ext_sigcount = ext_header->count; ext_sig = (void *)ext_header + EXT_HEADER_SIZE; for (i = 0; i < ext_sigcount; i++) { x86_ucode = get_x86_family(ext_sig->sig); x86_model_ucode = get_x86_model(ext_sig->sig); if (x86 == x86_ucode && x86_model == x86_model_ucode) return UCODE_OK; ext_sig++; } return UCODE_NFOUND; } static int save_microcode(struct mc_saved_data *mc_saved_data, struct microcode_intel **mc_saved_src, unsigned int mc_saved_count) { int i, j; struct microcode_intel **mc_saved_p; int ret; if (!mc_saved_count) return -EINVAL; /* * Copy new microcode data. */ mc_saved_p = kmalloc(mc_saved_count*sizeof(struct microcode_intel *), GFP_KERNEL); if (!mc_saved_p) return -ENOMEM; for (i = 0; i < mc_saved_count; i++) { struct microcode_intel *mc = mc_saved_src[i]; struct microcode_header_intel *mc_header = &mc->hdr; unsigned long mc_size = get_totalsize(mc_header); mc_saved_p[i] = kmalloc(mc_size, GFP_KERNEL); if (!mc_saved_p[i]) { ret = -ENOMEM; goto err; } if (!mc_saved_src[i]) { ret = -EINVAL; goto err; } memcpy(mc_saved_p[i], mc, mc_size); } /* * Point to newly saved microcode. */ mc_saved_data->mc_saved = mc_saved_p; mc_saved_data->mc_saved_count = mc_saved_count; return 0; err: for (j = 0; j <= i; j++) kfree(mc_saved_p[j]); kfree(mc_saved_p); return ret; } /* * A microcode patch in ucode_ptr is saved into mc_saved * - if it has matching signature and newer revision compared to an existing * patch mc_saved. * - or if it is a newly discovered microcode patch. * * The microcode patch should have matching model with CPU. */ static void _save_mc(struct microcode_intel **mc_saved, u8 *ucode_ptr, unsigned int *mc_saved_count_p) { int i; int found = 0; unsigned int mc_saved_count = *mc_saved_count_p; struct microcode_header_intel *mc_header; mc_header = (struct microcode_header_intel *)ucode_ptr; for (i = 0; i < mc_saved_count; i++) { unsigned int sig, pf; unsigned int new_rev; struct microcode_header_intel *mc_saved_header = (struct microcode_header_intel *)mc_saved[i]; sig = mc_saved_header->sig; pf = mc_saved_header->pf; new_rev = mc_header->rev; if (get_matching_sig(sig, pf, ucode_ptr, new_rev)) { found = 1; if (update_match_revision(mc_header, new_rev)) { /* * Found an older ucode saved before. * Replace the older one with this newer * one. */ mc_saved[i] = (struct microcode_intel *)ucode_ptr; break; } } } if (i >= mc_saved_count && !found) /* * This ucode is first time discovered in ucode file. * Save it to memory. */ mc_saved[mc_saved_count++] = (struct microcode_intel *)ucode_ptr; *mc_saved_count_p = mc_saved_count; } /* * Get microcode matching with BSP's model. Only CPUs with the same model as * BSP can stay in the platform. */ static enum ucode_state __init get_matching_model_microcode(int cpu, unsigned long start, void *data, size_t size, struct mc_saved_data *mc_saved_data, unsigned long *mc_saved_in_initrd, struct ucode_cpu_info *uci) { u8 *ucode_ptr = data; unsigned int leftover = size; enum ucode_state state = UCODE_OK; unsigned int mc_size; struct microcode_header_intel *mc_header; struct microcode_intel *mc_saved_tmp[MAX_UCODE_COUNT]; unsigned int mc_saved_count = mc_saved_data->mc_saved_count; int i; while (leftover) { mc_header = (struct microcode_header_intel *)ucode_ptr; mc_size = get_totalsize(mc_header); if (!mc_size || mc_size > leftover || microcode_sanity_check(ucode_ptr, 0) < 0) break; leftover -= mc_size; /* * Since APs with same family and model as the BSP may boot in * the platform, we need to find and save microcode patches * with the same family and model as the BSP. */ if (matching_model_microcode(mc_header, uci->cpu_sig.sig) != UCODE_OK) { ucode_ptr += mc_size; continue; } _save_mc(mc_saved_tmp, ucode_ptr, &mc_saved_count); ucode_ptr += mc_size; } if (leftover) { state = UCODE_ERROR; goto out; } if (mc_saved_count == 0) { state = UCODE_NFOUND; goto out; } for (i = 0; i < mc_saved_count; i++) mc_saved_in_initrd[i] = (unsigned long)mc_saved_tmp[i] - start; mc_saved_data->mc_saved_count = mc_saved_count; out: return state; } static int collect_cpu_info_early(struct ucode_cpu_info *uci) { unsigned int val[2]; u8 x86, x86_model; struct cpu_signature csig; unsigned int eax, ebx, ecx, edx; csig.sig = 0; csig.pf = 0; csig.rev = 0; memset(uci, 0, sizeof(*uci)); eax = 0x00000001; ecx = 0; native_cpuid(&eax, &ebx, &ecx, &edx); csig.sig = eax; x86 = get_x86_family(csig.sig); x86_model = get_x86_model(csig.sig); if ((x86_model >= 5) || (x86 > 6)) { /* get processor flags from MSR 0x17 */ native_rdmsr(MSR_IA32_PLATFORM_ID, val[0], val[1]); csig.pf = 1 << ((val[1] >> 18) & 7); } native_wrmsr(MSR_IA32_UCODE_REV, 0, 0); /* As documented in the SDM: Do a CPUID 1 here */ sync_core(); /* get the current revision from MSR 0x8B */ native_rdmsr(MSR_IA32_UCODE_REV, val[0], val[1]); csig.rev = val[1]; uci->cpu_sig = csig; uci->valid = 1; return 0; } #ifdef DEBUG static void __ref show_saved_mc(void) { int i, j; unsigned int sig, pf, rev, total_size, data_size, date; struct ucode_cpu_info uci; if (mc_saved_data.mc_saved_count == 0) { pr_debug("no micorcode data saved.\n"); return; } pr_debug("Total microcode saved: %d\n", mc_saved_data.mc_saved_count); collect_cpu_info_early(&uci); sig = uci.cpu_sig.sig; pf = uci.cpu_sig.pf; rev = uci.cpu_sig.rev; pr_debug("CPU%d: sig=0x%x, pf=0x%x, rev=0x%x\n", smp_processor_id(), sig, pf, rev); for (i = 0; i < mc_saved_data.mc_saved_count; i++) { struct microcode_header_intel *mc_saved_header; struct extended_sigtable *ext_header; int ext_sigcount; struct extended_signature *ext_sig; mc_saved_header = (struct microcode_header_intel *) mc_saved_data.mc_saved[i]; sig = mc_saved_header->sig; pf = mc_saved_header->pf; rev = mc_saved_header->rev; total_size = get_totalsize(mc_saved_header); data_size = get_datasize(mc_saved_header); date = mc_saved_header->date; pr_debug("mc_saved[%d]: sig=0x%x, pf=0x%x, rev=0x%x, toal size=0x%x, date = %04x-%02x-%02x\n", i, sig, pf, rev, total_size, date & 0xffff, date >> 24, (date >> 16) & 0xff); /* Look for ext. headers: */ if (total_size <= data_size + MC_HEADER_SIZE) continue; ext_header = (struct extended_sigtable *) mc_saved_header + data_size + MC_HEADER_SIZE; ext_sigcount = ext_header->count; ext_sig = (void *)ext_header + EXT_HEADER_SIZE; for (j = 0; j < ext_sigcount; j++) { sig = ext_sig->sig; pf = ext_sig->pf; pr_debug("\tExtended[%d]: sig=0x%x, pf=0x%x\n", j, sig, pf); ext_sig++; } } } #else static inline void show_saved_mc(void) { } #endif #if defined(CONFIG_MICROCODE_INTEL_EARLY) && defined(CONFIG_HOTPLUG_CPU) static DEFINE_MUTEX(x86_cpu_microcode_mutex); /* * Save this mc into mc_saved_data. So it will be loaded early when a CPU is * hot added or resumes. * * Please make sure this mc should be a valid microcode patch before calling * this function. */ int save_mc_for_early(u8 *mc) { struct microcode_intel *mc_saved_tmp[MAX_UCODE_COUNT]; unsigned int mc_saved_count_init; unsigned int mc_saved_count; struct microcode_intel **mc_saved; int ret = 0; int i; /* * Hold hotplug lock so mc_saved_data is not accessed by a CPU in * hotplug. */ mutex_lock(&x86_cpu_microcode_mutex); mc_saved_count_init = mc_saved_data.mc_saved_count; mc_saved_count = mc_saved_data.mc_saved_count; mc_saved = mc_saved_data.mc_saved; if (mc_saved && mc_saved_count) memcpy(mc_saved_tmp, mc_saved, mc_saved_count * sizeof(struct mirocode_intel *)); /* * Save the microcode patch mc in mc_save_tmp structure if it's a newer * version. */ _save_mc(mc_saved_tmp, mc, &mc_saved_count); /* * Save the mc_save_tmp in global mc_saved_data. */ ret = save_microcode(&mc_saved_data, mc_saved_tmp, mc_saved_count); if (ret) { pr_err("Cannot save microcode patch.\n"); goto out; } show_saved_mc(); /* * Free old saved microcod data. */ if (mc_saved) { for (i = 0; i < mc_saved_count_init; i++) kfree(mc_saved[i]); kfree(mc_saved); } out: mutex_unlock(&x86_cpu_microcode_mutex); return ret; } EXPORT_SYMBOL_GPL(save_mc_for_early); #endif static __initdata char ucode_name[] = "kernel/x86/microcode/GenuineIntel.bin"; static __init enum ucode_state scan_microcode(unsigned long start, unsigned long end, struct mc_saved_data *mc_saved_data, unsigned long *mc_saved_in_initrd, struct ucode_cpu_info *uci) { unsigned int size = end - start + 1; struct cpio_data cd; long offset = 0; #ifdef CONFIG_X86_32 char *p = (char *)__pa_nodebug(ucode_name); #else char *p = ucode_name; #endif cd.data = NULL; cd.size = 0; cd = find_cpio_data(p, (void *)start, size, &offset); if (!cd.data) return UCODE_ERROR; return get_matching_model_microcode(0, start, cd.data, cd.size, mc_saved_data, mc_saved_in_initrd, uci); } /* * Print ucode update info. */ static void print_ucode_info(struct ucode_cpu_info *uci, unsigned int date) { int cpu = smp_processor_id(); pr_info("CPU%d microcode updated early to revision 0x%x, date = %04x-%02x-%02x\n", cpu, uci->cpu_sig.rev, date & 0xffff, date >> 24, (date >> 16) & 0xff); } #ifdef CONFIG_X86_32 static int delay_ucode_info; static int current_mc_date; /* * Print early updated ucode info after printk works. This is delayed info dump. */ void show_ucode_info_early(void) { struct ucode_cpu_info uci; if (delay_ucode_info) { collect_cpu_info_early(&uci); print_ucode_info(&uci, current_mc_date); delay_ucode_info = 0; } } /* * At this point, we can not call printk() yet. Keep microcode patch number in * mc_saved_data.mc_saved and delay printing microcode info in * show_ucode_info_early() until printk() works. */ static void print_ucode(struct ucode_cpu_info *uci) { struct microcode_intel *mc_intel; int *delay_ucode_info_p; int *current_mc_date_p; mc_intel = uci->mc; if (mc_intel == NULL) return; delay_ucode_info_p = (int *)__pa_nodebug(&delay_ucode_info); current_mc_date_p = (int *)__pa_nodebug(¤t_mc_date); *delay_ucode_info_p = 1; *current_mc_date_p = mc_intel->hdr.date; } #else /* * Flush global tlb. We only do this in x86_64 where paging has been enabled * already and PGE should be enabled as well. */ static inline void flush_tlb_early(void) { __native_flush_tlb_global_irq_disabled(); } static inline void print_ucode(struct ucode_cpu_info *uci) { struct microcode_intel *mc_intel; mc_intel = uci->mc; if (mc_intel == NULL) return; print_ucode_info(uci, mc_intel->hdr.date); } #endif static int apply_microcode_early(struct mc_saved_data *mc_saved_data, struct ucode_cpu_info *uci) { struct microcode_intel *mc_intel; unsigned int val[2]; mc_intel = uci->mc; if (mc_intel == NULL) return 0; /* write microcode via MSR 0x79 */ native_wrmsr(MSR_IA32_UCODE_WRITE, (unsigned long) mc_intel->bits, (unsigned long) mc_intel->bits >> 16 >> 16); native_wrmsr(MSR_IA32_UCODE_REV, 0, 0); /* As documented in the SDM: Do a CPUID 1 here */ sync_core(); /* get the current revision from MSR 0x8B */ native_rdmsr(MSR_IA32_UCODE_REV, val[0], val[1]); if (val[1] != mc_intel->hdr.rev) return -1; #ifdef CONFIG_X86_64 /* Flush global tlb. This is precaution. */ flush_tlb_early(); #endif uci->cpu_sig.rev = val[1]; print_ucode(uci); return 0; } /* * This function converts microcode patch offsets previously stored in * mc_saved_in_initrd to pointers and stores the pointers in mc_saved_data. */ int __init save_microcode_in_initrd_intel(void) { unsigned int count = mc_saved_data.mc_saved_count; struct microcode_intel *mc_saved[MAX_UCODE_COUNT]; int ret = 0; if (count == 0) return ret; microcode_pointer(mc_saved, mc_saved_in_initrd, initrd_start, count); ret = save_microcode(&mc_saved_data, mc_saved, count); if (ret) pr_err("Cannot save microcode patches from initrd.\n"); show_saved_mc(); return ret; } static void __init _load_ucode_intel_bsp(struct mc_saved_data *mc_saved_data, unsigned long *mc_saved_in_initrd, unsigned long initrd_start_early, unsigned long initrd_end_early, struct ucode_cpu_info *uci) { collect_cpu_info_early(uci); scan_microcode(initrd_start_early, initrd_end_early, mc_saved_data, mc_saved_in_initrd, uci); load_microcode(mc_saved_data, mc_saved_in_initrd, initrd_start_early, uci); apply_microcode_early(mc_saved_data, uci); } void __init load_ucode_intel_bsp(void) { u64 ramdisk_image, ramdisk_size; unsigned long initrd_start_early, initrd_end_early; struct ucode_cpu_info uci; #ifdef CONFIG_X86_32 struct boot_params *boot_params_p; boot_params_p = (struct boot_params *)__pa_nodebug(&boot_params); ramdisk_image = boot_params_p->hdr.ramdisk_image; ramdisk_size = boot_params_p->hdr.ramdisk_size; initrd_start_early = ramdisk_image; initrd_end_early = initrd_start_early + ramdisk_size; _load_ucode_intel_bsp( (struct mc_saved_data *)__pa_nodebug(&mc_saved_data), (unsigned long *)__pa_nodebug(&mc_saved_in_initrd), initrd_start_early, initrd_end_early, &uci); #else ramdisk_image = boot_params.hdr.ramdisk_image; ramdisk_size = boot_params.hdr.ramdisk_size; initrd_start_early = ramdisk_image + PAGE_OFFSET; initrd_end_early = initrd_start_early + ramdisk_size; _load_ucode_intel_bsp(&mc_saved_data, mc_saved_in_initrd, initrd_start_early, initrd_end_early, &uci); #endif } void load_ucode_intel_ap(void) { struct mc_saved_data *mc_saved_data_p; struct ucode_cpu_info uci; unsigned long *mc_saved_in_initrd_p; unsigned long initrd_start_addr; #ifdef CONFIG_X86_32 unsigned long *initrd_start_p; mc_saved_in_initrd_p = (unsigned long *)__pa_nodebug(mc_saved_in_initrd); mc_saved_data_p = (struct mc_saved_data *)__pa_nodebug(&mc_saved_data); initrd_start_p = (unsigned long *)__pa_nodebug(&initrd_start); initrd_start_addr = (unsigned long)__pa_nodebug(*initrd_start_p); #else mc_saved_data_p = &mc_saved_data; mc_saved_in_initrd_p = mc_saved_in_initrd; initrd_start_addr = initrd_start; #endif /* * If there is no valid ucode previously saved in memory, no need to * update ucode on this AP. */ if (mc_saved_data_p->mc_saved_count == 0) return; collect_cpu_info_early(&uci); load_microcode(mc_saved_data_p, mc_saved_in_initrd_p, initrd_start_addr, &uci); apply_microcode_early(mc_saved_data_p, &uci); } |