1/*
  2 * arch/arm/mach-sa1100/include/mach/assabet.h
  3 *
  4 * Created 2000/06/05 by Nicolas Pitre <nico@fluxnic.net>
  5 *
  6 * This file contains the hardware specific definitions for Assabet
  7 * Only include this file from SA1100-specific files.
  8 *
  9 * 2000/05/23 John Dorsey <john+@cs.cmu.edu>
 10 *      Definitions for Neponset added.
 11 */
 12#ifndef __ASM_ARCH_ASSABET_H
 13#define __ASM_ARCH_ASSABET_H
 14
 15
 16/* System Configuration Register flags */
 17
 18#define ASSABET_SCR_SDRAM_LOW	(1<<2)	/* SDRAM size (low bit) */
 19#define ASSABET_SCR_SDRAM_HIGH	(1<<3)	/* SDRAM size (high bit) */
 20#define ASSABET_SCR_FLASH_LOW	(1<<4)	/* Flash size (low bit) */
 21#define ASSABET_SCR_FLASH_HIGH	(1<<5)	/* Flash size (high bit) */
 22#define ASSABET_SCR_GFX		(1<<8)	/* Graphics Accelerator (0 = present) */
 23#define ASSABET_SCR_SA1111	(1<<9)	/* Neponset (0 = present) */
 24
 25#define ASSABET_SCR_INIT	-1
 26
 27extern unsigned long SCR_value;
 28
 29#ifdef CONFIG_ASSABET_NEPONSET
 30#define machine_has_neponset()  ((SCR_value & ASSABET_SCR_SA1111) == 0)
 31#else
 32#define machine_has_neponset()	(0)
 33#endif
 34
 35/* Board Control Register */
 36
 37#define ASSABET_BCR_BASE  0xf1000000
 38#define ASSABET_BCR (*(volatile unsigned int *)(ASSABET_BCR_BASE))
 39
 40#define ASSABET_BCR_CF_PWR	(1<<0)	/* Compact Flash Power (1 = 3.3v, 0 = off) */
 41#define ASSABET_BCR_CF_RST	(1<<1)	/* Compact Flash Reset (1 = power up reset) */
 42#define ASSABET_BCR_NGFX_RST	(1<<1)	/* Graphics Accelerator Reset (0 = hold reset) */
 43#define ASSABET_BCR_NCODEC_RST	(1<<2)	/* 0 = Holds UCB1300, ADI7171, and UDA1341 in reset */
 44#define ASSABET_BCR_IRDA_FSEL	(1<<3)	/* IRDA Frequency select (0 = SIR, 1 = MIR/ FIR) */
 45#define ASSABET_BCR_IRDA_MD0	(1<<4)	/* Range/Power select */
 46#define ASSABET_BCR_IRDA_MD1	(1<<5)	/* Range/Power select */
 47#define ASSABET_BCR_STEREO_LB	(1<<6)	/* Stereo Loopback */
 48#define ASSABET_BCR_CF_BUS_OFF	(1<<7)	/* Compact Flash bus (0 = on, 1 = off (float)) */
 49#define ASSABET_BCR_AUDIO_ON	(1<<8)	/* Audio power on */
 50#define ASSABET_BCR_LIGHT_ON	(1<<9)	/* Backlight */
 51#define ASSABET_BCR_LCD_12RGB	(1<<10)	/* 0 = 16RGB, 1 = 12RGB */
 52#define ASSABET_BCR_LCD_ON	(1<<11)	/* LCD power on */
 53#define ASSABET_BCR_RS232EN	(1<<12)	/* RS232 transceiver enable */
 54#define ASSABET_BCR_LED_RED	(1<<13)	/* D9 (0 = on, 1 = off) */
 55#define ASSABET_BCR_LED_GREEN	(1<<14)	/* D8 (0 = on, 1 = off) */
 56#define ASSABET_BCR_VIB_ON	(1<<15)	/* Vibration motor (quiet alert) */
 57#define ASSABET_BCR_COM_DTR	(1<<16)	/* COMport Data Terminal Ready */
 58#define ASSABET_BCR_COM_RTS	(1<<17)	/* COMport Request To Send */
 59#define ASSABET_BCR_RAD_WU	(1<<18)	/* Radio wake up interrupt */
 60#define ASSABET_BCR_SMB_EN	(1<<19)	/* System management bus enable */
 61#define ASSABET_BCR_TV_IR_DEC	(1<<20)	/* TV IR Decode Enable (not implemented) */
 62#define ASSABET_BCR_QMUTE	(1<<21)	/* Quick Mute */
 63#define ASSABET_BCR_RAD_ON	(1<<22)	/* Radio Power On */
 64#define ASSABET_BCR_SPK_OFF	(1<<23)	/* 1 = Speaker amplifier power off */
 65
 66#ifdef CONFIG_SA1100_ASSABET
 67extern void ASSABET_BCR_frob(unsigned int mask, unsigned int set);
 68#else
 69#define ASSABET_BCR_frob(x,y)	do { } while (0)
 70#endif
 71
 72extern void assabet_uda1341_reset(int set);
 73
 74#define ASSABET_BCR_set(x)	ASSABET_BCR_frob((x), (x))
 75#define ASSABET_BCR_clear(x)	ASSABET_BCR_frob((x), 0)
 76
 77#define ASSABET_BSR_BASE	0xf1000000
 78#define ASSABET_BSR (*(volatile unsigned int*)(ASSABET_BSR_BASE))
 79
 80#define ASSABET_BSR_RS232_VALID	(1 << 24)
 81#define ASSABET_BSR_COM_DCD	(1 << 25)
 82#define ASSABET_BSR_COM_CTS	(1 << 26)
 83#define ASSABET_BSR_COM_DSR	(1 << 27)
 84#define ASSABET_BSR_RAD_CTS	(1 << 28)
 85#define ASSABET_BSR_RAD_DSR	(1 << 29)
 86#define ASSABET_BSR_RAD_DCD	(1 << 30)
 87#define ASSABET_BSR_RAD_RI	(1 << 31)
 88
 89
 90/* GPIOs (bitmasks) for which the generic definition doesn't say much */
 91#define ASSABET_GPIO_RADIO_IRQ		GPIO_GPIO (14)	/* Radio interrupt request  */
 92#define ASSABET_GPIO_PS_MODE_SYNC	GPIO_GPIO (16)	/* Power supply mode/sync   */
 93#define ASSABET_GPIO_STEREO_64FS_CLK	GPIO_GPIO (19)	/* SSP UDA1341 clock input  */
 94#define ASSABET_GPIO_GFX_IRQ		GPIO_GPIO (24)	/* Graphics IRQ */
 95#define ASSABET_GPIO_BATT_LOW		GPIO_GPIO (26)	/* Low battery */
 96#define ASSABET_GPIO_RCLK		GPIO_GPIO (26)	/* CCLK/2  */
 97
 98/* These are gpiolib GPIO numbers, not bitmasks */
 99#define ASSABET_GPIO_CF_IRQ		21	/* CF IRQ */
100#define ASSABET_GPIO_CF_CD		22	/* CF CD  */
101#define ASSABET_GPIO_CF_BVD2		24	/* CF BVD / IOSPKR */
102#define ASSABET_GPIO_CF_BVD1		25	/* CF BVD / IOSTSCHG */
103
104#endif