1/*
  2 * Samsung's Exynos5 SoC series common device tree source
  3 *
  4 * Copyright (c) 2012-2013 Samsung Electronics Co., Ltd.
  5 *		http://www.samsung.com
  6 *
  7 * Samsung's Exynos5 SoC series device nodes are listed in this file. Particular
  8 * SoCs from Exynos5 series can include this file and provide values for SoCs
  9 * specfic bindings.
 10 *
 11 * This program is free software; you can redistribute it and/or modify
 12 * it under the terms of the GNU General Public License version 2 as
 13 * published by the Free Software Foundation.
 14 */
 15
 16#include "skeleton.dtsi"
 17
 18/ {
 19	interrupt-parent = <&gic>;
 20
 21	chipid@10000000 {
 22		compatible = "samsung,exynos4210-chipid";
 23		reg = <0x10000000 0x100>;
 24	};
 25
 26	combiner: interrupt-controller@10440000 {
 27		compatible = "samsung,exynos4210-combiner";
 28		#interrupt-cells = <2>;
 29		interrupt-controller;
 30		samsung,combiner-nr = <32>;
 31		reg = <0x10440000 0x1000>;
 32		interrupts =	<0 0 0>, <0 1 0>, <0 2 0>, <0 3 0>,
 33				<0 4 0>, <0 5 0>, <0 6 0>, <0 7 0>,
 34				<0 8 0>, <0 9 0>, <0 10 0>, <0 11 0>,
 35				<0 12 0>, <0 13 0>, <0 14 0>, <0 15 0>,
 36				<0 16 0>, <0 17 0>, <0 18 0>, <0 19 0>,
 37				<0 20 0>, <0 21 0>, <0 22 0>, <0 23 0>,
 38				<0 24 0>, <0 25 0>, <0 26 0>, <0 27 0>,
 39				<0 28 0>, <0 29 0>, <0 30 0>, <0 31 0>;
 40	};
 41
 42	gic: interrupt-controller@10481000 {
 43		compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
 44		#interrupt-cells = <3>;
 45		interrupt-controller;
 46		reg =	<0x10481000 0x1000>,
 47			<0x10482000 0x1000>,
 48			<0x10484000 0x2000>,
 49			<0x10486000 0x2000>;
 50		interrupts = <1 9 0xf04>;
 51	};
 52
 53	serial@12C00000 {
 54		compatible = "samsung,exynos4210-uart";
 55		reg = <0x12C00000 0x100>;
 56		interrupts = <0 51 0>;
 57	};
 58
 59	serial@12C10000 {
 60		compatible = "samsung,exynos4210-uart";
 61		reg = <0x12C10000 0x100>;
 62		interrupts = <0 52 0>;
 63	};
 64
 65	serial@12C20000 {
 66		compatible = "samsung,exynos4210-uart";
 67		reg = <0x12C20000 0x100>;
 68		interrupts = <0 53 0>;
 69	};
 70
 71	serial@12C30000 {
 72		compatible = "samsung,exynos4210-uart";
 73		reg = <0x12C30000 0x100>;
 74		interrupts = <0 54 0>;
 75	};
 76
 77	rtc@101E0000 {
 78		compatible = "samsung,s3c6410-rtc";
 79		reg = <0x101E0000 0x100>;
 80		interrupts = <0 43 0>, <0 44 0>;
 81		status = "disabled";
 82	};
 83
 84	fimd@14400000 {
 85		compatible = "samsung,exynos5250-fimd";
 86		interrupt-parent = <&combiner>;
 87		reg = <0x14400000 0x40000>;
 88		interrupt-names = "fifo", "vsync", "lcd_sys";
 89		interrupts = <18 4>, <18 5>, <18 6>;
 90		status = "disabled";
 91	};
 92
 93	dp-controller@145B0000 {
 94		compatible = "samsung,exynos5-dp";
 95		reg = <0x145B0000 0x1000>;
 96		interrupts = <10 3>;
 97		interrupt-parent = <&combiner>;
 98		#address-cells = <1>;
 99		#size-cells = <0>;
100		status = "disabled";
101	};
102};