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1/**************************************************************************
2 *
3 * Copyright (c) 2000-2002 Alacritech, Inc. All rights reserved.
4 *
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 *
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above
13 * copyright notice, this list of conditions and the following
14 * disclaimer in the documentation and/or other materials provided
15 * with the distribution.
16 *
17 * THIS SOFTWARE IS PROVIDED BY ALACRITECH, INC. ``AS IS'' AND ANY
18 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
20 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL ALACRITECH, INC. OR
21 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
22 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
23 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
24 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
25 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
26 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
27 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 * SUCH DAMAGE.
29 *
30 * The views and conclusions contained in the software and documentation
31 * are those of the authors and should not be interpreted as representing
32 * official policies, either expressed or implied, of Alacritech, Inc.
33 *
34 **************************************************************************/
35
36/*
37 * FILENAME: slic.h
38 *
39 * This is the base set of header definitions for the SLICOSS driver.
40 */
41#ifndef __SLIC_DRIVER_H__
42#define __SLIC_DRIVER_H__
43
44/* firmware stuff */
45#define OASIS_UCODE_VERS_STRING "1.2"
46#define OASIS_UCODE_VERS_DATE "2006/03/27 15:10:37"
47#define OASIS_UCODE_HOSTIF_ID 3
48
49#define MOJAVE_UCODE_VERS_STRING "1.2"
50#define MOJAVE_UCODE_VERS_DATE "2006/03/27 15:12:22"
51#define MOJAVE_UCODE_HOSTIF_ID 3
52
53#define GB_RCVUCODE_VERS_STRING "1.2"
54#define GB_RCVUCODE_VERS_DATE "2006/03/27 15:12:15"
55static u32 OasisRcvUCodeLen = 512;
56static u32 GBRcvUCodeLen = 512;
57#define SECTION_SIZE 65536
58
59struct slic_spinlock {
60 spinlock_t lock;
61 unsigned long flags;
62};
63
64#define SLIC_RSPQ_PAGES_GB 10
65#define SLIC_RSPQ_BUFSINPAGE (PAGE_SIZE / SLIC_RSPBUF_SIZE)
66
67struct slic_rspqueue {
68 u32 offset;
69 u32 pageindex;
70 u32 num_pages;
71 struct slic_rspbuf *rspbuf;
72 u32 *vaddr[SLIC_RSPQ_PAGES_GB];
73 dma_addr_t paddr[SLIC_RSPQ_PAGES_GB];
74};
75
76#define SLIC_RCVQ_EXPANSION 1
77#define SLIC_RCVQ_ENTRIES (256 * SLIC_RCVQ_EXPANSION)
78#define SLIC_RCVQ_MINENTRIES (SLIC_RCVQ_ENTRIES / 2)
79#define SLIC_RCVQ_MAX_PROCESS_ISR ((SLIC_RCVQ_ENTRIES * 4))
80#define SLIC_RCVQ_RCVBUFSIZE 2048
81#define SLIC_RCVQ_FILLENTRIES (16 * SLIC_RCVQ_EXPANSION)
82#define SLIC_RCVQ_FILLTHRESH (SLIC_RCVQ_ENTRIES - SLIC_RCVQ_FILLENTRIES)
83
84struct slic_rcvqueue {
85 struct sk_buff *head;
86 struct sk_buff *tail;
87 u32 count;
88 u32 size;
89 u32 errors;
90};
91
92struct slic_rcvbuf_info {
93 u32 id;
94 u32 starttime;
95 u32 stoptime;
96 u32 slicworld;
97 u32 lasttime;
98 u32 lastid;
99};
100/*
101 SLIC Handle structure. Used to restrict handle values to
102 32 bits by using an index rather than an address.
103 Simplifies ucode in 64-bit systems
104*/
105struct slic_handle_word {
106 union {
107 struct {
108 ushort index;
109 ushort bottombits; /* to denote num bufs to card */
110 } parts;
111 u32 whole;
112 } handle;
113};
114
115struct slic_handle {
116 struct slic_handle_word token; /* token passed between host and card*/
117 ushort type;
118 void *address; /* actual address of the object*/
119 ushort offset;
120 struct slic_handle *other_handle;
121 struct slic_handle *next;
122};
123
124#define SLIC_HANDLE_FREE 0x0000
125#define SLIC_HANDLE_DATA 0x0001
126#define SLIC_HANDLE_CMD 0x0002
127#define SLIC_HANDLE_CONTEXT 0x0003
128#define SLIC_HANDLE_TEAM 0x0004
129
130#define handle_index handle.parts.index
131#define handle_bottom handle.parts.bottombits
132#define handle_token handle.whole
133
134#define SLIC_HOSTCMD_SIZE 512
135
136struct slic_hostcmd {
137 struct slic_host64_cmd cmd64;
138 u32 type;
139 struct sk_buff *skb;
140 u32 paddrl;
141 u32 paddrh;
142 u32 busy;
143 u32 cmdsize;
144 ushort numbufs;
145 struct slic_handle *pslic_handle;/* handle associated with command */
146 struct slic_hostcmd *next;
147 struct slic_hostcmd *next_all;
148};
149
150#define SLIC_CMDQ_CMDSINPAGE (PAGE_SIZE / SLIC_HOSTCMD_SIZE)
151#define SLIC_CMD_DUMB 3
152#define SLIC_CMDQ_INITCMDS 256
153#define SLIC_CMDQ_MAXCMDS 256
154#define SLIC_CMDQ_MAXOUTSTAND SLIC_CMDQ_MAXCMDS
155#define SLIC_CMDQ_MAXPAGES (SLIC_CMDQ_MAXCMDS / SLIC_CMDQ_CMDSINPAGE)
156#define SLIC_CMDQ_INITPAGES (SLIC_CMDQ_INITCMDS / SLIC_CMDQ_CMDSINPAGE)
157
158struct slic_cmdqmem {
159 int pagecnt;
160 u32 *pages[SLIC_CMDQ_MAXPAGES];
161 dma_addr_t dma_pages[SLIC_CMDQ_MAXPAGES];
162};
163
164struct slic_cmdqueue {
165 struct slic_hostcmd *head;
166 struct slic_hostcmd *tail;
167 int count;
168 struct slic_spinlock lock;
169};
170
171#define SLIC_MAX_CARDS 32
172#define SLIC_MAX_PORTS 4 /* Max # of ports per card */
173
174
175struct mcast_address {
176 unsigned char address[6];
177 struct mcast_address *next;
178};
179
180#define CARD_DOWN 0x00000000
181#define CARD_UP 0x00000001
182#define CARD_FAIL 0x00000002
183#define CARD_DIAG 0x00000003
184#define CARD_SLEEP 0x00000004
185
186#define ADAPT_DOWN 0x00
187#define ADAPT_UP 0x01
188#define ADAPT_FAIL 0x02
189#define ADAPT_RESET 0x03
190#define ADAPT_SLEEP 0x04
191
192#define ADAPT_FLAGS_BOOTTIME 0x0001
193#define ADAPT_FLAGS_IS64BIT 0x0002
194#define ADAPT_FLAGS_PENDINGLINKDOWN 0x0004
195#define ADAPT_FLAGS_FIBERMEDIA 0x0008
196#define ADAPT_FLAGS_LOCKS_ALLOCED 0x0010
197#define ADAPT_FLAGS_INT_REGISTERED 0x0020
198#define ADAPT_FLAGS_LOAD_TIMER_SET 0x0040
199#define ADAPT_FLAGS_STATS_TIMER_SET 0x0080
200#define ADAPT_FLAGS_RESET_TIMER_SET 0x0100
201
202#define LINK_DOWN 0x00
203#define LINK_CONFIG 0x01
204#define LINK_UP 0x02
205
206#define LINK_10MB 0x00
207#define LINK_100MB 0x01
208#define LINK_AUTOSPEED 0x02
209#define LINK_1000MB 0x03
210#define LINK_10000MB 0x04
211
212#define LINK_HALFD 0x00
213#define LINK_FULLD 0x01
214#define LINK_AUTOD 0x02
215
216#define MAC_DIRECTED 0x00000001
217#define MAC_BCAST 0x00000002
218#define MAC_MCAST 0x00000004
219#define MAC_PROMISC 0x00000008
220#define MAC_LOOPBACK 0x00000010
221#define MAC_ALLMCAST 0x00000020
222
223#define SLIC_DUPLEX(x) ((x == LINK_FULLD) ? "FDX" : "HDX")
224#define SLIC_SPEED(x) ((x == LINK_100MB) ? "100Mb" : ((x == LINK_1000MB) ?\
225 "1000Mb" : " 10Mb"))
226#define SLIC_LINKSTATE(x) ((x == LINK_DOWN) ? "Down" : "Up ")
227#define SLIC_ADAPTER_STATE(x) ((x == ADAPT_UP) ? "UP" : "Down")
228#define SLIC_CARD_STATE(x) ((x == CARD_UP) ? "UP" : "Down")
229
230struct slic_iface_stats {
231 /*
232 * Stats
233 */
234 u64 xmt_bytes;
235 u64 xmt_ucast;
236 u64 xmt_mcast;
237 u64 xmt_bcast;
238 u64 xmt_errors;
239 u64 xmt_discards;
240 u64 xmit_collisions;
241 u64 xmit_excess_xmit_collisions;
242 u64 rcv_bytes;
243 u64 rcv_ucast;
244 u64 rcv_mcast;
245 u64 rcv_bcast;
246 u64 rcv_errors;
247 u64 rcv_discards;
248};
249
250struct sliccp_stats {
251 u64 xmit_tcp_segs;
252 u64 xmit_tcp_bytes;
253 u64 rcv_tcp_segs;
254 u64 rcv_tcp_bytes;
255};
256
257struct slicnet_stats {
258 struct sliccp_stats tcp;
259 struct slic_iface_stats iface;
260};
261
262#define SLIC_LOADTIMER_PERIOD 1
263#define SLIC_INTAGG_DEFAULT 200
264#define SLIC_LOAD_0 0
265#define SLIC_INTAGG_0 0
266#define SLIC_LOAD_1 8000
267#define SLIC_LOAD_2 10000
268#define SLIC_LOAD_3 12000
269#define SLIC_LOAD_4 14000
270#define SLIC_LOAD_5 16000
271#define SLIC_INTAGG_1 50
272#define SLIC_INTAGG_2 100
273#define SLIC_INTAGG_3 150
274#define SLIC_INTAGG_4 200
275#define SLIC_INTAGG_5 250
276#define SLIC_LOAD_1GB 3000
277#define SLIC_LOAD_2GB 6000
278#define SLIC_LOAD_3GB 12000
279#define SLIC_LOAD_4GB 24000
280#define SLIC_LOAD_5GB 48000
281#define SLIC_INTAGG_1GB 50
282#define SLIC_INTAGG_2GB 75
283#define SLIC_INTAGG_3GB 100
284#define SLIC_INTAGG_4GB 100
285#define SLIC_INTAGG_5GB 100
286
287struct ether_header {
288 unsigned char ether_dhost[6];
289 unsigned char ether_shost[6];
290 ushort ether_type;
291};
292
293struct sliccard {
294 uint busnumber;
295 uint slotnumber;
296 uint state;
297 uint cardnum;
298 uint card_size;
299 uint adapters_activated;
300 uint adapters_allocated;
301 uint adapters_sleeping;
302 uint gennumber;
303 u32 events;
304 u32 loadlevel_current;
305 u32 load;
306 uint reset_in_progress;
307 u32 pingstatus;
308 u32 bad_pingstatus;
309 struct timer_list loadtimer;
310 u32 loadtimerset;
311 uint config_set;
312 struct slic_config config;
313 struct dentry *debugfs_dir;
314 struct dentry *debugfs_cardinfo;
315 struct adapter *master;
316 struct adapter *adapter[SLIC_MAX_PORTS];
317 struct sliccard *next;
318 u32 error_interrupts;
319 u32 error_rmiss_interrupts;
320 u32 rcv_interrupts;
321 u32 xmit_interrupts;
322 u32 num_isrs;
323 u32 false_interrupts;
324 u32 max_isr_rcvs;
325 u32 max_isr_xmits;
326 u32 rcv_interrupt_yields;
327 u32 tx_packets;
328 u32 debug_ix;
329 ushort reg_type[32];
330 ushort reg_offset[32];
331 u32 reg_value[32];
332 u32 reg_valueh[32];
333};
334
335#define NUM_CFG_SPACES 2
336#define NUM_CFG_REGS 64
337#define NUM_CFG_REG_ULONGS (NUM_CFG_REGS / sizeof(u32))
338
339struct physcard {
340 struct adapter *adapter[SLIC_MAX_PORTS];
341 struct physcard *next;
342 uint adapters_allocd;
343
344/* the following is not currently needed
345 u32 bridge_busnum;
346 u32 bridge_cfg[NUM_CFG_SPACES][NUM_CFG_REG_ULONGS];
347*/
348};
349
350struct base_driver {
351 struct slic_spinlock driver_lock;
352 u32 num_slic_cards;
353 u32 num_slic_ports;
354 u32 num_slic_ports_active;
355 u32 dynamic_intagg;
356 struct sliccard *slic_card;
357 struct physcard *phys_card;
358 uint cardnuminuse[SLIC_MAX_CARDS];
359};
360
361struct slic_shmem {
362 volatile u32 isr;
363 volatile u32 linkstatus;
364 volatile struct slic_stats inicstats;
365};
366
367struct slic_reg_params {
368 u32 linkspeed;
369 u32 linkduplex;
370 u32 fail_on_bad_eeprom;
371};
372
373struct slic_upr {
374 uint adapter;
375 u32 upr_request;
376 u32 upr_data;
377 u32 upr_data_h;
378 u32 upr_buffer;
379 u32 upr_buffer_h;
380 struct slic_upr *next;
381};
382
383struct slic_ifevents {
384 uint oflow802;
385 uint uflow802;
386 uint Tprtoflow;
387 uint rcvearly;
388 uint Bufov;
389 uint Carre;
390 uint Longe;
391 uint Invp;
392 uint Crc;
393 uint Drbl;
394 uint Code;
395 uint IpHlen;
396 uint IpLen;
397 uint IpCsum;
398 uint TpCsum;
399 uint TpHlen;
400};
401
402struct adapter {
403 void *ifp;
404 struct sliccard *card;
405 uint port;
406 struct physcard *physcard;
407 uint physport;
408 uint cardindex;
409 uint card_size;
410 uint chipid;
411 struct net_device *netdev;
412 struct net_device *next_netdevice;
413 struct slic_spinlock adapter_lock;
414 struct slic_spinlock reset_lock;
415 struct pci_dev *pcidev;
416 uint busnumber;
417 uint slotnumber;
418 uint functionnumber;
419 ushort vendid;
420 ushort devid;
421 ushort subsysid;
422 u32 irq;
423 void __iomem *memorybase;
424 u32 memorylength;
425 u32 drambase;
426 u32 dramlength;
427 uint queues_initialized;
428 uint allocated;
429 uint activated;
430 u32 intrregistered;
431 uint isp_initialized;
432 uint gennumber;
433 u32 curaddrupper;
434 struct slic_shmem *pshmem;
435 dma_addr_t phys_shmem;
436 u32 isrcopy;
437 __iomem struct slic_regs *slic_regs;
438 unsigned char state;
439 unsigned char linkstate;
440 unsigned char linkspeed;
441 unsigned char linkduplex;
442 uint flags;
443 unsigned char macaddr[6];
444 unsigned char currmacaddr[6];
445 u32 macopts;
446 ushort devflags_prev;
447 u64 mcastmask;
448 struct mcast_address *mcastaddrs;
449 struct slic_upr *upr_list;
450 uint upr_busy;
451 struct timer_list pingtimer;
452 u32 pingtimerset;
453 struct timer_list loadtimer;
454 u32 loadtimerset;
455 struct dentry *debugfs_entry;
456 struct slic_spinlock upr_lock;
457 struct slic_spinlock bit64reglock;
458 struct slic_rspqueue rspqueue;
459 struct slic_rcvqueue rcvqueue;
460 struct slic_cmdqueue cmdq_free;
461 struct slic_cmdqueue cmdq_done;
462 struct slic_cmdqueue cmdq_all;
463 struct slic_cmdqmem cmdqmem;
464 /*
465 * SLIC Handles
466 */
467 /* Object handles*/
468 struct slic_handle slic_handles[SLIC_CMDQ_MAXCMDS+1];
469 /* Free object handles*/
470 struct slic_handle *pfree_slic_handles;
471 /* Object handle list lock*/
472 struct slic_spinlock handle_lock;
473 ushort slic_handle_ix;
474
475 u32 xmitq_full;
476 u32 all_reg_writes;
477 u32 icr_reg_writes;
478 u32 isr_reg_writes;
479 u32 error_interrupts;
480 u32 error_rmiss_interrupts;
481 u32 rx_errors;
482 u32 rcv_drops;
483 u32 rcv_interrupts;
484 u32 xmit_interrupts;
485 u32 linkevent_interrupts;
486 u32 upr_interrupts;
487 u32 num_isrs;
488 u32 false_interrupts;
489 u32 tx_packets;
490 u32 xmit_completes;
491 u32 tx_drops;
492 u32 rcv_broadcasts;
493 u32 rcv_multicasts;
494 u32 rcv_unicasts;
495 u32 max_isr_rcvs;
496 u32 max_isr_xmits;
497 u32 rcv_interrupt_yields;
498 u32 intagg_period;
499 struct inicpm_state *inicpm_info;
500 void *pinicpm_info;
501 struct slic_reg_params reg_params;
502 struct slic_ifevents if_events;
503 struct slic_stats inicstats_prev;
504 struct slicnet_stats slic_stats;
505};
506
507
508#define UPDATE_STATS(largestat, newstat, oldstat) \
509{ \
510 if ((newstat) < (oldstat)) \
511 (largestat) += ((newstat) + (0xFFFFFFFF - oldstat + 1)); \
512 else \
513 (largestat) += ((newstat) - (oldstat)); \
514}
515
516#define UPDATE_STATS_GB(largestat, newstat, oldstat) \
517{ \
518 (largestat) += ((newstat) - (oldstat)); \
519}
520
521#if BITS_PER_LONG == 64
522#define SLIC_GET_ADDR_LOW(_addr) (u32)((u64)(_addr) & \
523 0x00000000FFFFFFFF)
524#define SLIC_GET_ADDR_HIGH(_addr) (u32)(((u64)(_addr) >> 32) & \
525 0x00000000FFFFFFFF)
526#elif BITS_PER_LONG == 32
527#define SLIC_GET_ADDR_LOW(_addr) (u32)(_addr)
528#define SLIC_GET_ADDR_HIGH(_addr) (u32)0
529#else
530#error BITS_PER_LONG must be 32 or 64
531#endif
532
533#define FLUSH true
534#define DONT_FLUSH false
535
536#define SIOCSLICDUMPCARD (SIOCDEVPRIVATE+9)
537#define SIOCSLICSETINTAGG (SIOCDEVPRIVATE+10)
538#define SIOCSLICTRACEDUMP (SIOCDEVPRIVATE+11)
539
540#endif /* __SLIC_DRIVER_H__ */