1/*
  2 * MIPS boards bootprom interface for the Linux kernel.
  3 *
  4 * Copyright (C) 2000 MIPS Technologies, Inc.  All rights reserved.
  5 * Author: Carsten Langgaard, carstenl@mips.com
  6 *
  7 * ########################################################################
  8 *
  9 *  This program is free software; you can distribute it and/or modify it
 10 *  under the terms of the GNU General Public License (Version 2) as
 11 *  published by the Free Software Foundation.
 12 *
 13 *  This program is distributed in the hope it will be useful, but WITHOUT
 14 *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 15 *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
 16 *  for more details.
 17 *
 18 *  You should have received a copy of the GNU General Public License along
 19 *  with this program; if not, write to the Free Software Foundation, Inc.,
 20 *  59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
 21 *
 22 * ########################################################################
 23 */
 24
 25#ifndef _ASM_MSP_PROM_H
 26#define _ASM_MSP_PROM_H
 27
 28#include <linux/types.h>
 29
 30#define DEVICEID			"deviceid"
 31#define FEATURES			"features"
 32#define PROM_ENV			"prom_env"
 33#define PROM_ENV_FILE			"/proc/"PROM_ENV
 34#define PROM_ENV_SIZE			256
 35
 36#define CPU_DEVID_FAMILY		0x0000ff00
 37#define CPU_DEVID_REVISION		0x000000ff
 38
 39#define FPGA_IS_POLO(revision) \
 40		(((revision >= 0xb0) && (revision < 0xd0)))
 41#define FPGA_IS_5000(revision) \
 42		((revision >= 0x80) && (revision <= 0x90))
 43#define FPGA_IS_ZEUS(revision)		((revision < 0x7f))
 44#define FPGA_IS_DUET(revision) \
 45		(((revision >= 0xa0) && (revision < 0xb0)))
 46#define FPGA_IS_MSP4200(revision)	((revision >= 0xd0))
 47#define FPGA_IS_MSP7100(revision)	((revision >= 0xd0))
 48
 49#define MACHINE_TYPE_POLO		"POLO"
 50#define MACHINE_TYPE_DUET		"DUET"
 51#define MACHINE_TYPE_ZEUS		"ZEUS"
 52#define MACHINE_TYPE_MSP2000REVB	"MSP2000REVB"
 53#define MACHINE_TYPE_MSP5000		"MSP5000"
 54#define MACHINE_TYPE_MSP4200		"MSP4200"
 55#define MACHINE_TYPE_MSP7120		"MSP7120"
 56#define MACHINE_TYPE_MSP7130		"MSP7130"
 57#define MACHINE_TYPE_OTHER		"OTHER"
 58
 59#define MACHINE_TYPE_POLO_FPGA		"POLO-FPGA"
 60#define MACHINE_TYPE_DUET_FPGA		"DUET-FPGA"
 61#define MACHINE_TYPE_ZEUS_FPGA		"ZEUS_FPGA"
 62#define MACHINE_TYPE_MSP2000REVB_FPGA	"MSP2000REVB-FPGA"
 63#define MACHINE_TYPE_MSP5000_FPGA	"MSP5000-FPGA"
 64#define MACHINE_TYPE_MSP4200_FPGA	"MSP4200-FPGA"
 65#define MACHINE_TYPE_MSP7100_FPGA	"MSP7100-FPGA"
 66#define MACHINE_TYPE_OTHER_FPGA		"OTHER-FPGA"
 67
 68/* Device Family definitions */
 69#define FAMILY_FPGA			0x0000
 70#define FAMILY_ZEUS			0x1000
 71#define FAMILY_POLO			0x2000
 72#define FAMILY_DUET			0x4000
 73#define FAMILY_TRIAD			0x5000
 74#define FAMILY_MSP4200			0x4200
 75#define FAMILY_MSP4200_FPGA		0x4f00
 76#define FAMILY_MSP7100			0x7100
 77#define FAMILY_MSP7100_FPGA		0x7f00
 78
 79/* Device Type definitions */
 80#define TYPE_MSP7120			0x7120
 81#define TYPE_MSP7130			0x7130
 82
 83#define ENET_KEY		'E'
 84#define ENETTXD_KEY		'e'
 85#define PCI_KEY			'P'
 86#define PCIMUX_KEY		'p'
 87#define SEC_KEY			'S'
 88#define SPAD_KEY		'D'
 89#define TDM_KEY			'T'
 90#define ZSP_KEY			'Z'
 91
 92#define FEATURE_NOEXIST		'-'
 93#define FEATURE_EXIST		'+'
 94
 95#define ENET_MII		'M'
 96#define ENET_RMII		'R'
 97
 98#define ENETTXD_FALLING		'F'
 99#define ENETTXD_RISING		'R'
100
101#define PCI_HOST		'H'
102#define PCI_PERIPHERAL		'P'
103
104#define PCIMUX_FULL		'F'
105#define PCIMUX_SINGLE		'S'
106
107#define SEC_DUET		'D'
108#define SEC_POLO		'P'
109#define SEC_SLOW		'S'
110#define SEC_TRIAD		'T'
111
112#define SPAD_POLO		'P'
113
114#define TDM_DUET		'D'	/* DUET TDMs might exist */
115#define TDM_POLO		'P'	/* POLO TDMs might exist */
116#define TDM_TRIAD		'T'	/* TRIAD TDMs might exist */
117
118#define ZSP_DUET		'D'	/* one DUET zsp engine */
119#define ZSP_TRIAD		'T'	/* two TRIAD zsp engines */
120
121extern char *prom_getenv(char *name);
122extern void prom_init_cmdline(void);
123extern void prom_meminit(void);
124extern void prom_fixup_mem_map(unsigned long start_mem,
125			       unsigned long end_mem);
126
127extern int get_ethernet_addr(char *ethaddr_name, char *ethernet_addr);
128extern unsigned long get_deviceid(void);
129extern char identify_enet(unsigned long interface_num);
130extern char identify_enetTxD(unsigned long interface_num);
131extern char identify_pci(void);
132extern char identify_sec(void);
133extern char identify_spad(void);
134extern char identify_sec(void);
135extern char identify_tdm(void);
136extern char identify_zsp(void);
137extern unsigned long identify_family(void);
138extern unsigned long identify_revision(void);
139
140/*
141 * The following macro calls prom_printf and puts the format string
142 * into an init section so it can be reclaimed.
143 */
144#define ppfinit(f, x...) \
145	do { \
146		static char _f[] __initdata = KERN_INFO f; \
147		printk(_f, ## x); \
148	} while (0)
149
150/* Memory descriptor management. */
151#define PROM_MAX_PMEMBLOCKS    7	/* 6 used */
152
153enum yamon_memtypes {
154	yamon_dontuse,
155	yamon_prom,
156	yamon_free,
157};
158
159struct prom_pmemblock {
160	unsigned long base; /* Within KSEG0. */
161	unsigned int size;  /* In bytes. */
162	unsigned int type;  /* free or prom memory */
163};
164
165extern int prom_argc;
166extern char **prom_argv;
167extern char **prom_envp;
168extern int *prom_vec;
169extern struct prom_pmemblock *prom_getmdesc(void);
170
171#endif /* !_ASM_MSP_PROM_H */