Linux Audio

Check our new training course

Loading...
v3.15
  1#ifndef MMSS_CC_XML
  2#define MMSS_CC_XML
  3
  4/* Autogenerated file, DO NOT EDIT manually!
  5
  6This file was generated by the rules-ng-ng headergen tool in this git repository:
  7http://github.com/freedreno/envytools/
  8git clone https://github.com/freedreno/envytools.git
  9
 10The rules-ng-ng source files this header was generated from are:
 11- /home/robclark/src/freedreno/envytools/rnndb/msm.xml                 (    647 bytes, from 2013-11-30 14:45:35)
 12- /home/robclark/src/freedreno/envytools/rnndb/freedreno_copyright.xml (   1453 bytes, from 2013-03-31 16:51:27)
 13- /home/robclark/src/freedreno/envytools/rnndb/mdp/mdp4.xml            (  17996 bytes, from 2013-12-01 19:10:31)
 14- /home/robclark/src/freedreno/envytools/rnndb/mdp/mdp_common.xml      (   1615 bytes, from 2013-11-30 15:00:52)
 15- /home/robclark/src/freedreno/envytools/rnndb/mdp/mdp5.xml            (  22517 bytes, from 2013-12-03 20:59:13)
 16- /home/robclark/src/freedreno/envytools/rnndb/dsi/dsi.xml             (  11712 bytes, from 2013-08-17 17:13:43)
 17- /home/robclark/src/freedreno/envytools/rnndb/dsi/sfpb.xml            (    344 bytes, from 2013-08-11 19:26:32)
 18- /home/robclark/src/freedreno/envytools/rnndb/dsi/mmss_cc.xml         (   1544 bytes, from 2013-08-16 19:17:05)
 19- /home/robclark/src/freedreno/envytools/rnndb/hdmi/qfprom.xml         (    600 bytes, from 2013-07-05 19:21:12)
 20- /home/robclark/src/freedreno/envytools/rnndb/hdmi/hdmi.xml           (  20932 bytes, from 2013-12-01 15:13:04)
 
 
 
 
 
 
 
 
 21
 22Copyright (C) 2013 by the following authors:
 23- Rob Clark <robdclark@gmail.com> (robclark)
 
 24
 25Permission is hereby granted, free of charge, to any person obtaining
 26a copy of this software and associated documentation files (the
 27"Software"), to deal in the Software without restriction, including
 28without limitation the rights to use, copy, modify, merge, publish,
 29distribute, sublicense, and/or sell copies of the Software, and to
 30permit persons to whom the Software is furnished to do so, subject to
 31the following conditions:
 32
 33The above copyright notice and this permission notice (including the
 34next paragraph) shall be included in all copies or substantial
 35portions of the Software.
 36
 37THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
 38EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
 39MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
 40IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
 41LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
 42OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
 43WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 44*/
 45
 46
 47enum mmss_cc_clk {
 48	CLK = 0,
 49	PCLK = 1,
 50};
 51
 52#define REG_MMSS_CC_AHB						0x00000008
 53
 54static inline uint32_t __offset_CLK(enum mmss_cc_clk idx)
 55{
 56	switch (idx) {
 57		case CLK: return 0x0000004c;
 58		case PCLK: return 0x00000130;
 59		default: return INVALID_IDX(idx);
 60	}
 61}
 62static inline uint32_t REG_MMSS_CC_CLK(enum mmss_cc_clk i0) { return 0x00000000 + __offset_CLK(i0); }
 63
 64static inline uint32_t REG_MMSS_CC_CLK_CC(enum mmss_cc_clk i0) { return 0x00000000 + __offset_CLK(i0); }
 65#define MMSS_CC_CLK_CC_CLK_EN					0x00000001
 66#define MMSS_CC_CLK_CC_ROOT_EN					0x00000004
 67#define MMSS_CC_CLK_CC_MND_EN					0x00000020
 68#define MMSS_CC_CLK_CC_MND_MODE__MASK				0x000000c0
 69#define MMSS_CC_CLK_CC_MND_MODE__SHIFT				6
 70static inline uint32_t MMSS_CC_CLK_CC_MND_MODE(uint32_t val)
 71{
 72	return ((val) << MMSS_CC_CLK_CC_MND_MODE__SHIFT) & MMSS_CC_CLK_CC_MND_MODE__MASK;
 73}
 74#define MMSS_CC_CLK_CC_PMXO_SEL__MASK				0x00000300
 75#define MMSS_CC_CLK_CC_PMXO_SEL__SHIFT				8
 76static inline uint32_t MMSS_CC_CLK_CC_PMXO_SEL(uint32_t val)
 77{
 78	return ((val) << MMSS_CC_CLK_CC_PMXO_SEL__SHIFT) & MMSS_CC_CLK_CC_PMXO_SEL__MASK;
 79}
 80
 81static inline uint32_t REG_MMSS_CC_CLK_MD(enum mmss_cc_clk i0) { return 0x00000004 + __offset_CLK(i0); }
 82#define MMSS_CC_CLK_MD_D__MASK					0x000000ff
 83#define MMSS_CC_CLK_MD_D__SHIFT					0
 84static inline uint32_t MMSS_CC_CLK_MD_D(uint32_t val)
 85{
 86	return ((val) << MMSS_CC_CLK_MD_D__SHIFT) & MMSS_CC_CLK_MD_D__MASK;
 87}
 88#define MMSS_CC_CLK_MD_M__MASK					0x0000ff00
 89#define MMSS_CC_CLK_MD_M__SHIFT					8
 90static inline uint32_t MMSS_CC_CLK_MD_M(uint32_t val)
 91{
 92	return ((val) << MMSS_CC_CLK_MD_M__SHIFT) & MMSS_CC_CLK_MD_M__MASK;
 93}
 94
 95static inline uint32_t REG_MMSS_CC_CLK_NS(enum mmss_cc_clk i0) { return 0x00000008 + __offset_CLK(i0); }
 96#define MMSS_CC_CLK_NS_SRC__MASK				0x0000000f
 97#define MMSS_CC_CLK_NS_SRC__SHIFT				0
 98static inline uint32_t MMSS_CC_CLK_NS_SRC(uint32_t val)
 99{
100	return ((val) << MMSS_CC_CLK_NS_SRC__SHIFT) & MMSS_CC_CLK_NS_SRC__MASK;
101}
102#define MMSS_CC_CLK_NS_PRE_DIV_FUNC__MASK			0x00fff000
103#define MMSS_CC_CLK_NS_PRE_DIV_FUNC__SHIFT			12
104static inline uint32_t MMSS_CC_CLK_NS_PRE_DIV_FUNC(uint32_t val)
105{
106	return ((val) << MMSS_CC_CLK_NS_PRE_DIV_FUNC__SHIFT) & MMSS_CC_CLK_NS_PRE_DIV_FUNC__MASK;
107}
108#define MMSS_CC_CLK_NS_VAL__MASK				0xff000000
109#define MMSS_CC_CLK_NS_VAL__SHIFT				24
110static inline uint32_t MMSS_CC_CLK_NS_VAL(uint32_t val)
111{
112	return ((val) << MMSS_CC_CLK_NS_VAL__SHIFT) & MMSS_CC_CLK_NS_VAL__MASK;
113}
 
 
 
 
 
 
114
115
116#endif /* MMSS_CC_XML */
v6.9.4
  1#ifndef MMSS_CC_XML
  2#define MMSS_CC_XML
  3
  4/* Autogenerated file, DO NOT EDIT manually!
  5
  6This file was generated by the rules-ng-ng headergen tool in this git repository:
  7http://github.com/freedreno/envytools/
  8git clone https://github.com/freedreno/envytools.git
  9
 10The rules-ng-ng source files this header was generated from are:
 11- /home/robclark/src/mesa/mesa/src/freedreno/registers/msm.xml                   (    944 bytes, from 2022-07-23 20:21:46)
 12- /home/robclark/src/mesa/mesa/src/freedreno/registers/freedreno_copyright.xml   (   1572 bytes, from 2022-07-23 20:21:46)
 13- /home/robclark/src/mesa/mesa/src/freedreno/registers/mdp/mdp4.xml              (  20912 bytes, from 2022-03-08 17:40:42)
 14- /home/robclark/src/mesa/mesa/src/freedreno/registers/mdp/mdp_common.xml        (   2849 bytes, from 2022-03-08 17:40:42)
 15- /home/robclark/src/mesa/mesa/src/freedreno/registers/mdp/mdp5.xml              (  37461 bytes, from 2022-03-08 17:40:42)
 16- /home/robclark/src/mesa/mesa/src/freedreno/registers/dsi/dsi.xml               (  18746 bytes, from 2022-04-28 17:29:36)
 17- /home/robclark/src/mesa/mesa/src/freedreno/registers/dsi/dsi_phy_v2.xml        (   3236 bytes, from 2022-03-08 17:40:42)
 18- /home/robclark/src/mesa/mesa/src/freedreno/registers/dsi/dsi_phy_28nm_8960.xml (   4935 bytes, from 2022-03-08 17:40:42)
 19- /home/robclark/src/mesa/mesa/src/freedreno/registers/dsi/dsi_phy_28nm.xml      (   7004 bytes, from 2022-03-08 17:40:42)
 20- /home/robclark/src/mesa/mesa/src/freedreno/registers/dsi/dsi_phy_20nm.xml      (   3712 bytes, from 2022-03-08 17:40:42)
 21- /home/robclark/src/mesa/mesa/src/freedreno/registers/dsi/dsi_phy_14nm.xml      (   5381 bytes, from 2022-03-08 17:40:42)
 22- /home/robclark/src/mesa/mesa/src/freedreno/registers/dsi/dsi_phy_10nm.xml      (   4499 bytes, from 2022-03-08 17:40:42)
 23- /home/robclark/src/mesa/mesa/src/freedreno/registers/dsi/dsi_phy_7nm.xml       (  11007 bytes, from 2022-03-08 17:40:42)
 24- /home/robclark/src/mesa/mesa/src/freedreno/registers/dsi/sfpb.xml              (    602 bytes, from 2022-03-08 17:40:42)
 25- /home/robclark/src/mesa/mesa/src/freedreno/registers/dsi/mmss_cc.xml           (   1686 bytes, from 2022-03-08 17:40:42)
 26- /home/robclark/src/mesa/mesa/src/freedreno/registers/hdmi/qfprom.xml           (    600 bytes, from 2022-03-08 17:40:42)
 27- /home/robclark/src/mesa/mesa/src/freedreno/registers/hdmi/hdmi.xml             (  42350 bytes, from 2022-09-20 17:45:56)
 28- /home/robclark/src/mesa/mesa/src/freedreno/registers/edp/edp.xml               (  10416 bytes, from 2022-03-08 17:40:42)
 29
 30Copyright (C) 2013-2022 by the following authors:
 31- Rob Clark <robdclark@gmail.com> (robclark)
 32- Ilia Mirkin <imirkin@alum.mit.edu> (imirkin)
 33
 34Permission is hereby granted, free of charge, to any person obtaining
 35a copy of this software and associated documentation files (the
 36"Software"), to deal in the Software without restriction, including
 37without limitation the rights to use, copy, modify, merge, publish,
 38distribute, sublicense, and/or sell copies of the Software, and to
 39permit persons to whom the Software is furnished to do so, subject to
 40the following conditions:
 41
 42The above copyright notice and this permission notice (including the
 43next paragraph) shall be included in all copies or substantial
 44portions of the Software.
 45
 46THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
 47EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
 48MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
 49IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
 50LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
 51OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
 52WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 53*/
 54
 55
 56enum mmss_cc_clk {
 57	CLK = 0,
 58	PCLK = 1,
 59};
 60
 61#define REG_MMSS_CC_AHB						0x00000008
 62
 63static inline uint32_t __offset_CLK(enum mmss_cc_clk idx)
 64{
 65	switch (idx) {
 66		case CLK: return 0x0000004c;
 67		case PCLK: return 0x00000130;
 68		default: return INVALID_IDX(idx);
 69	}
 70}
 71static inline uint32_t REG_MMSS_CC_CLK(enum mmss_cc_clk i0) { return 0x00000000 + __offset_CLK(i0); }
 72
 73static inline uint32_t REG_MMSS_CC_CLK_CC(enum mmss_cc_clk i0) { return 0x00000000 + __offset_CLK(i0); }
 74#define MMSS_CC_CLK_CC_CLK_EN					0x00000001
 75#define MMSS_CC_CLK_CC_ROOT_EN					0x00000004
 76#define MMSS_CC_CLK_CC_MND_EN					0x00000020
 77#define MMSS_CC_CLK_CC_MND_MODE__MASK				0x000000c0
 78#define MMSS_CC_CLK_CC_MND_MODE__SHIFT				6
 79static inline uint32_t MMSS_CC_CLK_CC_MND_MODE(uint32_t val)
 80{
 81	return ((val) << MMSS_CC_CLK_CC_MND_MODE__SHIFT) & MMSS_CC_CLK_CC_MND_MODE__MASK;
 82}
 83#define MMSS_CC_CLK_CC_PMXO_SEL__MASK				0x00000300
 84#define MMSS_CC_CLK_CC_PMXO_SEL__SHIFT				8
 85static inline uint32_t MMSS_CC_CLK_CC_PMXO_SEL(uint32_t val)
 86{
 87	return ((val) << MMSS_CC_CLK_CC_PMXO_SEL__SHIFT) & MMSS_CC_CLK_CC_PMXO_SEL__MASK;
 88}
 89
 90static inline uint32_t REG_MMSS_CC_CLK_MD(enum mmss_cc_clk i0) { return 0x00000004 + __offset_CLK(i0); }
 91#define MMSS_CC_CLK_MD_D__MASK					0x000000ff
 92#define MMSS_CC_CLK_MD_D__SHIFT					0
 93static inline uint32_t MMSS_CC_CLK_MD_D(uint32_t val)
 94{
 95	return ((val) << MMSS_CC_CLK_MD_D__SHIFT) & MMSS_CC_CLK_MD_D__MASK;
 96}
 97#define MMSS_CC_CLK_MD_M__MASK					0x0000ff00
 98#define MMSS_CC_CLK_MD_M__SHIFT					8
 99static inline uint32_t MMSS_CC_CLK_MD_M(uint32_t val)
100{
101	return ((val) << MMSS_CC_CLK_MD_M__SHIFT) & MMSS_CC_CLK_MD_M__MASK;
102}
103
104static inline uint32_t REG_MMSS_CC_CLK_NS(enum mmss_cc_clk i0) { return 0x00000008 + __offset_CLK(i0); }
105#define MMSS_CC_CLK_NS_SRC__MASK				0x0000000f
106#define MMSS_CC_CLK_NS_SRC__SHIFT				0
107static inline uint32_t MMSS_CC_CLK_NS_SRC(uint32_t val)
108{
109	return ((val) << MMSS_CC_CLK_NS_SRC__SHIFT) & MMSS_CC_CLK_NS_SRC__MASK;
110}
111#define MMSS_CC_CLK_NS_PRE_DIV_FUNC__MASK			0x00fff000
112#define MMSS_CC_CLK_NS_PRE_DIV_FUNC__SHIFT			12
113static inline uint32_t MMSS_CC_CLK_NS_PRE_DIV_FUNC(uint32_t val)
114{
115	return ((val) << MMSS_CC_CLK_NS_PRE_DIV_FUNC__SHIFT) & MMSS_CC_CLK_NS_PRE_DIV_FUNC__MASK;
116}
117#define MMSS_CC_CLK_NS_VAL__MASK				0xff000000
118#define MMSS_CC_CLK_NS_VAL__SHIFT				24
119static inline uint32_t MMSS_CC_CLK_NS_VAL(uint32_t val)
120{
121	return ((val) << MMSS_CC_CLK_NS_VAL__SHIFT) & MMSS_CC_CLK_NS_VAL__MASK;
122}
123
124#define REG_MMSS_CC_DSI2_PIXEL_CC				0x00000094
125
126#define REG_MMSS_CC_DSI2_PIXEL_NS				0x000000e4
127
128#define REG_MMSS_CC_DSI2_PIXEL_CC2				0x00000264
129
130
131#endif /* MMSS_CC_XML */