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  1/*
  2 * Intel MID Resistive Touch Screen Driver
  3 *
  4 * Copyright (C) 2008 Intel Corp
  5 *
  6 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
  7 *
  8 * This program is free software; you can redistribute it and/or modify
  9 * it under the terms of the GNU General Public License as published by
 10 * the Free Software Foundation; version 2 of the License.
 11 *
 12 * This program is distributed in the hope that it will be useful, but
 13 * WITHOUT ANY WARRANTY; without even the implied warranty of
 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	See the GNU
 15 * General Public License for more details.
 16 *
 17 * You should have received a copy of the GNU General Public License along
 18 * with this program; if not, write to the Free Software Foundation, Inc.,
 19 * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
 20 *
 21 * Questions/Comments/Bug fixes to Sreedhara (sreedhara.ds@intel.com)
 22 *			    Ramesh Agarwal (ramesh.agarwal@intel.com)
 23 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 24 *
 25 * TODO:
 26 *	review conversion of r/m/w sequences
 27 */
 28
 29#include <linux/module.h>
 30#include <linux/input.h>
 31#include <linux/interrupt.h>
 32#include <linux/err.h>
 33#include <linux/param.h>
 34#include <linux/slab.h>
 35#include <linux/platform_device.h>
 36#include <linux/irq.h>
 37#include <linux/delay.h>
 38#include <asm/intel_scu_ipc.h>
 39
 40/* PMIC Interrupt registers */
 41#define PMIC_REG_ID1		0x00 /* PMIC ID1 register */
 42
 43/* PMIC Interrupt registers */
 44#define PMIC_REG_INT		0x04 /* PMIC interrupt register */
 45#define PMIC_REG_MINT		0x05 /* PMIC interrupt mask register */
 46
 47/* ADC Interrupt registers */
 48#define PMIC_REG_ADCINT		0x5F /* ADC interrupt register */
 49#define PMIC_REG_MADCINT	0x60 /* ADC interrupt mask register */
 50
 51/* ADC Control registers */
 52#define PMIC_REG_ADCCNTL1	0x61 /* ADC control register */
 53
 54/* ADC Channel Selection registers */
 55#define PMICADDR0		0xA4
 56#define END_OF_CHANNEL		0x1F
 57
 58/* ADC Result register */
 59#define PMIC_REG_ADCSNS0H	0x64
 60
 61/* ADC channels for touch screen */
 62#define MRST_TS_CHAN10		0xA /* Touch screen X+ connection */
 63#define MRST_TS_CHAN11		0xB /* Touch screen X- connection */
 64#define MRST_TS_CHAN12		0xC /* Touch screen Y+ connection */
 65#define MRST_TS_CHAN13		0xD /* Touch screen Y- connection */
 66
 67/* Touch screen channel BIAS constants */
 68#define MRST_XBIAS		0x20
 69#define MRST_YBIAS		0x40
 70#define MRST_ZBIAS		0x80
 71
 72/* Touch screen coordinates */
 73#define MRST_X_MIN		10
 74#define MRST_X_MAX		1024
 75#define MRST_X_FUZZ		5
 76#define MRST_Y_MIN		10
 77#define MRST_Y_MAX		1024
 78#define MRST_Y_FUZZ		5
 79#define MRST_PRESSURE_MIN	0
 80#define MRST_PRESSURE_NOMINAL	50
 81#define MRST_PRESSURE_MAX	100
 82
 83#define WAIT_ADC_COMPLETION	10 /* msec */
 84
 85/* PMIC ADC round robin delays */
 86#define ADC_LOOP_DELAY0		0x0 /* Continuous loop */
 87#define ADC_LOOP_DELAY1		0x1 /* 4.5  ms approximate */
 88
 89/* PMIC Vendor Identifiers */
 90#define PMIC_VENDOR_FS		0 /* PMIC vendor FreeScale */
 91#define PMIC_VENDOR_MAXIM	1 /* PMIC vendor MAXIM */
 92#define PMIC_VENDOR_NEC		2 /* PMIC vendor NEC */
 93#define MRSTOUCH_MAX_CHANNELS	32 /* Maximum ADC channels */
 94
 95/* Touch screen device structure */
 96struct mrstouch_dev {
 97	struct device *dev; /* device associated with touch screen */
 98	struct input_dev *input;
 99	char phys[32];
100	u16 asr;		/* Address selection register */
101	int irq;
102	unsigned int vendor;	/* PMIC vendor */
103	unsigned int rev;	/* PMIC revision */
104
105	int (*read_prepare)(struct mrstouch_dev *tsdev);
106	int (*read)(struct mrstouch_dev *tsdev, u16 *x, u16 *y, u16 *z);
107	int (*read_finish)(struct mrstouch_dev *tsdev);
108};
109
110
111/*************************** NEC and Maxim Interface ************************/
112
113static int mrstouch_nec_adc_read_prepare(struct mrstouch_dev *tsdev)
114{
115	return intel_scu_ipc_update_register(PMIC_REG_MADCINT, 0, 0x20);
116}
117
118/*
119 * Enables PENDET interrupt.
120 */
121static int mrstouch_nec_adc_read_finish(struct mrstouch_dev *tsdev)
122{
123	int err;
124
125	err = intel_scu_ipc_update_register(PMIC_REG_MADCINT, 0x20, 0x20);
126	if (!err)
127		err = intel_scu_ipc_update_register(PMIC_REG_ADCCNTL1, 0, 0x05);
128
129	return err;
130}
131
132/*
133 * Reads PMIC ADC touch screen result
134 * Reads ADC storage registers for higher 7 and lower 3 bits and
135 * converts the two readings into a single value and turns off gain bit
136 */
137static int mrstouch_ts_chan_read(u16 offset, u16 chan, u16 *vp, u16 *vm)
138{
139	int err;
140	u16 result;
141	u32 res;
142
143	result = PMIC_REG_ADCSNS0H + offset;
144
145	if (chan == MRST_TS_CHAN12)
146		result += 4;
147
148	err = intel_scu_ipc_ioread32(result, &res);
149	if (err)
150		return err;
151
152	/* Mash the bits up */
153
154	*vp = (res & 0xFF) << 3;	/* Highest 7 bits */
155	*vp |= (res >> 8) & 0x07;	/* Lower 3 bits */
156	*vp &= 0x3FF;
157
158	res >>= 16;
159
160	*vm = (res & 0xFF) << 3;	/* Highest 7 bits */
161	*vm |= (res >> 8) & 0x07;	/* Lower 3 bits */
162	*vm &= 0x3FF;
163
164	return 0;
165}
166
167/*
168 * Enables X, Y and Z bias values
169 * Enables YPYM for X channels and XPXM for Y channels
170 */
171static int mrstouch_ts_bias_set(uint offset, uint bias)
172{
173	int count;
174	u16 chan, start;
175	u16 reg[4];
176	u8 data[4];
177
178	chan = PMICADDR0 + offset;
179	start = MRST_TS_CHAN10;
180
181	for (count = 0; count <= 3; count++) {
182		reg[count] = chan++;
183		data[count] = bias | (start + count);
184	}
185
186	return intel_scu_ipc_writev(reg, data, 4);
187}
188
189/* To read touch screen channel values */
190static int mrstouch_nec_adc_read(struct mrstouch_dev *tsdev,
191				 u16 *x, u16 *y, u16 *z)
192{
193	int err;
194	u16 xm, ym, zm;
195
196	/* configure Y bias for X channels */
197	err = mrstouch_ts_bias_set(tsdev->asr, MRST_YBIAS);
198	if (err)
199		goto ipc_error;
200
201	msleep(WAIT_ADC_COMPLETION);
202
203	/* read x+ and x- channels */
204	err = mrstouch_ts_chan_read(tsdev->asr, MRST_TS_CHAN10, x, &xm);
205	if (err)
206		goto ipc_error;
207
208	/* configure x bias for y channels */
209	err = mrstouch_ts_bias_set(tsdev->asr, MRST_XBIAS);
210	if (err)
211		goto ipc_error;
212
213	msleep(WAIT_ADC_COMPLETION);
214
215	/* read y+ and y- channels */
216	err = mrstouch_ts_chan_read(tsdev->asr, MRST_TS_CHAN12, y, &ym);
217	if (err)
218		goto ipc_error;
219
220	/* configure z bias for x and y channels */
221	err = mrstouch_ts_bias_set(tsdev->asr, MRST_ZBIAS);
222	if (err)
223		goto ipc_error;
224
225	msleep(WAIT_ADC_COMPLETION);
226
227	/* read z+ and z- channels */
228	err = mrstouch_ts_chan_read(tsdev->asr, MRST_TS_CHAN10, z, &zm);
229	if (err)
230		goto ipc_error;
231
232	return 0;
233
234ipc_error:
235	dev_err(tsdev->dev, "ipc error during adc read\n");
236	return err;
237}
238
239
240/*************************** Freescale Interface ************************/
241
242static int mrstouch_fs_adc_read_prepare(struct mrstouch_dev *tsdev)
243{
244	int err, count;
245	u16 chan;
246	u16 reg[5];
247	u8 data[5];
248
249	/* Stop the ADC */
250	err = intel_scu_ipc_update_register(PMIC_REG_MADCINT, 0x00, 0x02);
251	if (err)
252		goto ipc_error;
253
254	chan = PMICADDR0 + tsdev->asr;
255
256	/* Set X BIAS */
257	for (count = 0; count <= 3; count++) {
258		reg[count] = chan++;
259		data[count] = 0x2A;
260	}
261	reg[count] =  chan++; /* Dummy */
262	data[count] = 0;
263
264	err = intel_scu_ipc_writev(reg, data, 5);
265	if (err)
266		goto ipc_error;
267
268	msleep(WAIT_ADC_COMPLETION);
269
270	/* Set Y BIAS */
271	for (count = 0; count <= 3; count++) {
272		reg[count] = chan++;
273		data[count] = 0x4A;
274	}
275	reg[count] = chan++; /* Dummy */
276	data[count] = 0;
277
278	err = intel_scu_ipc_writev(reg, data, 5);
279	if (err)
280		goto ipc_error;
281
282	msleep(WAIT_ADC_COMPLETION);
283
284	/* Set Z BIAS */
285	err = intel_scu_ipc_iowrite32(chan + 2, 0x8A8A8A8A);
286	if (err)
287		goto ipc_error;
288
289	msleep(WAIT_ADC_COMPLETION);
290
291	return 0;
292
293ipc_error:
294	dev_err(tsdev->dev, "ipc error during %s\n", __func__);
295	return err;
296}
297
298static int mrstouch_fs_adc_read(struct mrstouch_dev *tsdev,
299				u16 *x, u16 *y, u16 *z)
300{
301	int err;
302	u16 result;
303	u16 reg[4];
304	u8 data[4];
305
306	result = PMIC_REG_ADCSNS0H + tsdev->asr;
307
308	reg[0] = result + 4;
309	reg[1] = result + 5;
310	reg[2] = result + 16;
311	reg[3] = result + 17;
312
313	err = intel_scu_ipc_readv(reg, data, 4);
314	if (err)
315		goto ipc_error;
316
317	*x = data[0] << 3; /* Higher 7 bits */
318	*x |= data[1] & 0x7; /* Lower 3 bits */
319	*x &= 0x3FF;
320
321	*y = data[2] << 3; /* Higher 7 bits */
322	*y |= data[3] & 0x7; /* Lower 3 bits */
323	*y &= 0x3FF;
324
325	/* Read Z value */
326	reg[0] = result + 28;
327	reg[1] = result + 29;
328
329	err = intel_scu_ipc_readv(reg, data, 4);
330	if (err)
331		goto ipc_error;
332
333	*z = data[0] << 3; /* Higher 7 bits */
334	*z |= data[1] & 0x7; /* Lower 3 bits */
335	*z &= 0x3FF;
336
337	return 0;
338
339ipc_error:
340	dev_err(tsdev->dev, "ipc error during %s\n", __func__);
341	return err;
342}
343
344static int mrstouch_fs_adc_read_finish(struct mrstouch_dev *tsdev)
345{
346	int err, count;
347	u16 chan;
348	u16 reg[5];
349	u8 data[5];
350
351	/* Clear all TS channels */
352	chan = PMICADDR0 + tsdev->asr;
353	for (count = 0; count <= 4; count++) {
354		reg[count] = chan++;
355		data[count] = 0;
356	}
357	err = intel_scu_ipc_writev(reg, data, 5);
358	if (err)
359		goto ipc_error;
360
361	for (count = 0; count <= 4; count++) {
362		reg[count] = chan++;
363		data[count] = 0;
364	}
365	err = intel_scu_ipc_writev(reg, data, 5);
366	if (err)
367		goto ipc_error;
368
369	err = intel_scu_ipc_iowrite32(chan + 2, 0x00000000);
370	if (err)
371		goto ipc_error;
372
373	/* Start ADC */
374	err = intel_scu_ipc_update_register(PMIC_REG_MADCINT, 0x02, 0x02);
375	if (err)
376		goto ipc_error;
377
378	return 0;
379
380ipc_error:
381	dev_err(tsdev->dev, "ipc error during %s\n", __func__);
382	return err;
383}
384
385static void mrstouch_report_event(struct input_dev *input,
386			unsigned int x, unsigned int y, unsigned int z)
387{
388	if (z > MRST_PRESSURE_NOMINAL) {
389		/* Pen touched, report button touch and coordinates */
390		input_report_key(input, BTN_TOUCH, 1);
391		input_report_abs(input, ABS_X, x);
392		input_report_abs(input, ABS_Y, y);
393	} else {
394		input_report_key(input, BTN_TOUCH, 0);
395	}
396
397	input_report_abs(input, ABS_PRESSURE, z);
398	input_sync(input);
399}
400
401/* PENDET interrupt handler */
402static irqreturn_t mrstouch_pendet_irq(int irq, void *dev_id)
403{
404	struct mrstouch_dev *tsdev = dev_id;
405	u16 x, y, z;
406
407	/*
408	 * Should we lower thread priority? Probably not, since we are
409	 * not spinning but sleeping...
410	 */
411
412	if (tsdev->read_prepare(tsdev))
413		goto out;
414
415	do {
416		if (tsdev->read(tsdev, &x, &y, &z))
417			break;
418
419		mrstouch_report_event(tsdev->input, x, y, z);
420	} while (z > MRST_PRESSURE_NOMINAL);
421
422	tsdev->read_finish(tsdev);
423
424out:
425	return IRQ_HANDLED;
426}
427
428/* Utility to read PMIC ID */
429static int mrstouch_read_pmic_id(uint *vendor, uint *rev)
430{
431	int err;
432	u8 r;
433
434	err = intel_scu_ipc_ioread8(PMIC_REG_ID1, &r);
435	if (err)
436		return err;
437
438	*vendor = r & 0x7;
439	*rev = (r >> 3) & 0x7;
440
441	return 0;
442}
443
444/*
445 * Parse ADC channels to find end of the channel configured by other ADC user
446 * NEC and MAXIM requires 4 channels and FreeScale needs 18 channels
447 */
448static int mrstouch_chan_parse(struct mrstouch_dev *tsdev)
449{
450	int found = 0;
451	int err, i;
452	u8 r8;
453
454	for (i = 0; i < MRSTOUCH_MAX_CHANNELS; i++) {
455		err = intel_scu_ipc_ioread8(PMICADDR0 + i, &r8);
456		if (err)
457			return err;
458
459		if (r8 == END_OF_CHANNEL) {
460			found = i;
461			break;
462		}
463	}
464
465	if (tsdev->vendor == PMIC_VENDOR_FS) {
466		if (found > MRSTOUCH_MAX_CHANNELS - 18)
467			return -ENOSPC;
468	} else {
469		if (found > MRSTOUCH_MAX_CHANNELS - 4)
470			return -ENOSPC;
471	}
472
473	return found;
474}
475
476
477/*
478 * Writes touch screen channels to ADC address selection registers
479 */
480static int mrstouch_ts_chan_set(uint offset)
481{
482	u16 chan;
483
484	int ret, count;
485
486	chan = PMICADDR0 + offset;
487	for (count = 0; count <= 3; count++) {
488		ret = intel_scu_ipc_iowrite8(chan++, MRST_TS_CHAN10 + count);
489		if (ret)
490			return ret;
491	}
492	return intel_scu_ipc_iowrite8(chan++, END_OF_CHANNEL);
493}
494
495/* Initialize ADC */
496static int mrstouch_adc_init(struct mrstouch_dev *tsdev)
497{
498	int err, start;
499	u8 ra, rm;
500
501	err = mrstouch_read_pmic_id(&tsdev->vendor, &tsdev->rev);
502	if (err) {
503		dev_err(tsdev->dev, "Unable to read PMIC id\n");
504		return err;
505	}
506
507	switch (tsdev->vendor) {
508	case PMIC_VENDOR_NEC:
509	case PMIC_VENDOR_MAXIM:
510		tsdev->read_prepare = mrstouch_nec_adc_read_prepare;
511		tsdev->read = mrstouch_nec_adc_read;
512		tsdev->read_finish = mrstouch_nec_adc_read_finish;
513		break;
514
515	case PMIC_VENDOR_FS:
516		tsdev->read_prepare = mrstouch_fs_adc_read_prepare;
517		tsdev->read = mrstouch_fs_adc_read;
518		tsdev->read_finish = mrstouch_fs_adc_read_finish;
519		break;
520
521	default:
522		dev_err(tsdev->dev,
523			"Unsupported touchscreen: %d\n", tsdev->vendor);
524		return -ENXIO;
525	}
526
527	start = mrstouch_chan_parse(tsdev);
528	if (start < 0) {
529		dev_err(tsdev->dev, "Unable to parse channels\n");
530		return start;
531	}
532
533	tsdev->asr = start;
534
535	/*
536	 * ADC power on, start, enable PENDET and set loop delay
537	 * ADC loop delay is set to 4.5 ms approximately
538	 * Loop delay more than this results in jitter in adc readings
539	 * Setting loop delay to 0 (continuous loop) in MAXIM stops PENDET
540	 * interrupt generation sometimes.
541	 */
542
543	if (tsdev->vendor == PMIC_VENDOR_FS) {
544		ra = 0xE0 | ADC_LOOP_DELAY0;
545		rm = 0x5;
546	} else {
547		/* NEC and MAXIm not consistent with loop delay 0 */
548		ra = 0xE0 | ADC_LOOP_DELAY1;
549		rm = 0x0;
550
551		/* configure touch screen channels */
552		err = mrstouch_ts_chan_set(tsdev->asr);
553		if (err)
554			return err;
555	}
556
557	err = intel_scu_ipc_update_register(PMIC_REG_ADCCNTL1, ra, 0xE7);
558	if (err)
559		return err;
560
561	err = intel_scu_ipc_update_register(PMIC_REG_MADCINT, rm, 0x03);
562	if (err)
563		return err;
564
565	return 0;
566}
567
568
569/* Probe function for touch screen driver */
570static int mrstouch_probe(struct platform_device *pdev)
571{
572	struct mrstouch_dev *tsdev;
573	struct input_dev *input;
574	int err;
575	int irq;
576
577	irq = platform_get_irq(pdev, 0);
578	if (irq < 0) {
579		dev_err(&pdev->dev, "no interrupt assigned\n");
580		return -EINVAL;
581	}
582
583	tsdev = kzalloc(sizeof(struct mrstouch_dev), GFP_KERNEL);
584	input = input_allocate_device();
585	if (!tsdev || !input) {
586		dev_err(&pdev->dev, "unable to allocate memory\n");
587		err = -ENOMEM;
588		goto err_free_mem;
589	}
590
591	tsdev->dev = &pdev->dev;
592	tsdev->input = input;
593	tsdev->irq = irq;
594
595	snprintf(tsdev->phys, sizeof(tsdev->phys),
596		 "%s/input0", dev_name(tsdev->dev));
597
598	err = mrstouch_adc_init(tsdev);
599	if (err) {
600		dev_err(&pdev->dev, "ADC initialization failed\n");
601		goto err_free_mem;
602	}
603
604	input->name = "mrst_touchscreen";
605	input->phys = tsdev->phys;
606	input->dev.parent = tsdev->dev;
607
608	input->id.vendor = tsdev->vendor;
609	input->id.version = tsdev->rev;
610
611	input->evbit[0] = BIT_MASK(EV_KEY) | BIT_MASK(EV_ABS);
612	input->keybit[BIT_WORD(BTN_TOUCH)] = BIT_MASK(BTN_TOUCH);
613
614	input_set_abs_params(tsdev->input, ABS_X,
615			     MRST_X_MIN, MRST_X_MAX, MRST_X_FUZZ, 0);
616	input_set_abs_params(tsdev->input, ABS_Y,
617			     MRST_Y_MIN, MRST_Y_MAX, MRST_Y_FUZZ, 0);
618	input_set_abs_params(tsdev->input, ABS_PRESSURE,
619			     MRST_PRESSURE_MIN, MRST_PRESSURE_MAX, 0, 0);
620
621	err = request_threaded_irq(tsdev->irq, NULL, mrstouch_pendet_irq,
622				   IRQF_ONESHOT, "mrstouch", tsdev);
623	if (err) {
624		dev_err(tsdev->dev, "unable to allocate irq\n");
625		goto err_free_mem;
626	}
627
628	err = input_register_device(tsdev->input);
629	if (err) {
630		dev_err(tsdev->dev, "unable to register input device\n");
631		goto err_free_irq;
632	}
633
634	platform_set_drvdata(pdev, tsdev);
635	return 0;
636
637err_free_irq:
638	free_irq(tsdev->irq, tsdev);
639err_free_mem:
640	input_free_device(input);
641	kfree(tsdev);
642	return err;
643}
644
645static int mrstouch_remove(struct platform_device *pdev)
646{
647	struct mrstouch_dev *tsdev = platform_get_drvdata(pdev);
648
649	free_irq(tsdev->irq, tsdev);
650	input_unregister_device(tsdev->input);
651	kfree(tsdev);
652
653	return 0;
654}
655
656static struct platform_driver mrstouch_driver = {
657	.driver = {
658		.name	= "pmic_touch",
659		.owner	= THIS_MODULE,
660	},
661	.probe		= mrstouch_probe,
662	.remove		= mrstouch_remove,
663};
664module_platform_driver(mrstouch_driver);
665
666MODULE_AUTHOR("Sreedhara Murthy. D.S, sreedhara.ds@intel.com");
667MODULE_DESCRIPTION("Intel Moorestown Resistive Touch Screen Driver");
668MODULE_LICENSE("GPL");