1/*
 2 * This file is subject to the terms and conditions of the GNU General Public
 3 * License.  See the file "COPYING" in the main directory of this archive
 4 * for more details.
 5 *
 6 * Copyright (C) 1992 - 1997, 2000-2005 Silicon Graphics, Inc. All rights reserved.
 7 */
 8#ifndef _ASM_IA64_SN_PCI_PCIBUS_PROVIDER_H
 9#define _ASM_IA64_SN_PCI_PCIBUS_PROVIDER_H
10
11/*
12 * SN pci asic types.  Do not ever renumber these or reuse values.  The
13 * values must agree with what prom thinks they are.
14 */
15
16#define PCIIO_ASIC_TYPE_UNKNOWN	0
17#define PCIIO_ASIC_TYPE_PPB	1
18#define PCIIO_ASIC_TYPE_PIC	2
19#define PCIIO_ASIC_TYPE_TIOCP	3
20#define PCIIO_ASIC_TYPE_TIOCA	4
21#define PCIIO_ASIC_TYPE_TIOCE	5
22
23#define PCIIO_ASIC_MAX_TYPES	6
24
25/*
26 * Common pciio bus provider data.  There should be one of these as the
27 * first field in any pciio based provider soft structure (e.g. pcibr_soft
28 * tioca_soft, etc).
29 */
30
31struct pcibus_bussoft {
32	u32		bs_asic_type;	/* chipset type */
33	u32		bs_xid;		/* xwidget id */
34	u32		bs_persist_busnum; /* Persistent Bus Number */
35	u32		bs_persist_segment; /* Segment Number */
36	u64		bs_legacy_io;	/* legacy io pio addr */
37	u64		bs_legacy_mem;	/* legacy mem pio addr */
38	u64		bs_base;	/* widget base */
39	struct xwidget_info	*bs_xwidget_info;
40};
41
42struct pci_controller;
43/*
44 * SN pci bus indirection
45 */
46
47struct sn_pcibus_provider {
48	dma_addr_t	(*dma_map)(struct pci_dev *, unsigned long, size_t, int flags);
49	dma_addr_t	(*dma_map_consistent)(struct pci_dev *, unsigned long, size_t, int flags);
50	void		(*dma_unmap)(struct pci_dev *, dma_addr_t, int);
51	void *		(*bus_fixup)(struct pcibus_bussoft *, struct pci_controller *);
52 	void		(*force_interrupt)(struct sn_irq_info *);
53 	void		(*target_interrupt)(struct sn_irq_info *);
54};
55
56/*
57 * Flags used by the map interfaces
58 * bits 3:0 specifies format of passed in address
59 * bit  4   specifies that address is to be used for MSI
60 */
61
62#define SN_DMA_ADDRTYPE(x)	((x) & 0xf)
63#define     SN_DMA_ADDR_PHYS	1	/* address is an xio address. */
64#define     SN_DMA_ADDR_XIO	2	/* address is phys memory */
65#define SN_DMA_MSI		0x10	/* Bus address is to be used for MSI */
66
67extern struct sn_pcibus_provider *sn_pci_provider[];
68#endif				/* _ASM_IA64_SN_PCI_PCIBUS_PROVIDER_H */