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1/*
2 * Implement the default iomap interfaces
3 *
4 * (C) Copyright 2004 Linus Torvalds
5 */
6#include <linux/pci.h>
7#include <linux/io.h>
8
9#include <linux/export.h>
10
11#ifdef CONFIG_PCI
12/**
13 * pci_iomap - create a virtual mapping cookie for a PCI BAR
14 * @dev: PCI device that owns the BAR
15 * @bar: BAR number
16 * @maxlen: length of the memory to map
17 *
18 * Using this function you will get a __iomem address to your device BAR.
19 * You can access it using ioread*() and iowrite*(). These functions hide
20 * the details if this is a MMIO or PIO address space and will just do what
21 * you expect from them in the correct way.
22 *
23 * @maxlen specifies the maximum length to map. If you want to get access to
24 * the complete BAR without checking for its length first, pass %0 here.
25 * */
26void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long maxlen)
27{
28 resource_size_t start = pci_resource_start(dev, bar);
29 resource_size_t len = pci_resource_len(dev, bar);
30 unsigned long flags = pci_resource_flags(dev, bar);
31
32 if (!len || !start)
33 return NULL;
34 if (maxlen && len > maxlen)
35 len = maxlen;
36 if (flags & IORESOURCE_IO)
37 return __pci_ioport_map(dev, start, len);
38 if (flags & IORESOURCE_MEM) {
39 if (flags & IORESOURCE_CACHEABLE)
40 return ioremap(start, len);
41 return ioremap_nocache(start, len);
42 }
43 /* What? */
44 return NULL;
45}
46
47EXPORT_SYMBOL(pci_iomap);
48#endif /* CONFIG_PCI */
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Implement the default iomap interfaces
4 *
5 * (C) Copyright 2004 Linus Torvalds
6 */
7#include <linux/pci.h>
8#include <linux/io.h>
9
10#include <linux/export.h>
11
12#ifdef CONFIG_PCI
13/**
14 * pci_iomap_range - create a virtual mapping cookie for a PCI BAR
15 * @dev: PCI device that owns the BAR
16 * @bar: BAR number
17 * @offset: map memory at the given offset in BAR
18 * @maxlen: max length of the memory to map
19 *
20 * Using this function you will get a __iomem address to your device BAR.
21 * You can access it using ioread*() and iowrite*(). These functions hide
22 * the details if this is a MMIO or PIO address space and will just do what
23 * you expect from them in the correct way.
24 *
25 * @maxlen specifies the maximum length to map. If you want to get access to
26 * the complete BAR from offset to the end, pass %0 here.
27 * */
28void __iomem *pci_iomap_range(struct pci_dev *dev,
29 int bar,
30 unsigned long offset,
31 unsigned long maxlen)
32{
33 resource_size_t start = pci_resource_start(dev, bar);
34 resource_size_t len = pci_resource_len(dev, bar);
35 unsigned long flags = pci_resource_flags(dev, bar);
36
37 if (len <= offset || !start)
38 return NULL;
39 len -= offset;
40 start += offset;
41 if (maxlen && len > maxlen)
42 len = maxlen;
43 if (flags & IORESOURCE_IO)
44 return __pci_ioport_map(dev, start, len);
45 if (flags & IORESOURCE_MEM)
46 return ioremap(start, len);
47 /* What? */
48 return NULL;
49}
50EXPORT_SYMBOL(pci_iomap_range);
51
52/**
53 * pci_iomap_wc_range - create a virtual WC mapping cookie for a PCI BAR
54 * @dev: PCI device that owns the BAR
55 * @bar: BAR number
56 * @offset: map memory at the given offset in BAR
57 * @maxlen: max length of the memory to map
58 *
59 * Using this function you will get a __iomem address to your device BAR.
60 * You can access it using ioread*() and iowrite*(). These functions hide
61 * the details if this is a MMIO or PIO address space and will just do what
62 * you expect from them in the correct way. When possible write combining
63 * is used.
64 *
65 * @maxlen specifies the maximum length to map. If you want to get access to
66 * the complete BAR from offset to the end, pass %0 here.
67 * */
68void __iomem *pci_iomap_wc_range(struct pci_dev *dev,
69 int bar,
70 unsigned long offset,
71 unsigned long maxlen)
72{
73 resource_size_t start = pci_resource_start(dev, bar);
74 resource_size_t len = pci_resource_len(dev, bar);
75 unsigned long flags = pci_resource_flags(dev, bar);
76
77
78 if (flags & IORESOURCE_IO)
79 return NULL;
80
81 if (len <= offset || !start)
82 return NULL;
83
84 len -= offset;
85 start += offset;
86 if (maxlen && len > maxlen)
87 len = maxlen;
88
89 if (flags & IORESOURCE_MEM)
90 return ioremap_wc(start, len);
91
92 /* What? */
93 return NULL;
94}
95EXPORT_SYMBOL_GPL(pci_iomap_wc_range);
96
97/**
98 * pci_iomap - create a virtual mapping cookie for a PCI BAR
99 * @dev: PCI device that owns the BAR
100 * @bar: BAR number
101 * @maxlen: length of the memory to map
102 *
103 * Using this function you will get a __iomem address to your device BAR.
104 * You can access it using ioread*() and iowrite*(). These functions hide
105 * the details if this is a MMIO or PIO address space and will just do what
106 * you expect from them in the correct way.
107 *
108 * @maxlen specifies the maximum length to map. If you want to get access to
109 * the complete BAR without checking for its length first, pass %0 here.
110 * */
111void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long maxlen)
112{
113 return pci_iomap_range(dev, bar, 0, maxlen);
114}
115EXPORT_SYMBOL(pci_iomap);
116
117/**
118 * pci_iomap_wc - create a virtual WC mapping cookie for a PCI BAR
119 * @dev: PCI device that owns the BAR
120 * @bar: BAR number
121 * @maxlen: length of the memory to map
122 *
123 * Using this function you will get a __iomem address to your device BAR.
124 * You can access it using ioread*() and iowrite*(). These functions hide
125 * the details if this is a MMIO or PIO address space and will just do what
126 * you expect from them in the correct way. When possible write combining
127 * is used.
128 *
129 * @maxlen specifies the maximum length to map. If you want to get access to
130 * the complete BAR without checking for its length first, pass %0 here.
131 * */
132void __iomem *pci_iomap_wc(struct pci_dev *dev, int bar, unsigned long maxlen)
133{
134 return pci_iomap_wc_range(dev, bar, 0, maxlen);
135}
136EXPORT_SYMBOL_GPL(pci_iomap_wc);
137
138/*
139 * pci_iounmap() somewhat illogically comes from lib/iomap.c for the
140 * CONFIG_GENERIC_IOMAP case, because that's the code that knows about
141 * the different IOMAP ranges.
142 *
143 * But if the architecture does not use the generic iomap code, and if
144 * it has _not_ defined it's own private pci_iounmap function, we define
145 * it here.
146 *
147 * NOTE! This default implementation assumes that if the architecture
148 * support ioport mapping (HAS_IOPORT_MAP), the ioport mapping will
149 * be fixed to the range [ PCI_IOBASE, PCI_IOBASE+IO_SPACE_LIMIT [,
150 * and does not need unmapping with 'ioport_unmap()'.
151 *
152 * If you have different rules for your architecture, you need to
153 * implement your own pci_iounmap() that knows the rules for where
154 * and how IO vs MEM get mapped.
155 *
156 * This code is odd, and the ARCH_HAS/ARCH_WANTS #define logic comes
157 * from legacy <asm-generic/io.h> header file behavior. In particular,
158 * it would seem to make sense to do the iounmap(p) for the non-IO-space
159 * case here regardless, but that's not what the old header file code
160 * did. Probably incorrectly, but this is meant to be bug-for-bug
161 * compatible.
162 */
163#if defined(ARCH_WANTS_GENERIC_PCI_IOUNMAP)
164
165void pci_iounmap(struct pci_dev *dev, void __iomem *p)
166{
167#ifdef ARCH_HAS_GENERIC_IOPORT_MAP
168 uintptr_t start = (uintptr_t) PCI_IOBASE;
169 uintptr_t addr = (uintptr_t) p;
170
171 if (addr >= start && addr < start + IO_SPACE_LIMIT)
172 return;
173 iounmap(p);
174#endif
175}
176EXPORT_SYMBOL(pci_iounmap);
177
178#endif /* ARCH_WANTS_GENERIC_PCI_IOUNMAP */
179
180#endif /* CONFIG_PCI */