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1/*
2 * Copyright (c) by Jaroslav Kysela <perex@perex.cz>
3 * Routines for control of YMF724/740/744/754 chips
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 *
19 */
20
21#include <linux/delay.h>
22#include <linux/firmware.h>
23#include <linux/init.h>
24#include <linux/interrupt.h>
25#include <linux/pci.h>
26#include <linux/sched.h>
27#include <linux/slab.h>
28#include <linux/mutex.h>
29#include <linux/module.h>
30
31#include <sound/core.h>
32#include <sound/control.h>
33#include <sound/info.h>
34#include <sound/tlv.h>
35#include "ymfpci.h"
36#include <sound/asoundef.h>
37#include <sound/mpu401.h>
38
39#include <asm/io.h>
40#include <asm/byteorder.h>
41
42/*
43 * common I/O routines
44 */
45
46static void snd_ymfpci_irq_wait(struct snd_ymfpci *chip);
47
48static inline u8 snd_ymfpci_readb(struct snd_ymfpci *chip, u32 offset)
49{
50 return readb(chip->reg_area_virt + offset);
51}
52
53static inline void snd_ymfpci_writeb(struct snd_ymfpci *chip, u32 offset, u8 val)
54{
55 writeb(val, chip->reg_area_virt + offset);
56}
57
58static inline u16 snd_ymfpci_readw(struct snd_ymfpci *chip, u32 offset)
59{
60 return readw(chip->reg_area_virt + offset);
61}
62
63static inline void snd_ymfpci_writew(struct snd_ymfpci *chip, u32 offset, u16 val)
64{
65 writew(val, chip->reg_area_virt + offset);
66}
67
68static inline u32 snd_ymfpci_readl(struct snd_ymfpci *chip, u32 offset)
69{
70 return readl(chip->reg_area_virt + offset);
71}
72
73static inline void snd_ymfpci_writel(struct snd_ymfpci *chip, u32 offset, u32 val)
74{
75 writel(val, chip->reg_area_virt + offset);
76}
77
78static int snd_ymfpci_codec_ready(struct snd_ymfpci *chip, int secondary)
79{
80 unsigned long end_time;
81 u32 reg = secondary ? YDSXGR_SECSTATUSADR : YDSXGR_PRISTATUSADR;
82
83 end_time = jiffies + msecs_to_jiffies(750);
84 do {
85 if ((snd_ymfpci_readw(chip, reg) & 0x8000) == 0)
86 return 0;
87 schedule_timeout_uninterruptible(1);
88 } while (time_before(jiffies, end_time));
89 dev_err(chip->card->dev,
90 "codec_ready: codec %i is not ready [0x%x]\n",
91 secondary, snd_ymfpci_readw(chip, reg));
92 return -EBUSY;
93}
94
95static void snd_ymfpci_codec_write(struct snd_ac97 *ac97, u16 reg, u16 val)
96{
97 struct snd_ymfpci *chip = ac97->private_data;
98 u32 cmd;
99
100 snd_ymfpci_codec_ready(chip, 0);
101 cmd = ((YDSXG_AC97WRITECMD | reg) << 16) | val;
102 snd_ymfpci_writel(chip, YDSXGR_AC97CMDDATA, cmd);
103}
104
105static u16 snd_ymfpci_codec_read(struct snd_ac97 *ac97, u16 reg)
106{
107 struct snd_ymfpci *chip = ac97->private_data;
108
109 if (snd_ymfpci_codec_ready(chip, 0))
110 return ~0;
111 snd_ymfpci_writew(chip, YDSXGR_AC97CMDADR, YDSXG_AC97READCMD | reg);
112 if (snd_ymfpci_codec_ready(chip, 0))
113 return ~0;
114 if (chip->device_id == PCI_DEVICE_ID_YAMAHA_744 && chip->rev < 2) {
115 int i;
116 for (i = 0; i < 600; i++)
117 snd_ymfpci_readw(chip, YDSXGR_PRISTATUSDATA);
118 }
119 return snd_ymfpci_readw(chip, YDSXGR_PRISTATUSDATA);
120}
121
122/*
123 * Misc routines
124 */
125
126static u32 snd_ymfpci_calc_delta(u32 rate)
127{
128 switch (rate) {
129 case 8000: return 0x02aaab00;
130 case 11025: return 0x03accd00;
131 case 16000: return 0x05555500;
132 case 22050: return 0x07599a00;
133 case 32000: return 0x0aaaab00;
134 case 44100: return 0x0eb33300;
135 default: return ((rate << 16) / 375) << 5;
136 }
137}
138
139static u32 def_rate[8] = {
140 100, 2000, 8000, 11025, 16000, 22050, 32000, 48000
141};
142
143static u32 snd_ymfpci_calc_lpfK(u32 rate)
144{
145 u32 i;
146 static u32 val[8] = {
147 0x00570000, 0x06AA0000, 0x18B20000, 0x20930000,
148 0x2B9A0000, 0x35A10000, 0x3EAA0000, 0x40000000
149 };
150
151 if (rate == 44100)
152 return 0x40000000; /* FIXME: What's the right value? */
153 for (i = 0; i < 8; i++)
154 if (rate <= def_rate[i])
155 return val[i];
156 return val[0];
157}
158
159static u32 snd_ymfpci_calc_lpfQ(u32 rate)
160{
161 u32 i;
162 static u32 val[8] = {
163 0x35280000, 0x34A70000, 0x32020000, 0x31770000,
164 0x31390000, 0x31C90000, 0x33D00000, 0x40000000
165 };
166
167 if (rate == 44100)
168 return 0x370A0000;
169 for (i = 0; i < 8; i++)
170 if (rate <= def_rate[i])
171 return val[i];
172 return val[0];
173}
174
175/*
176 * Hardware start management
177 */
178
179static void snd_ymfpci_hw_start(struct snd_ymfpci *chip)
180{
181 unsigned long flags;
182
183 spin_lock_irqsave(&chip->reg_lock, flags);
184 if (chip->start_count++ > 0)
185 goto __end;
186 snd_ymfpci_writel(chip, YDSXGR_MODE,
187 snd_ymfpci_readl(chip, YDSXGR_MODE) | 3);
188 chip->active_bank = snd_ymfpci_readl(chip, YDSXGR_CTRLSELECT) & 1;
189 __end:
190 spin_unlock_irqrestore(&chip->reg_lock, flags);
191}
192
193static void snd_ymfpci_hw_stop(struct snd_ymfpci *chip)
194{
195 unsigned long flags;
196 long timeout = 1000;
197
198 spin_lock_irqsave(&chip->reg_lock, flags);
199 if (--chip->start_count > 0)
200 goto __end;
201 snd_ymfpci_writel(chip, YDSXGR_MODE,
202 snd_ymfpci_readl(chip, YDSXGR_MODE) & ~3);
203 while (timeout-- > 0) {
204 if ((snd_ymfpci_readl(chip, YDSXGR_STATUS) & 2) == 0)
205 break;
206 }
207 if (atomic_read(&chip->interrupt_sleep_count)) {
208 atomic_set(&chip->interrupt_sleep_count, 0);
209 wake_up(&chip->interrupt_sleep);
210 }
211 __end:
212 spin_unlock_irqrestore(&chip->reg_lock, flags);
213}
214
215/*
216 * Playback voice management
217 */
218
219static int voice_alloc(struct snd_ymfpci *chip,
220 enum snd_ymfpci_voice_type type, int pair,
221 struct snd_ymfpci_voice **rvoice)
222{
223 struct snd_ymfpci_voice *voice, *voice2;
224 int idx;
225
226 *rvoice = NULL;
227 for (idx = 0; idx < YDSXG_PLAYBACK_VOICES; idx += pair ? 2 : 1) {
228 voice = &chip->voices[idx];
229 voice2 = pair ? &chip->voices[idx+1] : NULL;
230 if (voice->use || (voice2 && voice2->use))
231 continue;
232 voice->use = 1;
233 if (voice2)
234 voice2->use = 1;
235 switch (type) {
236 case YMFPCI_PCM:
237 voice->pcm = 1;
238 if (voice2)
239 voice2->pcm = 1;
240 break;
241 case YMFPCI_SYNTH:
242 voice->synth = 1;
243 break;
244 case YMFPCI_MIDI:
245 voice->midi = 1;
246 break;
247 }
248 snd_ymfpci_hw_start(chip);
249 if (voice2)
250 snd_ymfpci_hw_start(chip);
251 *rvoice = voice;
252 return 0;
253 }
254 return -ENOMEM;
255}
256
257static int snd_ymfpci_voice_alloc(struct snd_ymfpci *chip,
258 enum snd_ymfpci_voice_type type, int pair,
259 struct snd_ymfpci_voice **rvoice)
260{
261 unsigned long flags;
262 int result;
263
264 if (snd_BUG_ON(!rvoice))
265 return -EINVAL;
266 if (snd_BUG_ON(pair && type != YMFPCI_PCM))
267 return -EINVAL;
268
269 spin_lock_irqsave(&chip->voice_lock, flags);
270 for (;;) {
271 result = voice_alloc(chip, type, pair, rvoice);
272 if (result == 0 || type != YMFPCI_PCM)
273 break;
274 /* TODO: synth/midi voice deallocation */
275 break;
276 }
277 spin_unlock_irqrestore(&chip->voice_lock, flags);
278 return result;
279}
280
281static int snd_ymfpci_voice_free(struct snd_ymfpci *chip, struct snd_ymfpci_voice *pvoice)
282{
283 unsigned long flags;
284
285 if (snd_BUG_ON(!pvoice))
286 return -EINVAL;
287 snd_ymfpci_hw_stop(chip);
288 spin_lock_irqsave(&chip->voice_lock, flags);
289 if (pvoice->number == chip->src441_used) {
290 chip->src441_used = -1;
291 pvoice->ypcm->use_441_slot = 0;
292 }
293 pvoice->use = pvoice->pcm = pvoice->synth = pvoice->midi = 0;
294 pvoice->ypcm = NULL;
295 pvoice->interrupt = NULL;
296 spin_unlock_irqrestore(&chip->voice_lock, flags);
297 return 0;
298}
299
300/*
301 * PCM part
302 */
303
304static void snd_ymfpci_pcm_interrupt(struct snd_ymfpci *chip, struct snd_ymfpci_voice *voice)
305{
306 struct snd_ymfpci_pcm *ypcm;
307 u32 pos, delta;
308
309 if ((ypcm = voice->ypcm) == NULL)
310 return;
311 if (ypcm->substream == NULL)
312 return;
313 spin_lock(&chip->reg_lock);
314 if (ypcm->running) {
315 pos = le32_to_cpu(voice->bank[chip->active_bank].start);
316 if (pos < ypcm->last_pos)
317 delta = pos + (ypcm->buffer_size - ypcm->last_pos);
318 else
319 delta = pos - ypcm->last_pos;
320 ypcm->period_pos += delta;
321 ypcm->last_pos = pos;
322 if (ypcm->period_pos >= ypcm->period_size) {
323 /*
324 dev_dbg(chip->card->dev,
325 "done - active_bank = 0x%x, start = 0x%x\n",
326 chip->active_bank,
327 voice->bank[chip->active_bank].start);
328 */
329 ypcm->period_pos %= ypcm->period_size;
330 spin_unlock(&chip->reg_lock);
331 snd_pcm_period_elapsed(ypcm->substream);
332 spin_lock(&chip->reg_lock);
333 }
334
335 if (unlikely(ypcm->update_pcm_vol)) {
336 unsigned int subs = ypcm->substream->number;
337 unsigned int next_bank = 1 - chip->active_bank;
338 struct snd_ymfpci_playback_bank *bank;
339 u32 volume;
340
341 bank = &voice->bank[next_bank];
342 volume = cpu_to_le32(chip->pcm_mixer[subs].left << 15);
343 bank->left_gain_end = volume;
344 if (ypcm->output_rear)
345 bank->eff2_gain_end = volume;
346 if (ypcm->voices[1])
347 bank = &ypcm->voices[1]->bank[next_bank];
348 volume = cpu_to_le32(chip->pcm_mixer[subs].right << 15);
349 bank->right_gain_end = volume;
350 if (ypcm->output_rear)
351 bank->eff3_gain_end = volume;
352 ypcm->update_pcm_vol--;
353 }
354 }
355 spin_unlock(&chip->reg_lock);
356}
357
358static void snd_ymfpci_pcm_capture_interrupt(struct snd_pcm_substream *substream)
359{
360 struct snd_pcm_runtime *runtime = substream->runtime;
361 struct snd_ymfpci_pcm *ypcm = runtime->private_data;
362 struct snd_ymfpci *chip = ypcm->chip;
363 u32 pos, delta;
364
365 spin_lock(&chip->reg_lock);
366 if (ypcm->running) {
367 pos = le32_to_cpu(chip->bank_capture[ypcm->capture_bank_number][chip->active_bank]->start) >> ypcm->shift;
368 if (pos < ypcm->last_pos)
369 delta = pos + (ypcm->buffer_size - ypcm->last_pos);
370 else
371 delta = pos - ypcm->last_pos;
372 ypcm->period_pos += delta;
373 ypcm->last_pos = pos;
374 if (ypcm->period_pos >= ypcm->period_size) {
375 ypcm->period_pos %= ypcm->period_size;
376 /*
377 dev_dbg(chip->card->dev,
378 "done - active_bank = 0x%x, start = 0x%x\n",
379 chip->active_bank,
380 voice->bank[chip->active_bank].start);
381 */
382 spin_unlock(&chip->reg_lock);
383 snd_pcm_period_elapsed(substream);
384 spin_lock(&chip->reg_lock);
385 }
386 }
387 spin_unlock(&chip->reg_lock);
388}
389
390static int snd_ymfpci_playback_trigger(struct snd_pcm_substream *substream,
391 int cmd)
392{
393 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
394 struct snd_ymfpci_pcm *ypcm = substream->runtime->private_data;
395 struct snd_kcontrol *kctl = NULL;
396 int result = 0;
397
398 spin_lock(&chip->reg_lock);
399 if (ypcm->voices[0] == NULL) {
400 result = -EINVAL;
401 goto __unlock;
402 }
403 switch (cmd) {
404 case SNDRV_PCM_TRIGGER_START:
405 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
406 case SNDRV_PCM_TRIGGER_RESUME:
407 chip->ctrl_playback[ypcm->voices[0]->number + 1] = cpu_to_le32(ypcm->voices[0]->bank_addr);
408 if (ypcm->voices[1] != NULL && !ypcm->use_441_slot)
409 chip->ctrl_playback[ypcm->voices[1]->number + 1] = cpu_to_le32(ypcm->voices[1]->bank_addr);
410 ypcm->running = 1;
411 break;
412 case SNDRV_PCM_TRIGGER_STOP:
413 if (substream->pcm == chip->pcm && !ypcm->use_441_slot) {
414 kctl = chip->pcm_mixer[substream->number].ctl;
415 kctl->vd[0].access |= SNDRV_CTL_ELEM_ACCESS_INACTIVE;
416 }
417 /* fall through */
418 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
419 case SNDRV_PCM_TRIGGER_SUSPEND:
420 chip->ctrl_playback[ypcm->voices[0]->number + 1] = 0;
421 if (ypcm->voices[1] != NULL && !ypcm->use_441_slot)
422 chip->ctrl_playback[ypcm->voices[1]->number + 1] = 0;
423 ypcm->running = 0;
424 break;
425 default:
426 result = -EINVAL;
427 break;
428 }
429 __unlock:
430 spin_unlock(&chip->reg_lock);
431 if (kctl)
432 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_INFO, &kctl->id);
433 return result;
434}
435static int snd_ymfpci_capture_trigger(struct snd_pcm_substream *substream,
436 int cmd)
437{
438 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
439 struct snd_ymfpci_pcm *ypcm = substream->runtime->private_data;
440 int result = 0;
441 u32 tmp;
442
443 spin_lock(&chip->reg_lock);
444 switch (cmd) {
445 case SNDRV_PCM_TRIGGER_START:
446 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
447 case SNDRV_PCM_TRIGGER_RESUME:
448 tmp = snd_ymfpci_readl(chip, YDSXGR_MAPOFREC) | (1 << ypcm->capture_bank_number);
449 snd_ymfpci_writel(chip, YDSXGR_MAPOFREC, tmp);
450 ypcm->running = 1;
451 break;
452 case SNDRV_PCM_TRIGGER_STOP:
453 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
454 case SNDRV_PCM_TRIGGER_SUSPEND:
455 tmp = snd_ymfpci_readl(chip, YDSXGR_MAPOFREC) & ~(1 << ypcm->capture_bank_number);
456 snd_ymfpci_writel(chip, YDSXGR_MAPOFREC, tmp);
457 ypcm->running = 0;
458 break;
459 default:
460 result = -EINVAL;
461 break;
462 }
463 spin_unlock(&chip->reg_lock);
464 return result;
465}
466
467static int snd_ymfpci_pcm_voice_alloc(struct snd_ymfpci_pcm *ypcm, int voices)
468{
469 int err;
470
471 if (ypcm->voices[1] != NULL && voices < 2) {
472 snd_ymfpci_voice_free(ypcm->chip, ypcm->voices[1]);
473 ypcm->voices[1] = NULL;
474 }
475 if (voices == 1 && ypcm->voices[0] != NULL)
476 return 0; /* already allocated */
477 if (voices == 2 && ypcm->voices[0] != NULL && ypcm->voices[1] != NULL)
478 return 0; /* already allocated */
479 if (voices > 1) {
480 if (ypcm->voices[0] != NULL && ypcm->voices[1] == NULL) {
481 snd_ymfpci_voice_free(ypcm->chip, ypcm->voices[0]);
482 ypcm->voices[0] = NULL;
483 }
484 }
485 err = snd_ymfpci_voice_alloc(ypcm->chip, YMFPCI_PCM, voices > 1, &ypcm->voices[0]);
486 if (err < 0)
487 return err;
488 ypcm->voices[0]->ypcm = ypcm;
489 ypcm->voices[0]->interrupt = snd_ymfpci_pcm_interrupt;
490 if (voices > 1) {
491 ypcm->voices[1] = &ypcm->chip->voices[ypcm->voices[0]->number + 1];
492 ypcm->voices[1]->ypcm = ypcm;
493 }
494 return 0;
495}
496
497static void snd_ymfpci_pcm_init_voice(struct snd_ymfpci_pcm *ypcm, unsigned int voiceidx,
498 struct snd_pcm_runtime *runtime,
499 int has_pcm_volume)
500{
501 struct snd_ymfpci_voice *voice = ypcm->voices[voiceidx];
502 u32 format;
503 u32 delta = snd_ymfpci_calc_delta(runtime->rate);
504 u32 lpfQ = snd_ymfpci_calc_lpfQ(runtime->rate);
505 u32 lpfK = snd_ymfpci_calc_lpfK(runtime->rate);
506 struct snd_ymfpci_playback_bank *bank;
507 unsigned int nbank;
508 u32 vol_left, vol_right;
509 u8 use_left, use_right;
510 unsigned long flags;
511
512 if (snd_BUG_ON(!voice))
513 return;
514 if (runtime->channels == 1) {
515 use_left = 1;
516 use_right = 1;
517 } else {
518 use_left = (voiceidx & 1) == 0;
519 use_right = !use_left;
520 }
521 if (has_pcm_volume) {
522 vol_left = cpu_to_le32(ypcm->chip->pcm_mixer
523 [ypcm->substream->number].left << 15);
524 vol_right = cpu_to_le32(ypcm->chip->pcm_mixer
525 [ypcm->substream->number].right << 15);
526 } else {
527 vol_left = cpu_to_le32(0x40000000);
528 vol_right = cpu_to_le32(0x40000000);
529 }
530 spin_lock_irqsave(&ypcm->chip->voice_lock, flags);
531 format = runtime->channels == 2 ? 0x00010000 : 0;
532 if (snd_pcm_format_width(runtime->format) == 8)
533 format |= 0x80000000;
534 else if (ypcm->chip->device_id == PCI_DEVICE_ID_YAMAHA_754 &&
535 runtime->rate == 44100 && runtime->channels == 2 &&
536 voiceidx == 0 && (ypcm->chip->src441_used == -1 ||
537 ypcm->chip->src441_used == voice->number)) {
538 ypcm->chip->src441_used = voice->number;
539 ypcm->use_441_slot = 1;
540 format |= 0x10000000;
541 }
542 if (ypcm->chip->src441_used == voice->number &&
543 (format & 0x10000000) == 0) {
544 ypcm->chip->src441_used = -1;
545 ypcm->use_441_slot = 0;
546 }
547 if (runtime->channels == 2 && (voiceidx & 1) != 0)
548 format |= 1;
549 spin_unlock_irqrestore(&ypcm->chip->voice_lock, flags);
550 for (nbank = 0; nbank < 2; nbank++) {
551 bank = &voice->bank[nbank];
552 memset(bank, 0, sizeof(*bank));
553 bank->format = cpu_to_le32(format);
554 bank->base = cpu_to_le32(runtime->dma_addr);
555 bank->loop_end = cpu_to_le32(ypcm->buffer_size);
556 bank->lpfQ = cpu_to_le32(lpfQ);
557 bank->delta =
558 bank->delta_end = cpu_to_le32(delta);
559 bank->lpfK =
560 bank->lpfK_end = cpu_to_le32(lpfK);
561 bank->eg_gain =
562 bank->eg_gain_end = cpu_to_le32(0x40000000);
563
564 if (ypcm->output_front) {
565 if (use_left) {
566 bank->left_gain =
567 bank->left_gain_end = vol_left;
568 }
569 if (use_right) {
570 bank->right_gain =
571 bank->right_gain_end = vol_right;
572 }
573 }
574 if (ypcm->output_rear) {
575 if (!ypcm->swap_rear) {
576 if (use_left) {
577 bank->eff2_gain =
578 bank->eff2_gain_end = vol_left;
579 }
580 if (use_right) {
581 bank->eff3_gain =
582 bank->eff3_gain_end = vol_right;
583 }
584 } else {
585 /* The SPDIF out channels seem to be swapped, so we have
586 * to swap them here, too. The rear analog out channels
587 * will be wrong, but otherwise AC3 would not work.
588 */
589 if (use_left) {
590 bank->eff3_gain =
591 bank->eff3_gain_end = vol_left;
592 }
593 if (use_right) {
594 bank->eff2_gain =
595 bank->eff2_gain_end = vol_right;
596 }
597 }
598 }
599 }
600}
601
602static int snd_ymfpci_ac3_init(struct snd_ymfpci *chip)
603{
604 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(chip->pci),
605 4096, &chip->ac3_tmp_base) < 0)
606 return -ENOMEM;
607
608 chip->bank_effect[3][0]->base =
609 chip->bank_effect[3][1]->base = cpu_to_le32(chip->ac3_tmp_base.addr);
610 chip->bank_effect[3][0]->loop_end =
611 chip->bank_effect[3][1]->loop_end = cpu_to_le32(1024);
612 chip->bank_effect[4][0]->base =
613 chip->bank_effect[4][1]->base = cpu_to_le32(chip->ac3_tmp_base.addr + 2048);
614 chip->bank_effect[4][0]->loop_end =
615 chip->bank_effect[4][1]->loop_end = cpu_to_le32(1024);
616
617 spin_lock_irq(&chip->reg_lock);
618 snd_ymfpci_writel(chip, YDSXGR_MAPOFEFFECT,
619 snd_ymfpci_readl(chip, YDSXGR_MAPOFEFFECT) | 3 << 3);
620 spin_unlock_irq(&chip->reg_lock);
621 return 0;
622}
623
624static int snd_ymfpci_ac3_done(struct snd_ymfpci *chip)
625{
626 spin_lock_irq(&chip->reg_lock);
627 snd_ymfpci_writel(chip, YDSXGR_MAPOFEFFECT,
628 snd_ymfpci_readl(chip, YDSXGR_MAPOFEFFECT) & ~(3 << 3));
629 spin_unlock_irq(&chip->reg_lock);
630 // snd_ymfpci_irq_wait(chip);
631 if (chip->ac3_tmp_base.area) {
632 snd_dma_free_pages(&chip->ac3_tmp_base);
633 chip->ac3_tmp_base.area = NULL;
634 }
635 return 0;
636}
637
638static int snd_ymfpci_playback_hw_params(struct snd_pcm_substream *substream,
639 struct snd_pcm_hw_params *hw_params)
640{
641 struct snd_pcm_runtime *runtime = substream->runtime;
642 struct snd_ymfpci_pcm *ypcm = runtime->private_data;
643 int err;
644
645 if ((err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params))) < 0)
646 return err;
647 if ((err = snd_ymfpci_pcm_voice_alloc(ypcm, params_channels(hw_params))) < 0)
648 return err;
649 return 0;
650}
651
652static int snd_ymfpci_playback_hw_free(struct snd_pcm_substream *substream)
653{
654 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
655 struct snd_pcm_runtime *runtime = substream->runtime;
656 struct snd_ymfpci_pcm *ypcm;
657
658 if (runtime->private_data == NULL)
659 return 0;
660 ypcm = runtime->private_data;
661
662 /* wait, until the PCI operations are not finished */
663 snd_ymfpci_irq_wait(chip);
664 snd_pcm_lib_free_pages(substream);
665 if (ypcm->voices[1]) {
666 snd_ymfpci_voice_free(chip, ypcm->voices[1]);
667 ypcm->voices[1] = NULL;
668 }
669 if (ypcm->voices[0]) {
670 snd_ymfpci_voice_free(chip, ypcm->voices[0]);
671 ypcm->voices[0] = NULL;
672 }
673 return 0;
674}
675
676static int snd_ymfpci_playback_prepare(struct snd_pcm_substream *substream)
677{
678 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
679 struct snd_pcm_runtime *runtime = substream->runtime;
680 struct snd_ymfpci_pcm *ypcm = runtime->private_data;
681 struct snd_kcontrol *kctl;
682 unsigned int nvoice;
683
684 ypcm->period_size = runtime->period_size;
685 ypcm->buffer_size = runtime->buffer_size;
686 ypcm->period_pos = 0;
687 ypcm->last_pos = 0;
688 for (nvoice = 0; nvoice < runtime->channels; nvoice++)
689 snd_ymfpci_pcm_init_voice(ypcm, nvoice, runtime,
690 substream->pcm == chip->pcm);
691
692 if (substream->pcm == chip->pcm && !ypcm->use_441_slot) {
693 kctl = chip->pcm_mixer[substream->number].ctl;
694 kctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE;
695 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_INFO, &kctl->id);
696 }
697 return 0;
698}
699
700static int snd_ymfpci_capture_hw_params(struct snd_pcm_substream *substream,
701 struct snd_pcm_hw_params *hw_params)
702{
703 return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
704}
705
706static int snd_ymfpci_capture_hw_free(struct snd_pcm_substream *substream)
707{
708 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
709
710 /* wait, until the PCI operations are not finished */
711 snd_ymfpci_irq_wait(chip);
712 return snd_pcm_lib_free_pages(substream);
713}
714
715static int snd_ymfpci_capture_prepare(struct snd_pcm_substream *substream)
716{
717 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
718 struct snd_pcm_runtime *runtime = substream->runtime;
719 struct snd_ymfpci_pcm *ypcm = runtime->private_data;
720 struct snd_ymfpci_capture_bank * bank;
721 int nbank;
722 u32 rate, format;
723
724 ypcm->period_size = runtime->period_size;
725 ypcm->buffer_size = runtime->buffer_size;
726 ypcm->period_pos = 0;
727 ypcm->last_pos = 0;
728 ypcm->shift = 0;
729 rate = ((48000 * 4096) / runtime->rate) - 1;
730 format = 0;
731 if (runtime->channels == 2) {
732 format |= 2;
733 ypcm->shift++;
734 }
735 if (snd_pcm_format_width(runtime->format) == 8)
736 format |= 1;
737 else
738 ypcm->shift++;
739 switch (ypcm->capture_bank_number) {
740 case 0:
741 snd_ymfpci_writel(chip, YDSXGR_RECFORMAT, format);
742 snd_ymfpci_writel(chip, YDSXGR_RECSLOTSR, rate);
743 break;
744 case 1:
745 snd_ymfpci_writel(chip, YDSXGR_ADCFORMAT, format);
746 snd_ymfpci_writel(chip, YDSXGR_ADCSLOTSR, rate);
747 break;
748 }
749 for (nbank = 0; nbank < 2; nbank++) {
750 bank = chip->bank_capture[ypcm->capture_bank_number][nbank];
751 bank->base = cpu_to_le32(runtime->dma_addr);
752 bank->loop_end = cpu_to_le32(ypcm->buffer_size << ypcm->shift);
753 bank->start = 0;
754 bank->num_of_loops = 0;
755 }
756 return 0;
757}
758
759static snd_pcm_uframes_t snd_ymfpci_playback_pointer(struct snd_pcm_substream *substream)
760{
761 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
762 struct snd_pcm_runtime *runtime = substream->runtime;
763 struct snd_ymfpci_pcm *ypcm = runtime->private_data;
764 struct snd_ymfpci_voice *voice = ypcm->voices[0];
765
766 if (!(ypcm->running && voice))
767 return 0;
768 return le32_to_cpu(voice->bank[chip->active_bank].start);
769}
770
771static snd_pcm_uframes_t snd_ymfpci_capture_pointer(struct snd_pcm_substream *substream)
772{
773 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
774 struct snd_pcm_runtime *runtime = substream->runtime;
775 struct snd_ymfpci_pcm *ypcm = runtime->private_data;
776
777 if (!ypcm->running)
778 return 0;
779 return le32_to_cpu(chip->bank_capture[ypcm->capture_bank_number][chip->active_bank]->start) >> ypcm->shift;
780}
781
782static void snd_ymfpci_irq_wait(struct snd_ymfpci *chip)
783{
784 wait_queue_t wait;
785 int loops = 4;
786
787 while (loops-- > 0) {
788 if ((snd_ymfpci_readl(chip, YDSXGR_MODE) & 3) == 0)
789 continue;
790 init_waitqueue_entry(&wait, current);
791 add_wait_queue(&chip->interrupt_sleep, &wait);
792 atomic_inc(&chip->interrupt_sleep_count);
793 schedule_timeout_uninterruptible(msecs_to_jiffies(50));
794 remove_wait_queue(&chip->interrupt_sleep, &wait);
795 }
796}
797
798static irqreturn_t snd_ymfpci_interrupt(int irq, void *dev_id)
799{
800 struct snd_ymfpci *chip = dev_id;
801 u32 status, nvoice, mode;
802 struct snd_ymfpci_voice *voice;
803
804 status = snd_ymfpci_readl(chip, YDSXGR_STATUS);
805 if (status & 0x80000000) {
806 chip->active_bank = snd_ymfpci_readl(chip, YDSXGR_CTRLSELECT) & 1;
807 spin_lock(&chip->voice_lock);
808 for (nvoice = 0; nvoice < YDSXG_PLAYBACK_VOICES; nvoice++) {
809 voice = &chip->voices[nvoice];
810 if (voice->interrupt)
811 voice->interrupt(chip, voice);
812 }
813 for (nvoice = 0; nvoice < YDSXG_CAPTURE_VOICES; nvoice++) {
814 if (chip->capture_substream[nvoice])
815 snd_ymfpci_pcm_capture_interrupt(chip->capture_substream[nvoice]);
816 }
817#if 0
818 for (nvoice = 0; nvoice < YDSXG_EFFECT_VOICES; nvoice++) {
819 if (chip->effect_substream[nvoice])
820 snd_ymfpci_pcm_effect_interrupt(chip->effect_substream[nvoice]);
821 }
822#endif
823 spin_unlock(&chip->voice_lock);
824 spin_lock(&chip->reg_lock);
825 snd_ymfpci_writel(chip, YDSXGR_STATUS, 0x80000000);
826 mode = snd_ymfpci_readl(chip, YDSXGR_MODE) | 2;
827 snd_ymfpci_writel(chip, YDSXGR_MODE, mode);
828 spin_unlock(&chip->reg_lock);
829
830 if (atomic_read(&chip->interrupt_sleep_count)) {
831 atomic_set(&chip->interrupt_sleep_count, 0);
832 wake_up(&chip->interrupt_sleep);
833 }
834 }
835
836 status = snd_ymfpci_readw(chip, YDSXGR_INTFLAG);
837 if (status & 1) {
838 if (chip->timer)
839 snd_timer_interrupt(chip->timer, chip->timer_ticks);
840 }
841 snd_ymfpci_writew(chip, YDSXGR_INTFLAG, status);
842
843 if (chip->rawmidi)
844 snd_mpu401_uart_interrupt(irq, chip->rawmidi->private_data);
845 return IRQ_HANDLED;
846}
847
848static struct snd_pcm_hardware snd_ymfpci_playback =
849{
850 .info = (SNDRV_PCM_INFO_MMAP |
851 SNDRV_PCM_INFO_MMAP_VALID |
852 SNDRV_PCM_INFO_INTERLEAVED |
853 SNDRV_PCM_INFO_BLOCK_TRANSFER |
854 SNDRV_PCM_INFO_PAUSE |
855 SNDRV_PCM_INFO_RESUME),
856 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
857 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
858 .rate_min = 8000,
859 .rate_max = 48000,
860 .channels_min = 1,
861 .channels_max = 2,
862 .buffer_bytes_max = 256 * 1024, /* FIXME: enough? */
863 .period_bytes_min = 64,
864 .period_bytes_max = 256 * 1024, /* FIXME: enough? */
865 .periods_min = 3,
866 .periods_max = 1024,
867 .fifo_size = 0,
868};
869
870static struct snd_pcm_hardware snd_ymfpci_capture =
871{
872 .info = (SNDRV_PCM_INFO_MMAP |
873 SNDRV_PCM_INFO_MMAP_VALID |
874 SNDRV_PCM_INFO_INTERLEAVED |
875 SNDRV_PCM_INFO_BLOCK_TRANSFER |
876 SNDRV_PCM_INFO_PAUSE |
877 SNDRV_PCM_INFO_RESUME),
878 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
879 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
880 .rate_min = 8000,
881 .rate_max = 48000,
882 .channels_min = 1,
883 .channels_max = 2,
884 .buffer_bytes_max = 256 * 1024, /* FIXME: enough? */
885 .period_bytes_min = 64,
886 .period_bytes_max = 256 * 1024, /* FIXME: enough? */
887 .periods_min = 3,
888 .periods_max = 1024,
889 .fifo_size = 0,
890};
891
892static void snd_ymfpci_pcm_free_substream(struct snd_pcm_runtime *runtime)
893{
894 kfree(runtime->private_data);
895}
896
897static int snd_ymfpci_playback_open_1(struct snd_pcm_substream *substream)
898{
899 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
900 struct snd_pcm_runtime *runtime = substream->runtime;
901 struct snd_ymfpci_pcm *ypcm;
902 int err;
903
904 runtime->hw = snd_ymfpci_playback;
905 /* FIXME? True value is 256/48 = 5.33333 ms */
906 err = snd_pcm_hw_constraint_minmax(runtime,
907 SNDRV_PCM_HW_PARAM_PERIOD_TIME,
908 5334, UINT_MAX);
909 if (err < 0)
910 return err;
911 err = snd_pcm_hw_rule_noresample(runtime, 48000);
912 if (err < 0)
913 return err;
914
915 ypcm = kzalloc(sizeof(*ypcm), GFP_KERNEL);
916 if (ypcm == NULL)
917 return -ENOMEM;
918 ypcm->chip = chip;
919 ypcm->type = PLAYBACK_VOICE;
920 ypcm->substream = substream;
921 runtime->private_data = ypcm;
922 runtime->private_free = snd_ymfpci_pcm_free_substream;
923 return 0;
924}
925
926/* call with spinlock held */
927static void ymfpci_open_extension(struct snd_ymfpci *chip)
928{
929 if (! chip->rear_opened) {
930 if (! chip->spdif_opened) /* set AC3 */
931 snd_ymfpci_writel(chip, YDSXGR_MODE,
932 snd_ymfpci_readl(chip, YDSXGR_MODE) | (1 << 30));
933 /* enable second codec (4CHEN) */
934 snd_ymfpci_writew(chip, YDSXGR_SECCONFIG,
935 (snd_ymfpci_readw(chip, YDSXGR_SECCONFIG) & ~0x0330) | 0x0010);
936 }
937}
938
939/* call with spinlock held */
940static void ymfpci_close_extension(struct snd_ymfpci *chip)
941{
942 if (! chip->rear_opened) {
943 if (! chip->spdif_opened)
944 snd_ymfpci_writel(chip, YDSXGR_MODE,
945 snd_ymfpci_readl(chip, YDSXGR_MODE) & ~(1 << 30));
946 snd_ymfpci_writew(chip, YDSXGR_SECCONFIG,
947 (snd_ymfpci_readw(chip, YDSXGR_SECCONFIG) & ~0x0330) & ~0x0010);
948 }
949}
950
951static int snd_ymfpci_playback_open(struct snd_pcm_substream *substream)
952{
953 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
954 struct snd_pcm_runtime *runtime = substream->runtime;
955 struct snd_ymfpci_pcm *ypcm;
956 int err;
957
958 if ((err = snd_ymfpci_playback_open_1(substream)) < 0)
959 return err;
960 ypcm = runtime->private_data;
961 ypcm->output_front = 1;
962 ypcm->output_rear = chip->mode_dup4ch ? 1 : 0;
963 ypcm->swap_rear = 0;
964 spin_lock_irq(&chip->reg_lock);
965 if (ypcm->output_rear) {
966 ymfpci_open_extension(chip);
967 chip->rear_opened++;
968 }
969 spin_unlock_irq(&chip->reg_lock);
970 return 0;
971}
972
973static int snd_ymfpci_playback_spdif_open(struct snd_pcm_substream *substream)
974{
975 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
976 struct snd_pcm_runtime *runtime = substream->runtime;
977 struct snd_ymfpci_pcm *ypcm;
978 int err;
979
980 if ((err = snd_ymfpci_playback_open_1(substream)) < 0)
981 return err;
982 ypcm = runtime->private_data;
983 ypcm->output_front = 0;
984 ypcm->output_rear = 1;
985 ypcm->swap_rear = 1;
986 spin_lock_irq(&chip->reg_lock);
987 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTCTRL,
988 snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) | 2);
989 ymfpci_open_extension(chip);
990 chip->spdif_pcm_bits = chip->spdif_bits;
991 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_pcm_bits);
992 chip->spdif_opened++;
993 spin_unlock_irq(&chip->reg_lock);
994
995 chip->spdif_pcm_ctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE;
996 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE |
997 SNDRV_CTL_EVENT_MASK_INFO, &chip->spdif_pcm_ctl->id);
998 return 0;
999}
1000
1001static int snd_ymfpci_playback_4ch_open(struct snd_pcm_substream *substream)
1002{
1003 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
1004 struct snd_pcm_runtime *runtime = substream->runtime;
1005 struct snd_ymfpci_pcm *ypcm;
1006 int err;
1007
1008 if ((err = snd_ymfpci_playback_open_1(substream)) < 0)
1009 return err;
1010 ypcm = runtime->private_data;
1011 ypcm->output_front = 0;
1012 ypcm->output_rear = 1;
1013 ypcm->swap_rear = 0;
1014 spin_lock_irq(&chip->reg_lock);
1015 ymfpci_open_extension(chip);
1016 chip->rear_opened++;
1017 spin_unlock_irq(&chip->reg_lock);
1018 return 0;
1019}
1020
1021static int snd_ymfpci_capture_open(struct snd_pcm_substream *substream,
1022 u32 capture_bank_number)
1023{
1024 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
1025 struct snd_pcm_runtime *runtime = substream->runtime;
1026 struct snd_ymfpci_pcm *ypcm;
1027 int err;
1028
1029 runtime->hw = snd_ymfpci_capture;
1030 /* FIXME? True value is 256/48 = 5.33333 ms */
1031 err = snd_pcm_hw_constraint_minmax(runtime,
1032 SNDRV_PCM_HW_PARAM_PERIOD_TIME,
1033 5334, UINT_MAX);
1034 if (err < 0)
1035 return err;
1036 err = snd_pcm_hw_rule_noresample(runtime, 48000);
1037 if (err < 0)
1038 return err;
1039
1040 ypcm = kzalloc(sizeof(*ypcm), GFP_KERNEL);
1041 if (ypcm == NULL)
1042 return -ENOMEM;
1043 ypcm->chip = chip;
1044 ypcm->type = capture_bank_number + CAPTURE_REC;
1045 ypcm->substream = substream;
1046 ypcm->capture_bank_number = capture_bank_number;
1047 chip->capture_substream[capture_bank_number] = substream;
1048 runtime->private_data = ypcm;
1049 runtime->private_free = snd_ymfpci_pcm_free_substream;
1050 snd_ymfpci_hw_start(chip);
1051 return 0;
1052}
1053
1054static int snd_ymfpci_capture_rec_open(struct snd_pcm_substream *substream)
1055{
1056 return snd_ymfpci_capture_open(substream, 0);
1057}
1058
1059static int snd_ymfpci_capture_ac97_open(struct snd_pcm_substream *substream)
1060{
1061 return snd_ymfpci_capture_open(substream, 1);
1062}
1063
1064static int snd_ymfpci_playback_close_1(struct snd_pcm_substream *substream)
1065{
1066 return 0;
1067}
1068
1069static int snd_ymfpci_playback_close(struct snd_pcm_substream *substream)
1070{
1071 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
1072 struct snd_ymfpci_pcm *ypcm = substream->runtime->private_data;
1073
1074 spin_lock_irq(&chip->reg_lock);
1075 if (ypcm->output_rear && chip->rear_opened > 0) {
1076 chip->rear_opened--;
1077 ymfpci_close_extension(chip);
1078 }
1079 spin_unlock_irq(&chip->reg_lock);
1080 return snd_ymfpci_playback_close_1(substream);
1081}
1082
1083static int snd_ymfpci_playback_spdif_close(struct snd_pcm_substream *substream)
1084{
1085 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
1086
1087 spin_lock_irq(&chip->reg_lock);
1088 chip->spdif_opened = 0;
1089 ymfpci_close_extension(chip);
1090 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTCTRL,
1091 snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) & ~2);
1092 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_bits);
1093 spin_unlock_irq(&chip->reg_lock);
1094 chip->spdif_pcm_ctl->vd[0].access |= SNDRV_CTL_ELEM_ACCESS_INACTIVE;
1095 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE |
1096 SNDRV_CTL_EVENT_MASK_INFO, &chip->spdif_pcm_ctl->id);
1097 return snd_ymfpci_playback_close_1(substream);
1098}
1099
1100static int snd_ymfpci_playback_4ch_close(struct snd_pcm_substream *substream)
1101{
1102 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
1103
1104 spin_lock_irq(&chip->reg_lock);
1105 if (chip->rear_opened > 0) {
1106 chip->rear_opened--;
1107 ymfpci_close_extension(chip);
1108 }
1109 spin_unlock_irq(&chip->reg_lock);
1110 return snd_ymfpci_playback_close_1(substream);
1111}
1112
1113static int snd_ymfpci_capture_close(struct snd_pcm_substream *substream)
1114{
1115 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
1116 struct snd_pcm_runtime *runtime = substream->runtime;
1117 struct snd_ymfpci_pcm *ypcm = runtime->private_data;
1118
1119 if (ypcm != NULL) {
1120 chip->capture_substream[ypcm->capture_bank_number] = NULL;
1121 snd_ymfpci_hw_stop(chip);
1122 }
1123 return 0;
1124}
1125
1126static struct snd_pcm_ops snd_ymfpci_playback_ops = {
1127 .open = snd_ymfpci_playback_open,
1128 .close = snd_ymfpci_playback_close,
1129 .ioctl = snd_pcm_lib_ioctl,
1130 .hw_params = snd_ymfpci_playback_hw_params,
1131 .hw_free = snd_ymfpci_playback_hw_free,
1132 .prepare = snd_ymfpci_playback_prepare,
1133 .trigger = snd_ymfpci_playback_trigger,
1134 .pointer = snd_ymfpci_playback_pointer,
1135};
1136
1137static struct snd_pcm_ops snd_ymfpci_capture_rec_ops = {
1138 .open = snd_ymfpci_capture_rec_open,
1139 .close = snd_ymfpci_capture_close,
1140 .ioctl = snd_pcm_lib_ioctl,
1141 .hw_params = snd_ymfpci_capture_hw_params,
1142 .hw_free = snd_ymfpci_capture_hw_free,
1143 .prepare = snd_ymfpci_capture_prepare,
1144 .trigger = snd_ymfpci_capture_trigger,
1145 .pointer = snd_ymfpci_capture_pointer,
1146};
1147
1148int snd_ymfpci_pcm(struct snd_ymfpci *chip, int device, struct snd_pcm **rpcm)
1149{
1150 struct snd_pcm *pcm;
1151 int err;
1152
1153 if (rpcm)
1154 *rpcm = NULL;
1155 if ((err = snd_pcm_new(chip->card, "YMFPCI", device, 32, 1, &pcm)) < 0)
1156 return err;
1157 pcm->private_data = chip;
1158
1159 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ymfpci_playback_ops);
1160 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ymfpci_capture_rec_ops);
1161
1162 /* global setup */
1163 pcm->info_flags = 0;
1164 strcpy(pcm->name, "YMFPCI");
1165 chip->pcm = pcm;
1166
1167 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1168 snd_dma_pci_data(chip->pci), 64*1024, 256*1024);
1169
1170 err = snd_pcm_add_chmap_ctls(pcm, SNDRV_PCM_STREAM_PLAYBACK,
1171 snd_pcm_std_chmaps, 2, 0, NULL);
1172 if (err < 0)
1173 return err;
1174
1175 if (rpcm)
1176 *rpcm = pcm;
1177 return 0;
1178}
1179
1180static struct snd_pcm_ops snd_ymfpci_capture_ac97_ops = {
1181 .open = snd_ymfpci_capture_ac97_open,
1182 .close = snd_ymfpci_capture_close,
1183 .ioctl = snd_pcm_lib_ioctl,
1184 .hw_params = snd_ymfpci_capture_hw_params,
1185 .hw_free = snd_ymfpci_capture_hw_free,
1186 .prepare = snd_ymfpci_capture_prepare,
1187 .trigger = snd_ymfpci_capture_trigger,
1188 .pointer = snd_ymfpci_capture_pointer,
1189};
1190
1191int snd_ymfpci_pcm2(struct snd_ymfpci *chip, int device, struct snd_pcm **rpcm)
1192{
1193 struct snd_pcm *pcm;
1194 int err;
1195
1196 if (rpcm)
1197 *rpcm = NULL;
1198 if ((err = snd_pcm_new(chip->card, "YMFPCI - PCM2", device, 0, 1, &pcm)) < 0)
1199 return err;
1200 pcm->private_data = chip;
1201
1202 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ymfpci_capture_ac97_ops);
1203
1204 /* global setup */
1205 pcm->info_flags = 0;
1206 sprintf(pcm->name, "YMFPCI - %s",
1207 chip->device_id == PCI_DEVICE_ID_YAMAHA_754 ? "Direct Recording" : "AC'97");
1208 chip->pcm2 = pcm;
1209
1210 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1211 snd_dma_pci_data(chip->pci), 64*1024, 256*1024);
1212
1213 if (rpcm)
1214 *rpcm = pcm;
1215 return 0;
1216}
1217
1218static struct snd_pcm_ops snd_ymfpci_playback_spdif_ops = {
1219 .open = snd_ymfpci_playback_spdif_open,
1220 .close = snd_ymfpci_playback_spdif_close,
1221 .ioctl = snd_pcm_lib_ioctl,
1222 .hw_params = snd_ymfpci_playback_hw_params,
1223 .hw_free = snd_ymfpci_playback_hw_free,
1224 .prepare = snd_ymfpci_playback_prepare,
1225 .trigger = snd_ymfpci_playback_trigger,
1226 .pointer = snd_ymfpci_playback_pointer,
1227};
1228
1229int snd_ymfpci_pcm_spdif(struct snd_ymfpci *chip, int device,
1230 struct snd_pcm **rpcm)
1231{
1232 struct snd_pcm *pcm;
1233 int err;
1234
1235 if (rpcm)
1236 *rpcm = NULL;
1237 if ((err = snd_pcm_new(chip->card, "YMFPCI - IEC958", device, 1, 0, &pcm)) < 0)
1238 return err;
1239 pcm->private_data = chip;
1240
1241 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ymfpci_playback_spdif_ops);
1242
1243 /* global setup */
1244 pcm->info_flags = 0;
1245 strcpy(pcm->name, "YMFPCI - IEC958");
1246 chip->pcm_spdif = pcm;
1247
1248 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1249 snd_dma_pci_data(chip->pci), 64*1024, 256*1024);
1250
1251 if (rpcm)
1252 *rpcm = pcm;
1253 return 0;
1254}
1255
1256static struct snd_pcm_ops snd_ymfpci_playback_4ch_ops = {
1257 .open = snd_ymfpci_playback_4ch_open,
1258 .close = snd_ymfpci_playback_4ch_close,
1259 .ioctl = snd_pcm_lib_ioctl,
1260 .hw_params = snd_ymfpci_playback_hw_params,
1261 .hw_free = snd_ymfpci_playback_hw_free,
1262 .prepare = snd_ymfpci_playback_prepare,
1263 .trigger = snd_ymfpci_playback_trigger,
1264 .pointer = snd_ymfpci_playback_pointer,
1265};
1266
1267static const struct snd_pcm_chmap_elem surround_map[] = {
1268 { .channels = 1,
1269 .map = { SNDRV_CHMAP_MONO } },
1270 { .channels = 2,
1271 .map = { SNDRV_CHMAP_RL, SNDRV_CHMAP_RR } },
1272 { }
1273};
1274
1275int snd_ymfpci_pcm_4ch(struct snd_ymfpci *chip, int device,
1276 struct snd_pcm **rpcm)
1277{
1278 struct snd_pcm *pcm;
1279 int err;
1280
1281 if (rpcm)
1282 *rpcm = NULL;
1283 if ((err = snd_pcm_new(chip->card, "YMFPCI - Rear", device, 1, 0, &pcm)) < 0)
1284 return err;
1285 pcm->private_data = chip;
1286
1287 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ymfpci_playback_4ch_ops);
1288
1289 /* global setup */
1290 pcm->info_flags = 0;
1291 strcpy(pcm->name, "YMFPCI - Rear PCM");
1292 chip->pcm_4ch = pcm;
1293
1294 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1295 snd_dma_pci_data(chip->pci), 64*1024, 256*1024);
1296
1297 err = snd_pcm_add_chmap_ctls(pcm, SNDRV_PCM_STREAM_PLAYBACK,
1298 surround_map, 2, 0, NULL);
1299 if (err < 0)
1300 return err;
1301
1302 if (rpcm)
1303 *rpcm = pcm;
1304 return 0;
1305}
1306
1307static int snd_ymfpci_spdif_default_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1308{
1309 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1310 uinfo->count = 1;
1311 return 0;
1312}
1313
1314static int snd_ymfpci_spdif_default_get(struct snd_kcontrol *kcontrol,
1315 struct snd_ctl_elem_value *ucontrol)
1316{
1317 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1318
1319 spin_lock_irq(&chip->reg_lock);
1320 ucontrol->value.iec958.status[0] = (chip->spdif_bits >> 0) & 0xff;
1321 ucontrol->value.iec958.status[1] = (chip->spdif_bits >> 8) & 0xff;
1322 ucontrol->value.iec958.status[3] = IEC958_AES3_CON_FS_48000;
1323 spin_unlock_irq(&chip->reg_lock);
1324 return 0;
1325}
1326
1327static int snd_ymfpci_spdif_default_put(struct snd_kcontrol *kcontrol,
1328 struct snd_ctl_elem_value *ucontrol)
1329{
1330 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1331 unsigned int val;
1332 int change;
1333
1334 val = ((ucontrol->value.iec958.status[0] & 0x3e) << 0) |
1335 (ucontrol->value.iec958.status[1] << 8);
1336 spin_lock_irq(&chip->reg_lock);
1337 change = chip->spdif_bits != val;
1338 chip->spdif_bits = val;
1339 if ((snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) & 1) && chip->pcm_spdif == NULL)
1340 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_bits);
1341 spin_unlock_irq(&chip->reg_lock);
1342 return change;
1343}
1344
1345static struct snd_kcontrol_new snd_ymfpci_spdif_default =
1346{
1347 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1348 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT),
1349 .info = snd_ymfpci_spdif_default_info,
1350 .get = snd_ymfpci_spdif_default_get,
1351 .put = snd_ymfpci_spdif_default_put
1352};
1353
1354static int snd_ymfpci_spdif_mask_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1355{
1356 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1357 uinfo->count = 1;
1358 return 0;
1359}
1360
1361static int snd_ymfpci_spdif_mask_get(struct snd_kcontrol *kcontrol,
1362 struct snd_ctl_elem_value *ucontrol)
1363{
1364 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1365
1366 spin_lock_irq(&chip->reg_lock);
1367 ucontrol->value.iec958.status[0] = 0x3e;
1368 ucontrol->value.iec958.status[1] = 0xff;
1369 spin_unlock_irq(&chip->reg_lock);
1370 return 0;
1371}
1372
1373static struct snd_kcontrol_new snd_ymfpci_spdif_mask =
1374{
1375 .access = SNDRV_CTL_ELEM_ACCESS_READ,
1376 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1377 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,CON_MASK),
1378 .info = snd_ymfpci_spdif_mask_info,
1379 .get = snd_ymfpci_spdif_mask_get,
1380};
1381
1382static int snd_ymfpci_spdif_stream_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1383{
1384 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1385 uinfo->count = 1;
1386 return 0;
1387}
1388
1389static int snd_ymfpci_spdif_stream_get(struct snd_kcontrol *kcontrol,
1390 struct snd_ctl_elem_value *ucontrol)
1391{
1392 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1393
1394 spin_lock_irq(&chip->reg_lock);
1395 ucontrol->value.iec958.status[0] = (chip->spdif_pcm_bits >> 0) & 0xff;
1396 ucontrol->value.iec958.status[1] = (chip->spdif_pcm_bits >> 8) & 0xff;
1397 ucontrol->value.iec958.status[3] = IEC958_AES3_CON_FS_48000;
1398 spin_unlock_irq(&chip->reg_lock);
1399 return 0;
1400}
1401
1402static int snd_ymfpci_spdif_stream_put(struct snd_kcontrol *kcontrol,
1403 struct snd_ctl_elem_value *ucontrol)
1404{
1405 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1406 unsigned int val;
1407 int change;
1408
1409 val = ((ucontrol->value.iec958.status[0] & 0x3e) << 0) |
1410 (ucontrol->value.iec958.status[1] << 8);
1411 spin_lock_irq(&chip->reg_lock);
1412 change = chip->spdif_pcm_bits != val;
1413 chip->spdif_pcm_bits = val;
1414 if ((snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) & 2))
1415 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_pcm_bits);
1416 spin_unlock_irq(&chip->reg_lock);
1417 return change;
1418}
1419
1420static struct snd_kcontrol_new snd_ymfpci_spdif_stream =
1421{
1422 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_INACTIVE,
1423 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1424 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PCM_STREAM),
1425 .info = snd_ymfpci_spdif_stream_info,
1426 .get = snd_ymfpci_spdif_stream_get,
1427 .put = snd_ymfpci_spdif_stream_put
1428};
1429
1430static int snd_ymfpci_drec_source_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *info)
1431{
1432 static const char *const texts[3] = {"AC'97", "IEC958", "ZV Port"};
1433
1434 return snd_ctl_enum_info(info, 1, 3, texts);
1435}
1436
1437static int snd_ymfpci_drec_source_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *value)
1438{
1439 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1440 u16 reg;
1441
1442 spin_lock_irq(&chip->reg_lock);
1443 reg = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL);
1444 spin_unlock_irq(&chip->reg_lock);
1445 if (!(reg & 0x100))
1446 value->value.enumerated.item[0] = 0;
1447 else
1448 value->value.enumerated.item[0] = 1 + ((reg & 0x200) != 0);
1449 return 0;
1450}
1451
1452static int snd_ymfpci_drec_source_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *value)
1453{
1454 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1455 u16 reg, old_reg;
1456
1457 spin_lock_irq(&chip->reg_lock);
1458 old_reg = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL);
1459 if (value->value.enumerated.item[0] == 0)
1460 reg = old_reg & ~0x100;
1461 else
1462 reg = (old_reg & ~0x300) | 0x100 | ((value->value.enumerated.item[0] == 2) << 9);
1463 snd_ymfpci_writew(chip, YDSXGR_GLOBALCTRL, reg);
1464 spin_unlock_irq(&chip->reg_lock);
1465 return reg != old_reg;
1466}
1467
1468static struct snd_kcontrol_new snd_ymfpci_drec_source = {
1469 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE,
1470 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1471 .name = "Direct Recording Source",
1472 .info = snd_ymfpci_drec_source_info,
1473 .get = snd_ymfpci_drec_source_get,
1474 .put = snd_ymfpci_drec_source_put
1475};
1476
1477/*
1478 * Mixer controls
1479 */
1480
1481#define YMFPCI_SINGLE(xname, xindex, reg, shift) \
1482{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1483 .info = snd_ymfpci_info_single, \
1484 .get = snd_ymfpci_get_single, .put = snd_ymfpci_put_single, \
1485 .private_value = ((reg) | ((shift) << 16)) }
1486
1487#define snd_ymfpci_info_single snd_ctl_boolean_mono_info
1488
1489static int snd_ymfpci_get_single(struct snd_kcontrol *kcontrol,
1490 struct snd_ctl_elem_value *ucontrol)
1491{
1492 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1493 int reg = kcontrol->private_value & 0xffff;
1494 unsigned int shift = (kcontrol->private_value >> 16) & 0xff;
1495 unsigned int mask = 1;
1496
1497 switch (reg) {
1498 case YDSXGR_SPDIFOUTCTRL: break;
1499 case YDSXGR_SPDIFINCTRL: break;
1500 default: return -EINVAL;
1501 }
1502 ucontrol->value.integer.value[0] =
1503 (snd_ymfpci_readl(chip, reg) >> shift) & mask;
1504 return 0;
1505}
1506
1507static int snd_ymfpci_put_single(struct snd_kcontrol *kcontrol,
1508 struct snd_ctl_elem_value *ucontrol)
1509{
1510 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1511 int reg = kcontrol->private_value & 0xffff;
1512 unsigned int shift = (kcontrol->private_value >> 16) & 0xff;
1513 unsigned int mask = 1;
1514 int change;
1515 unsigned int val, oval;
1516
1517 switch (reg) {
1518 case YDSXGR_SPDIFOUTCTRL: break;
1519 case YDSXGR_SPDIFINCTRL: break;
1520 default: return -EINVAL;
1521 }
1522 val = (ucontrol->value.integer.value[0] & mask);
1523 val <<= shift;
1524 spin_lock_irq(&chip->reg_lock);
1525 oval = snd_ymfpci_readl(chip, reg);
1526 val = (oval & ~(mask << shift)) | val;
1527 change = val != oval;
1528 snd_ymfpci_writel(chip, reg, val);
1529 spin_unlock_irq(&chip->reg_lock);
1530 return change;
1531}
1532
1533static const DECLARE_TLV_DB_LINEAR(db_scale_native, TLV_DB_GAIN_MUTE, 0);
1534
1535#define YMFPCI_DOUBLE(xname, xindex, reg) \
1536{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1537 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ, \
1538 .info = snd_ymfpci_info_double, \
1539 .get = snd_ymfpci_get_double, .put = snd_ymfpci_put_double, \
1540 .private_value = reg, \
1541 .tlv = { .p = db_scale_native } }
1542
1543static int snd_ymfpci_info_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1544{
1545 unsigned int reg = kcontrol->private_value;
1546
1547 if (reg < 0x80 || reg >= 0xc0)
1548 return -EINVAL;
1549 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1550 uinfo->count = 2;
1551 uinfo->value.integer.min = 0;
1552 uinfo->value.integer.max = 16383;
1553 return 0;
1554}
1555
1556static int snd_ymfpci_get_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1557{
1558 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1559 unsigned int reg = kcontrol->private_value;
1560 unsigned int shift_left = 0, shift_right = 16, mask = 16383;
1561 unsigned int val;
1562
1563 if (reg < 0x80 || reg >= 0xc0)
1564 return -EINVAL;
1565 spin_lock_irq(&chip->reg_lock);
1566 val = snd_ymfpci_readl(chip, reg);
1567 spin_unlock_irq(&chip->reg_lock);
1568 ucontrol->value.integer.value[0] = (val >> shift_left) & mask;
1569 ucontrol->value.integer.value[1] = (val >> shift_right) & mask;
1570 return 0;
1571}
1572
1573static int snd_ymfpci_put_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1574{
1575 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1576 unsigned int reg = kcontrol->private_value;
1577 unsigned int shift_left = 0, shift_right = 16, mask = 16383;
1578 int change;
1579 unsigned int val1, val2, oval;
1580
1581 if (reg < 0x80 || reg >= 0xc0)
1582 return -EINVAL;
1583 val1 = ucontrol->value.integer.value[0] & mask;
1584 val2 = ucontrol->value.integer.value[1] & mask;
1585 val1 <<= shift_left;
1586 val2 <<= shift_right;
1587 spin_lock_irq(&chip->reg_lock);
1588 oval = snd_ymfpci_readl(chip, reg);
1589 val1 = (oval & ~((mask << shift_left) | (mask << shift_right))) | val1 | val2;
1590 change = val1 != oval;
1591 snd_ymfpci_writel(chip, reg, val1);
1592 spin_unlock_irq(&chip->reg_lock);
1593 return change;
1594}
1595
1596static int snd_ymfpci_put_nativedacvol(struct snd_kcontrol *kcontrol,
1597 struct snd_ctl_elem_value *ucontrol)
1598{
1599 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1600 unsigned int reg = YDSXGR_NATIVEDACOUTVOL;
1601 unsigned int reg2 = YDSXGR_BUF441OUTVOL;
1602 int change;
1603 unsigned int value, oval;
1604
1605 value = ucontrol->value.integer.value[0] & 0x3fff;
1606 value |= (ucontrol->value.integer.value[1] & 0x3fff) << 16;
1607 spin_lock_irq(&chip->reg_lock);
1608 oval = snd_ymfpci_readl(chip, reg);
1609 change = value != oval;
1610 snd_ymfpci_writel(chip, reg, value);
1611 snd_ymfpci_writel(chip, reg2, value);
1612 spin_unlock_irq(&chip->reg_lock);
1613 return change;
1614}
1615
1616/*
1617 * 4ch duplication
1618 */
1619#define snd_ymfpci_info_dup4ch snd_ctl_boolean_mono_info
1620
1621static int snd_ymfpci_get_dup4ch(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1622{
1623 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1624 ucontrol->value.integer.value[0] = chip->mode_dup4ch;
1625 return 0;
1626}
1627
1628static int snd_ymfpci_put_dup4ch(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1629{
1630 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1631 int change;
1632 change = (ucontrol->value.integer.value[0] != chip->mode_dup4ch);
1633 if (change)
1634 chip->mode_dup4ch = !!ucontrol->value.integer.value[0];
1635 return change;
1636}
1637
1638static struct snd_kcontrol_new snd_ymfpci_dup4ch = {
1639 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1640 .name = "4ch Duplication",
1641 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE,
1642 .info = snd_ymfpci_info_dup4ch,
1643 .get = snd_ymfpci_get_dup4ch,
1644 .put = snd_ymfpci_put_dup4ch,
1645};
1646
1647static struct snd_kcontrol_new snd_ymfpci_controls[] = {
1648{
1649 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1650 .name = "Wave Playback Volume",
1651 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE |
1652 SNDRV_CTL_ELEM_ACCESS_TLV_READ,
1653 .info = snd_ymfpci_info_double,
1654 .get = snd_ymfpci_get_double,
1655 .put = snd_ymfpci_put_nativedacvol,
1656 .private_value = YDSXGR_NATIVEDACOUTVOL,
1657 .tlv = { .p = db_scale_native },
1658},
1659YMFPCI_DOUBLE("Wave Capture Volume", 0, YDSXGR_NATIVEDACLOOPVOL),
1660YMFPCI_DOUBLE("Digital Capture Volume", 0, YDSXGR_NATIVEDACINVOL),
1661YMFPCI_DOUBLE("Digital Capture Volume", 1, YDSXGR_NATIVEADCINVOL),
1662YMFPCI_DOUBLE("ADC Playback Volume", 0, YDSXGR_PRIADCOUTVOL),
1663YMFPCI_DOUBLE("ADC Capture Volume", 0, YDSXGR_PRIADCLOOPVOL),
1664YMFPCI_DOUBLE("ADC Playback Volume", 1, YDSXGR_SECADCOUTVOL),
1665YMFPCI_DOUBLE("ADC Capture Volume", 1, YDSXGR_SECADCLOOPVOL),
1666YMFPCI_DOUBLE("FM Legacy Playback Volume", 0, YDSXGR_LEGACYOUTVOL),
1667YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("AC97 ", PLAYBACK,VOLUME), 0, YDSXGR_ZVOUTVOL),
1668YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("", CAPTURE,VOLUME), 0, YDSXGR_ZVLOOPVOL),
1669YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("AC97 ",PLAYBACK,VOLUME), 1, YDSXGR_SPDIFOUTVOL),
1670YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("",CAPTURE,VOLUME), 1, YDSXGR_SPDIFLOOPVOL),
1671YMFPCI_SINGLE(SNDRV_CTL_NAME_IEC958("",PLAYBACK,SWITCH), 0, YDSXGR_SPDIFOUTCTRL, 0),
1672YMFPCI_SINGLE(SNDRV_CTL_NAME_IEC958("",CAPTURE,SWITCH), 0, YDSXGR_SPDIFINCTRL, 0),
1673YMFPCI_SINGLE(SNDRV_CTL_NAME_IEC958("Loop",NONE,NONE), 0, YDSXGR_SPDIFINCTRL, 4),
1674};
1675
1676
1677/*
1678 * GPIO
1679 */
1680
1681static int snd_ymfpci_get_gpio_out(struct snd_ymfpci *chip, int pin)
1682{
1683 u16 reg, mode;
1684 unsigned long flags;
1685
1686 spin_lock_irqsave(&chip->reg_lock, flags);
1687 reg = snd_ymfpci_readw(chip, YDSXGR_GPIOFUNCENABLE);
1688 reg &= ~(1 << (pin + 8));
1689 reg |= (1 << pin);
1690 snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg);
1691 /* set the level mode for input line */
1692 mode = snd_ymfpci_readw(chip, YDSXGR_GPIOTYPECONFIG);
1693 mode &= ~(3 << (pin * 2));
1694 snd_ymfpci_writew(chip, YDSXGR_GPIOTYPECONFIG, mode);
1695 snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg | (1 << (pin + 8)));
1696 mode = snd_ymfpci_readw(chip, YDSXGR_GPIOINSTATUS);
1697 spin_unlock_irqrestore(&chip->reg_lock, flags);
1698 return (mode >> pin) & 1;
1699}
1700
1701static int snd_ymfpci_set_gpio_out(struct snd_ymfpci *chip, int pin, int enable)
1702{
1703 u16 reg;
1704 unsigned long flags;
1705
1706 spin_lock_irqsave(&chip->reg_lock, flags);
1707 reg = snd_ymfpci_readw(chip, YDSXGR_GPIOFUNCENABLE);
1708 reg &= ~(1 << pin);
1709 reg &= ~(1 << (pin + 8));
1710 snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg);
1711 snd_ymfpci_writew(chip, YDSXGR_GPIOOUTCTRL, enable << pin);
1712 snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg | (1 << (pin + 8)));
1713 spin_unlock_irqrestore(&chip->reg_lock, flags);
1714
1715 return 0;
1716}
1717
1718#define snd_ymfpci_gpio_sw_info snd_ctl_boolean_mono_info
1719
1720static int snd_ymfpci_gpio_sw_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1721{
1722 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1723 int pin = (int)kcontrol->private_value;
1724 ucontrol->value.integer.value[0] = snd_ymfpci_get_gpio_out(chip, pin);
1725 return 0;
1726}
1727
1728static int snd_ymfpci_gpio_sw_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1729{
1730 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1731 int pin = (int)kcontrol->private_value;
1732
1733 if (snd_ymfpci_get_gpio_out(chip, pin) != ucontrol->value.integer.value[0]) {
1734 snd_ymfpci_set_gpio_out(chip, pin, !!ucontrol->value.integer.value[0]);
1735 ucontrol->value.integer.value[0] = snd_ymfpci_get_gpio_out(chip, pin);
1736 return 1;
1737 }
1738 return 0;
1739}
1740
1741static struct snd_kcontrol_new snd_ymfpci_rear_shared = {
1742 .name = "Shared Rear/Line-In Switch",
1743 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1744 .info = snd_ymfpci_gpio_sw_info,
1745 .get = snd_ymfpci_gpio_sw_get,
1746 .put = snd_ymfpci_gpio_sw_put,
1747 .private_value = 2,
1748};
1749
1750/*
1751 * PCM voice volume
1752 */
1753
1754static int snd_ymfpci_pcm_vol_info(struct snd_kcontrol *kcontrol,
1755 struct snd_ctl_elem_info *uinfo)
1756{
1757 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1758 uinfo->count = 2;
1759 uinfo->value.integer.min = 0;
1760 uinfo->value.integer.max = 0x8000;
1761 return 0;
1762}
1763
1764static int snd_ymfpci_pcm_vol_get(struct snd_kcontrol *kcontrol,
1765 struct snd_ctl_elem_value *ucontrol)
1766{
1767 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1768 unsigned int subs = kcontrol->id.subdevice;
1769
1770 ucontrol->value.integer.value[0] = chip->pcm_mixer[subs].left;
1771 ucontrol->value.integer.value[1] = chip->pcm_mixer[subs].right;
1772 return 0;
1773}
1774
1775static int snd_ymfpci_pcm_vol_put(struct snd_kcontrol *kcontrol,
1776 struct snd_ctl_elem_value *ucontrol)
1777{
1778 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1779 unsigned int subs = kcontrol->id.subdevice;
1780 struct snd_pcm_substream *substream;
1781 unsigned long flags;
1782
1783 if (ucontrol->value.integer.value[0] != chip->pcm_mixer[subs].left ||
1784 ucontrol->value.integer.value[1] != chip->pcm_mixer[subs].right) {
1785 chip->pcm_mixer[subs].left = ucontrol->value.integer.value[0];
1786 chip->pcm_mixer[subs].right = ucontrol->value.integer.value[1];
1787 if (chip->pcm_mixer[subs].left > 0x8000)
1788 chip->pcm_mixer[subs].left = 0x8000;
1789 if (chip->pcm_mixer[subs].right > 0x8000)
1790 chip->pcm_mixer[subs].right = 0x8000;
1791
1792 substream = (struct snd_pcm_substream *)kcontrol->private_value;
1793 spin_lock_irqsave(&chip->voice_lock, flags);
1794 if (substream->runtime && substream->runtime->private_data) {
1795 struct snd_ymfpci_pcm *ypcm = substream->runtime->private_data;
1796 if (!ypcm->use_441_slot)
1797 ypcm->update_pcm_vol = 2;
1798 }
1799 spin_unlock_irqrestore(&chip->voice_lock, flags);
1800 return 1;
1801 }
1802 return 0;
1803}
1804
1805static struct snd_kcontrol_new snd_ymfpci_pcm_volume = {
1806 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1807 .name = "PCM Playback Volume",
1808 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE |
1809 SNDRV_CTL_ELEM_ACCESS_INACTIVE,
1810 .info = snd_ymfpci_pcm_vol_info,
1811 .get = snd_ymfpci_pcm_vol_get,
1812 .put = snd_ymfpci_pcm_vol_put,
1813};
1814
1815
1816/*
1817 * Mixer routines
1818 */
1819
1820static void snd_ymfpci_mixer_free_ac97_bus(struct snd_ac97_bus *bus)
1821{
1822 struct snd_ymfpci *chip = bus->private_data;
1823 chip->ac97_bus = NULL;
1824}
1825
1826static void snd_ymfpci_mixer_free_ac97(struct snd_ac97 *ac97)
1827{
1828 struct snd_ymfpci *chip = ac97->private_data;
1829 chip->ac97 = NULL;
1830}
1831
1832int snd_ymfpci_mixer(struct snd_ymfpci *chip, int rear_switch)
1833{
1834 struct snd_ac97_template ac97;
1835 struct snd_kcontrol *kctl;
1836 struct snd_pcm_substream *substream;
1837 unsigned int idx;
1838 int err;
1839 static struct snd_ac97_bus_ops ops = {
1840 .write = snd_ymfpci_codec_write,
1841 .read = snd_ymfpci_codec_read,
1842 };
1843
1844 if ((err = snd_ac97_bus(chip->card, 0, &ops, chip, &chip->ac97_bus)) < 0)
1845 return err;
1846 chip->ac97_bus->private_free = snd_ymfpci_mixer_free_ac97_bus;
1847 chip->ac97_bus->no_vra = 1; /* YMFPCI doesn't need VRA */
1848
1849 memset(&ac97, 0, sizeof(ac97));
1850 ac97.private_data = chip;
1851 ac97.private_free = snd_ymfpci_mixer_free_ac97;
1852 if ((err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97)) < 0)
1853 return err;
1854
1855 /* to be sure */
1856 snd_ac97_update_bits(chip->ac97, AC97_EXTENDED_STATUS,
1857 AC97_EA_VRA|AC97_EA_VRM, 0);
1858
1859 for (idx = 0; idx < ARRAY_SIZE(snd_ymfpci_controls); idx++) {
1860 if ((err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_ymfpci_controls[idx], chip))) < 0)
1861 return err;
1862 }
1863 if (chip->ac97->ext_id & AC97_EI_SDAC) {
1864 kctl = snd_ctl_new1(&snd_ymfpci_dup4ch, chip);
1865 err = snd_ctl_add(chip->card, kctl);
1866 if (err < 0)
1867 return err;
1868 }
1869
1870 /* add S/PDIF control */
1871 if (snd_BUG_ON(!chip->pcm_spdif))
1872 return -ENXIO;
1873 if ((err = snd_ctl_add(chip->card, kctl = snd_ctl_new1(&snd_ymfpci_spdif_default, chip))) < 0)
1874 return err;
1875 kctl->id.device = chip->pcm_spdif->device;
1876 if ((err = snd_ctl_add(chip->card, kctl = snd_ctl_new1(&snd_ymfpci_spdif_mask, chip))) < 0)
1877 return err;
1878 kctl->id.device = chip->pcm_spdif->device;
1879 if ((err = snd_ctl_add(chip->card, kctl = snd_ctl_new1(&snd_ymfpci_spdif_stream, chip))) < 0)
1880 return err;
1881 kctl->id.device = chip->pcm_spdif->device;
1882 chip->spdif_pcm_ctl = kctl;
1883
1884 /* direct recording source */
1885 if (chip->device_id == PCI_DEVICE_ID_YAMAHA_754 &&
1886 (err = snd_ctl_add(chip->card, kctl = snd_ctl_new1(&snd_ymfpci_drec_source, chip))) < 0)
1887 return err;
1888
1889 /*
1890 * shared rear/line-in
1891 */
1892 if (rear_switch) {
1893 if ((err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_ymfpci_rear_shared, chip))) < 0)
1894 return err;
1895 }
1896
1897 /* per-voice volume */
1898 substream = chip->pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream;
1899 for (idx = 0; idx < 32; ++idx) {
1900 kctl = snd_ctl_new1(&snd_ymfpci_pcm_volume, chip);
1901 if (!kctl)
1902 return -ENOMEM;
1903 kctl->id.device = chip->pcm->device;
1904 kctl->id.subdevice = idx;
1905 kctl->private_value = (unsigned long)substream;
1906 if ((err = snd_ctl_add(chip->card, kctl)) < 0)
1907 return err;
1908 chip->pcm_mixer[idx].left = 0x8000;
1909 chip->pcm_mixer[idx].right = 0x8000;
1910 chip->pcm_mixer[idx].ctl = kctl;
1911 substream = substream->next;
1912 }
1913
1914 return 0;
1915}
1916
1917
1918/*
1919 * timer
1920 */
1921
1922static int snd_ymfpci_timer_start(struct snd_timer *timer)
1923{
1924 struct snd_ymfpci *chip;
1925 unsigned long flags;
1926 unsigned int count;
1927
1928 chip = snd_timer_chip(timer);
1929 spin_lock_irqsave(&chip->reg_lock, flags);
1930 if (timer->sticks > 1) {
1931 chip->timer_ticks = timer->sticks;
1932 count = timer->sticks - 1;
1933 } else {
1934 /*
1935 * Divisor 1 is not allowed; fake it by using divisor 2 and
1936 * counting two ticks for each interrupt.
1937 */
1938 chip->timer_ticks = 2;
1939 count = 2 - 1;
1940 }
1941 snd_ymfpci_writew(chip, YDSXGR_TIMERCOUNT, count);
1942 snd_ymfpci_writeb(chip, YDSXGR_TIMERCTRL, 0x03);
1943 spin_unlock_irqrestore(&chip->reg_lock, flags);
1944 return 0;
1945}
1946
1947static int snd_ymfpci_timer_stop(struct snd_timer *timer)
1948{
1949 struct snd_ymfpci *chip;
1950 unsigned long flags;
1951
1952 chip = snd_timer_chip(timer);
1953 spin_lock_irqsave(&chip->reg_lock, flags);
1954 snd_ymfpci_writeb(chip, YDSXGR_TIMERCTRL, 0x00);
1955 spin_unlock_irqrestore(&chip->reg_lock, flags);
1956 return 0;
1957}
1958
1959static int snd_ymfpci_timer_precise_resolution(struct snd_timer *timer,
1960 unsigned long *num, unsigned long *den)
1961{
1962 *num = 1;
1963 *den = 96000;
1964 return 0;
1965}
1966
1967static struct snd_timer_hardware snd_ymfpci_timer_hw = {
1968 .flags = SNDRV_TIMER_HW_AUTO,
1969 .resolution = 10417, /* 1 / 96 kHz = 10.41666...us */
1970 .ticks = 0x10000,
1971 .start = snd_ymfpci_timer_start,
1972 .stop = snd_ymfpci_timer_stop,
1973 .precise_resolution = snd_ymfpci_timer_precise_resolution,
1974};
1975
1976int snd_ymfpci_timer(struct snd_ymfpci *chip, int device)
1977{
1978 struct snd_timer *timer = NULL;
1979 struct snd_timer_id tid;
1980 int err;
1981
1982 tid.dev_class = SNDRV_TIMER_CLASS_CARD;
1983 tid.dev_sclass = SNDRV_TIMER_SCLASS_NONE;
1984 tid.card = chip->card->number;
1985 tid.device = device;
1986 tid.subdevice = 0;
1987 if ((err = snd_timer_new(chip->card, "YMFPCI", &tid, &timer)) >= 0) {
1988 strcpy(timer->name, "YMFPCI timer");
1989 timer->private_data = chip;
1990 timer->hw = snd_ymfpci_timer_hw;
1991 }
1992 chip->timer = timer;
1993 return err;
1994}
1995
1996
1997/*
1998 * proc interface
1999 */
2000
2001static void snd_ymfpci_proc_read(struct snd_info_entry *entry,
2002 struct snd_info_buffer *buffer)
2003{
2004 struct snd_ymfpci *chip = entry->private_data;
2005 int i;
2006
2007 snd_iprintf(buffer, "YMFPCI\n\n");
2008 for (i = 0; i <= YDSXGR_WORKBASE; i += 4)
2009 snd_iprintf(buffer, "%04x: %04x\n", i, snd_ymfpci_readl(chip, i));
2010}
2011
2012static int snd_ymfpci_proc_init(struct snd_card *card, struct snd_ymfpci *chip)
2013{
2014 struct snd_info_entry *entry;
2015
2016 if (! snd_card_proc_new(card, "ymfpci", &entry))
2017 snd_info_set_text_ops(entry, chip, snd_ymfpci_proc_read);
2018 return 0;
2019}
2020
2021/*
2022 * initialization routines
2023 */
2024
2025static void snd_ymfpci_aclink_reset(struct pci_dev * pci)
2026{
2027 u8 cmd;
2028
2029 pci_read_config_byte(pci, PCIR_DSXG_CTRL, &cmd);
2030#if 0 // force to reset
2031 if (cmd & 0x03) {
2032#endif
2033 pci_write_config_byte(pci, PCIR_DSXG_CTRL, cmd & 0xfc);
2034 pci_write_config_byte(pci, PCIR_DSXG_CTRL, cmd | 0x03);
2035 pci_write_config_byte(pci, PCIR_DSXG_CTRL, cmd & 0xfc);
2036 pci_write_config_word(pci, PCIR_DSXG_PWRCTRL1, 0);
2037 pci_write_config_word(pci, PCIR_DSXG_PWRCTRL2, 0);
2038#if 0
2039 }
2040#endif
2041}
2042
2043static void snd_ymfpci_enable_dsp(struct snd_ymfpci *chip)
2044{
2045 snd_ymfpci_writel(chip, YDSXGR_CONFIG, 0x00000001);
2046}
2047
2048static void snd_ymfpci_disable_dsp(struct snd_ymfpci *chip)
2049{
2050 u32 val;
2051 int timeout = 1000;
2052
2053 val = snd_ymfpci_readl(chip, YDSXGR_CONFIG);
2054 if (val)
2055 snd_ymfpci_writel(chip, YDSXGR_CONFIG, 0x00000000);
2056 while (timeout-- > 0) {
2057 val = snd_ymfpci_readl(chip, YDSXGR_STATUS);
2058 if ((val & 0x00000002) == 0)
2059 break;
2060 }
2061}
2062
2063static int snd_ymfpci_request_firmware(struct snd_ymfpci *chip)
2064{
2065 int err, is_1e;
2066 const char *name;
2067
2068 err = request_firmware(&chip->dsp_microcode, "yamaha/ds1_dsp.fw",
2069 &chip->pci->dev);
2070 if (err >= 0) {
2071 if (chip->dsp_microcode->size != YDSXG_DSPLENGTH) {
2072 dev_err(chip->card->dev,
2073 "DSP microcode has wrong size\n");
2074 err = -EINVAL;
2075 }
2076 }
2077 if (err < 0)
2078 return err;
2079 is_1e = chip->device_id == PCI_DEVICE_ID_YAMAHA_724F ||
2080 chip->device_id == PCI_DEVICE_ID_YAMAHA_740C ||
2081 chip->device_id == PCI_DEVICE_ID_YAMAHA_744 ||
2082 chip->device_id == PCI_DEVICE_ID_YAMAHA_754;
2083 name = is_1e ? "yamaha/ds1e_ctrl.fw" : "yamaha/ds1_ctrl.fw";
2084 err = request_firmware(&chip->controller_microcode, name,
2085 &chip->pci->dev);
2086 if (err >= 0) {
2087 if (chip->controller_microcode->size != YDSXG_CTRLLENGTH) {
2088 dev_err(chip->card->dev,
2089 "controller microcode has wrong size\n");
2090 err = -EINVAL;
2091 }
2092 }
2093 if (err < 0)
2094 return err;
2095 return 0;
2096}
2097
2098MODULE_FIRMWARE("yamaha/ds1_dsp.fw");
2099MODULE_FIRMWARE("yamaha/ds1_ctrl.fw");
2100MODULE_FIRMWARE("yamaha/ds1e_ctrl.fw");
2101
2102static void snd_ymfpci_download_image(struct snd_ymfpci *chip)
2103{
2104 int i;
2105 u16 ctrl;
2106 const __le32 *inst;
2107
2108 snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0x00000000);
2109 snd_ymfpci_disable_dsp(chip);
2110 snd_ymfpci_writel(chip, YDSXGR_MODE, 0x00010000);
2111 snd_ymfpci_writel(chip, YDSXGR_MODE, 0x00000000);
2112 snd_ymfpci_writel(chip, YDSXGR_MAPOFREC, 0x00000000);
2113 snd_ymfpci_writel(chip, YDSXGR_MAPOFEFFECT, 0x00000000);
2114 snd_ymfpci_writel(chip, YDSXGR_PLAYCTRLBASE, 0x00000000);
2115 snd_ymfpci_writel(chip, YDSXGR_RECCTRLBASE, 0x00000000);
2116 snd_ymfpci_writel(chip, YDSXGR_EFFCTRLBASE, 0x00000000);
2117 ctrl = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL);
2118 snd_ymfpci_writew(chip, YDSXGR_GLOBALCTRL, ctrl & ~0x0007);
2119
2120 /* setup DSP instruction code */
2121 inst = (const __le32 *)chip->dsp_microcode->data;
2122 for (i = 0; i < YDSXG_DSPLENGTH / 4; i++)
2123 snd_ymfpci_writel(chip, YDSXGR_DSPINSTRAM + (i << 2),
2124 le32_to_cpu(inst[i]));
2125
2126 /* setup control instruction code */
2127 inst = (const __le32 *)chip->controller_microcode->data;
2128 for (i = 0; i < YDSXG_CTRLLENGTH / 4; i++)
2129 snd_ymfpci_writel(chip, YDSXGR_CTRLINSTRAM + (i << 2),
2130 le32_to_cpu(inst[i]));
2131
2132 snd_ymfpci_enable_dsp(chip);
2133}
2134
2135static int snd_ymfpci_memalloc(struct snd_ymfpci *chip)
2136{
2137 long size, playback_ctrl_size;
2138 int voice, bank, reg;
2139 u8 *ptr;
2140 dma_addr_t ptr_addr;
2141
2142 playback_ctrl_size = 4 + 4 * YDSXG_PLAYBACK_VOICES;
2143 chip->bank_size_playback = snd_ymfpci_readl(chip, YDSXGR_PLAYCTRLSIZE) << 2;
2144 chip->bank_size_capture = snd_ymfpci_readl(chip, YDSXGR_RECCTRLSIZE) << 2;
2145 chip->bank_size_effect = snd_ymfpci_readl(chip, YDSXGR_EFFCTRLSIZE) << 2;
2146 chip->work_size = YDSXG_DEFAULT_WORK_SIZE;
2147
2148 size = ALIGN(playback_ctrl_size, 0x100) +
2149 ALIGN(chip->bank_size_playback * 2 * YDSXG_PLAYBACK_VOICES, 0x100) +
2150 ALIGN(chip->bank_size_capture * 2 * YDSXG_CAPTURE_VOICES, 0x100) +
2151 ALIGN(chip->bank_size_effect * 2 * YDSXG_EFFECT_VOICES, 0x100) +
2152 chip->work_size;
2153 /* work_ptr must be aligned to 256 bytes, but it's already
2154 covered with the kernel page allocation mechanism */
2155 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(chip->pci),
2156 size, &chip->work_ptr) < 0)
2157 return -ENOMEM;
2158 ptr = chip->work_ptr.area;
2159 ptr_addr = chip->work_ptr.addr;
2160 memset(ptr, 0, size); /* for sure */
2161
2162 chip->bank_base_playback = ptr;
2163 chip->bank_base_playback_addr = ptr_addr;
2164 chip->ctrl_playback = (u32 *)ptr;
2165 chip->ctrl_playback[0] = cpu_to_le32(YDSXG_PLAYBACK_VOICES);
2166 ptr += ALIGN(playback_ctrl_size, 0x100);
2167 ptr_addr += ALIGN(playback_ctrl_size, 0x100);
2168 for (voice = 0; voice < YDSXG_PLAYBACK_VOICES; voice++) {
2169 chip->voices[voice].number = voice;
2170 chip->voices[voice].bank = (struct snd_ymfpci_playback_bank *)ptr;
2171 chip->voices[voice].bank_addr = ptr_addr;
2172 for (bank = 0; bank < 2; bank++) {
2173 chip->bank_playback[voice][bank] = (struct snd_ymfpci_playback_bank *)ptr;
2174 ptr += chip->bank_size_playback;
2175 ptr_addr += chip->bank_size_playback;
2176 }
2177 }
2178 ptr = (char *)ALIGN((unsigned long)ptr, 0x100);
2179 ptr_addr = ALIGN(ptr_addr, 0x100);
2180 chip->bank_base_capture = ptr;
2181 chip->bank_base_capture_addr = ptr_addr;
2182 for (voice = 0; voice < YDSXG_CAPTURE_VOICES; voice++)
2183 for (bank = 0; bank < 2; bank++) {
2184 chip->bank_capture[voice][bank] = (struct snd_ymfpci_capture_bank *)ptr;
2185 ptr += chip->bank_size_capture;
2186 ptr_addr += chip->bank_size_capture;
2187 }
2188 ptr = (char *)ALIGN((unsigned long)ptr, 0x100);
2189 ptr_addr = ALIGN(ptr_addr, 0x100);
2190 chip->bank_base_effect = ptr;
2191 chip->bank_base_effect_addr = ptr_addr;
2192 for (voice = 0; voice < YDSXG_EFFECT_VOICES; voice++)
2193 for (bank = 0; bank < 2; bank++) {
2194 chip->bank_effect[voice][bank] = (struct snd_ymfpci_effect_bank *)ptr;
2195 ptr += chip->bank_size_effect;
2196 ptr_addr += chip->bank_size_effect;
2197 }
2198 ptr = (char *)ALIGN((unsigned long)ptr, 0x100);
2199 ptr_addr = ALIGN(ptr_addr, 0x100);
2200 chip->work_base = ptr;
2201 chip->work_base_addr = ptr_addr;
2202
2203 snd_BUG_ON(ptr + chip->work_size !=
2204 chip->work_ptr.area + chip->work_ptr.bytes);
2205
2206 snd_ymfpci_writel(chip, YDSXGR_PLAYCTRLBASE, chip->bank_base_playback_addr);
2207 snd_ymfpci_writel(chip, YDSXGR_RECCTRLBASE, chip->bank_base_capture_addr);
2208 snd_ymfpci_writel(chip, YDSXGR_EFFCTRLBASE, chip->bank_base_effect_addr);
2209 snd_ymfpci_writel(chip, YDSXGR_WORKBASE, chip->work_base_addr);
2210 snd_ymfpci_writel(chip, YDSXGR_WORKSIZE, chip->work_size >> 2);
2211
2212 /* S/PDIF output initialization */
2213 chip->spdif_bits = chip->spdif_pcm_bits = SNDRV_PCM_DEFAULT_CON_SPDIF & 0xffff;
2214 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTCTRL, 0);
2215 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_bits);
2216
2217 /* S/PDIF input initialization */
2218 snd_ymfpci_writew(chip, YDSXGR_SPDIFINCTRL, 0);
2219
2220 /* digital mixer setup */
2221 for (reg = 0x80; reg < 0xc0; reg += 4)
2222 snd_ymfpci_writel(chip, reg, 0);
2223 snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0x3fff3fff);
2224 snd_ymfpci_writel(chip, YDSXGR_BUF441OUTVOL, 0x3fff3fff);
2225 snd_ymfpci_writel(chip, YDSXGR_ZVOUTVOL, 0x3fff3fff);
2226 snd_ymfpci_writel(chip, YDSXGR_SPDIFOUTVOL, 0x3fff3fff);
2227 snd_ymfpci_writel(chip, YDSXGR_NATIVEADCINVOL, 0x3fff3fff);
2228 snd_ymfpci_writel(chip, YDSXGR_NATIVEDACINVOL, 0x3fff3fff);
2229 snd_ymfpci_writel(chip, YDSXGR_PRIADCLOOPVOL, 0x3fff3fff);
2230 snd_ymfpci_writel(chip, YDSXGR_LEGACYOUTVOL, 0x3fff3fff);
2231
2232 return 0;
2233}
2234
2235static int snd_ymfpci_free(struct snd_ymfpci *chip)
2236{
2237 u16 ctrl;
2238
2239 if (snd_BUG_ON(!chip))
2240 return -EINVAL;
2241
2242 if (chip->res_reg_area) { /* don't touch busy hardware */
2243 snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0);
2244 snd_ymfpci_writel(chip, YDSXGR_BUF441OUTVOL, 0);
2245 snd_ymfpci_writel(chip, YDSXGR_LEGACYOUTVOL, 0);
2246 snd_ymfpci_writel(chip, YDSXGR_STATUS, ~0);
2247 snd_ymfpci_disable_dsp(chip);
2248 snd_ymfpci_writel(chip, YDSXGR_PLAYCTRLBASE, 0);
2249 snd_ymfpci_writel(chip, YDSXGR_RECCTRLBASE, 0);
2250 snd_ymfpci_writel(chip, YDSXGR_EFFCTRLBASE, 0);
2251 snd_ymfpci_writel(chip, YDSXGR_WORKBASE, 0);
2252 snd_ymfpci_writel(chip, YDSXGR_WORKSIZE, 0);
2253 ctrl = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL);
2254 snd_ymfpci_writew(chip, YDSXGR_GLOBALCTRL, ctrl & ~0x0007);
2255 }
2256
2257 snd_ymfpci_ac3_done(chip);
2258
2259 /* Set PCI device to D3 state */
2260#if 0
2261 /* FIXME: temporarily disabled, otherwise we cannot fire up
2262 * the chip again unless reboot. ACPI bug?
2263 */
2264 pci_set_power_state(chip->pci, PCI_D3hot);
2265#endif
2266
2267#ifdef CONFIG_PM_SLEEP
2268 kfree(chip->saved_regs);
2269#endif
2270 if (chip->irq >= 0)
2271 free_irq(chip->irq, chip);
2272 release_and_free_resource(chip->mpu_res);
2273 release_and_free_resource(chip->fm_res);
2274 snd_ymfpci_free_gameport(chip);
2275 if (chip->reg_area_virt)
2276 iounmap(chip->reg_area_virt);
2277 if (chip->work_ptr.area)
2278 snd_dma_free_pages(&chip->work_ptr);
2279
2280 release_and_free_resource(chip->res_reg_area);
2281
2282 pci_write_config_word(chip->pci, 0x40, chip->old_legacy_ctrl);
2283
2284 pci_disable_device(chip->pci);
2285 release_firmware(chip->dsp_microcode);
2286 release_firmware(chip->controller_microcode);
2287 kfree(chip);
2288 return 0;
2289}
2290
2291static int snd_ymfpci_dev_free(struct snd_device *device)
2292{
2293 struct snd_ymfpci *chip = device->device_data;
2294 return snd_ymfpci_free(chip);
2295}
2296
2297#ifdef CONFIG_PM_SLEEP
2298static int saved_regs_index[] = {
2299 /* spdif */
2300 YDSXGR_SPDIFOUTCTRL,
2301 YDSXGR_SPDIFOUTSTATUS,
2302 YDSXGR_SPDIFINCTRL,
2303 /* volumes */
2304 YDSXGR_PRIADCLOOPVOL,
2305 YDSXGR_NATIVEDACINVOL,
2306 YDSXGR_NATIVEDACOUTVOL,
2307 YDSXGR_BUF441OUTVOL,
2308 YDSXGR_NATIVEADCINVOL,
2309 YDSXGR_SPDIFLOOPVOL,
2310 YDSXGR_SPDIFOUTVOL,
2311 YDSXGR_ZVOUTVOL,
2312 YDSXGR_LEGACYOUTVOL,
2313 /* address bases */
2314 YDSXGR_PLAYCTRLBASE,
2315 YDSXGR_RECCTRLBASE,
2316 YDSXGR_EFFCTRLBASE,
2317 YDSXGR_WORKBASE,
2318 /* capture set up */
2319 YDSXGR_MAPOFREC,
2320 YDSXGR_RECFORMAT,
2321 YDSXGR_RECSLOTSR,
2322 YDSXGR_ADCFORMAT,
2323 YDSXGR_ADCSLOTSR,
2324};
2325#define YDSXGR_NUM_SAVED_REGS ARRAY_SIZE(saved_regs_index)
2326
2327static int snd_ymfpci_suspend(struct device *dev)
2328{
2329 struct pci_dev *pci = to_pci_dev(dev);
2330 struct snd_card *card = dev_get_drvdata(dev);
2331 struct snd_ymfpci *chip = card->private_data;
2332 unsigned int i;
2333
2334 snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
2335 snd_pcm_suspend_all(chip->pcm);
2336 snd_pcm_suspend_all(chip->pcm2);
2337 snd_pcm_suspend_all(chip->pcm_spdif);
2338 snd_pcm_suspend_all(chip->pcm_4ch);
2339 snd_ac97_suspend(chip->ac97);
2340 for (i = 0; i < YDSXGR_NUM_SAVED_REGS; i++)
2341 chip->saved_regs[i] = snd_ymfpci_readl(chip, saved_regs_index[i]);
2342 chip->saved_ydsxgr_mode = snd_ymfpci_readl(chip, YDSXGR_MODE);
2343 pci_read_config_word(chip->pci, PCIR_DSXG_LEGACY,
2344 &chip->saved_dsxg_legacy);
2345 pci_read_config_word(chip->pci, PCIR_DSXG_ELEGACY,
2346 &chip->saved_dsxg_elegacy);
2347 snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0);
2348 snd_ymfpci_writel(chip, YDSXGR_BUF441OUTVOL, 0);
2349 snd_ymfpci_disable_dsp(chip);
2350 pci_disable_device(pci);
2351 pci_save_state(pci);
2352 pci_set_power_state(pci, PCI_D3hot);
2353 return 0;
2354}
2355
2356static int snd_ymfpci_resume(struct device *dev)
2357{
2358 struct pci_dev *pci = to_pci_dev(dev);
2359 struct snd_card *card = dev_get_drvdata(dev);
2360 struct snd_ymfpci *chip = card->private_data;
2361 unsigned int i;
2362
2363 pci_set_power_state(pci, PCI_D0);
2364 pci_restore_state(pci);
2365 if (pci_enable_device(pci) < 0) {
2366 dev_err(dev, "pci_enable_device failed, disabling device\n");
2367 snd_card_disconnect(card);
2368 return -EIO;
2369 }
2370 pci_set_master(pci);
2371 snd_ymfpci_aclink_reset(pci);
2372 snd_ymfpci_codec_ready(chip, 0);
2373 snd_ymfpci_download_image(chip);
2374 udelay(100);
2375
2376 for (i = 0; i < YDSXGR_NUM_SAVED_REGS; i++)
2377 snd_ymfpci_writel(chip, saved_regs_index[i], chip->saved_regs[i]);
2378
2379 snd_ac97_resume(chip->ac97);
2380
2381 pci_write_config_word(chip->pci, PCIR_DSXG_LEGACY,
2382 chip->saved_dsxg_legacy);
2383 pci_write_config_word(chip->pci, PCIR_DSXG_ELEGACY,
2384 chip->saved_dsxg_elegacy);
2385
2386 /* start hw again */
2387 if (chip->start_count > 0) {
2388 spin_lock_irq(&chip->reg_lock);
2389 snd_ymfpci_writel(chip, YDSXGR_MODE, chip->saved_ydsxgr_mode);
2390 chip->active_bank = snd_ymfpci_readl(chip, YDSXGR_CTRLSELECT);
2391 spin_unlock_irq(&chip->reg_lock);
2392 }
2393 snd_power_change_state(card, SNDRV_CTL_POWER_D0);
2394 return 0;
2395}
2396
2397SIMPLE_DEV_PM_OPS(snd_ymfpci_pm, snd_ymfpci_suspend, snd_ymfpci_resume);
2398#endif /* CONFIG_PM_SLEEP */
2399
2400int snd_ymfpci_create(struct snd_card *card,
2401 struct pci_dev *pci,
2402 unsigned short old_legacy_ctrl,
2403 struct snd_ymfpci **rchip)
2404{
2405 struct snd_ymfpci *chip;
2406 int err;
2407 static struct snd_device_ops ops = {
2408 .dev_free = snd_ymfpci_dev_free,
2409 };
2410
2411 *rchip = NULL;
2412
2413 /* enable PCI device */
2414 if ((err = pci_enable_device(pci)) < 0)
2415 return err;
2416
2417 chip = kzalloc(sizeof(*chip), GFP_KERNEL);
2418 if (chip == NULL) {
2419 pci_disable_device(pci);
2420 return -ENOMEM;
2421 }
2422 chip->old_legacy_ctrl = old_legacy_ctrl;
2423 spin_lock_init(&chip->reg_lock);
2424 spin_lock_init(&chip->voice_lock);
2425 init_waitqueue_head(&chip->interrupt_sleep);
2426 atomic_set(&chip->interrupt_sleep_count, 0);
2427 chip->card = card;
2428 chip->pci = pci;
2429 chip->irq = -1;
2430 chip->device_id = pci->device;
2431 chip->rev = pci->revision;
2432 chip->reg_area_phys = pci_resource_start(pci, 0);
2433 chip->reg_area_virt = ioremap_nocache(chip->reg_area_phys, 0x8000);
2434 pci_set_master(pci);
2435 chip->src441_used = -1;
2436
2437 if ((chip->res_reg_area = request_mem_region(chip->reg_area_phys, 0x8000, "YMFPCI")) == NULL) {
2438 dev_err(chip->card->dev,
2439 "unable to grab memory region 0x%lx-0x%lx\n",
2440 chip->reg_area_phys, chip->reg_area_phys + 0x8000 - 1);
2441 snd_ymfpci_free(chip);
2442 return -EBUSY;
2443 }
2444 if (request_irq(pci->irq, snd_ymfpci_interrupt, IRQF_SHARED,
2445 KBUILD_MODNAME, chip)) {
2446 dev_err(chip->card->dev, "unable to grab IRQ %d\n", pci->irq);
2447 snd_ymfpci_free(chip);
2448 return -EBUSY;
2449 }
2450 chip->irq = pci->irq;
2451
2452 snd_ymfpci_aclink_reset(pci);
2453 if (snd_ymfpci_codec_ready(chip, 0) < 0) {
2454 snd_ymfpci_free(chip);
2455 return -EIO;
2456 }
2457
2458 err = snd_ymfpci_request_firmware(chip);
2459 if (err < 0) {
2460 dev_err(chip->card->dev, "firmware request failed: %d\n", err);
2461 snd_ymfpci_free(chip);
2462 return err;
2463 }
2464 snd_ymfpci_download_image(chip);
2465
2466 udelay(100); /* seems we need a delay after downloading image.. */
2467
2468 if (snd_ymfpci_memalloc(chip) < 0) {
2469 snd_ymfpci_free(chip);
2470 return -EIO;
2471 }
2472
2473 if ((err = snd_ymfpci_ac3_init(chip)) < 0) {
2474 snd_ymfpci_free(chip);
2475 return err;
2476 }
2477
2478#ifdef CONFIG_PM_SLEEP
2479 chip->saved_regs = kmalloc(YDSXGR_NUM_SAVED_REGS * sizeof(u32),
2480 GFP_KERNEL);
2481 if (chip->saved_regs == NULL) {
2482 snd_ymfpci_free(chip);
2483 return -ENOMEM;
2484 }
2485#endif
2486
2487 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
2488 snd_ymfpci_free(chip);
2489 return err;
2490 }
2491
2492 snd_ymfpci_proc_init(card, chip);
2493
2494 *rchip = chip;
2495 return 0;
2496}
1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * Copyright (c) by Jaroslav Kysela <perex@perex.cz>
4 * Routines for control of YMF724/740/744/754 chips
5 */
6
7#include <linux/delay.h>
8#include <linux/firmware.h>
9#include <linux/init.h>
10#include <linux/interrupt.h>
11#include <linux/pci.h>
12#include <linux/sched.h>
13#include <linux/slab.h>
14#include <linux/mutex.h>
15#include <linux/module.h>
16#include <linux/io.h>
17
18#include <sound/core.h>
19#include <sound/control.h>
20#include <sound/info.h>
21#include <sound/tlv.h>
22#include "ymfpci.h"
23#include <sound/asoundef.h>
24#include <sound/mpu401.h>
25
26#include <asm/byteorder.h>
27
28/*
29 * common I/O routines
30 */
31
32static void snd_ymfpci_irq_wait(struct snd_ymfpci *chip);
33
34static inline u8 snd_ymfpci_readb(struct snd_ymfpci *chip, u32 offset)
35{
36 return readb(chip->reg_area_virt + offset);
37}
38
39static inline void snd_ymfpci_writeb(struct snd_ymfpci *chip, u32 offset, u8 val)
40{
41 writeb(val, chip->reg_area_virt + offset);
42}
43
44static inline u16 snd_ymfpci_readw(struct snd_ymfpci *chip, u32 offset)
45{
46 return readw(chip->reg_area_virt + offset);
47}
48
49static inline void snd_ymfpci_writew(struct snd_ymfpci *chip, u32 offset, u16 val)
50{
51 writew(val, chip->reg_area_virt + offset);
52}
53
54static inline u32 snd_ymfpci_readl(struct snd_ymfpci *chip, u32 offset)
55{
56 return readl(chip->reg_area_virt + offset);
57}
58
59static inline void snd_ymfpci_writel(struct snd_ymfpci *chip, u32 offset, u32 val)
60{
61 writel(val, chip->reg_area_virt + offset);
62}
63
64static int snd_ymfpci_codec_ready(struct snd_ymfpci *chip, int secondary)
65{
66 unsigned long end_time;
67 u32 reg = secondary ? YDSXGR_SECSTATUSADR : YDSXGR_PRISTATUSADR;
68
69 end_time = jiffies + msecs_to_jiffies(750);
70 do {
71 if ((snd_ymfpci_readw(chip, reg) & 0x8000) == 0)
72 return 0;
73 schedule_timeout_uninterruptible(1);
74 } while (time_before(jiffies, end_time));
75 dev_err(chip->card->dev,
76 "codec_ready: codec %i is not ready [0x%x]\n",
77 secondary, snd_ymfpci_readw(chip, reg));
78 return -EBUSY;
79}
80
81static void snd_ymfpci_codec_write(struct snd_ac97 *ac97, u16 reg, u16 val)
82{
83 struct snd_ymfpci *chip = ac97->private_data;
84 u32 cmd;
85
86 snd_ymfpci_codec_ready(chip, 0);
87 cmd = ((YDSXG_AC97WRITECMD | reg) << 16) | val;
88 snd_ymfpci_writel(chip, YDSXGR_AC97CMDDATA, cmd);
89}
90
91static u16 snd_ymfpci_codec_read(struct snd_ac97 *ac97, u16 reg)
92{
93 struct snd_ymfpci *chip = ac97->private_data;
94
95 if (snd_ymfpci_codec_ready(chip, 0))
96 return ~0;
97 snd_ymfpci_writew(chip, YDSXGR_AC97CMDADR, YDSXG_AC97READCMD | reg);
98 if (snd_ymfpci_codec_ready(chip, 0))
99 return ~0;
100 if (chip->device_id == PCI_DEVICE_ID_YAMAHA_744 && chip->rev < 2) {
101 int i;
102 for (i = 0; i < 600; i++)
103 snd_ymfpci_readw(chip, YDSXGR_PRISTATUSDATA);
104 }
105 return snd_ymfpci_readw(chip, YDSXGR_PRISTATUSDATA);
106}
107
108/*
109 * Misc routines
110 */
111
112static u32 snd_ymfpci_calc_delta(u32 rate)
113{
114 switch (rate) {
115 case 8000: return 0x02aaab00;
116 case 11025: return 0x03accd00;
117 case 16000: return 0x05555500;
118 case 22050: return 0x07599a00;
119 case 32000: return 0x0aaaab00;
120 case 44100: return 0x0eb33300;
121 default: return ((rate << 16) / 375) << 5;
122 }
123}
124
125static const u32 def_rate[8] = {
126 100, 2000, 8000, 11025, 16000, 22050, 32000, 48000
127};
128
129static u32 snd_ymfpci_calc_lpfK(u32 rate)
130{
131 u32 i;
132 static const u32 val[8] = {
133 0x00570000, 0x06AA0000, 0x18B20000, 0x20930000,
134 0x2B9A0000, 0x35A10000, 0x3EAA0000, 0x40000000
135 };
136
137 if (rate == 44100)
138 return 0x40000000; /* FIXME: What's the right value? */
139 for (i = 0; i < 8; i++)
140 if (rate <= def_rate[i])
141 return val[i];
142 return val[0];
143}
144
145static u32 snd_ymfpci_calc_lpfQ(u32 rate)
146{
147 u32 i;
148 static const u32 val[8] = {
149 0x35280000, 0x34A70000, 0x32020000, 0x31770000,
150 0x31390000, 0x31C90000, 0x33D00000, 0x40000000
151 };
152
153 if (rate == 44100)
154 return 0x370A0000;
155 for (i = 0; i < 8; i++)
156 if (rate <= def_rate[i])
157 return val[i];
158 return val[0];
159}
160
161/*
162 * Hardware start management
163 */
164
165static void snd_ymfpci_hw_start(struct snd_ymfpci *chip)
166{
167 unsigned long flags;
168
169 spin_lock_irqsave(&chip->reg_lock, flags);
170 if (chip->start_count++ > 0)
171 goto __end;
172 snd_ymfpci_writel(chip, YDSXGR_MODE,
173 snd_ymfpci_readl(chip, YDSXGR_MODE) | 3);
174 chip->active_bank = snd_ymfpci_readl(chip, YDSXGR_CTRLSELECT) & 1;
175 __end:
176 spin_unlock_irqrestore(&chip->reg_lock, flags);
177}
178
179static void snd_ymfpci_hw_stop(struct snd_ymfpci *chip)
180{
181 unsigned long flags;
182 long timeout = 1000;
183
184 spin_lock_irqsave(&chip->reg_lock, flags);
185 if (--chip->start_count > 0)
186 goto __end;
187 snd_ymfpci_writel(chip, YDSXGR_MODE,
188 snd_ymfpci_readl(chip, YDSXGR_MODE) & ~3);
189 while (timeout-- > 0) {
190 if ((snd_ymfpci_readl(chip, YDSXGR_STATUS) & 2) == 0)
191 break;
192 }
193 if (atomic_read(&chip->interrupt_sleep_count)) {
194 atomic_set(&chip->interrupt_sleep_count, 0);
195 wake_up(&chip->interrupt_sleep);
196 }
197 __end:
198 spin_unlock_irqrestore(&chip->reg_lock, flags);
199}
200
201/*
202 * Playback voice management
203 */
204
205static int voice_alloc(struct snd_ymfpci *chip,
206 enum snd_ymfpci_voice_type type, int pair,
207 struct snd_ymfpci_voice **rvoice)
208{
209 struct snd_ymfpci_voice *voice, *voice2;
210 int idx;
211
212 *rvoice = NULL;
213 for (idx = 0; idx < YDSXG_PLAYBACK_VOICES; idx += pair ? 2 : 1) {
214 voice = &chip->voices[idx];
215 voice2 = pair ? &chip->voices[idx+1] : NULL;
216 if (voice->use || (voice2 && voice2->use))
217 continue;
218 voice->use = 1;
219 if (voice2)
220 voice2->use = 1;
221 switch (type) {
222 case YMFPCI_PCM:
223 voice->pcm = 1;
224 if (voice2)
225 voice2->pcm = 1;
226 break;
227 case YMFPCI_SYNTH:
228 voice->synth = 1;
229 break;
230 case YMFPCI_MIDI:
231 voice->midi = 1;
232 break;
233 }
234 snd_ymfpci_hw_start(chip);
235 if (voice2)
236 snd_ymfpci_hw_start(chip);
237 *rvoice = voice;
238 return 0;
239 }
240 return -ENOMEM;
241}
242
243static int snd_ymfpci_voice_alloc(struct snd_ymfpci *chip,
244 enum snd_ymfpci_voice_type type, int pair,
245 struct snd_ymfpci_voice **rvoice)
246{
247 unsigned long flags;
248 int result;
249
250 if (snd_BUG_ON(!rvoice))
251 return -EINVAL;
252 if (snd_BUG_ON(pair && type != YMFPCI_PCM))
253 return -EINVAL;
254
255 spin_lock_irqsave(&chip->voice_lock, flags);
256 for (;;) {
257 result = voice_alloc(chip, type, pair, rvoice);
258 if (result == 0 || type != YMFPCI_PCM)
259 break;
260 /* TODO: synth/midi voice deallocation */
261 break;
262 }
263 spin_unlock_irqrestore(&chip->voice_lock, flags);
264 return result;
265}
266
267static int snd_ymfpci_voice_free(struct snd_ymfpci *chip, struct snd_ymfpci_voice *pvoice)
268{
269 unsigned long flags;
270
271 if (snd_BUG_ON(!pvoice))
272 return -EINVAL;
273 snd_ymfpci_hw_stop(chip);
274 spin_lock_irqsave(&chip->voice_lock, flags);
275 if (pvoice->number == chip->src441_used) {
276 chip->src441_used = -1;
277 pvoice->ypcm->use_441_slot = 0;
278 }
279 pvoice->use = pvoice->pcm = pvoice->synth = pvoice->midi = 0;
280 pvoice->ypcm = NULL;
281 pvoice->interrupt = NULL;
282 spin_unlock_irqrestore(&chip->voice_lock, flags);
283 return 0;
284}
285
286/*
287 * PCM part
288 */
289
290static void snd_ymfpci_pcm_interrupt(struct snd_ymfpci *chip, struct snd_ymfpci_voice *voice)
291{
292 struct snd_ymfpci_pcm *ypcm;
293 u32 pos, delta;
294
295 ypcm = voice->ypcm;
296 if (!ypcm)
297 return;
298 if (ypcm->substream == NULL)
299 return;
300 spin_lock(&chip->reg_lock);
301 if (ypcm->running) {
302 pos = le32_to_cpu(voice->bank[chip->active_bank].start);
303 if (pos < ypcm->last_pos)
304 delta = pos + (ypcm->buffer_size - ypcm->last_pos);
305 else
306 delta = pos - ypcm->last_pos;
307 ypcm->period_pos += delta;
308 ypcm->last_pos = pos;
309 if (ypcm->period_pos >= ypcm->period_size) {
310 /*
311 dev_dbg(chip->card->dev,
312 "done - active_bank = 0x%x, start = 0x%x\n",
313 chip->active_bank,
314 voice->bank[chip->active_bank].start);
315 */
316 ypcm->period_pos %= ypcm->period_size;
317 spin_unlock(&chip->reg_lock);
318 snd_pcm_period_elapsed(ypcm->substream);
319 spin_lock(&chip->reg_lock);
320 }
321
322 if (unlikely(ypcm->update_pcm_vol)) {
323 unsigned int subs = ypcm->substream->number;
324 unsigned int next_bank = 1 - chip->active_bank;
325 struct snd_ymfpci_playback_bank *bank;
326 __le32 volume;
327
328 bank = &voice->bank[next_bank];
329 volume = cpu_to_le32(chip->pcm_mixer[subs].left << 15);
330 bank->left_gain_end = volume;
331 if (ypcm->output_rear)
332 bank->eff2_gain_end = volume;
333 if (ypcm->voices[1])
334 bank = &ypcm->voices[1]->bank[next_bank];
335 volume = cpu_to_le32(chip->pcm_mixer[subs].right << 15);
336 bank->right_gain_end = volume;
337 if (ypcm->output_rear)
338 bank->eff3_gain_end = volume;
339 ypcm->update_pcm_vol--;
340 }
341 }
342 spin_unlock(&chip->reg_lock);
343}
344
345static void snd_ymfpci_pcm_capture_interrupt(struct snd_pcm_substream *substream)
346{
347 struct snd_pcm_runtime *runtime = substream->runtime;
348 struct snd_ymfpci_pcm *ypcm = runtime->private_data;
349 struct snd_ymfpci *chip = ypcm->chip;
350 u32 pos, delta;
351
352 spin_lock(&chip->reg_lock);
353 if (ypcm->running) {
354 pos = le32_to_cpu(chip->bank_capture[ypcm->capture_bank_number][chip->active_bank]->start) >> ypcm->shift;
355 if (pos < ypcm->last_pos)
356 delta = pos + (ypcm->buffer_size - ypcm->last_pos);
357 else
358 delta = pos - ypcm->last_pos;
359 ypcm->period_pos += delta;
360 ypcm->last_pos = pos;
361 if (ypcm->period_pos >= ypcm->period_size) {
362 ypcm->period_pos %= ypcm->period_size;
363 /*
364 dev_dbg(chip->card->dev,
365 "done - active_bank = 0x%x, start = 0x%x\n",
366 chip->active_bank,
367 voice->bank[chip->active_bank].start);
368 */
369 spin_unlock(&chip->reg_lock);
370 snd_pcm_period_elapsed(substream);
371 spin_lock(&chip->reg_lock);
372 }
373 }
374 spin_unlock(&chip->reg_lock);
375}
376
377static int snd_ymfpci_playback_trigger(struct snd_pcm_substream *substream,
378 int cmd)
379{
380 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
381 struct snd_ymfpci_pcm *ypcm = substream->runtime->private_data;
382 struct snd_kcontrol *kctl = NULL;
383 int result = 0;
384
385 spin_lock(&chip->reg_lock);
386 if (ypcm->voices[0] == NULL) {
387 result = -EINVAL;
388 goto __unlock;
389 }
390 switch (cmd) {
391 case SNDRV_PCM_TRIGGER_START:
392 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
393 case SNDRV_PCM_TRIGGER_RESUME:
394 chip->ctrl_playback[ypcm->voices[0]->number + 1] = cpu_to_le32(ypcm->voices[0]->bank_addr);
395 if (ypcm->voices[1] != NULL && !ypcm->use_441_slot)
396 chip->ctrl_playback[ypcm->voices[1]->number + 1] = cpu_to_le32(ypcm->voices[1]->bank_addr);
397 ypcm->running = 1;
398 break;
399 case SNDRV_PCM_TRIGGER_STOP:
400 if (substream->pcm == chip->pcm && !ypcm->use_441_slot) {
401 kctl = chip->pcm_mixer[substream->number].ctl;
402 kctl->vd[0].access |= SNDRV_CTL_ELEM_ACCESS_INACTIVE;
403 }
404 fallthrough;
405 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
406 case SNDRV_PCM_TRIGGER_SUSPEND:
407 chip->ctrl_playback[ypcm->voices[0]->number + 1] = 0;
408 if (ypcm->voices[1] != NULL && !ypcm->use_441_slot)
409 chip->ctrl_playback[ypcm->voices[1]->number + 1] = 0;
410 ypcm->running = 0;
411 break;
412 default:
413 result = -EINVAL;
414 break;
415 }
416 __unlock:
417 spin_unlock(&chip->reg_lock);
418 if (kctl)
419 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_INFO, &kctl->id);
420 return result;
421}
422static int snd_ymfpci_capture_trigger(struct snd_pcm_substream *substream,
423 int cmd)
424{
425 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
426 struct snd_ymfpci_pcm *ypcm = substream->runtime->private_data;
427 int result = 0;
428 u32 tmp;
429
430 spin_lock(&chip->reg_lock);
431 switch (cmd) {
432 case SNDRV_PCM_TRIGGER_START:
433 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
434 case SNDRV_PCM_TRIGGER_RESUME:
435 tmp = snd_ymfpci_readl(chip, YDSXGR_MAPOFREC) | (1 << ypcm->capture_bank_number);
436 snd_ymfpci_writel(chip, YDSXGR_MAPOFREC, tmp);
437 ypcm->running = 1;
438 break;
439 case SNDRV_PCM_TRIGGER_STOP:
440 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
441 case SNDRV_PCM_TRIGGER_SUSPEND:
442 tmp = snd_ymfpci_readl(chip, YDSXGR_MAPOFREC) & ~(1 << ypcm->capture_bank_number);
443 snd_ymfpci_writel(chip, YDSXGR_MAPOFREC, tmp);
444 ypcm->running = 0;
445 break;
446 default:
447 result = -EINVAL;
448 break;
449 }
450 spin_unlock(&chip->reg_lock);
451 return result;
452}
453
454static int snd_ymfpci_pcm_voice_alloc(struct snd_ymfpci_pcm *ypcm, int voices)
455{
456 int err;
457
458 if (ypcm->voices[1] != NULL && voices < 2) {
459 snd_ymfpci_voice_free(ypcm->chip, ypcm->voices[1]);
460 ypcm->voices[1] = NULL;
461 }
462 if (voices == 1 && ypcm->voices[0] != NULL)
463 return 0; /* already allocated */
464 if (voices == 2 && ypcm->voices[0] != NULL && ypcm->voices[1] != NULL)
465 return 0; /* already allocated */
466 if (voices > 1) {
467 if (ypcm->voices[0] != NULL && ypcm->voices[1] == NULL) {
468 snd_ymfpci_voice_free(ypcm->chip, ypcm->voices[0]);
469 ypcm->voices[0] = NULL;
470 }
471 }
472 err = snd_ymfpci_voice_alloc(ypcm->chip, YMFPCI_PCM, voices > 1, &ypcm->voices[0]);
473 if (err < 0)
474 return err;
475 ypcm->voices[0]->ypcm = ypcm;
476 ypcm->voices[0]->interrupt = snd_ymfpci_pcm_interrupt;
477 if (voices > 1) {
478 ypcm->voices[1] = &ypcm->chip->voices[ypcm->voices[0]->number + 1];
479 ypcm->voices[1]->ypcm = ypcm;
480 }
481 return 0;
482}
483
484static void snd_ymfpci_pcm_init_voice(struct snd_ymfpci_pcm *ypcm, unsigned int voiceidx,
485 struct snd_pcm_runtime *runtime,
486 int has_pcm_volume)
487{
488 struct snd_ymfpci_voice *voice = ypcm->voices[voiceidx];
489 u32 format;
490 u32 delta = snd_ymfpci_calc_delta(runtime->rate);
491 u32 lpfQ = snd_ymfpci_calc_lpfQ(runtime->rate);
492 u32 lpfK = snd_ymfpci_calc_lpfK(runtime->rate);
493 struct snd_ymfpci_playback_bank *bank;
494 unsigned int nbank;
495 __le32 vol_left, vol_right;
496 u8 use_left, use_right;
497 unsigned long flags;
498
499 if (snd_BUG_ON(!voice))
500 return;
501 if (runtime->channels == 1) {
502 use_left = 1;
503 use_right = 1;
504 } else {
505 use_left = (voiceidx & 1) == 0;
506 use_right = !use_left;
507 }
508 if (has_pcm_volume) {
509 vol_left = cpu_to_le32(ypcm->chip->pcm_mixer
510 [ypcm->substream->number].left << 15);
511 vol_right = cpu_to_le32(ypcm->chip->pcm_mixer
512 [ypcm->substream->number].right << 15);
513 } else {
514 vol_left = cpu_to_le32(0x40000000);
515 vol_right = cpu_to_le32(0x40000000);
516 }
517 spin_lock_irqsave(&ypcm->chip->voice_lock, flags);
518 format = runtime->channels == 2 ? 0x00010000 : 0;
519 if (snd_pcm_format_width(runtime->format) == 8)
520 format |= 0x80000000;
521 else if (ypcm->chip->device_id == PCI_DEVICE_ID_YAMAHA_754 &&
522 runtime->rate == 44100 && runtime->channels == 2 &&
523 voiceidx == 0 && (ypcm->chip->src441_used == -1 ||
524 ypcm->chip->src441_used == voice->number)) {
525 ypcm->chip->src441_used = voice->number;
526 ypcm->use_441_slot = 1;
527 format |= 0x10000000;
528 }
529 if (ypcm->chip->src441_used == voice->number &&
530 (format & 0x10000000) == 0) {
531 ypcm->chip->src441_used = -1;
532 ypcm->use_441_slot = 0;
533 }
534 if (runtime->channels == 2 && (voiceidx & 1) != 0)
535 format |= 1;
536 spin_unlock_irqrestore(&ypcm->chip->voice_lock, flags);
537 for (nbank = 0; nbank < 2; nbank++) {
538 bank = &voice->bank[nbank];
539 memset(bank, 0, sizeof(*bank));
540 bank->format = cpu_to_le32(format);
541 bank->base = cpu_to_le32(runtime->dma_addr);
542 bank->loop_end = cpu_to_le32(ypcm->buffer_size);
543 bank->lpfQ = cpu_to_le32(lpfQ);
544 bank->delta =
545 bank->delta_end = cpu_to_le32(delta);
546 bank->lpfK =
547 bank->lpfK_end = cpu_to_le32(lpfK);
548 bank->eg_gain =
549 bank->eg_gain_end = cpu_to_le32(0x40000000);
550
551 if (ypcm->output_front) {
552 if (use_left) {
553 bank->left_gain =
554 bank->left_gain_end = vol_left;
555 }
556 if (use_right) {
557 bank->right_gain =
558 bank->right_gain_end = vol_right;
559 }
560 }
561 if (ypcm->output_rear) {
562 if (!ypcm->swap_rear) {
563 if (use_left) {
564 bank->eff2_gain =
565 bank->eff2_gain_end = vol_left;
566 }
567 if (use_right) {
568 bank->eff3_gain =
569 bank->eff3_gain_end = vol_right;
570 }
571 } else {
572 /* The SPDIF out channels seem to be swapped, so we have
573 * to swap them here, too. The rear analog out channels
574 * will be wrong, but otherwise AC3 would not work.
575 */
576 if (use_left) {
577 bank->eff3_gain =
578 bank->eff3_gain_end = vol_left;
579 }
580 if (use_right) {
581 bank->eff2_gain =
582 bank->eff2_gain_end = vol_right;
583 }
584 }
585 }
586 }
587}
588
589static int snd_ymfpci_ac3_init(struct snd_ymfpci *chip)
590{
591 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, &chip->pci->dev,
592 4096, &chip->ac3_tmp_base) < 0)
593 return -ENOMEM;
594
595 chip->bank_effect[3][0]->base =
596 chip->bank_effect[3][1]->base = cpu_to_le32(chip->ac3_tmp_base.addr);
597 chip->bank_effect[3][0]->loop_end =
598 chip->bank_effect[3][1]->loop_end = cpu_to_le32(1024);
599 chip->bank_effect[4][0]->base =
600 chip->bank_effect[4][1]->base = cpu_to_le32(chip->ac3_tmp_base.addr + 2048);
601 chip->bank_effect[4][0]->loop_end =
602 chip->bank_effect[4][1]->loop_end = cpu_to_le32(1024);
603
604 spin_lock_irq(&chip->reg_lock);
605 snd_ymfpci_writel(chip, YDSXGR_MAPOFEFFECT,
606 snd_ymfpci_readl(chip, YDSXGR_MAPOFEFFECT) | 3 << 3);
607 spin_unlock_irq(&chip->reg_lock);
608 return 0;
609}
610
611static int snd_ymfpci_ac3_done(struct snd_ymfpci *chip)
612{
613 spin_lock_irq(&chip->reg_lock);
614 snd_ymfpci_writel(chip, YDSXGR_MAPOFEFFECT,
615 snd_ymfpci_readl(chip, YDSXGR_MAPOFEFFECT) & ~(3 << 3));
616 spin_unlock_irq(&chip->reg_lock);
617 // snd_ymfpci_irq_wait(chip);
618 if (chip->ac3_tmp_base.area) {
619 snd_dma_free_pages(&chip->ac3_tmp_base);
620 chip->ac3_tmp_base.area = NULL;
621 }
622 return 0;
623}
624
625static int snd_ymfpci_playback_hw_params(struct snd_pcm_substream *substream,
626 struct snd_pcm_hw_params *hw_params)
627{
628 struct snd_pcm_runtime *runtime = substream->runtime;
629 struct snd_ymfpci_pcm *ypcm = runtime->private_data;
630 int err;
631
632 err = snd_ymfpci_pcm_voice_alloc(ypcm, params_channels(hw_params));
633 if (err < 0)
634 return err;
635 return 0;
636}
637
638static int snd_ymfpci_playback_hw_free(struct snd_pcm_substream *substream)
639{
640 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
641 struct snd_pcm_runtime *runtime = substream->runtime;
642 struct snd_ymfpci_pcm *ypcm;
643
644 if (runtime->private_data == NULL)
645 return 0;
646 ypcm = runtime->private_data;
647
648 /* wait, until the PCI operations are not finished */
649 snd_ymfpci_irq_wait(chip);
650 if (ypcm->voices[1]) {
651 snd_ymfpci_voice_free(chip, ypcm->voices[1]);
652 ypcm->voices[1] = NULL;
653 }
654 if (ypcm->voices[0]) {
655 snd_ymfpci_voice_free(chip, ypcm->voices[0]);
656 ypcm->voices[0] = NULL;
657 }
658 return 0;
659}
660
661static int snd_ymfpci_playback_prepare(struct snd_pcm_substream *substream)
662{
663 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
664 struct snd_pcm_runtime *runtime = substream->runtime;
665 struct snd_ymfpci_pcm *ypcm = runtime->private_data;
666 struct snd_kcontrol *kctl;
667 unsigned int nvoice;
668
669 ypcm->period_size = runtime->period_size;
670 ypcm->buffer_size = runtime->buffer_size;
671 ypcm->period_pos = 0;
672 ypcm->last_pos = 0;
673 for (nvoice = 0; nvoice < runtime->channels; nvoice++)
674 snd_ymfpci_pcm_init_voice(ypcm, nvoice, runtime,
675 substream->pcm == chip->pcm);
676
677 if (substream->pcm == chip->pcm && !ypcm->use_441_slot) {
678 kctl = chip->pcm_mixer[substream->number].ctl;
679 kctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE;
680 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_INFO, &kctl->id);
681 }
682 return 0;
683}
684
685static int snd_ymfpci_capture_hw_free(struct snd_pcm_substream *substream)
686{
687 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
688
689 /* wait, until the PCI operations are not finished */
690 snd_ymfpci_irq_wait(chip);
691 return 0;
692}
693
694static int snd_ymfpci_capture_prepare(struct snd_pcm_substream *substream)
695{
696 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
697 struct snd_pcm_runtime *runtime = substream->runtime;
698 struct snd_ymfpci_pcm *ypcm = runtime->private_data;
699 struct snd_ymfpci_capture_bank * bank;
700 int nbank;
701 u32 rate, format;
702
703 ypcm->period_size = runtime->period_size;
704 ypcm->buffer_size = runtime->buffer_size;
705 ypcm->period_pos = 0;
706 ypcm->last_pos = 0;
707 ypcm->shift = 0;
708 rate = ((48000 * 4096) / runtime->rate) - 1;
709 format = 0;
710 if (runtime->channels == 2) {
711 format |= 2;
712 ypcm->shift++;
713 }
714 if (snd_pcm_format_width(runtime->format) == 8)
715 format |= 1;
716 else
717 ypcm->shift++;
718 switch (ypcm->capture_bank_number) {
719 case 0:
720 snd_ymfpci_writel(chip, YDSXGR_RECFORMAT, format);
721 snd_ymfpci_writel(chip, YDSXGR_RECSLOTSR, rate);
722 break;
723 case 1:
724 snd_ymfpci_writel(chip, YDSXGR_ADCFORMAT, format);
725 snd_ymfpci_writel(chip, YDSXGR_ADCSLOTSR, rate);
726 break;
727 }
728 for (nbank = 0; nbank < 2; nbank++) {
729 bank = chip->bank_capture[ypcm->capture_bank_number][nbank];
730 bank->base = cpu_to_le32(runtime->dma_addr);
731 bank->loop_end = cpu_to_le32(ypcm->buffer_size << ypcm->shift);
732 bank->start = 0;
733 bank->num_of_loops = 0;
734 }
735 return 0;
736}
737
738static snd_pcm_uframes_t snd_ymfpci_playback_pointer(struct snd_pcm_substream *substream)
739{
740 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
741 struct snd_pcm_runtime *runtime = substream->runtime;
742 struct snd_ymfpci_pcm *ypcm = runtime->private_data;
743 struct snd_ymfpci_voice *voice = ypcm->voices[0];
744
745 if (!(ypcm->running && voice))
746 return 0;
747 return le32_to_cpu(voice->bank[chip->active_bank].start);
748}
749
750static snd_pcm_uframes_t snd_ymfpci_capture_pointer(struct snd_pcm_substream *substream)
751{
752 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
753 struct snd_pcm_runtime *runtime = substream->runtime;
754 struct snd_ymfpci_pcm *ypcm = runtime->private_data;
755
756 if (!ypcm->running)
757 return 0;
758 return le32_to_cpu(chip->bank_capture[ypcm->capture_bank_number][chip->active_bank]->start) >> ypcm->shift;
759}
760
761static void snd_ymfpci_irq_wait(struct snd_ymfpci *chip)
762{
763 wait_queue_entry_t wait;
764 int loops = 4;
765
766 while (loops-- > 0) {
767 if ((snd_ymfpci_readl(chip, YDSXGR_MODE) & 3) == 0)
768 continue;
769 init_waitqueue_entry(&wait, current);
770 add_wait_queue(&chip->interrupt_sleep, &wait);
771 atomic_inc(&chip->interrupt_sleep_count);
772 schedule_timeout_uninterruptible(msecs_to_jiffies(50));
773 remove_wait_queue(&chip->interrupt_sleep, &wait);
774 }
775}
776
777static irqreturn_t snd_ymfpci_interrupt(int irq, void *dev_id)
778{
779 struct snd_ymfpci *chip = dev_id;
780 u32 status, nvoice, mode;
781 struct snd_ymfpci_voice *voice;
782
783 status = snd_ymfpci_readl(chip, YDSXGR_STATUS);
784 if (status & 0x80000000) {
785 chip->active_bank = snd_ymfpci_readl(chip, YDSXGR_CTRLSELECT) & 1;
786 spin_lock(&chip->voice_lock);
787 for (nvoice = 0; nvoice < YDSXG_PLAYBACK_VOICES; nvoice++) {
788 voice = &chip->voices[nvoice];
789 if (voice->interrupt)
790 voice->interrupt(chip, voice);
791 }
792 for (nvoice = 0; nvoice < YDSXG_CAPTURE_VOICES; nvoice++) {
793 if (chip->capture_substream[nvoice])
794 snd_ymfpci_pcm_capture_interrupt(chip->capture_substream[nvoice]);
795 }
796#if 0
797 for (nvoice = 0; nvoice < YDSXG_EFFECT_VOICES; nvoice++) {
798 if (chip->effect_substream[nvoice])
799 snd_ymfpci_pcm_effect_interrupt(chip->effect_substream[nvoice]);
800 }
801#endif
802 spin_unlock(&chip->voice_lock);
803 spin_lock(&chip->reg_lock);
804 snd_ymfpci_writel(chip, YDSXGR_STATUS, 0x80000000);
805 mode = snd_ymfpci_readl(chip, YDSXGR_MODE) | 2;
806 snd_ymfpci_writel(chip, YDSXGR_MODE, mode);
807 spin_unlock(&chip->reg_lock);
808
809 if (atomic_read(&chip->interrupt_sleep_count)) {
810 atomic_set(&chip->interrupt_sleep_count, 0);
811 wake_up(&chip->interrupt_sleep);
812 }
813 }
814
815 status = snd_ymfpci_readw(chip, YDSXGR_INTFLAG);
816 if (status & 1) {
817 if (chip->timer)
818 snd_timer_interrupt(chip->timer, chip->timer_ticks);
819 }
820 snd_ymfpci_writew(chip, YDSXGR_INTFLAG, status);
821
822 if (chip->rawmidi)
823 snd_mpu401_uart_interrupt(irq, chip->rawmidi->private_data);
824 return IRQ_HANDLED;
825}
826
827static const struct snd_pcm_hardware snd_ymfpci_playback =
828{
829 .info = (SNDRV_PCM_INFO_MMAP |
830 SNDRV_PCM_INFO_MMAP_VALID |
831 SNDRV_PCM_INFO_INTERLEAVED |
832 SNDRV_PCM_INFO_BLOCK_TRANSFER |
833 SNDRV_PCM_INFO_PAUSE |
834 SNDRV_PCM_INFO_RESUME),
835 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
836 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
837 .rate_min = 8000,
838 .rate_max = 48000,
839 .channels_min = 1,
840 .channels_max = 2,
841 .buffer_bytes_max = 256 * 1024, /* FIXME: enough? */
842 .period_bytes_min = 64,
843 .period_bytes_max = 256 * 1024, /* FIXME: enough? */
844 .periods_min = 3,
845 .periods_max = 1024,
846 .fifo_size = 0,
847};
848
849static const struct snd_pcm_hardware snd_ymfpci_capture =
850{
851 .info = (SNDRV_PCM_INFO_MMAP |
852 SNDRV_PCM_INFO_MMAP_VALID |
853 SNDRV_PCM_INFO_INTERLEAVED |
854 SNDRV_PCM_INFO_BLOCK_TRANSFER |
855 SNDRV_PCM_INFO_PAUSE |
856 SNDRV_PCM_INFO_RESUME),
857 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
858 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
859 .rate_min = 8000,
860 .rate_max = 48000,
861 .channels_min = 1,
862 .channels_max = 2,
863 .buffer_bytes_max = 256 * 1024, /* FIXME: enough? */
864 .period_bytes_min = 64,
865 .period_bytes_max = 256 * 1024, /* FIXME: enough? */
866 .periods_min = 3,
867 .periods_max = 1024,
868 .fifo_size = 0,
869};
870
871static void snd_ymfpci_pcm_free_substream(struct snd_pcm_runtime *runtime)
872{
873 kfree(runtime->private_data);
874}
875
876static int snd_ymfpci_playback_open_1(struct snd_pcm_substream *substream)
877{
878 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
879 struct snd_pcm_runtime *runtime = substream->runtime;
880 struct snd_ymfpci_pcm *ypcm;
881 int err;
882
883 runtime->hw = snd_ymfpci_playback;
884 /* FIXME? True value is 256/48 = 5.33333 ms */
885 err = snd_pcm_hw_constraint_minmax(runtime,
886 SNDRV_PCM_HW_PARAM_PERIOD_TIME,
887 5334, UINT_MAX);
888 if (err < 0)
889 return err;
890 err = snd_pcm_hw_rule_noresample(runtime, 48000);
891 if (err < 0)
892 return err;
893
894 ypcm = kzalloc(sizeof(*ypcm), GFP_KERNEL);
895 if (ypcm == NULL)
896 return -ENOMEM;
897 ypcm->chip = chip;
898 ypcm->type = PLAYBACK_VOICE;
899 ypcm->substream = substream;
900 runtime->private_data = ypcm;
901 runtime->private_free = snd_ymfpci_pcm_free_substream;
902 return 0;
903}
904
905/* call with spinlock held */
906static void ymfpci_open_extension(struct snd_ymfpci *chip)
907{
908 if (! chip->rear_opened) {
909 if (! chip->spdif_opened) /* set AC3 */
910 snd_ymfpci_writel(chip, YDSXGR_MODE,
911 snd_ymfpci_readl(chip, YDSXGR_MODE) | (1 << 30));
912 /* enable second codec (4CHEN) */
913 snd_ymfpci_writew(chip, YDSXGR_SECCONFIG,
914 (snd_ymfpci_readw(chip, YDSXGR_SECCONFIG) & ~0x0330) | 0x0010);
915 }
916}
917
918/* call with spinlock held */
919static void ymfpci_close_extension(struct snd_ymfpci *chip)
920{
921 if (! chip->rear_opened) {
922 if (! chip->spdif_opened)
923 snd_ymfpci_writel(chip, YDSXGR_MODE,
924 snd_ymfpci_readl(chip, YDSXGR_MODE) & ~(1 << 30));
925 snd_ymfpci_writew(chip, YDSXGR_SECCONFIG,
926 (snd_ymfpci_readw(chip, YDSXGR_SECCONFIG) & ~0x0330) & ~0x0010);
927 }
928}
929
930static int snd_ymfpci_playback_open(struct snd_pcm_substream *substream)
931{
932 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
933 struct snd_pcm_runtime *runtime = substream->runtime;
934 struct snd_ymfpci_pcm *ypcm;
935 int err;
936
937 err = snd_ymfpci_playback_open_1(substream);
938 if (err < 0)
939 return err;
940 ypcm = runtime->private_data;
941 ypcm->output_front = 1;
942 ypcm->output_rear = chip->mode_dup4ch ? 1 : 0;
943 ypcm->swap_rear = 0;
944 spin_lock_irq(&chip->reg_lock);
945 if (ypcm->output_rear) {
946 ymfpci_open_extension(chip);
947 chip->rear_opened++;
948 }
949 spin_unlock_irq(&chip->reg_lock);
950 return 0;
951}
952
953static int snd_ymfpci_playback_spdif_open(struct snd_pcm_substream *substream)
954{
955 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
956 struct snd_pcm_runtime *runtime = substream->runtime;
957 struct snd_ymfpci_pcm *ypcm;
958 int err;
959
960 err = snd_ymfpci_playback_open_1(substream);
961 if (err < 0)
962 return err;
963 ypcm = runtime->private_data;
964 ypcm->output_front = 0;
965 ypcm->output_rear = 1;
966 ypcm->swap_rear = 1;
967 spin_lock_irq(&chip->reg_lock);
968 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTCTRL,
969 snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) | 2);
970 ymfpci_open_extension(chip);
971 chip->spdif_pcm_bits = chip->spdif_bits;
972 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_pcm_bits);
973 chip->spdif_opened++;
974 spin_unlock_irq(&chip->reg_lock);
975
976 chip->spdif_pcm_ctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE;
977 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE |
978 SNDRV_CTL_EVENT_MASK_INFO, &chip->spdif_pcm_ctl->id);
979 return 0;
980}
981
982static int snd_ymfpci_playback_4ch_open(struct snd_pcm_substream *substream)
983{
984 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
985 struct snd_pcm_runtime *runtime = substream->runtime;
986 struct snd_ymfpci_pcm *ypcm;
987 int err;
988
989 err = snd_ymfpci_playback_open_1(substream);
990 if (err < 0)
991 return err;
992 ypcm = runtime->private_data;
993 ypcm->output_front = 0;
994 ypcm->output_rear = 1;
995 ypcm->swap_rear = 0;
996 spin_lock_irq(&chip->reg_lock);
997 ymfpci_open_extension(chip);
998 chip->rear_opened++;
999 spin_unlock_irq(&chip->reg_lock);
1000 return 0;
1001}
1002
1003static int snd_ymfpci_capture_open(struct snd_pcm_substream *substream,
1004 u32 capture_bank_number)
1005{
1006 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
1007 struct snd_pcm_runtime *runtime = substream->runtime;
1008 struct snd_ymfpci_pcm *ypcm;
1009 int err;
1010
1011 runtime->hw = snd_ymfpci_capture;
1012 /* FIXME? True value is 256/48 = 5.33333 ms */
1013 err = snd_pcm_hw_constraint_minmax(runtime,
1014 SNDRV_PCM_HW_PARAM_PERIOD_TIME,
1015 5334, UINT_MAX);
1016 if (err < 0)
1017 return err;
1018 err = snd_pcm_hw_rule_noresample(runtime, 48000);
1019 if (err < 0)
1020 return err;
1021
1022 ypcm = kzalloc(sizeof(*ypcm), GFP_KERNEL);
1023 if (ypcm == NULL)
1024 return -ENOMEM;
1025 ypcm->chip = chip;
1026 ypcm->type = capture_bank_number + CAPTURE_REC;
1027 ypcm->substream = substream;
1028 ypcm->capture_bank_number = capture_bank_number;
1029 chip->capture_substream[capture_bank_number] = substream;
1030 runtime->private_data = ypcm;
1031 runtime->private_free = snd_ymfpci_pcm_free_substream;
1032 snd_ymfpci_hw_start(chip);
1033 return 0;
1034}
1035
1036static int snd_ymfpci_capture_rec_open(struct snd_pcm_substream *substream)
1037{
1038 return snd_ymfpci_capture_open(substream, 0);
1039}
1040
1041static int snd_ymfpci_capture_ac97_open(struct snd_pcm_substream *substream)
1042{
1043 return snd_ymfpci_capture_open(substream, 1);
1044}
1045
1046static int snd_ymfpci_playback_close_1(struct snd_pcm_substream *substream)
1047{
1048 return 0;
1049}
1050
1051static int snd_ymfpci_playback_close(struct snd_pcm_substream *substream)
1052{
1053 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
1054 struct snd_ymfpci_pcm *ypcm = substream->runtime->private_data;
1055
1056 spin_lock_irq(&chip->reg_lock);
1057 if (ypcm->output_rear && chip->rear_opened > 0) {
1058 chip->rear_opened--;
1059 ymfpci_close_extension(chip);
1060 }
1061 spin_unlock_irq(&chip->reg_lock);
1062 return snd_ymfpci_playback_close_1(substream);
1063}
1064
1065static int snd_ymfpci_playback_spdif_close(struct snd_pcm_substream *substream)
1066{
1067 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
1068
1069 spin_lock_irq(&chip->reg_lock);
1070 chip->spdif_opened = 0;
1071 ymfpci_close_extension(chip);
1072 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTCTRL,
1073 snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) & ~2);
1074 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_bits);
1075 spin_unlock_irq(&chip->reg_lock);
1076 chip->spdif_pcm_ctl->vd[0].access |= SNDRV_CTL_ELEM_ACCESS_INACTIVE;
1077 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE |
1078 SNDRV_CTL_EVENT_MASK_INFO, &chip->spdif_pcm_ctl->id);
1079 return snd_ymfpci_playback_close_1(substream);
1080}
1081
1082static int snd_ymfpci_playback_4ch_close(struct snd_pcm_substream *substream)
1083{
1084 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
1085
1086 spin_lock_irq(&chip->reg_lock);
1087 if (chip->rear_opened > 0) {
1088 chip->rear_opened--;
1089 ymfpci_close_extension(chip);
1090 }
1091 spin_unlock_irq(&chip->reg_lock);
1092 return snd_ymfpci_playback_close_1(substream);
1093}
1094
1095static int snd_ymfpci_capture_close(struct snd_pcm_substream *substream)
1096{
1097 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
1098 struct snd_pcm_runtime *runtime = substream->runtime;
1099 struct snd_ymfpci_pcm *ypcm = runtime->private_data;
1100
1101 if (ypcm != NULL) {
1102 chip->capture_substream[ypcm->capture_bank_number] = NULL;
1103 snd_ymfpci_hw_stop(chip);
1104 }
1105 return 0;
1106}
1107
1108static const struct snd_pcm_ops snd_ymfpci_playback_ops = {
1109 .open = snd_ymfpci_playback_open,
1110 .close = snd_ymfpci_playback_close,
1111 .hw_params = snd_ymfpci_playback_hw_params,
1112 .hw_free = snd_ymfpci_playback_hw_free,
1113 .prepare = snd_ymfpci_playback_prepare,
1114 .trigger = snd_ymfpci_playback_trigger,
1115 .pointer = snd_ymfpci_playback_pointer,
1116};
1117
1118static const struct snd_pcm_ops snd_ymfpci_capture_rec_ops = {
1119 .open = snd_ymfpci_capture_rec_open,
1120 .close = snd_ymfpci_capture_close,
1121 .hw_free = snd_ymfpci_capture_hw_free,
1122 .prepare = snd_ymfpci_capture_prepare,
1123 .trigger = snd_ymfpci_capture_trigger,
1124 .pointer = snd_ymfpci_capture_pointer,
1125};
1126
1127int snd_ymfpci_pcm(struct snd_ymfpci *chip, int device)
1128{
1129 struct snd_pcm *pcm;
1130 int err;
1131
1132 err = snd_pcm_new(chip->card, "YMFPCI", device, 32, 1, &pcm);
1133 if (err < 0)
1134 return err;
1135 pcm->private_data = chip;
1136
1137 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ymfpci_playback_ops);
1138 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ymfpci_capture_rec_ops);
1139
1140 /* global setup */
1141 pcm->info_flags = 0;
1142 strcpy(pcm->name, "YMFPCI");
1143 chip->pcm = pcm;
1144
1145 snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV,
1146 &chip->pci->dev, 64*1024, 256*1024);
1147
1148 return snd_pcm_add_chmap_ctls(pcm, SNDRV_PCM_STREAM_PLAYBACK,
1149 snd_pcm_std_chmaps, 2, 0, NULL);
1150}
1151
1152static const struct snd_pcm_ops snd_ymfpci_capture_ac97_ops = {
1153 .open = snd_ymfpci_capture_ac97_open,
1154 .close = snd_ymfpci_capture_close,
1155 .hw_free = snd_ymfpci_capture_hw_free,
1156 .prepare = snd_ymfpci_capture_prepare,
1157 .trigger = snd_ymfpci_capture_trigger,
1158 .pointer = snd_ymfpci_capture_pointer,
1159};
1160
1161int snd_ymfpci_pcm2(struct snd_ymfpci *chip, int device)
1162{
1163 struct snd_pcm *pcm;
1164 int err;
1165
1166 err = snd_pcm_new(chip->card, "YMFPCI - PCM2", device, 0, 1, &pcm);
1167 if (err < 0)
1168 return err;
1169 pcm->private_data = chip;
1170
1171 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ymfpci_capture_ac97_ops);
1172
1173 /* global setup */
1174 pcm->info_flags = 0;
1175 sprintf(pcm->name, "YMFPCI - %s",
1176 chip->device_id == PCI_DEVICE_ID_YAMAHA_754 ? "Direct Recording" : "AC'97");
1177 chip->pcm2 = pcm;
1178
1179 snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV,
1180 &chip->pci->dev, 64*1024, 256*1024);
1181
1182 return 0;
1183}
1184
1185static const struct snd_pcm_ops snd_ymfpci_playback_spdif_ops = {
1186 .open = snd_ymfpci_playback_spdif_open,
1187 .close = snd_ymfpci_playback_spdif_close,
1188 .hw_params = snd_ymfpci_playback_hw_params,
1189 .hw_free = snd_ymfpci_playback_hw_free,
1190 .prepare = snd_ymfpci_playback_prepare,
1191 .trigger = snd_ymfpci_playback_trigger,
1192 .pointer = snd_ymfpci_playback_pointer,
1193};
1194
1195int snd_ymfpci_pcm_spdif(struct snd_ymfpci *chip, int device)
1196{
1197 struct snd_pcm *pcm;
1198 int err;
1199
1200 err = snd_pcm_new(chip->card, "YMFPCI - IEC958", device, 1, 0, &pcm);
1201 if (err < 0)
1202 return err;
1203 pcm->private_data = chip;
1204
1205 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ymfpci_playback_spdif_ops);
1206
1207 /* global setup */
1208 pcm->info_flags = 0;
1209 strcpy(pcm->name, "YMFPCI - IEC958");
1210 chip->pcm_spdif = pcm;
1211
1212 snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV,
1213 &chip->pci->dev, 64*1024, 256*1024);
1214
1215 return 0;
1216}
1217
1218static const struct snd_pcm_ops snd_ymfpci_playback_4ch_ops = {
1219 .open = snd_ymfpci_playback_4ch_open,
1220 .close = snd_ymfpci_playback_4ch_close,
1221 .hw_params = snd_ymfpci_playback_hw_params,
1222 .hw_free = snd_ymfpci_playback_hw_free,
1223 .prepare = snd_ymfpci_playback_prepare,
1224 .trigger = snd_ymfpci_playback_trigger,
1225 .pointer = snd_ymfpci_playback_pointer,
1226};
1227
1228static const struct snd_pcm_chmap_elem surround_map[] = {
1229 { .channels = 1,
1230 .map = { SNDRV_CHMAP_MONO } },
1231 { .channels = 2,
1232 .map = { SNDRV_CHMAP_RL, SNDRV_CHMAP_RR } },
1233 { }
1234};
1235
1236int snd_ymfpci_pcm_4ch(struct snd_ymfpci *chip, int device)
1237{
1238 struct snd_pcm *pcm;
1239 int err;
1240
1241 err = snd_pcm_new(chip->card, "YMFPCI - Rear", device, 1, 0, &pcm);
1242 if (err < 0)
1243 return err;
1244 pcm->private_data = chip;
1245
1246 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ymfpci_playback_4ch_ops);
1247
1248 /* global setup */
1249 pcm->info_flags = 0;
1250 strcpy(pcm->name, "YMFPCI - Rear PCM");
1251 chip->pcm_4ch = pcm;
1252
1253 snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV,
1254 &chip->pci->dev, 64*1024, 256*1024);
1255
1256 return snd_pcm_add_chmap_ctls(pcm, SNDRV_PCM_STREAM_PLAYBACK,
1257 surround_map, 2, 0, NULL);
1258}
1259
1260static int snd_ymfpci_spdif_default_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1261{
1262 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1263 uinfo->count = 1;
1264 return 0;
1265}
1266
1267static int snd_ymfpci_spdif_default_get(struct snd_kcontrol *kcontrol,
1268 struct snd_ctl_elem_value *ucontrol)
1269{
1270 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1271
1272 spin_lock_irq(&chip->reg_lock);
1273 ucontrol->value.iec958.status[0] = (chip->spdif_bits >> 0) & 0xff;
1274 ucontrol->value.iec958.status[1] = (chip->spdif_bits >> 8) & 0xff;
1275 ucontrol->value.iec958.status[3] = IEC958_AES3_CON_FS_48000;
1276 spin_unlock_irq(&chip->reg_lock);
1277 return 0;
1278}
1279
1280static int snd_ymfpci_spdif_default_put(struct snd_kcontrol *kcontrol,
1281 struct snd_ctl_elem_value *ucontrol)
1282{
1283 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1284 unsigned int val;
1285 int change;
1286
1287 val = ((ucontrol->value.iec958.status[0] & 0x3e) << 0) |
1288 (ucontrol->value.iec958.status[1] << 8);
1289 spin_lock_irq(&chip->reg_lock);
1290 change = chip->spdif_bits != val;
1291 chip->spdif_bits = val;
1292 if ((snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) & 1) && chip->pcm_spdif == NULL)
1293 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_bits);
1294 spin_unlock_irq(&chip->reg_lock);
1295 return change;
1296}
1297
1298static const struct snd_kcontrol_new snd_ymfpci_spdif_default =
1299{
1300 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1301 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT),
1302 .info = snd_ymfpci_spdif_default_info,
1303 .get = snd_ymfpci_spdif_default_get,
1304 .put = snd_ymfpci_spdif_default_put
1305};
1306
1307static int snd_ymfpci_spdif_mask_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1308{
1309 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1310 uinfo->count = 1;
1311 return 0;
1312}
1313
1314static int snd_ymfpci_spdif_mask_get(struct snd_kcontrol *kcontrol,
1315 struct snd_ctl_elem_value *ucontrol)
1316{
1317 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1318
1319 spin_lock_irq(&chip->reg_lock);
1320 ucontrol->value.iec958.status[0] = 0x3e;
1321 ucontrol->value.iec958.status[1] = 0xff;
1322 spin_unlock_irq(&chip->reg_lock);
1323 return 0;
1324}
1325
1326static const struct snd_kcontrol_new snd_ymfpci_spdif_mask =
1327{
1328 .access = SNDRV_CTL_ELEM_ACCESS_READ,
1329 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1330 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,CON_MASK),
1331 .info = snd_ymfpci_spdif_mask_info,
1332 .get = snd_ymfpci_spdif_mask_get,
1333};
1334
1335static int snd_ymfpci_spdif_stream_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1336{
1337 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1338 uinfo->count = 1;
1339 return 0;
1340}
1341
1342static int snd_ymfpci_spdif_stream_get(struct snd_kcontrol *kcontrol,
1343 struct snd_ctl_elem_value *ucontrol)
1344{
1345 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1346
1347 spin_lock_irq(&chip->reg_lock);
1348 ucontrol->value.iec958.status[0] = (chip->spdif_pcm_bits >> 0) & 0xff;
1349 ucontrol->value.iec958.status[1] = (chip->spdif_pcm_bits >> 8) & 0xff;
1350 ucontrol->value.iec958.status[3] = IEC958_AES3_CON_FS_48000;
1351 spin_unlock_irq(&chip->reg_lock);
1352 return 0;
1353}
1354
1355static int snd_ymfpci_spdif_stream_put(struct snd_kcontrol *kcontrol,
1356 struct snd_ctl_elem_value *ucontrol)
1357{
1358 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1359 unsigned int val;
1360 int change;
1361
1362 val = ((ucontrol->value.iec958.status[0] & 0x3e) << 0) |
1363 (ucontrol->value.iec958.status[1] << 8);
1364 spin_lock_irq(&chip->reg_lock);
1365 change = chip->spdif_pcm_bits != val;
1366 chip->spdif_pcm_bits = val;
1367 if ((snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) & 2))
1368 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_pcm_bits);
1369 spin_unlock_irq(&chip->reg_lock);
1370 return change;
1371}
1372
1373static const struct snd_kcontrol_new snd_ymfpci_spdif_stream =
1374{
1375 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_INACTIVE,
1376 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1377 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PCM_STREAM),
1378 .info = snd_ymfpci_spdif_stream_info,
1379 .get = snd_ymfpci_spdif_stream_get,
1380 .put = snd_ymfpci_spdif_stream_put
1381};
1382
1383static int snd_ymfpci_drec_source_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *info)
1384{
1385 static const char *const texts[3] = {"AC'97", "IEC958", "ZV Port"};
1386
1387 return snd_ctl_enum_info(info, 1, 3, texts);
1388}
1389
1390static int snd_ymfpci_drec_source_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *value)
1391{
1392 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1393 u16 reg;
1394
1395 spin_lock_irq(&chip->reg_lock);
1396 reg = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL);
1397 spin_unlock_irq(&chip->reg_lock);
1398 if (!(reg & 0x100))
1399 value->value.enumerated.item[0] = 0;
1400 else
1401 value->value.enumerated.item[0] = 1 + ((reg & 0x200) != 0);
1402 return 0;
1403}
1404
1405static int snd_ymfpci_drec_source_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *value)
1406{
1407 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1408 u16 reg, old_reg;
1409
1410 spin_lock_irq(&chip->reg_lock);
1411 old_reg = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL);
1412 if (value->value.enumerated.item[0] == 0)
1413 reg = old_reg & ~0x100;
1414 else
1415 reg = (old_reg & ~0x300) | 0x100 | ((value->value.enumerated.item[0] == 2) << 9);
1416 snd_ymfpci_writew(chip, YDSXGR_GLOBALCTRL, reg);
1417 spin_unlock_irq(&chip->reg_lock);
1418 return reg != old_reg;
1419}
1420
1421static const struct snd_kcontrol_new snd_ymfpci_drec_source = {
1422 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE,
1423 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1424 .name = "Direct Recording Source",
1425 .info = snd_ymfpci_drec_source_info,
1426 .get = snd_ymfpci_drec_source_get,
1427 .put = snd_ymfpci_drec_source_put
1428};
1429
1430/*
1431 * Mixer controls
1432 */
1433
1434#define YMFPCI_SINGLE(xname, xindex, reg, shift) \
1435{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1436 .info = snd_ymfpci_info_single, \
1437 .get = snd_ymfpci_get_single, .put = snd_ymfpci_put_single, \
1438 .private_value = ((reg) | ((shift) << 16)) }
1439
1440#define snd_ymfpci_info_single snd_ctl_boolean_mono_info
1441
1442static int snd_ymfpci_get_single(struct snd_kcontrol *kcontrol,
1443 struct snd_ctl_elem_value *ucontrol)
1444{
1445 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1446 int reg = kcontrol->private_value & 0xffff;
1447 unsigned int shift = (kcontrol->private_value >> 16) & 0xff;
1448 unsigned int mask = 1;
1449
1450 switch (reg) {
1451 case YDSXGR_SPDIFOUTCTRL: break;
1452 case YDSXGR_SPDIFINCTRL: break;
1453 default: return -EINVAL;
1454 }
1455 ucontrol->value.integer.value[0] =
1456 (snd_ymfpci_readl(chip, reg) >> shift) & mask;
1457 return 0;
1458}
1459
1460static int snd_ymfpci_put_single(struct snd_kcontrol *kcontrol,
1461 struct snd_ctl_elem_value *ucontrol)
1462{
1463 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1464 int reg = kcontrol->private_value & 0xffff;
1465 unsigned int shift = (kcontrol->private_value >> 16) & 0xff;
1466 unsigned int mask = 1;
1467 int change;
1468 unsigned int val, oval;
1469
1470 switch (reg) {
1471 case YDSXGR_SPDIFOUTCTRL: break;
1472 case YDSXGR_SPDIFINCTRL: break;
1473 default: return -EINVAL;
1474 }
1475 val = (ucontrol->value.integer.value[0] & mask);
1476 val <<= shift;
1477 spin_lock_irq(&chip->reg_lock);
1478 oval = snd_ymfpci_readl(chip, reg);
1479 val = (oval & ~(mask << shift)) | val;
1480 change = val != oval;
1481 snd_ymfpci_writel(chip, reg, val);
1482 spin_unlock_irq(&chip->reg_lock);
1483 return change;
1484}
1485
1486static const DECLARE_TLV_DB_LINEAR(db_scale_native, TLV_DB_GAIN_MUTE, 0);
1487
1488#define YMFPCI_DOUBLE(xname, xindex, reg) \
1489{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1490 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ, \
1491 .info = snd_ymfpci_info_double, \
1492 .get = snd_ymfpci_get_double, .put = snd_ymfpci_put_double, \
1493 .private_value = reg, \
1494 .tlv = { .p = db_scale_native } }
1495
1496static int snd_ymfpci_info_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1497{
1498 unsigned int reg = kcontrol->private_value;
1499
1500 if (reg < 0x80 || reg >= 0xc0)
1501 return -EINVAL;
1502 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1503 uinfo->count = 2;
1504 uinfo->value.integer.min = 0;
1505 uinfo->value.integer.max = 16383;
1506 return 0;
1507}
1508
1509static int snd_ymfpci_get_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1510{
1511 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1512 unsigned int reg = kcontrol->private_value;
1513 unsigned int shift_left = 0, shift_right = 16, mask = 16383;
1514 unsigned int val;
1515
1516 if (reg < 0x80 || reg >= 0xc0)
1517 return -EINVAL;
1518 spin_lock_irq(&chip->reg_lock);
1519 val = snd_ymfpci_readl(chip, reg);
1520 spin_unlock_irq(&chip->reg_lock);
1521 ucontrol->value.integer.value[0] = (val >> shift_left) & mask;
1522 ucontrol->value.integer.value[1] = (val >> shift_right) & mask;
1523 return 0;
1524}
1525
1526static int snd_ymfpci_put_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1527{
1528 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1529 unsigned int reg = kcontrol->private_value;
1530 unsigned int shift_left = 0, shift_right = 16, mask = 16383;
1531 int change;
1532 unsigned int val1, val2, oval;
1533
1534 if (reg < 0x80 || reg >= 0xc0)
1535 return -EINVAL;
1536 val1 = ucontrol->value.integer.value[0] & mask;
1537 val2 = ucontrol->value.integer.value[1] & mask;
1538 val1 <<= shift_left;
1539 val2 <<= shift_right;
1540 spin_lock_irq(&chip->reg_lock);
1541 oval = snd_ymfpci_readl(chip, reg);
1542 val1 = (oval & ~((mask << shift_left) | (mask << shift_right))) | val1 | val2;
1543 change = val1 != oval;
1544 snd_ymfpci_writel(chip, reg, val1);
1545 spin_unlock_irq(&chip->reg_lock);
1546 return change;
1547}
1548
1549static int snd_ymfpci_put_nativedacvol(struct snd_kcontrol *kcontrol,
1550 struct snd_ctl_elem_value *ucontrol)
1551{
1552 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1553 unsigned int reg = YDSXGR_NATIVEDACOUTVOL;
1554 unsigned int reg2 = YDSXGR_BUF441OUTVOL;
1555 int change;
1556 unsigned int value, oval;
1557
1558 value = ucontrol->value.integer.value[0] & 0x3fff;
1559 value |= (ucontrol->value.integer.value[1] & 0x3fff) << 16;
1560 spin_lock_irq(&chip->reg_lock);
1561 oval = snd_ymfpci_readl(chip, reg);
1562 change = value != oval;
1563 snd_ymfpci_writel(chip, reg, value);
1564 snd_ymfpci_writel(chip, reg2, value);
1565 spin_unlock_irq(&chip->reg_lock);
1566 return change;
1567}
1568
1569/*
1570 * 4ch duplication
1571 */
1572#define snd_ymfpci_info_dup4ch snd_ctl_boolean_mono_info
1573
1574static int snd_ymfpci_get_dup4ch(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1575{
1576 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1577 ucontrol->value.integer.value[0] = chip->mode_dup4ch;
1578 return 0;
1579}
1580
1581static int snd_ymfpci_put_dup4ch(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1582{
1583 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1584 int change;
1585 change = (ucontrol->value.integer.value[0] != chip->mode_dup4ch);
1586 if (change)
1587 chip->mode_dup4ch = !!ucontrol->value.integer.value[0];
1588 return change;
1589}
1590
1591static const struct snd_kcontrol_new snd_ymfpci_dup4ch = {
1592 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1593 .name = "4ch Duplication",
1594 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE,
1595 .info = snd_ymfpci_info_dup4ch,
1596 .get = snd_ymfpci_get_dup4ch,
1597 .put = snd_ymfpci_put_dup4ch,
1598};
1599
1600static const struct snd_kcontrol_new snd_ymfpci_controls[] = {
1601{
1602 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1603 .name = "Wave Playback Volume",
1604 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE |
1605 SNDRV_CTL_ELEM_ACCESS_TLV_READ,
1606 .info = snd_ymfpci_info_double,
1607 .get = snd_ymfpci_get_double,
1608 .put = snd_ymfpci_put_nativedacvol,
1609 .private_value = YDSXGR_NATIVEDACOUTVOL,
1610 .tlv = { .p = db_scale_native },
1611},
1612YMFPCI_DOUBLE("Wave Capture Volume", 0, YDSXGR_NATIVEDACLOOPVOL),
1613YMFPCI_DOUBLE("Digital Capture Volume", 0, YDSXGR_NATIVEDACINVOL),
1614YMFPCI_DOUBLE("Digital Capture Volume", 1, YDSXGR_NATIVEADCINVOL),
1615YMFPCI_DOUBLE("ADC Playback Volume", 0, YDSXGR_PRIADCOUTVOL),
1616YMFPCI_DOUBLE("ADC Capture Volume", 0, YDSXGR_PRIADCLOOPVOL),
1617YMFPCI_DOUBLE("ADC Playback Volume", 1, YDSXGR_SECADCOUTVOL),
1618YMFPCI_DOUBLE("ADC Capture Volume", 1, YDSXGR_SECADCLOOPVOL),
1619YMFPCI_DOUBLE("FM Legacy Playback Volume", 0, YDSXGR_LEGACYOUTVOL),
1620YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("AC97 ", PLAYBACK,VOLUME), 0, YDSXGR_ZVOUTVOL),
1621YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("", CAPTURE,VOLUME), 0, YDSXGR_ZVLOOPVOL),
1622YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("AC97 ",PLAYBACK,VOLUME), 1, YDSXGR_SPDIFOUTVOL),
1623YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("",CAPTURE,VOLUME), 1, YDSXGR_SPDIFLOOPVOL),
1624YMFPCI_SINGLE(SNDRV_CTL_NAME_IEC958("",PLAYBACK,SWITCH), 0, YDSXGR_SPDIFOUTCTRL, 0),
1625YMFPCI_SINGLE(SNDRV_CTL_NAME_IEC958("",CAPTURE,SWITCH), 0, YDSXGR_SPDIFINCTRL, 0),
1626YMFPCI_SINGLE(SNDRV_CTL_NAME_IEC958("Loop",NONE,NONE), 0, YDSXGR_SPDIFINCTRL, 4),
1627};
1628
1629
1630/*
1631 * GPIO
1632 */
1633
1634static int snd_ymfpci_get_gpio_out(struct snd_ymfpci *chip, int pin)
1635{
1636 u16 reg, mode;
1637 unsigned long flags;
1638
1639 spin_lock_irqsave(&chip->reg_lock, flags);
1640 reg = snd_ymfpci_readw(chip, YDSXGR_GPIOFUNCENABLE);
1641 reg &= ~(1 << (pin + 8));
1642 reg |= (1 << pin);
1643 snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg);
1644 /* set the level mode for input line */
1645 mode = snd_ymfpci_readw(chip, YDSXGR_GPIOTYPECONFIG);
1646 mode &= ~(3 << (pin * 2));
1647 snd_ymfpci_writew(chip, YDSXGR_GPIOTYPECONFIG, mode);
1648 snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg | (1 << (pin + 8)));
1649 mode = snd_ymfpci_readw(chip, YDSXGR_GPIOINSTATUS);
1650 spin_unlock_irqrestore(&chip->reg_lock, flags);
1651 return (mode >> pin) & 1;
1652}
1653
1654static int snd_ymfpci_set_gpio_out(struct snd_ymfpci *chip, int pin, int enable)
1655{
1656 u16 reg;
1657 unsigned long flags;
1658
1659 spin_lock_irqsave(&chip->reg_lock, flags);
1660 reg = snd_ymfpci_readw(chip, YDSXGR_GPIOFUNCENABLE);
1661 reg &= ~(1 << pin);
1662 reg &= ~(1 << (pin + 8));
1663 snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg);
1664 snd_ymfpci_writew(chip, YDSXGR_GPIOOUTCTRL, enable << pin);
1665 snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg | (1 << (pin + 8)));
1666 spin_unlock_irqrestore(&chip->reg_lock, flags);
1667
1668 return 0;
1669}
1670
1671#define snd_ymfpci_gpio_sw_info snd_ctl_boolean_mono_info
1672
1673static int snd_ymfpci_gpio_sw_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1674{
1675 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1676 int pin = (int)kcontrol->private_value;
1677 ucontrol->value.integer.value[0] = snd_ymfpci_get_gpio_out(chip, pin);
1678 return 0;
1679}
1680
1681static int snd_ymfpci_gpio_sw_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1682{
1683 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1684 int pin = (int)kcontrol->private_value;
1685
1686 if (snd_ymfpci_get_gpio_out(chip, pin) != ucontrol->value.integer.value[0]) {
1687 snd_ymfpci_set_gpio_out(chip, pin, !!ucontrol->value.integer.value[0]);
1688 ucontrol->value.integer.value[0] = snd_ymfpci_get_gpio_out(chip, pin);
1689 return 1;
1690 }
1691 return 0;
1692}
1693
1694static const struct snd_kcontrol_new snd_ymfpci_rear_shared = {
1695 .name = "Shared Rear/Line-In Switch",
1696 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1697 .info = snd_ymfpci_gpio_sw_info,
1698 .get = snd_ymfpci_gpio_sw_get,
1699 .put = snd_ymfpci_gpio_sw_put,
1700 .private_value = 2,
1701};
1702
1703/*
1704 * PCM voice volume
1705 */
1706
1707static int snd_ymfpci_pcm_vol_info(struct snd_kcontrol *kcontrol,
1708 struct snd_ctl_elem_info *uinfo)
1709{
1710 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1711 uinfo->count = 2;
1712 uinfo->value.integer.min = 0;
1713 uinfo->value.integer.max = 0x8000;
1714 return 0;
1715}
1716
1717static int snd_ymfpci_pcm_vol_get(struct snd_kcontrol *kcontrol,
1718 struct snd_ctl_elem_value *ucontrol)
1719{
1720 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1721 unsigned int subs = kcontrol->id.subdevice;
1722
1723 ucontrol->value.integer.value[0] = chip->pcm_mixer[subs].left;
1724 ucontrol->value.integer.value[1] = chip->pcm_mixer[subs].right;
1725 return 0;
1726}
1727
1728static int snd_ymfpci_pcm_vol_put(struct snd_kcontrol *kcontrol,
1729 struct snd_ctl_elem_value *ucontrol)
1730{
1731 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1732 unsigned int subs = kcontrol->id.subdevice;
1733 struct snd_pcm_substream *substream;
1734 unsigned long flags;
1735
1736 if (ucontrol->value.integer.value[0] != chip->pcm_mixer[subs].left ||
1737 ucontrol->value.integer.value[1] != chip->pcm_mixer[subs].right) {
1738 chip->pcm_mixer[subs].left = ucontrol->value.integer.value[0];
1739 chip->pcm_mixer[subs].right = ucontrol->value.integer.value[1];
1740 if (chip->pcm_mixer[subs].left > 0x8000)
1741 chip->pcm_mixer[subs].left = 0x8000;
1742 if (chip->pcm_mixer[subs].right > 0x8000)
1743 chip->pcm_mixer[subs].right = 0x8000;
1744
1745 substream = (struct snd_pcm_substream *)kcontrol->private_value;
1746 spin_lock_irqsave(&chip->voice_lock, flags);
1747 if (substream->runtime && substream->runtime->private_data) {
1748 struct snd_ymfpci_pcm *ypcm = substream->runtime->private_data;
1749 if (!ypcm->use_441_slot)
1750 ypcm->update_pcm_vol = 2;
1751 }
1752 spin_unlock_irqrestore(&chip->voice_lock, flags);
1753 return 1;
1754 }
1755 return 0;
1756}
1757
1758static const struct snd_kcontrol_new snd_ymfpci_pcm_volume = {
1759 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1760 .name = "PCM Playback Volume",
1761 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE |
1762 SNDRV_CTL_ELEM_ACCESS_INACTIVE,
1763 .info = snd_ymfpci_pcm_vol_info,
1764 .get = snd_ymfpci_pcm_vol_get,
1765 .put = snd_ymfpci_pcm_vol_put,
1766};
1767
1768
1769/*
1770 * Mixer routines
1771 */
1772
1773static void snd_ymfpci_mixer_free_ac97_bus(struct snd_ac97_bus *bus)
1774{
1775 struct snd_ymfpci *chip = bus->private_data;
1776 chip->ac97_bus = NULL;
1777}
1778
1779static void snd_ymfpci_mixer_free_ac97(struct snd_ac97 *ac97)
1780{
1781 struct snd_ymfpci *chip = ac97->private_data;
1782 chip->ac97 = NULL;
1783}
1784
1785int snd_ymfpci_mixer(struct snd_ymfpci *chip, int rear_switch)
1786{
1787 struct snd_ac97_template ac97;
1788 struct snd_kcontrol *kctl;
1789 struct snd_pcm_substream *substream;
1790 unsigned int idx;
1791 int err;
1792 static const struct snd_ac97_bus_ops ops = {
1793 .write = snd_ymfpci_codec_write,
1794 .read = snd_ymfpci_codec_read,
1795 };
1796
1797 err = snd_ac97_bus(chip->card, 0, &ops, chip, &chip->ac97_bus);
1798 if (err < 0)
1799 return err;
1800 chip->ac97_bus->private_free = snd_ymfpci_mixer_free_ac97_bus;
1801 chip->ac97_bus->no_vra = 1; /* YMFPCI doesn't need VRA */
1802
1803 memset(&ac97, 0, sizeof(ac97));
1804 ac97.private_data = chip;
1805 ac97.private_free = snd_ymfpci_mixer_free_ac97;
1806 err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97);
1807 if (err < 0)
1808 return err;
1809
1810 /* to be sure */
1811 snd_ac97_update_bits(chip->ac97, AC97_EXTENDED_STATUS,
1812 AC97_EA_VRA|AC97_EA_VRM, 0);
1813
1814 for (idx = 0; idx < ARRAY_SIZE(snd_ymfpci_controls); idx++) {
1815 err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_ymfpci_controls[idx], chip));
1816 if (err < 0)
1817 return err;
1818 }
1819 if (chip->ac97->ext_id & AC97_EI_SDAC) {
1820 kctl = snd_ctl_new1(&snd_ymfpci_dup4ch, chip);
1821 err = snd_ctl_add(chip->card, kctl);
1822 if (err < 0)
1823 return err;
1824 }
1825
1826 /* add S/PDIF control */
1827 if (snd_BUG_ON(!chip->pcm_spdif))
1828 return -ENXIO;
1829 kctl = snd_ctl_new1(&snd_ymfpci_spdif_default, chip);
1830 err = snd_ctl_add(chip->card, kctl);
1831 if (err < 0)
1832 return err;
1833 kctl->id.device = chip->pcm_spdif->device;
1834 kctl = snd_ctl_new1(&snd_ymfpci_spdif_mask, chip);
1835 err = snd_ctl_add(chip->card, kctl);
1836 if (err < 0)
1837 return err;
1838 kctl->id.device = chip->pcm_spdif->device;
1839 kctl = snd_ctl_new1(&snd_ymfpci_spdif_stream, chip);
1840 err = snd_ctl_add(chip->card, kctl);
1841 if (err < 0)
1842 return err;
1843 kctl->id.device = chip->pcm_spdif->device;
1844 chip->spdif_pcm_ctl = kctl;
1845
1846 /* direct recording source */
1847 if (chip->device_id == PCI_DEVICE_ID_YAMAHA_754) {
1848 kctl = snd_ctl_new1(&snd_ymfpci_drec_source, chip);
1849 err = snd_ctl_add(chip->card, kctl);
1850 if (err < 0)
1851 return err;
1852 }
1853
1854 /*
1855 * shared rear/line-in
1856 */
1857 if (rear_switch) {
1858 err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_ymfpci_rear_shared, chip));
1859 if (err < 0)
1860 return err;
1861 }
1862
1863 /* per-voice volume */
1864 substream = chip->pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream;
1865 for (idx = 0; idx < 32; ++idx) {
1866 kctl = snd_ctl_new1(&snd_ymfpci_pcm_volume, chip);
1867 if (!kctl)
1868 return -ENOMEM;
1869 kctl->id.device = chip->pcm->device;
1870 kctl->id.subdevice = idx;
1871 kctl->private_value = (unsigned long)substream;
1872 err = snd_ctl_add(chip->card, kctl);
1873 if (err < 0)
1874 return err;
1875 chip->pcm_mixer[idx].left = 0x8000;
1876 chip->pcm_mixer[idx].right = 0x8000;
1877 chip->pcm_mixer[idx].ctl = kctl;
1878 substream = substream->next;
1879 }
1880
1881 return 0;
1882}
1883
1884
1885/*
1886 * timer
1887 */
1888
1889static int snd_ymfpci_timer_start(struct snd_timer *timer)
1890{
1891 struct snd_ymfpci *chip;
1892 unsigned long flags;
1893 unsigned int count;
1894
1895 chip = snd_timer_chip(timer);
1896 spin_lock_irqsave(&chip->reg_lock, flags);
1897 if (timer->sticks > 1) {
1898 chip->timer_ticks = timer->sticks;
1899 count = timer->sticks - 1;
1900 } else {
1901 /*
1902 * Divisor 1 is not allowed; fake it by using divisor 2 and
1903 * counting two ticks for each interrupt.
1904 */
1905 chip->timer_ticks = 2;
1906 count = 2 - 1;
1907 }
1908 snd_ymfpci_writew(chip, YDSXGR_TIMERCOUNT, count);
1909 snd_ymfpci_writeb(chip, YDSXGR_TIMERCTRL, 0x03);
1910 spin_unlock_irqrestore(&chip->reg_lock, flags);
1911 return 0;
1912}
1913
1914static int snd_ymfpci_timer_stop(struct snd_timer *timer)
1915{
1916 struct snd_ymfpci *chip;
1917 unsigned long flags;
1918
1919 chip = snd_timer_chip(timer);
1920 spin_lock_irqsave(&chip->reg_lock, flags);
1921 snd_ymfpci_writeb(chip, YDSXGR_TIMERCTRL, 0x00);
1922 spin_unlock_irqrestore(&chip->reg_lock, flags);
1923 return 0;
1924}
1925
1926static int snd_ymfpci_timer_precise_resolution(struct snd_timer *timer,
1927 unsigned long *num, unsigned long *den)
1928{
1929 *num = 1;
1930 *den = 96000;
1931 return 0;
1932}
1933
1934static const struct snd_timer_hardware snd_ymfpci_timer_hw = {
1935 .flags = SNDRV_TIMER_HW_AUTO,
1936 .resolution = 10417, /* 1 / 96 kHz = 10.41666...us */
1937 .ticks = 0x10000,
1938 .start = snd_ymfpci_timer_start,
1939 .stop = snd_ymfpci_timer_stop,
1940 .precise_resolution = snd_ymfpci_timer_precise_resolution,
1941};
1942
1943int snd_ymfpci_timer(struct snd_ymfpci *chip, int device)
1944{
1945 struct snd_timer *timer = NULL;
1946 struct snd_timer_id tid;
1947 int err;
1948
1949 tid.dev_class = SNDRV_TIMER_CLASS_CARD;
1950 tid.dev_sclass = SNDRV_TIMER_SCLASS_NONE;
1951 tid.card = chip->card->number;
1952 tid.device = device;
1953 tid.subdevice = 0;
1954 err = snd_timer_new(chip->card, "YMFPCI", &tid, &timer);
1955 if (err >= 0) {
1956 strcpy(timer->name, "YMFPCI timer");
1957 timer->private_data = chip;
1958 timer->hw = snd_ymfpci_timer_hw;
1959 }
1960 chip->timer = timer;
1961 return err;
1962}
1963
1964
1965/*
1966 * proc interface
1967 */
1968
1969static void snd_ymfpci_proc_read(struct snd_info_entry *entry,
1970 struct snd_info_buffer *buffer)
1971{
1972 struct snd_ymfpci *chip = entry->private_data;
1973 int i;
1974
1975 snd_iprintf(buffer, "YMFPCI\n\n");
1976 for (i = 0; i <= YDSXGR_WORKBASE; i += 4)
1977 snd_iprintf(buffer, "%04x: %04x\n", i, snd_ymfpci_readl(chip, i));
1978}
1979
1980static int snd_ymfpci_proc_init(struct snd_card *card, struct snd_ymfpci *chip)
1981{
1982 return snd_card_ro_proc_new(card, "ymfpci", chip, snd_ymfpci_proc_read);
1983}
1984
1985/*
1986 * initialization routines
1987 */
1988
1989static void snd_ymfpci_aclink_reset(struct pci_dev * pci)
1990{
1991 u8 cmd;
1992
1993 pci_read_config_byte(pci, PCIR_DSXG_CTRL, &cmd);
1994#if 0 // force to reset
1995 if (cmd & 0x03) {
1996#endif
1997 pci_write_config_byte(pci, PCIR_DSXG_CTRL, cmd & 0xfc);
1998 pci_write_config_byte(pci, PCIR_DSXG_CTRL, cmd | 0x03);
1999 pci_write_config_byte(pci, PCIR_DSXG_CTRL, cmd & 0xfc);
2000 pci_write_config_word(pci, PCIR_DSXG_PWRCTRL1, 0);
2001 pci_write_config_word(pci, PCIR_DSXG_PWRCTRL2, 0);
2002#if 0
2003 }
2004#endif
2005}
2006
2007static void snd_ymfpci_enable_dsp(struct snd_ymfpci *chip)
2008{
2009 snd_ymfpci_writel(chip, YDSXGR_CONFIG, 0x00000001);
2010}
2011
2012static void snd_ymfpci_disable_dsp(struct snd_ymfpci *chip)
2013{
2014 u32 val;
2015 int timeout = 1000;
2016
2017 val = snd_ymfpci_readl(chip, YDSXGR_CONFIG);
2018 if (val)
2019 snd_ymfpci_writel(chip, YDSXGR_CONFIG, 0x00000000);
2020 while (timeout-- > 0) {
2021 val = snd_ymfpci_readl(chip, YDSXGR_STATUS);
2022 if ((val & 0x00000002) == 0)
2023 break;
2024 }
2025}
2026
2027static int snd_ymfpci_request_firmware(struct snd_ymfpci *chip)
2028{
2029 int err, is_1e;
2030 const char *name;
2031
2032 err = request_firmware(&chip->dsp_microcode, "yamaha/ds1_dsp.fw",
2033 &chip->pci->dev);
2034 if (err >= 0) {
2035 if (chip->dsp_microcode->size != YDSXG_DSPLENGTH) {
2036 dev_err(chip->card->dev,
2037 "DSP microcode has wrong size\n");
2038 err = -EINVAL;
2039 }
2040 }
2041 if (err < 0)
2042 return err;
2043 is_1e = chip->device_id == PCI_DEVICE_ID_YAMAHA_724F ||
2044 chip->device_id == PCI_DEVICE_ID_YAMAHA_740C ||
2045 chip->device_id == PCI_DEVICE_ID_YAMAHA_744 ||
2046 chip->device_id == PCI_DEVICE_ID_YAMAHA_754;
2047 name = is_1e ? "yamaha/ds1e_ctrl.fw" : "yamaha/ds1_ctrl.fw";
2048 err = request_firmware(&chip->controller_microcode, name,
2049 &chip->pci->dev);
2050 if (err >= 0) {
2051 if (chip->controller_microcode->size != YDSXG_CTRLLENGTH) {
2052 dev_err(chip->card->dev,
2053 "controller microcode has wrong size\n");
2054 err = -EINVAL;
2055 }
2056 }
2057 if (err < 0)
2058 return err;
2059 return 0;
2060}
2061
2062MODULE_FIRMWARE("yamaha/ds1_dsp.fw");
2063MODULE_FIRMWARE("yamaha/ds1_ctrl.fw");
2064MODULE_FIRMWARE("yamaha/ds1e_ctrl.fw");
2065
2066static void snd_ymfpci_download_image(struct snd_ymfpci *chip)
2067{
2068 int i;
2069 u16 ctrl;
2070 const __le32 *inst;
2071
2072 snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0x00000000);
2073 snd_ymfpci_disable_dsp(chip);
2074 snd_ymfpci_writel(chip, YDSXGR_MODE, 0x00010000);
2075 snd_ymfpci_writel(chip, YDSXGR_MODE, 0x00000000);
2076 snd_ymfpci_writel(chip, YDSXGR_MAPOFREC, 0x00000000);
2077 snd_ymfpci_writel(chip, YDSXGR_MAPOFEFFECT, 0x00000000);
2078 snd_ymfpci_writel(chip, YDSXGR_PLAYCTRLBASE, 0x00000000);
2079 snd_ymfpci_writel(chip, YDSXGR_RECCTRLBASE, 0x00000000);
2080 snd_ymfpci_writel(chip, YDSXGR_EFFCTRLBASE, 0x00000000);
2081 ctrl = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL);
2082 snd_ymfpci_writew(chip, YDSXGR_GLOBALCTRL, ctrl & ~0x0007);
2083
2084 /* setup DSP instruction code */
2085 inst = (const __le32 *)chip->dsp_microcode->data;
2086 for (i = 0; i < YDSXG_DSPLENGTH / 4; i++)
2087 snd_ymfpci_writel(chip, YDSXGR_DSPINSTRAM + (i << 2),
2088 le32_to_cpu(inst[i]));
2089
2090 /* setup control instruction code */
2091 inst = (const __le32 *)chip->controller_microcode->data;
2092 for (i = 0; i < YDSXG_CTRLLENGTH / 4; i++)
2093 snd_ymfpci_writel(chip, YDSXGR_CTRLINSTRAM + (i << 2),
2094 le32_to_cpu(inst[i]));
2095
2096 snd_ymfpci_enable_dsp(chip);
2097}
2098
2099static int snd_ymfpci_memalloc(struct snd_ymfpci *chip)
2100{
2101 long size, playback_ctrl_size;
2102 int voice, bank, reg;
2103 u8 *ptr;
2104 dma_addr_t ptr_addr;
2105
2106 playback_ctrl_size = 4 + 4 * YDSXG_PLAYBACK_VOICES;
2107 chip->bank_size_playback = snd_ymfpci_readl(chip, YDSXGR_PLAYCTRLSIZE) << 2;
2108 chip->bank_size_capture = snd_ymfpci_readl(chip, YDSXGR_RECCTRLSIZE) << 2;
2109 chip->bank_size_effect = snd_ymfpci_readl(chip, YDSXGR_EFFCTRLSIZE) << 2;
2110 chip->work_size = YDSXG_DEFAULT_WORK_SIZE;
2111
2112 size = ALIGN(playback_ctrl_size, 0x100) +
2113 ALIGN(chip->bank_size_playback * 2 * YDSXG_PLAYBACK_VOICES, 0x100) +
2114 ALIGN(chip->bank_size_capture * 2 * YDSXG_CAPTURE_VOICES, 0x100) +
2115 ALIGN(chip->bank_size_effect * 2 * YDSXG_EFFECT_VOICES, 0x100) +
2116 chip->work_size;
2117 /* work_ptr must be aligned to 256 bytes, but it's already
2118 covered with the kernel page allocation mechanism */
2119 chip->work_ptr = snd_devm_alloc_pages(&chip->pci->dev,
2120 SNDRV_DMA_TYPE_DEV, size);
2121 if (!chip->work_ptr)
2122 return -ENOMEM;
2123 ptr = chip->work_ptr->area;
2124 ptr_addr = chip->work_ptr->addr;
2125 memset(ptr, 0, size); /* for sure */
2126
2127 chip->bank_base_playback = ptr;
2128 chip->bank_base_playback_addr = ptr_addr;
2129 chip->ctrl_playback = (__le32 *)ptr;
2130 chip->ctrl_playback[0] = cpu_to_le32(YDSXG_PLAYBACK_VOICES);
2131 ptr += ALIGN(playback_ctrl_size, 0x100);
2132 ptr_addr += ALIGN(playback_ctrl_size, 0x100);
2133 for (voice = 0; voice < YDSXG_PLAYBACK_VOICES; voice++) {
2134 chip->voices[voice].number = voice;
2135 chip->voices[voice].bank = (struct snd_ymfpci_playback_bank *)ptr;
2136 chip->voices[voice].bank_addr = ptr_addr;
2137 for (bank = 0; bank < 2; bank++) {
2138 chip->bank_playback[voice][bank] = (struct snd_ymfpci_playback_bank *)ptr;
2139 ptr += chip->bank_size_playback;
2140 ptr_addr += chip->bank_size_playback;
2141 }
2142 }
2143 ptr = (char *)ALIGN((unsigned long)ptr, 0x100);
2144 ptr_addr = ALIGN(ptr_addr, 0x100);
2145 chip->bank_base_capture = ptr;
2146 chip->bank_base_capture_addr = ptr_addr;
2147 for (voice = 0; voice < YDSXG_CAPTURE_VOICES; voice++)
2148 for (bank = 0; bank < 2; bank++) {
2149 chip->bank_capture[voice][bank] = (struct snd_ymfpci_capture_bank *)ptr;
2150 ptr += chip->bank_size_capture;
2151 ptr_addr += chip->bank_size_capture;
2152 }
2153 ptr = (char *)ALIGN((unsigned long)ptr, 0x100);
2154 ptr_addr = ALIGN(ptr_addr, 0x100);
2155 chip->bank_base_effect = ptr;
2156 chip->bank_base_effect_addr = ptr_addr;
2157 for (voice = 0; voice < YDSXG_EFFECT_VOICES; voice++)
2158 for (bank = 0; bank < 2; bank++) {
2159 chip->bank_effect[voice][bank] = (struct snd_ymfpci_effect_bank *)ptr;
2160 ptr += chip->bank_size_effect;
2161 ptr_addr += chip->bank_size_effect;
2162 }
2163 ptr = (char *)ALIGN((unsigned long)ptr, 0x100);
2164 ptr_addr = ALIGN(ptr_addr, 0x100);
2165 chip->work_base = ptr;
2166 chip->work_base_addr = ptr_addr;
2167
2168 snd_BUG_ON(ptr + chip->work_size !=
2169 chip->work_ptr->area + chip->work_ptr->bytes);
2170
2171 snd_ymfpci_writel(chip, YDSXGR_PLAYCTRLBASE, chip->bank_base_playback_addr);
2172 snd_ymfpci_writel(chip, YDSXGR_RECCTRLBASE, chip->bank_base_capture_addr);
2173 snd_ymfpci_writel(chip, YDSXGR_EFFCTRLBASE, chip->bank_base_effect_addr);
2174 snd_ymfpci_writel(chip, YDSXGR_WORKBASE, chip->work_base_addr);
2175 snd_ymfpci_writel(chip, YDSXGR_WORKSIZE, chip->work_size >> 2);
2176
2177 /* S/PDIF output initialization */
2178 chip->spdif_bits = chip->spdif_pcm_bits = SNDRV_PCM_DEFAULT_CON_SPDIF & 0xffff;
2179 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTCTRL, 0);
2180 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_bits);
2181
2182 /* S/PDIF input initialization */
2183 snd_ymfpci_writew(chip, YDSXGR_SPDIFINCTRL, 0);
2184
2185 /* digital mixer setup */
2186 for (reg = 0x80; reg < 0xc0; reg += 4)
2187 snd_ymfpci_writel(chip, reg, 0);
2188 snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0x3fff3fff);
2189 snd_ymfpci_writel(chip, YDSXGR_BUF441OUTVOL, 0x3fff3fff);
2190 snd_ymfpci_writel(chip, YDSXGR_ZVOUTVOL, 0x3fff3fff);
2191 snd_ymfpci_writel(chip, YDSXGR_SPDIFOUTVOL, 0x3fff3fff);
2192 snd_ymfpci_writel(chip, YDSXGR_NATIVEADCINVOL, 0x3fff3fff);
2193 snd_ymfpci_writel(chip, YDSXGR_NATIVEDACINVOL, 0x3fff3fff);
2194 snd_ymfpci_writel(chip, YDSXGR_PRIADCLOOPVOL, 0x3fff3fff);
2195 snd_ymfpci_writel(chip, YDSXGR_LEGACYOUTVOL, 0x3fff3fff);
2196
2197 return 0;
2198}
2199
2200static void snd_ymfpci_free(struct snd_card *card)
2201{
2202 struct snd_ymfpci *chip = card->private_data;
2203 u16 ctrl;
2204
2205 snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0);
2206 snd_ymfpci_writel(chip, YDSXGR_BUF441OUTVOL, 0);
2207 snd_ymfpci_writel(chip, YDSXGR_LEGACYOUTVOL, 0);
2208 snd_ymfpci_writel(chip, YDSXGR_STATUS, ~0);
2209 snd_ymfpci_disable_dsp(chip);
2210 snd_ymfpci_writel(chip, YDSXGR_PLAYCTRLBASE, 0);
2211 snd_ymfpci_writel(chip, YDSXGR_RECCTRLBASE, 0);
2212 snd_ymfpci_writel(chip, YDSXGR_EFFCTRLBASE, 0);
2213 snd_ymfpci_writel(chip, YDSXGR_WORKBASE, 0);
2214 snd_ymfpci_writel(chip, YDSXGR_WORKSIZE, 0);
2215 ctrl = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL);
2216 snd_ymfpci_writew(chip, YDSXGR_GLOBALCTRL, ctrl & ~0x0007);
2217
2218 snd_ymfpci_ac3_done(chip);
2219
2220 snd_ymfpci_free_gameport(chip);
2221
2222 pci_write_config_word(chip->pci, 0x40, chip->old_legacy_ctrl);
2223
2224 release_firmware(chip->dsp_microcode);
2225 release_firmware(chip->controller_microcode);
2226}
2227
2228#ifdef CONFIG_PM_SLEEP
2229static const int saved_regs_index[] = {
2230 /* spdif */
2231 YDSXGR_SPDIFOUTCTRL,
2232 YDSXGR_SPDIFOUTSTATUS,
2233 YDSXGR_SPDIFINCTRL,
2234 /* volumes */
2235 YDSXGR_PRIADCLOOPVOL,
2236 YDSXGR_NATIVEDACINVOL,
2237 YDSXGR_NATIVEDACOUTVOL,
2238 YDSXGR_BUF441OUTVOL,
2239 YDSXGR_NATIVEADCINVOL,
2240 YDSXGR_SPDIFLOOPVOL,
2241 YDSXGR_SPDIFOUTVOL,
2242 YDSXGR_ZVOUTVOL,
2243 YDSXGR_LEGACYOUTVOL,
2244 /* address bases */
2245 YDSXGR_PLAYCTRLBASE,
2246 YDSXGR_RECCTRLBASE,
2247 YDSXGR_EFFCTRLBASE,
2248 YDSXGR_WORKBASE,
2249 /* capture set up */
2250 YDSXGR_MAPOFREC,
2251 YDSXGR_RECFORMAT,
2252 YDSXGR_RECSLOTSR,
2253 YDSXGR_ADCFORMAT,
2254 YDSXGR_ADCSLOTSR,
2255};
2256#define YDSXGR_NUM_SAVED_REGS ARRAY_SIZE(saved_regs_index)
2257
2258static int snd_ymfpci_suspend(struct device *dev)
2259{
2260 struct snd_card *card = dev_get_drvdata(dev);
2261 struct snd_ymfpci *chip = card->private_data;
2262 unsigned int i;
2263
2264 snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
2265 snd_ac97_suspend(chip->ac97);
2266 for (i = 0; i < YDSXGR_NUM_SAVED_REGS; i++)
2267 chip->saved_regs[i] = snd_ymfpci_readl(chip, saved_regs_index[i]);
2268 chip->saved_ydsxgr_mode = snd_ymfpci_readl(chip, YDSXGR_MODE);
2269 pci_read_config_word(chip->pci, PCIR_DSXG_LEGACY,
2270 &chip->saved_dsxg_legacy);
2271 pci_read_config_word(chip->pci, PCIR_DSXG_ELEGACY,
2272 &chip->saved_dsxg_elegacy);
2273 snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0);
2274 snd_ymfpci_writel(chip, YDSXGR_BUF441OUTVOL, 0);
2275 snd_ymfpci_disable_dsp(chip);
2276 return 0;
2277}
2278
2279static int snd_ymfpci_resume(struct device *dev)
2280{
2281 struct pci_dev *pci = to_pci_dev(dev);
2282 struct snd_card *card = dev_get_drvdata(dev);
2283 struct snd_ymfpci *chip = card->private_data;
2284 unsigned int i;
2285
2286 snd_ymfpci_aclink_reset(pci);
2287 snd_ymfpci_codec_ready(chip, 0);
2288 snd_ymfpci_download_image(chip);
2289 udelay(100);
2290
2291 for (i = 0; i < YDSXGR_NUM_SAVED_REGS; i++)
2292 snd_ymfpci_writel(chip, saved_regs_index[i], chip->saved_regs[i]);
2293
2294 snd_ac97_resume(chip->ac97);
2295
2296 pci_write_config_word(chip->pci, PCIR_DSXG_LEGACY,
2297 chip->saved_dsxg_legacy);
2298 pci_write_config_word(chip->pci, PCIR_DSXG_ELEGACY,
2299 chip->saved_dsxg_elegacy);
2300
2301 /* start hw again */
2302 if (chip->start_count > 0) {
2303 spin_lock_irq(&chip->reg_lock);
2304 snd_ymfpci_writel(chip, YDSXGR_MODE, chip->saved_ydsxgr_mode);
2305 chip->active_bank = snd_ymfpci_readl(chip, YDSXGR_CTRLSELECT);
2306 spin_unlock_irq(&chip->reg_lock);
2307 }
2308 snd_power_change_state(card, SNDRV_CTL_POWER_D0);
2309 return 0;
2310}
2311
2312SIMPLE_DEV_PM_OPS(snd_ymfpci_pm, snd_ymfpci_suspend, snd_ymfpci_resume);
2313#endif /* CONFIG_PM_SLEEP */
2314
2315int snd_ymfpci_create(struct snd_card *card,
2316 struct pci_dev *pci,
2317 unsigned short old_legacy_ctrl)
2318{
2319 struct snd_ymfpci *chip = card->private_data;
2320 int err;
2321
2322 /* enable PCI device */
2323 err = pcim_enable_device(pci);
2324 if (err < 0)
2325 return err;
2326
2327 chip->old_legacy_ctrl = old_legacy_ctrl;
2328 spin_lock_init(&chip->reg_lock);
2329 spin_lock_init(&chip->voice_lock);
2330 init_waitqueue_head(&chip->interrupt_sleep);
2331 atomic_set(&chip->interrupt_sleep_count, 0);
2332 chip->card = card;
2333 chip->pci = pci;
2334 chip->irq = -1;
2335 chip->device_id = pci->device;
2336 chip->rev = pci->revision;
2337
2338 err = pci_request_regions(pci, "YMFPCI");
2339 if (err < 0)
2340 return err;
2341
2342 chip->reg_area_phys = pci_resource_start(pci, 0);
2343 chip->reg_area_virt = devm_ioremap(&pci->dev, chip->reg_area_phys, 0x8000);
2344 if (!chip->reg_area_virt) {
2345 dev_err(chip->card->dev,
2346 "unable to grab memory region 0x%lx-0x%lx\n",
2347 chip->reg_area_phys, chip->reg_area_phys + 0x8000 - 1);
2348 return -EBUSY;
2349 }
2350 pci_set_master(pci);
2351 chip->src441_used = -1;
2352
2353 if (devm_request_irq(&pci->dev, pci->irq, snd_ymfpci_interrupt, IRQF_SHARED,
2354 KBUILD_MODNAME, chip)) {
2355 dev_err(chip->card->dev, "unable to grab IRQ %d\n", pci->irq);
2356 return -EBUSY;
2357 }
2358 chip->irq = pci->irq;
2359 card->sync_irq = chip->irq;
2360 card->private_free = snd_ymfpci_free;
2361
2362 snd_ymfpci_aclink_reset(pci);
2363 if (snd_ymfpci_codec_ready(chip, 0) < 0)
2364 return -EIO;
2365
2366 err = snd_ymfpci_request_firmware(chip);
2367 if (err < 0) {
2368 dev_err(chip->card->dev, "firmware request failed: %d\n", err);
2369 return err;
2370 }
2371 snd_ymfpci_download_image(chip);
2372
2373 udelay(100); /* seems we need a delay after downloading image.. */
2374
2375 if (snd_ymfpci_memalloc(chip) < 0)
2376 return -EIO;
2377
2378 err = snd_ymfpci_ac3_init(chip);
2379 if (err < 0)
2380 return err;
2381
2382#ifdef CONFIG_PM_SLEEP
2383 chip->saved_regs = devm_kmalloc_array(&pci->dev, YDSXGR_NUM_SAVED_REGS,
2384 sizeof(u32), GFP_KERNEL);
2385 if (!chip->saved_regs)
2386 return -ENOMEM;
2387#endif
2388
2389 snd_ymfpci_proc_init(card, chip);
2390
2391 return 0;
2392}