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1/* SPDX-License-Identifier: GPL-2.0 */
2/* Copyright (c) 2018, Intel Corporation. */
3
4#ifndef _ICE_COMMON_H_
5#define _ICE_COMMON_H_
6
7#include <linux/bitfield.h>
8
9#include "ice_type.h"
10#include "ice_nvm.h"
11#include "ice_flex_pipe.h"
12#include <linux/avf/virtchnl.h>
13#include "ice_switch.h"
14#include "ice_fdir.h"
15
16#define ICE_SQ_SEND_DELAY_TIME_MS 10
17#define ICE_SQ_SEND_MAX_EXECUTE 3
18
19int ice_init_hw(struct ice_hw *hw);
20void ice_deinit_hw(struct ice_hw *hw);
21int ice_check_reset(struct ice_hw *hw);
22int ice_reset(struct ice_hw *hw, enum ice_reset_req req);
23int ice_create_all_ctrlq(struct ice_hw *hw);
24int ice_init_all_ctrlq(struct ice_hw *hw);
25void ice_shutdown_all_ctrlq(struct ice_hw *hw);
26void ice_destroy_all_ctrlq(struct ice_hw *hw);
27int
28ice_clean_rq_elem(struct ice_hw *hw, struct ice_ctl_q_info *cq,
29 struct ice_rq_event_info *e, u16 *pending);
30int
31ice_get_link_status(struct ice_port_info *pi, bool *link_up);
32int ice_update_link_info(struct ice_port_info *pi);
33int
34ice_acquire_res(struct ice_hw *hw, enum ice_aq_res_ids res,
35 enum ice_aq_res_access_type access, u32 timeout);
36void ice_release_res(struct ice_hw *hw, enum ice_aq_res_ids res);
37int
38ice_alloc_hw_res(struct ice_hw *hw, u16 type, u16 num, bool btm, u16 *res);
39int
40ice_free_hw_res(struct ice_hw *hw, u16 type, u16 num, u16 *res);
41int
42ice_aq_alloc_free_res(struct ice_hw *hw, u16 num_entries,
43 struct ice_aqc_alloc_free_res_elem *buf, u16 buf_size,
44 enum ice_adminq_opc opc, struct ice_sq_cd *cd);
45bool ice_is_sbq_supported(struct ice_hw *hw);
46struct ice_ctl_q_info *ice_get_sbq(struct ice_hw *hw);
47int
48ice_sq_send_cmd(struct ice_hw *hw, struct ice_ctl_q_info *cq,
49 struct ice_aq_desc *desc, void *buf, u16 buf_size,
50 struct ice_sq_cd *cd);
51void ice_clear_pxe_mode(struct ice_hw *hw);
52int ice_get_caps(struct ice_hw *hw);
53
54void ice_set_safe_mode_caps(struct ice_hw *hw);
55
56int
57ice_write_rxq_ctx(struct ice_hw *hw, struct ice_rlan_ctx *rlan_ctx,
58 u32 rxq_index);
59
60int
61ice_aq_get_rss_lut(struct ice_hw *hw, struct ice_aq_get_set_rss_lut_params *get_params);
62int
63ice_aq_set_rss_lut(struct ice_hw *hw, struct ice_aq_get_set_rss_lut_params *set_params);
64int
65ice_aq_get_rss_key(struct ice_hw *hw, u16 vsi_handle,
66 struct ice_aqc_get_set_rss_keys *keys);
67int
68ice_aq_set_rss_key(struct ice_hw *hw, u16 vsi_handle,
69 struct ice_aqc_get_set_rss_keys *keys);
70
71bool ice_check_sq_alive(struct ice_hw *hw, struct ice_ctl_q_info *cq);
72int ice_aq_q_shutdown(struct ice_hw *hw, bool unloading);
73void ice_fill_dflt_direct_cmd_desc(struct ice_aq_desc *desc, u16 opcode);
74extern const struct ice_ctx_ele ice_tlan_ctx_info[];
75int
76ice_set_ctx(struct ice_hw *hw, u8 *src_ctx, u8 *dest_ctx,
77 const struct ice_ctx_ele *ce_info);
78
79extern struct mutex ice_global_cfg_lock_sw;
80
81int
82ice_aq_send_cmd(struct ice_hw *hw, struct ice_aq_desc *desc,
83 void *buf, u16 buf_size, struct ice_sq_cd *cd);
84int ice_aq_get_fw_ver(struct ice_hw *hw, struct ice_sq_cd *cd);
85
86int
87ice_aq_send_driver_ver(struct ice_hw *hw, struct ice_driver_ver *dv,
88 struct ice_sq_cd *cd);
89int
90ice_aq_set_port_params(struct ice_port_info *pi, bool double_vlan,
91 struct ice_sq_cd *cd);
92int
93ice_aq_get_phy_caps(struct ice_port_info *pi, bool qual_mods, u8 report_mode,
94 struct ice_aqc_get_phy_caps_data *caps,
95 struct ice_sq_cd *cd);
96int
97ice_aq_list_caps(struct ice_hw *hw, void *buf, u16 buf_size, u32 *cap_count,
98 enum ice_adminq_opc opc, struct ice_sq_cd *cd);
99int
100ice_discover_dev_caps(struct ice_hw *hw, struct ice_hw_dev_caps *dev_caps);
101void
102ice_update_phy_type(u64 *phy_type_low, u64 *phy_type_high,
103 u16 link_speeds_bitmap);
104int
105ice_aq_manage_mac_write(struct ice_hw *hw, const u8 *mac_addr, u8 flags,
106 struct ice_sq_cd *cd);
107bool ice_is_e810(struct ice_hw *hw);
108int ice_clear_pf_cfg(struct ice_hw *hw);
109int
110ice_aq_set_phy_cfg(struct ice_hw *hw, struct ice_port_info *pi,
111 struct ice_aqc_set_phy_cfg_data *cfg, struct ice_sq_cd *cd);
112bool ice_fw_supports_link_override(struct ice_hw *hw);
113int
114ice_get_link_default_override(struct ice_link_default_override_tlv *ldo,
115 struct ice_port_info *pi);
116bool ice_is_phy_caps_an_enabled(struct ice_aqc_get_phy_caps_data *caps);
117
118enum ice_fc_mode ice_caps_to_fc_mode(u8 caps);
119enum ice_fec_mode ice_caps_to_fec_mode(u8 caps, u8 fec_options);
120int
121ice_set_fc(struct ice_port_info *pi, u8 *aq_failures,
122 bool ena_auto_link_update);
123int
124ice_cfg_phy_fc(struct ice_port_info *pi, struct ice_aqc_set_phy_cfg_data *cfg,
125 enum ice_fc_mode fc);
126bool
127ice_phy_caps_equals_cfg(struct ice_aqc_get_phy_caps_data *caps,
128 struct ice_aqc_set_phy_cfg_data *cfg);
129void
130ice_copy_phy_caps_to_cfg(struct ice_port_info *pi,
131 struct ice_aqc_get_phy_caps_data *caps,
132 struct ice_aqc_set_phy_cfg_data *cfg);
133int
134ice_cfg_phy_fec(struct ice_port_info *pi, struct ice_aqc_set_phy_cfg_data *cfg,
135 enum ice_fec_mode fec);
136int
137ice_aq_set_link_restart_an(struct ice_port_info *pi, bool ena_link,
138 struct ice_sq_cd *cd);
139int
140ice_aq_set_mac_cfg(struct ice_hw *hw, u16 max_frame_size, struct ice_sq_cd *cd);
141int
142ice_aq_get_link_info(struct ice_port_info *pi, bool ena_lse,
143 struct ice_link_status *link, struct ice_sq_cd *cd);
144int
145ice_aq_set_event_mask(struct ice_hw *hw, u8 port_num, u16 mask,
146 struct ice_sq_cd *cd);
147int
148ice_aq_set_mac_loopback(struct ice_hw *hw, bool ena_lpbk, struct ice_sq_cd *cd);
149
150int
151ice_aq_set_port_id_led(struct ice_port_info *pi, bool is_orig_mode,
152 struct ice_sq_cd *cd);
153int
154ice_aq_get_port_options(struct ice_hw *hw,
155 struct ice_aqc_get_port_options_elem *options,
156 u8 *option_count, u8 lport, bool lport_valid,
157 u8 *active_option_idx, bool *active_option_valid,
158 u8 *pending_option_idx, bool *pending_option_valid);
159int
160ice_aq_set_port_option(struct ice_hw *hw, u8 lport, u8 lport_valid,
161 u8 new_option);
162int
163ice_aq_sff_eeprom(struct ice_hw *hw, u16 lport, u8 bus_addr,
164 u16 mem_addr, u8 page, u8 set_page, u8 *data, u8 length,
165 bool write, struct ice_sq_cd *cd);
166u32 ice_get_link_speed(u16 index);
167
168int
169ice_cfg_vsi_rdma(struct ice_port_info *pi, u16 vsi_handle, u16 tc_bitmap,
170 u16 *max_rdmaqs);
171int
172ice_ena_vsi_rdma_qset(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
173 u16 *rdma_qset, u16 num_qsets, u32 *qset_teid);
174int
175ice_dis_vsi_rdma_qset(struct ice_port_info *pi, u16 count, u32 *qset_teid,
176 u16 *q_id);
177int
178ice_dis_vsi_txq(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u8 num_queues,
179 u16 *q_handle, u16 *q_ids, u32 *q_teids,
180 enum ice_disq_rst_src rst_src, u16 vmvf_num,
181 struct ice_sq_cd *cd);
182int
183ice_cfg_vsi_lan(struct ice_port_info *pi, u16 vsi_handle, u8 tc_bitmap,
184 u16 *max_lanqs);
185int
186ice_ena_vsi_txq(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u16 q_handle,
187 u8 num_qgrps, struct ice_aqc_add_tx_qgrp *buf, u16 buf_size,
188 struct ice_sq_cd *cd);
189int ice_replay_vsi(struct ice_hw *hw, u16 vsi_handle);
190void ice_replay_post(struct ice_hw *hw);
191void ice_output_fw_log(struct ice_hw *hw, struct ice_aq_desc *desc, void *buf);
192struct ice_q_ctx *
193ice_get_lan_q_ctx(struct ice_hw *hw, u16 vsi_handle, u8 tc, u16 q_handle);
194int ice_sbq_rw_reg(struct ice_hw *hw, struct ice_sbq_msg_input *in);
195void
196ice_stat_update40(struct ice_hw *hw, u32 reg, bool prev_stat_loaded,
197 u64 *prev_stat, u64 *cur_stat);
198void
199ice_stat_update32(struct ice_hw *hw, u32 reg, bool prev_stat_loaded,
200 u64 *prev_stat, u64 *cur_stat);
201bool ice_is_e810t(struct ice_hw *hw);
202int
203ice_sched_query_elem(struct ice_hw *hw, u32 node_teid,
204 struct ice_aqc_txsched_elem_data *buf);
205int
206ice_aq_set_driver_param(struct ice_hw *hw, enum ice_aqc_driver_params idx,
207 u32 value, struct ice_sq_cd *cd);
208int
209ice_aq_get_driver_param(struct ice_hw *hw, enum ice_aqc_driver_params idx,
210 u32 *value, struct ice_sq_cd *cd);
211int
212ice_aq_set_gpio(struct ice_hw *hw, u16 gpio_ctrl_handle, u8 pin_idx, bool value,
213 struct ice_sq_cd *cd);
214int
215ice_aq_get_gpio(struct ice_hw *hw, u16 gpio_ctrl_handle, u8 pin_idx,
216 bool *value, struct ice_sq_cd *cd);
217bool ice_is_100m_speed_supported(struct ice_hw *hw);
218int
219ice_aq_set_lldp_mib(struct ice_hw *hw, u8 mib_type, void *buf, u16 buf_size,
220 struct ice_sq_cd *cd);
221bool ice_fw_supports_lldp_fltr_ctrl(struct ice_hw *hw);
222int
223ice_lldp_fltr_add_remove(struct ice_hw *hw, u16 vsi_num, bool add);
224int
225ice_aq_read_i2c(struct ice_hw *hw, struct ice_aqc_link_topo_addr topo_addr,
226 u16 bus_addr, __le16 addr, u8 params, u8 *data,
227 struct ice_sq_cd *cd);
228int
229ice_aq_write_i2c(struct ice_hw *hw, struct ice_aqc_link_topo_addr topo_addr,
230 u16 bus_addr, __le16 addr, u8 params, u8 *data,
231 struct ice_sq_cd *cd);
232bool ice_fw_supports_report_dflt_cfg(struct ice_hw *hw);
233#endif /* _ICE_COMMON_H_ */