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1/*
2 * Copyright (C) 2002 - 2005 Benjamin Herrenschmidt <benh@kernel.crashing.org>
3 * Copyright (C) 2004 John Steele Scott <toojays@toojays.net>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 *
9 * TODO: Need a big cleanup here. Basically, we need to have different
10 * cpufreq_driver structures for the different type of HW instead of the
11 * current mess. We also need to better deal with the detection of the
12 * type of machine.
13 *
14 */
15
16#include <linux/module.h>
17#include <linux/types.h>
18#include <linux/errno.h>
19#include <linux/kernel.h>
20#include <linux/delay.h>
21#include <linux/sched.h>
22#include <linux/adb.h>
23#include <linux/pmu.h>
24#include <linux/cpufreq.h>
25#include <linux/init.h>
26#include <linux/device.h>
27#include <linux/hardirq.h>
28#include <linux/of_device.h>
29#include <asm/prom.h>
30#include <asm/machdep.h>
31#include <asm/irq.h>
32#include <asm/pmac_feature.h>
33#include <asm/mmu_context.h>
34#include <asm/sections.h>
35#include <asm/cputable.h>
36#include <asm/time.h>
37#include <asm/mpic.h>
38#include <asm/keylargo.h>
39#include <asm/switch_to.h>
40
41/* WARNING !!! This will cause calibrate_delay() to be called,
42 * but this is an __init function ! So you MUST go edit
43 * init/main.c to make it non-init before enabling DEBUG_FREQ
44 */
45#undef DEBUG_FREQ
46
47extern void low_choose_7447a_dfs(int dfs);
48extern void low_choose_750fx_pll(int pll);
49extern void low_sleep_handler(void);
50
51/*
52 * Currently, PowerMac cpufreq supports only high & low frequencies
53 * that are set by the firmware
54 */
55static unsigned int low_freq;
56static unsigned int hi_freq;
57static unsigned int cur_freq;
58static unsigned int sleep_freq;
59static unsigned long transition_latency;
60
61/*
62 * Different models uses different mechanisms to switch the frequency
63 */
64static int (*set_speed_proc)(int low_speed);
65static unsigned int (*get_speed_proc)(void);
66
67/*
68 * Some definitions used by the various speedprocs
69 */
70static u32 voltage_gpio;
71static u32 frequency_gpio;
72static u32 slew_done_gpio;
73static int no_schedule;
74static int has_cpu_l2lve;
75static int is_pmu_based;
76
77/* There are only two frequency states for each processor. Values
78 * are in kHz for the time being.
79 */
80#define CPUFREQ_HIGH 0
81#define CPUFREQ_LOW 1
82
83static struct cpufreq_frequency_table pmac_cpu_freqs[] = {
84 {0, CPUFREQ_HIGH, 0},
85 {0, CPUFREQ_LOW, 0},
86 {0, 0, CPUFREQ_TABLE_END},
87};
88
89static inline void local_delay(unsigned long ms)
90{
91 if (no_schedule)
92 mdelay(ms);
93 else
94 msleep(ms);
95}
96
97#ifdef DEBUG_FREQ
98static inline void debug_calc_bogomips(void)
99{
100 /* This will cause a recalc of bogomips and display the
101 * result. We backup/restore the value to avoid affecting the
102 * core cpufreq framework's own calculation.
103 */
104 unsigned long save_lpj = loops_per_jiffy;
105 calibrate_delay();
106 loops_per_jiffy = save_lpj;
107}
108#endif /* DEBUG_FREQ */
109
110/* Switch CPU speed under 750FX CPU control
111 */
112static int cpu_750fx_cpu_speed(int low_speed)
113{
114 u32 hid2;
115
116 if (low_speed == 0) {
117 /* ramping up, set voltage first */
118 pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x05);
119 /* Make sure we sleep for at least 1ms */
120 local_delay(10);
121
122 /* tweak L2 for high voltage */
123 if (has_cpu_l2lve) {
124 hid2 = mfspr(SPRN_HID2);
125 hid2 &= ~0x2000;
126 mtspr(SPRN_HID2, hid2);
127 }
128 }
129#ifdef CONFIG_6xx
130 low_choose_750fx_pll(low_speed);
131#endif
132 if (low_speed == 1) {
133 /* tweak L2 for low voltage */
134 if (has_cpu_l2lve) {
135 hid2 = mfspr(SPRN_HID2);
136 hid2 |= 0x2000;
137 mtspr(SPRN_HID2, hid2);
138 }
139
140 /* ramping down, set voltage last */
141 pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x04);
142 local_delay(10);
143 }
144
145 return 0;
146}
147
148static unsigned int cpu_750fx_get_cpu_speed(void)
149{
150 if (mfspr(SPRN_HID1) & HID1_PS)
151 return low_freq;
152 else
153 return hi_freq;
154}
155
156/* Switch CPU speed using DFS */
157static int dfs_set_cpu_speed(int low_speed)
158{
159 if (low_speed == 0) {
160 /* ramping up, set voltage first */
161 pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x05);
162 /* Make sure we sleep for at least 1ms */
163 local_delay(1);
164 }
165
166 /* set frequency */
167#ifdef CONFIG_6xx
168 low_choose_7447a_dfs(low_speed);
169#endif
170 udelay(100);
171
172 if (low_speed == 1) {
173 /* ramping down, set voltage last */
174 pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x04);
175 local_delay(1);
176 }
177
178 return 0;
179}
180
181static unsigned int dfs_get_cpu_speed(void)
182{
183 if (mfspr(SPRN_HID1) & HID1_DFS)
184 return low_freq;
185 else
186 return hi_freq;
187}
188
189
190/* Switch CPU speed using slewing GPIOs
191 */
192static int gpios_set_cpu_speed(int low_speed)
193{
194 int gpio, timeout = 0;
195
196 /* If ramping up, set voltage first */
197 if (low_speed == 0) {
198 pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x05);
199 /* Delay is way too big but it's ok, we schedule */
200 local_delay(10);
201 }
202
203 /* Set frequency */
204 gpio = pmac_call_feature(PMAC_FTR_READ_GPIO, NULL, frequency_gpio, 0);
205 if (low_speed == ((gpio & 0x01) == 0))
206 goto skip;
207
208 pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, frequency_gpio,
209 low_speed ? 0x04 : 0x05);
210 udelay(200);
211 do {
212 if (++timeout > 100)
213 break;
214 local_delay(1);
215 gpio = pmac_call_feature(PMAC_FTR_READ_GPIO, NULL, slew_done_gpio, 0);
216 } while((gpio & 0x02) == 0);
217 skip:
218 /* If ramping down, set voltage last */
219 if (low_speed == 1) {
220 pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x04);
221 /* Delay is way too big but it's ok, we schedule */
222 local_delay(10);
223 }
224
225#ifdef DEBUG_FREQ
226 debug_calc_bogomips();
227#endif
228
229 return 0;
230}
231
232/* Switch CPU speed under PMU control
233 */
234static int pmu_set_cpu_speed(int low_speed)
235{
236 struct adb_request req;
237 unsigned long save_l2cr;
238 unsigned long save_l3cr;
239 unsigned int pic_prio;
240 unsigned long flags;
241
242 preempt_disable();
243
244#ifdef DEBUG_FREQ
245 printk(KERN_DEBUG "HID1, before: %x\n", mfspr(SPRN_HID1));
246#endif
247 pmu_suspend();
248
249 /* Disable all interrupt sources on openpic */
250 pic_prio = mpic_cpu_get_priority();
251 mpic_cpu_set_priority(0xf);
252
253 /* Make sure the decrementer won't interrupt us */
254 asm volatile("mtdec %0" : : "r" (0x7fffffff));
255 /* Make sure any pending DEC interrupt occurring while we did
256 * the above didn't re-enable the DEC */
257 mb();
258 asm volatile("mtdec %0" : : "r" (0x7fffffff));
259
260 /* We can now disable MSR_EE */
261 local_irq_save(flags);
262
263 /* Giveup the FPU & vec */
264 enable_kernel_fp();
265
266#ifdef CONFIG_ALTIVEC
267 if (cpu_has_feature(CPU_FTR_ALTIVEC))
268 enable_kernel_altivec();
269#endif /* CONFIG_ALTIVEC */
270
271 /* Save & disable L2 and L3 caches */
272 save_l3cr = _get_L3CR(); /* (returns -1 if not available) */
273 save_l2cr = _get_L2CR(); /* (returns -1 if not available) */
274
275 /* Send the new speed command. My assumption is that this command
276 * will cause PLL_CFG[0..3] to be changed next time CPU goes to sleep
277 */
278 pmu_request(&req, NULL, 6, PMU_CPU_SPEED, 'W', 'O', 'O', 'F', low_speed);
279 while (!req.complete)
280 pmu_poll();
281
282 /* Prepare the northbridge for the speed transition */
283 pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,1,1);
284
285 /* Call low level code to backup CPU state and recover from
286 * hardware reset
287 */
288 low_sleep_handler();
289
290 /* Restore the northbridge */
291 pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,1,0);
292
293 /* Restore L2 cache */
294 if (save_l2cr != 0xffffffff && (save_l2cr & L2CR_L2E) != 0)
295 _set_L2CR(save_l2cr);
296 /* Restore L3 cache */
297 if (save_l3cr != 0xffffffff && (save_l3cr & L3CR_L3E) != 0)
298 _set_L3CR(save_l3cr);
299
300 /* Restore userland MMU context */
301 switch_mmu_context(NULL, current->active_mm);
302
303#ifdef DEBUG_FREQ
304 printk(KERN_DEBUG "HID1, after: %x\n", mfspr(SPRN_HID1));
305#endif
306
307 /* Restore low level PMU operations */
308 pmu_unlock();
309
310 /*
311 * Restore decrementer; we'll take a decrementer interrupt
312 * as soon as interrupts are re-enabled and the generic
313 * clockevents code will reprogram it with the right value.
314 */
315 set_dec(1);
316
317 /* Restore interrupts */
318 mpic_cpu_set_priority(pic_prio);
319
320 /* Let interrupts flow again ... */
321 local_irq_restore(flags);
322
323#ifdef DEBUG_FREQ
324 debug_calc_bogomips();
325#endif
326
327 pmu_resume();
328
329 preempt_enable();
330
331 return 0;
332}
333
334static int do_set_cpu_speed(struct cpufreq_policy *policy, int speed_mode)
335{
336 unsigned long l3cr;
337 static unsigned long prev_l3cr;
338
339 if (speed_mode == CPUFREQ_LOW &&
340 cpu_has_feature(CPU_FTR_L3CR)) {
341 l3cr = _get_L3CR();
342 if (l3cr & L3CR_L3E) {
343 prev_l3cr = l3cr;
344 _set_L3CR(0);
345 }
346 }
347 set_speed_proc(speed_mode == CPUFREQ_LOW);
348 if (speed_mode == CPUFREQ_HIGH &&
349 cpu_has_feature(CPU_FTR_L3CR)) {
350 l3cr = _get_L3CR();
351 if ((prev_l3cr & L3CR_L3E) && l3cr != prev_l3cr)
352 _set_L3CR(prev_l3cr);
353 }
354 cur_freq = (speed_mode == CPUFREQ_HIGH) ? hi_freq : low_freq;
355
356 return 0;
357}
358
359static unsigned int pmac_cpufreq_get_speed(unsigned int cpu)
360{
361 return cur_freq;
362}
363
364static int pmac_cpufreq_target( struct cpufreq_policy *policy,
365 unsigned int index)
366{
367 int rc;
368
369 rc = do_set_cpu_speed(policy, index);
370
371 ppc_proc_freq = cur_freq * 1000ul;
372 return rc;
373}
374
375static int pmac_cpufreq_cpu_init(struct cpufreq_policy *policy)
376{
377 return cpufreq_generic_init(policy, pmac_cpu_freqs, transition_latency);
378}
379
380static u32 read_gpio(struct device_node *np)
381{
382 const u32 *reg = of_get_property(np, "reg", NULL);
383 u32 offset;
384
385 if (reg == NULL)
386 return 0;
387 /* That works for all keylargos but shall be fixed properly
388 * some day... The problem is that it seems we can't rely
389 * on the "reg" property of the GPIO nodes, they are either
390 * relative to the base of KeyLargo or to the base of the
391 * GPIO space, and the device-tree doesn't help.
392 */
393 offset = *reg;
394 if (offset < KEYLARGO_GPIO_LEVELS0)
395 offset += KEYLARGO_GPIO_LEVELS0;
396 return offset;
397}
398
399static int pmac_cpufreq_suspend(struct cpufreq_policy *policy)
400{
401 /* Ok, this could be made a bit smarter, but let's be robust for now. We
402 * always force a speed change to high speed before sleep, to make sure
403 * we have appropriate voltage and/or bus speed for the wakeup process,
404 * and to make sure our loops_per_jiffies are "good enough", that is will
405 * not cause too short delays if we sleep in low speed and wake in high
406 * speed..
407 */
408 no_schedule = 1;
409 sleep_freq = cur_freq;
410 if (cur_freq == low_freq && !is_pmu_based)
411 do_set_cpu_speed(policy, CPUFREQ_HIGH);
412 return 0;
413}
414
415static int pmac_cpufreq_resume(struct cpufreq_policy *policy)
416{
417 /* If we resume, first check if we have a get() function */
418 if (get_speed_proc)
419 cur_freq = get_speed_proc();
420 else
421 cur_freq = 0;
422
423 /* We don't, hrm... we don't really know our speed here, best
424 * is that we force a switch to whatever it was, which is
425 * probably high speed due to our suspend() routine
426 */
427 do_set_cpu_speed(policy, sleep_freq == low_freq ?
428 CPUFREQ_LOW : CPUFREQ_HIGH);
429
430 ppc_proc_freq = cur_freq * 1000ul;
431
432 no_schedule = 0;
433 return 0;
434}
435
436static struct cpufreq_driver pmac_cpufreq_driver = {
437 .verify = cpufreq_generic_frequency_table_verify,
438 .target_index = pmac_cpufreq_target,
439 .get = pmac_cpufreq_get_speed,
440 .init = pmac_cpufreq_cpu_init,
441 .suspend = pmac_cpufreq_suspend,
442 .resume = pmac_cpufreq_resume,
443 .flags = CPUFREQ_PM_NO_WARN,
444 .attr = cpufreq_generic_attr,
445 .name = "powermac",
446};
447
448
449static int pmac_cpufreq_init_MacRISC3(struct device_node *cpunode)
450{
451 struct device_node *volt_gpio_np = of_find_node_by_name(NULL,
452 "voltage-gpio");
453 struct device_node *freq_gpio_np = of_find_node_by_name(NULL,
454 "frequency-gpio");
455 struct device_node *slew_done_gpio_np = of_find_node_by_name(NULL,
456 "slewing-done");
457 const u32 *value;
458
459 /*
460 * Check to see if it's GPIO driven or PMU only
461 *
462 * The way we extract the GPIO address is slightly hackish, but it
463 * works well enough for now. We need to abstract the whole GPIO
464 * stuff sooner or later anyway
465 */
466
467 if (volt_gpio_np)
468 voltage_gpio = read_gpio(volt_gpio_np);
469 if (freq_gpio_np)
470 frequency_gpio = read_gpio(freq_gpio_np);
471 if (slew_done_gpio_np)
472 slew_done_gpio = read_gpio(slew_done_gpio_np);
473
474 /* If we use the frequency GPIOs, calculate the min/max speeds based
475 * on the bus frequencies
476 */
477 if (frequency_gpio && slew_done_gpio) {
478 int lenp, rc;
479 const u32 *freqs, *ratio;
480
481 freqs = of_get_property(cpunode, "bus-frequencies", &lenp);
482 lenp /= sizeof(u32);
483 if (freqs == NULL || lenp != 2) {
484 printk(KERN_ERR "cpufreq: bus-frequencies incorrect or missing\n");
485 return 1;
486 }
487 ratio = of_get_property(cpunode, "processor-to-bus-ratio*2",
488 NULL);
489 if (ratio == NULL) {
490 printk(KERN_ERR "cpufreq: processor-to-bus-ratio*2 missing\n");
491 return 1;
492 }
493
494 /* Get the min/max bus frequencies */
495 low_freq = min(freqs[0], freqs[1]);
496 hi_freq = max(freqs[0], freqs[1]);
497
498 /* Grrrr.. It _seems_ that the device-tree is lying on the low bus
499 * frequency, it claims it to be around 84Mhz on some models while
500 * it appears to be approx. 101Mhz on all. Let's hack around here...
501 * fortunately, we don't need to be too precise
502 */
503 if (low_freq < 98000000)
504 low_freq = 101000000;
505
506 /* Convert those to CPU core clocks */
507 low_freq = (low_freq * (*ratio)) / 2000;
508 hi_freq = (hi_freq * (*ratio)) / 2000;
509
510 /* Now we get the frequencies, we read the GPIO to see what is out current
511 * speed
512 */
513 rc = pmac_call_feature(PMAC_FTR_READ_GPIO, NULL, frequency_gpio, 0);
514 cur_freq = (rc & 0x01) ? hi_freq : low_freq;
515
516 set_speed_proc = gpios_set_cpu_speed;
517 return 1;
518 }
519
520 /* If we use the PMU, look for the min & max frequencies in the
521 * device-tree
522 */
523 value = of_get_property(cpunode, "min-clock-frequency", NULL);
524 if (!value)
525 return 1;
526 low_freq = (*value) / 1000;
527 /* The PowerBook G4 12" (PowerBook6,1) has an error in the device-tree
528 * here */
529 if (low_freq < 100000)
530 low_freq *= 10;
531
532 value = of_get_property(cpunode, "max-clock-frequency", NULL);
533 if (!value)
534 return 1;
535 hi_freq = (*value) / 1000;
536 set_speed_proc = pmu_set_cpu_speed;
537 is_pmu_based = 1;
538
539 return 0;
540}
541
542static int pmac_cpufreq_init_7447A(struct device_node *cpunode)
543{
544 struct device_node *volt_gpio_np;
545
546 if (of_get_property(cpunode, "dynamic-power-step", NULL) == NULL)
547 return 1;
548
549 volt_gpio_np = of_find_node_by_name(NULL, "cpu-vcore-select");
550 if (volt_gpio_np)
551 voltage_gpio = read_gpio(volt_gpio_np);
552 if (!voltage_gpio){
553 printk(KERN_ERR "cpufreq: missing cpu-vcore-select gpio\n");
554 return 1;
555 }
556
557 /* OF only reports the high frequency */
558 hi_freq = cur_freq;
559 low_freq = cur_freq/2;
560
561 /* Read actual frequency from CPU */
562 cur_freq = dfs_get_cpu_speed();
563 set_speed_proc = dfs_set_cpu_speed;
564 get_speed_proc = dfs_get_cpu_speed;
565
566 return 0;
567}
568
569static int pmac_cpufreq_init_750FX(struct device_node *cpunode)
570{
571 struct device_node *volt_gpio_np;
572 u32 pvr;
573 const u32 *value;
574
575 if (of_get_property(cpunode, "dynamic-power-step", NULL) == NULL)
576 return 1;
577
578 hi_freq = cur_freq;
579 value = of_get_property(cpunode, "reduced-clock-frequency", NULL);
580 if (!value)
581 return 1;
582 low_freq = (*value) / 1000;
583
584 volt_gpio_np = of_find_node_by_name(NULL, "cpu-vcore-select");
585 if (volt_gpio_np)
586 voltage_gpio = read_gpio(volt_gpio_np);
587
588 pvr = mfspr(SPRN_PVR);
589 has_cpu_l2lve = !((pvr & 0xf00) == 0x100);
590
591 set_speed_proc = cpu_750fx_cpu_speed;
592 get_speed_proc = cpu_750fx_get_cpu_speed;
593 cur_freq = cpu_750fx_get_cpu_speed();
594
595 return 0;
596}
597
598/* Currently, we support the following machines:
599 *
600 * - Titanium PowerBook 1Ghz (PMU based, 667Mhz & 1Ghz)
601 * - Titanium PowerBook 800 (PMU based, 667Mhz & 800Mhz)
602 * - Titanium PowerBook 400 (PMU based, 300Mhz & 400Mhz)
603 * - Titanium PowerBook 500 (PMU based, 300Mhz & 500Mhz)
604 * - iBook2 500/600 (PMU based, 400Mhz & 500/600Mhz)
605 * - iBook2 700 (CPU based, 400Mhz & 700Mhz, support low voltage)
606 * - Recent MacRISC3 laptops
607 * - All new machines with 7447A CPUs
608 */
609static int __init pmac_cpufreq_setup(void)
610{
611 struct device_node *cpunode;
612 const u32 *value;
613
614 if (strstr(cmd_line, "nocpufreq"))
615 return 0;
616
617 /* Get first CPU node */
618 cpunode = of_cpu_device_node_get(0);
619 if (!cpunode)
620 goto out;
621
622 /* Get current cpu clock freq */
623 value = of_get_property(cpunode, "clock-frequency", NULL);
624 if (!value)
625 goto out;
626 cur_freq = (*value) / 1000;
627 transition_latency = CPUFREQ_ETERNAL;
628
629 /* Check for 7447A based MacRISC3 */
630 if (of_machine_is_compatible("MacRISC3") &&
631 of_get_property(cpunode, "dynamic-power-step", NULL) &&
632 PVR_VER(mfspr(SPRN_PVR)) == 0x8003) {
633 pmac_cpufreq_init_7447A(cpunode);
634 transition_latency = 8000000;
635 /* Check for other MacRISC3 machines */
636 } else if (of_machine_is_compatible("PowerBook3,4") ||
637 of_machine_is_compatible("PowerBook3,5") ||
638 of_machine_is_compatible("MacRISC3")) {
639 pmac_cpufreq_init_MacRISC3(cpunode);
640 /* Else check for iBook2 500/600 */
641 } else if (of_machine_is_compatible("PowerBook4,1")) {
642 hi_freq = cur_freq;
643 low_freq = 400000;
644 set_speed_proc = pmu_set_cpu_speed;
645 is_pmu_based = 1;
646 }
647 /* Else check for TiPb 550 */
648 else if (of_machine_is_compatible("PowerBook3,3") && cur_freq == 550000) {
649 hi_freq = cur_freq;
650 low_freq = 500000;
651 set_speed_proc = pmu_set_cpu_speed;
652 is_pmu_based = 1;
653 }
654 /* Else check for TiPb 400 & 500 */
655 else if (of_machine_is_compatible("PowerBook3,2")) {
656 /* We only know about the 400 MHz and the 500Mhz model
657 * they both have 300 MHz as low frequency
658 */
659 if (cur_freq < 350000 || cur_freq > 550000)
660 goto out;
661 hi_freq = cur_freq;
662 low_freq = 300000;
663 set_speed_proc = pmu_set_cpu_speed;
664 is_pmu_based = 1;
665 }
666 /* Else check for 750FX */
667 else if (PVR_VER(mfspr(SPRN_PVR)) == 0x7000)
668 pmac_cpufreq_init_750FX(cpunode);
669out:
670 of_node_put(cpunode);
671 if (set_speed_proc == NULL)
672 return -ENODEV;
673
674 pmac_cpu_freqs[CPUFREQ_LOW].frequency = low_freq;
675 pmac_cpu_freqs[CPUFREQ_HIGH].frequency = hi_freq;
676 ppc_proc_freq = cur_freq * 1000ul;
677
678 printk(KERN_INFO "Registering PowerMac CPU frequency driver\n");
679 printk(KERN_INFO "Low: %d Mhz, High: %d Mhz, Boot: %d Mhz\n",
680 low_freq/1000, hi_freq/1000, cur_freq/1000);
681
682 return cpufreq_register_driver(&pmac_cpufreq_driver);
683}
684
685module_init(pmac_cpufreq_setup);
686
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Copyright (C) 2002 - 2005 Benjamin Herrenschmidt <benh@kernel.crashing.org>
4 * Copyright (C) 2004 John Steele Scott <toojays@toojays.net>
5 *
6 * TODO: Need a big cleanup here. Basically, we need to have different
7 * cpufreq_driver structures for the different type of HW instead of the
8 * current mess. We also need to better deal with the detection of the
9 * type of machine.
10 */
11
12#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
13
14#include <linux/module.h>
15#include <linux/types.h>
16#include <linux/errno.h>
17#include <linux/kernel.h>
18#include <linux/delay.h>
19#include <linux/sched.h>
20#include <linux/adb.h>
21#include <linux/pmu.h>
22#include <linux/cpufreq.h>
23#include <linux/init.h>
24#include <linux/device.h>
25#include <linux/hardirq.h>
26#include <linux/of_device.h>
27
28#include <asm/machdep.h>
29#include <asm/irq.h>
30#include <asm/pmac_feature.h>
31#include <asm/mmu_context.h>
32#include <asm/sections.h>
33#include <asm/cputable.h>
34#include <asm/time.h>
35#include <asm/mpic.h>
36#include <asm/keylargo.h>
37#include <asm/switch_to.h>
38
39/* WARNING !!! This will cause calibrate_delay() to be called,
40 * but this is an __init function ! So you MUST go edit
41 * init/main.c to make it non-init before enabling DEBUG_FREQ
42 */
43#undef DEBUG_FREQ
44
45extern void low_choose_7447a_dfs(int dfs);
46extern void low_choose_750fx_pll(int pll);
47extern void low_sleep_handler(void);
48
49/*
50 * Currently, PowerMac cpufreq supports only high & low frequencies
51 * that are set by the firmware
52 */
53static unsigned int low_freq;
54static unsigned int hi_freq;
55static unsigned int cur_freq;
56static unsigned int sleep_freq;
57static unsigned long transition_latency;
58
59/*
60 * Different models uses different mechanisms to switch the frequency
61 */
62static int (*set_speed_proc)(int low_speed);
63static unsigned int (*get_speed_proc)(void);
64
65/*
66 * Some definitions used by the various speedprocs
67 */
68static u32 voltage_gpio;
69static u32 frequency_gpio;
70static u32 slew_done_gpio;
71static int no_schedule;
72static int has_cpu_l2lve;
73static int is_pmu_based;
74
75/* There are only two frequency states for each processor. Values
76 * are in kHz for the time being.
77 */
78#define CPUFREQ_HIGH 0
79#define CPUFREQ_LOW 1
80
81static struct cpufreq_frequency_table pmac_cpu_freqs[] = {
82 {0, CPUFREQ_HIGH, 0},
83 {0, CPUFREQ_LOW, 0},
84 {0, 0, CPUFREQ_TABLE_END},
85};
86
87static inline void local_delay(unsigned long ms)
88{
89 if (no_schedule)
90 mdelay(ms);
91 else
92 msleep(ms);
93}
94
95#ifdef DEBUG_FREQ
96static inline void debug_calc_bogomips(void)
97{
98 /* This will cause a recalc of bogomips and display the
99 * result. We backup/restore the value to avoid affecting the
100 * core cpufreq framework's own calculation.
101 */
102 unsigned long save_lpj = loops_per_jiffy;
103 calibrate_delay();
104 loops_per_jiffy = save_lpj;
105}
106#endif /* DEBUG_FREQ */
107
108/* Switch CPU speed under 750FX CPU control
109 */
110static int cpu_750fx_cpu_speed(int low_speed)
111{
112 u32 hid2;
113
114 if (low_speed == 0) {
115 /* ramping up, set voltage first */
116 pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x05);
117 /* Make sure we sleep for at least 1ms */
118 local_delay(10);
119
120 /* tweak L2 for high voltage */
121 if (has_cpu_l2lve) {
122 hid2 = mfspr(SPRN_HID2);
123 hid2 &= ~0x2000;
124 mtspr(SPRN_HID2, hid2);
125 }
126 }
127#ifdef CONFIG_PPC_BOOK3S_32
128 low_choose_750fx_pll(low_speed);
129#endif
130 if (low_speed == 1) {
131 /* tweak L2 for low voltage */
132 if (has_cpu_l2lve) {
133 hid2 = mfspr(SPRN_HID2);
134 hid2 |= 0x2000;
135 mtspr(SPRN_HID2, hid2);
136 }
137
138 /* ramping down, set voltage last */
139 pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x04);
140 local_delay(10);
141 }
142
143 return 0;
144}
145
146static unsigned int cpu_750fx_get_cpu_speed(void)
147{
148 if (mfspr(SPRN_HID1) & HID1_PS)
149 return low_freq;
150 else
151 return hi_freq;
152}
153
154/* Switch CPU speed using DFS */
155static int dfs_set_cpu_speed(int low_speed)
156{
157 if (low_speed == 0) {
158 /* ramping up, set voltage first */
159 pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x05);
160 /* Make sure we sleep for at least 1ms */
161 local_delay(1);
162 }
163
164 /* set frequency */
165#ifdef CONFIG_PPC_BOOK3S_32
166 low_choose_7447a_dfs(low_speed);
167#endif
168 udelay(100);
169
170 if (low_speed == 1) {
171 /* ramping down, set voltage last */
172 pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x04);
173 local_delay(1);
174 }
175
176 return 0;
177}
178
179static unsigned int dfs_get_cpu_speed(void)
180{
181 if (mfspr(SPRN_HID1) & HID1_DFS)
182 return low_freq;
183 else
184 return hi_freq;
185}
186
187
188/* Switch CPU speed using slewing GPIOs
189 */
190static int gpios_set_cpu_speed(int low_speed)
191{
192 int gpio, timeout = 0;
193
194 /* If ramping up, set voltage first */
195 if (low_speed == 0) {
196 pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x05);
197 /* Delay is way too big but it's ok, we schedule */
198 local_delay(10);
199 }
200
201 /* Set frequency */
202 gpio = pmac_call_feature(PMAC_FTR_READ_GPIO, NULL, frequency_gpio, 0);
203 if (low_speed == ((gpio & 0x01) == 0))
204 goto skip;
205
206 pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, frequency_gpio,
207 low_speed ? 0x04 : 0x05);
208 udelay(200);
209 do {
210 if (++timeout > 100)
211 break;
212 local_delay(1);
213 gpio = pmac_call_feature(PMAC_FTR_READ_GPIO, NULL, slew_done_gpio, 0);
214 } while((gpio & 0x02) == 0);
215 skip:
216 /* If ramping down, set voltage last */
217 if (low_speed == 1) {
218 pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x04);
219 /* Delay is way too big but it's ok, we schedule */
220 local_delay(10);
221 }
222
223#ifdef DEBUG_FREQ
224 debug_calc_bogomips();
225#endif
226
227 return 0;
228}
229
230/* Switch CPU speed under PMU control
231 */
232static int pmu_set_cpu_speed(int low_speed)
233{
234 struct adb_request req;
235 unsigned long save_l2cr;
236 unsigned long save_l3cr;
237 unsigned int pic_prio;
238 unsigned long flags;
239
240 preempt_disable();
241
242#ifdef DEBUG_FREQ
243 printk(KERN_DEBUG "HID1, before: %x\n", mfspr(SPRN_HID1));
244#endif
245 pmu_suspend();
246
247 /* Disable all interrupt sources on openpic */
248 pic_prio = mpic_cpu_get_priority();
249 mpic_cpu_set_priority(0xf);
250
251 /* Make sure the decrementer won't interrupt us */
252 asm volatile("mtdec %0" : : "r" (0x7fffffff));
253 /* Make sure any pending DEC interrupt occurring while we did
254 * the above didn't re-enable the DEC */
255 mb();
256 asm volatile("mtdec %0" : : "r" (0x7fffffff));
257
258 /* We can now disable MSR_EE */
259 local_irq_save(flags);
260
261 /* Giveup the FPU & vec */
262 enable_kernel_fp();
263
264#ifdef CONFIG_ALTIVEC
265 if (cpu_has_feature(CPU_FTR_ALTIVEC))
266 enable_kernel_altivec();
267#endif /* CONFIG_ALTIVEC */
268
269 /* Save & disable L2 and L3 caches */
270 save_l3cr = _get_L3CR(); /* (returns -1 if not available) */
271 save_l2cr = _get_L2CR(); /* (returns -1 if not available) */
272
273 /* Send the new speed command. My assumption is that this command
274 * will cause PLL_CFG[0..3] to be changed next time CPU goes to sleep
275 */
276 pmu_request(&req, NULL, 6, PMU_CPU_SPEED, 'W', 'O', 'O', 'F', low_speed);
277 while (!req.complete)
278 pmu_poll();
279
280 /* Prepare the northbridge for the speed transition */
281 pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,1,1);
282
283 /* Call low level code to backup CPU state and recover from
284 * hardware reset
285 */
286 low_sleep_handler();
287
288 /* Restore the northbridge */
289 pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,1,0);
290
291 /* Restore L2 cache */
292 if (save_l2cr != 0xffffffff && (save_l2cr & L2CR_L2E) != 0)
293 _set_L2CR(save_l2cr);
294 /* Restore L3 cache */
295 if (save_l3cr != 0xffffffff && (save_l3cr & L3CR_L3E) != 0)
296 _set_L3CR(save_l3cr);
297
298 /* Restore userland MMU context */
299 switch_mmu_context(NULL, current->active_mm, NULL);
300
301#ifdef DEBUG_FREQ
302 printk(KERN_DEBUG "HID1, after: %x\n", mfspr(SPRN_HID1));
303#endif
304
305 /* Restore low level PMU operations */
306 pmu_unlock();
307
308 /*
309 * Restore decrementer; we'll take a decrementer interrupt
310 * as soon as interrupts are re-enabled and the generic
311 * clockevents code will reprogram it with the right value.
312 */
313 set_dec(1);
314
315 /* Restore interrupts */
316 mpic_cpu_set_priority(pic_prio);
317
318 /* Let interrupts flow again ... */
319 local_irq_restore(flags);
320
321#ifdef DEBUG_FREQ
322 debug_calc_bogomips();
323#endif
324
325 pmu_resume();
326
327 preempt_enable();
328
329 return 0;
330}
331
332static int do_set_cpu_speed(struct cpufreq_policy *policy, int speed_mode)
333{
334 unsigned long l3cr;
335 static unsigned long prev_l3cr;
336
337 if (speed_mode == CPUFREQ_LOW &&
338 cpu_has_feature(CPU_FTR_L3CR)) {
339 l3cr = _get_L3CR();
340 if (l3cr & L3CR_L3E) {
341 prev_l3cr = l3cr;
342 _set_L3CR(0);
343 }
344 }
345 set_speed_proc(speed_mode == CPUFREQ_LOW);
346 if (speed_mode == CPUFREQ_HIGH &&
347 cpu_has_feature(CPU_FTR_L3CR)) {
348 l3cr = _get_L3CR();
349 if ((prev_l3cr & L3CR_L3E) && l3cr != prev_l3cr)
350 _set_L3CR(prev_l3cr);
351 }
352 cur_freq = (speed_mode == CPUFREQ_HIGH) ? hi_freq : low_freq;
353
354 return 0;
355}
356
357static unsigned int pmac_cpufreq_get_speed(unsigned int cpu)
358{
359 return cur_freq;
360}
361
362static int pmac_cpufreq_target( struct cpufreq_policy *policy,
363 unsigned int index)
364{
365 int rc;
366
367 rc = do_set_cpu_speed(policy, index);
368
369 ppc_proc_freq = cur_freq * 1000ul;
370 return rc;
371}
372
373static int pmac_cpufreq_cpu_init(struct cpufreq_policy *policy)
374{
375 cpufreq_generic_init(policy, pmac_cpu_freqs, transition_latency);
376 return 0;
377}
378
379static u32 read_gpio(struct device_node *np)
380{
381 const u32 *reg = of_get_property(np, "reg", NULL);
382 u32 offset;
383
384 if (reg == NULL)
385 return 0;
386 /* That works for all keylargos but shall be fixed properly
387 * some day... The problem is that it seems we can't rely
388 * on the "reg" property of the GPIO nodes, they are either
389 * relative to the base of KeyLargo or to the base of the
390 * GPIO space, and the device-tree doesn't help.
391 */
392 offset = *reg;
393 if (offset < KEYLARGO_GPIO_LEVELS0)
394 offset += KEYLARGO_GPIO_LEVELS0;
395 return offset;
396}
397
398static int pmac_cpufreq_suspend(struct cpufreq_policy *policy)
399{
400 /* Ok, this could be made a bit smarter, but let's be robust for now. We
401 * always force a speed change to high speed before sleep, to make sure
402 * we have appropriate voltage and/or bus speed for the wakeup process,
403 * and to make sure our loops_per_jiffies are "good enough", that is will
404 * not cause too short delays if we sleep in low speed and wake in high
405 * speed..
406 */
407 no_schedule = 1;
408 sleep_freq = cur_freq;
409 if (cur_freq == low_freq && !is_pmu_based)
410 do_set_cpu_speed(policy, CPUFREQ_HIGH);
411 return 0;
412}
413
414static int pmac_cpufreq_resume(struct cpufreq_policy *policy)
415{
416 /* If we resume, first check if we have a get() function */
417 if (get_speed_proc)
418 cur_freq = get_speed_proc();
419 else
420 cur_freq = 0;
421
422 /* We don't, hrm... we don't really know our speed here, best
423 * is that we force a switch to whatever it was, which is
424 * probably high speed due to our suspend() routine
425 */
426 do_set_cpu_speed(policy, sleep_freq == low_freq ?
427 CPUFREQ_LOW : CPUFREQ_HIGH);
428
429 ppc_proc_freq = cur_freq * 1000ul;
430
431 no_schedule = 0;
432 return 0;
433}
434
435static struct cpufreq_driver pmac_cpufreq_driver = {
436 .verify = cpufreq_generic_frequency_table_verify,
437 .target_index = pmac_cpufreq_target,
438 .get = pmac_cpufreq_get_speed,
439 .init = pmac_cpufreq_cpu_init,
440 .suspend = pmac_cpufreq_suspend,
441 .resume = pmac_cpufreq_resume,
442 .flags = CPUFREQ_NO_AUTO_DYNAMIC_SWITCHING,
443 .attr = cpufreq_generic_attr,
444 .name = "powermac",
445};
446
447
448static int pmac_cpufreq_init_MacRISC3(struct device_node *cpunode)
449{
450 struct device_node *volt_gpio_np = of_find_node_by_name(NULL,
451 "voltage-gpio");
452 struct device_node *freq_gpio_np = of_find_node_by_name(NULL,
453 "frequency-gpio");
454 struct device_node *slew_done_gpio_np = of_find_node_by_name(NULL,
455 "slewing-done");
456 const u32 *value;
457
458 /*
459 * Check to see if it's GPIO driven or PMU only
460 *
461 * The way we extract the GPIO address is slightly hackish, but it
462 * works well enough for now. We need to abstract the whole GPIO
463 * stuff sooner or later anyway
464 */
465
466 if (volt_gpio_np)
467 voltage_gpio = read_gpio(volt_gpio_np);
468 if (freq_gpio_np)
469 frequency_gpio = read_gpio(freq_gpio_np);
470 if (slew_done_gpio_np)
471 slew_done_gpio = read_gpio(slew_done_gpio_np);
472
473 of_node_put(volt_gpio_np);
474 of_node_put(freq_gpio_np);
475 of_node_put(slew_done_gpio_np);
476
477 /* If we use the frequency GPIOs, calculate the min/max speeds based
478 * on the bus frequencies
479 */
480 if (frequency_gpio && slew_done_gpio) {
481 int lenp, rc;
482 const u32 *freqs, *ratio;
483
484 freqs = of_get_property(cpunode, "bus-frequencies", &lenp);
485 lenp /= sizeof(u32);
486 if (freqs == NULL || lenp != 2) {
487 pr_err("bus-frequencies incorrect or missing\n");
488 return 1;
489 }
490 ratio = of_get_property(cpunode, "processor-to-bus-ratio*2",
491 NULL);
492 if (ratio == NULL) {
493 pr_err("processor-to-bus-ratio*2 missing\n");
494 return 1;
495 }
496
497 /* Get the min/max bus frequencies */
498 low_freq = min(freqs[0], freqs[1]);
499 hi_freq = max(freqs[0], freqs[1]);
500
501 /* Grrrr.. It _seems_ that the device-tree is lying on the low bus
502 * frequency, it claims it to be around 84Mhz on some models while
503 * it appears to be approx. 101Mhz on all. Let's hack around here...
504 * fortunately, we don't need to be too precise
505 */
506 if (low_freq < 98000000)
507 low_freq = 101000000;
508
509 /* Convert those to CPU core clocks */
510 low_freq = (low_freq * (*ratio)) / 2000;
511 hi_freq = (hi_freq * (*ratio)) / 2000;
512
513 /* Now we get the frequencies, we read the GPIO to see what is out current
514 * speed
515 */
516 rc = pmac_call_feature(PMAC_FTR_READ_GPIO, NULL, frequency_gpio, 0);
517 cur_freq = (rc & 0x01) ? hi_freq : low_freq;
518
519 set_speed_proc = gpios_set_cpu_speed;
520 return 1;
521 }
522
523 /* If we use the PMU, look for the min & max frequencies in the
524 * device-tree
525 */
526 value = of_get_property(cpunode, "min-clock-frequency", NULL);
527 if (!value)
528 return 1;
529 low_freq = (*value) / 1000;
530 /* The PowerBook G4 12" (PowerBook6,1) has an error in the device-tree
531 * here */
532 if (low_freq < 100000)
533 low_freq *= 10;
534
535 value = of_get_property(cpunode, "max-clock-frequency", NULL);
536 if (!value)
537 return 1;
538 hi_freq = (*value) / 1000;
539 set_speed_proc = pmu_set_cpu_speed;
540 is_pmu_based = 1;
541
542 return 0;
543}
544
545static int pmac_cpufreq_init_7447A(struct device_node *cpunode)
546{
547 struct device_node *volt_gpio_np;
548
549 if (of_get_property(cpunode, "dynamic-power-step", NULL) == NULL)
550 return 1;
551
552 volt_gpio_np = of_find_node_by_name(NULL, "cpu-vcore-select");
553 if (volt_gpio_np)
554 voltage_gpio = read_gpio(volt_gpio_np);
555 of_node_put(volt_gpio_np);
556 if (!voltage_gpio){
557 pr_err("missing cpu-vcore-select gpio\n");
558 return 1;
559 }
560
561 /* OF only reports the high frequency */
562 hi_freq = cur_freq;
563 low_freq = cur_freq/2;
564
565 /* Read actual frequency from CPU */
566 cur_freq = dfs_get_cpu_speed();
567 set_speed_proc = dfs_set_cpu_speed;
568 get_speed_proc = dfs_get_cpu_speed;
569
570 return 0;
571}
572
573static int pmac_cpufreq_init_750FX(struct device_node *cpunode)
574{
575 struct device_node *volt_gpio_np;
576 u32 pvr;
577 const u32 *value;
578
579 if (of_get_property(cpunode, "dynamic-power-step", NULL) == NULL)
580 return 1;
581
582 hi_freq = cur_freq;
583 value = of_get_property(cpunode, "reduced-clock-frequency", NULL);
584 if (!value)
585 return 1;
586 low_freq = (*value) / 1000;
587
588 volt_gpio_np = of_find_node_by_name(NULL, "cpu-vcore-select");
589 if (volt_gpio_np)
590 voltage_gpio = read_gpio(volt_gpio_np);
591
592 of_node_put(volt_gpio_np);
593 pvr = mfspr(SPRN_PVR);
594 has_cpu_l2lve = !((pvr & 0xf00) == 0x100);
595
596 set_speed_proc = cpu_750fx_cpu_speed;
597 get_speed_proc = cpu_750fx_get_cpu_speed;
598 cur_freq = cpu_750fx_get_cpu_speed();
599
600 return 0;
601}
602
603/* Currently, we support the following machines:
604 *
605 * - Titanium PowerBook 1Ghz (PMU based, 667Mhz & 1Ghz)
606 * - Titanium PowerBook 800 (PMU based, 667Mhz & 800Mhz)
607 * - Titanium PowerBook 400 (PMU based, 300Mhz & 400Mhz)
608 * - Titanium PowerBook 500 (PMU based, 300Mhz & 500Mhz)
609 * - iBook2 500/600 (PMU based, 400Mhz & 500/600Mhz)
610 * - iBook2 700 (CPU based, 400Mhz & 700Mhz, support low voltage)
611 * - Recent MacRISC3 laptops
612 * - All new machines with 7447A CPUs
613 */
614static int __init pmac_cpufreq_setup(void)
615{
616 struct device_node *cpunode;
617 const u32 *value;
618
619 if (strstr(boot_command_line, "nocpufreq"))
620 return 0;
621
622 /* Get first CPU node */
623 cpunode = of_cpu_device_node_get(0);
624 if (!cpunode)
625 goto out;
626
627 /* Get current cpu clock freq */
628 value = of_get_property(cpunode, "clock-frequency", NULL);
629 if (!value)
630 goto out;
631 cur_freq = (*value) / 1000;
632
633 /* Check for 7447A based MacRISC3 */
634 if (of_machine_is_compatible("MacRISC3") &&
635 of_get_property(cpunode, "dynamic-power-step", NULL) &&
636 PVR_VER(mfspr(SPRN_PVR)) == 0x8003) {
637 pmac_cpufreq_init_7447A(cpunode);
638
639 /* Allow dynamic switching */
640 transition_latency = 8000000;
641 pmac_cpufreq_driver.flags &= ~CPUFREQ_NO_AUTO_DYNAMIC_SWITCHING;
642 /* Check for other MacRISC3 machines */
643 } else if (of_machine_is_compatible("PowerBook3,4") ||
644 of_machine_is_compatible("PowerBook3,5") ||
645 of_machine_is_compatible("MacRISC3")) {
646 pmac_cpufreq_init_MacRISC3(cpunode);
647 /* Else check for iBook2 500/600 */
648 } else if (of_machine_is_compatible("PowerBook4,1")) {
649 hi_freq = cur_freq;
650 low_freq = 400000;
651 set_speed_proc = pmu_set_cpu_speed;
652 is_pmu_based = 1;
653 }
654 /* Else check for TiPb 550 */
655 else if (of_machine_is_compatible("PowerBook3,3") && cur_freq == 550000) {
656 hi_freq = cur_freq;
657 low_freq = 500000;
658 set_speed_proc = pmu_set_cpu_speed;
659 is_pmu_based = 1;
660 }
661 /* Else check for TiPb 400 & 500 */
662 else if (of_machine_is_compatible("PowerBook3,2")) {
663 /* We only know about the 400 MHz and the 500Mhz model
664 * they both have 300 MHz as low frequency
665 */
666 if (cur_freq < 350000 || cur_freq > 550000)
667 goto out;
668 hi_freq = cur_freq;
669 low_freq = 300000;
670 set_speed_proc = pmu_set_cpu_speed;
671 is_pmu_based = 1;
672 }
673 /* Else check for 750FX */
674 else if (PVR_VER(mfspr(SPRN_PVR)) == 0x7000)
675 pmac_cpufreq_init_750FX(cpunode);
676out:
677 of_node_put(cpunode);
678 if (set_speed_proc == NULL)
679 return -ENODEV;
680
681 pmac_cpu_freqs[CPUFREQ_LOW].frequency = low_freq;
682 pmac_cpu_freqs[CPUFREQ_HIGH].frequency = hi_freq;
683 ppc_proc_freq = cur_freq * 1000ul;
684
685 pr_info("Registering PowerMac CPU frequency driver\n");
686 pr_info("Low: %d Mhz, High: %d Mhz, Boot: %d Mhz\n",
687 low_freq/1000, hi_freq/1000, cur_freq/1000);
688
689 return cpufreq_register_driver(&pmac_cpufreq_driver);
690}
691
692module_init(pmac_cpufreq_setup);
693