1/*
  2 * irq_comm.c: Common API for in kernel interrupt controller
  3 * Copyright (c) 2007, Intel Corporation.
  4 *
  5 * This program is free software; you can redistribute it and/or modify it
  6 * under the terms and conditions of the GNU General Public License,
  7 * version 2, as published by the Free Software Foundation.
  8 *
  9 * This program is distributed in the hope it will be useful, but WITHOUT
 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 11 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
 12 * more details.
 13 *
 14 * You should have received a copy of the GNU General Public License along with
 15 * this program; if not, write to the Free Software Foundation, Inc., 59 Temple
 16 * Place - Suite 330, Boston, MA 02111-1307 USA.
 17 * Authors:
 18 *   Yaozu (Eddie) Dong <Eddie.dong@intel.com>
 19 *
 20 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
 21 */
 22
 23#include <linux/kvm_host.h>
 24#include <linux/slab.h>
 25#include <linux/export.h>
 26#include <trace/events/kvm.h>
 27
 28#include <asm/msidef.h>
 29#ifdef CONFIG_IA64
 30#include <asm/iosapic.h>
 31#endif
 32
 33#include "irq.h"
 34
 35#include "ioapic.h"
 36
 37static int kvm_set_pic_irq(struct kvm_kernel_irq_routing_entry *e,
 38			   struct kvm *kvm, int irq_source_id, int level,
 39			   bool line_status)
 40{
 41#ifdef CONFIG_X86
 42	struct kvm_pic *pic = pic_irqchip(kvm);
 43	return kvm_pic_set_irq(pic, e->irqchip.pin, irq_source_id, level);
 44#else
 45	return -1;
 46#endif
 47}
 48
 49static int kvm_set_ioapic_irq(struct kvm_kernel_irq_routing_entry *e,
 50			      struct kvm *kvm, int irq_source_id, int level,
 51			      bool line_status)
 52{
 53	struct kvm_ioapic *ioapic = kvm->arch.vioapic;
 54	return kvm_ioapic_set_irq(ioapic, e->irqchip.pin, irq_source_id, level,
 55				line_status);
 56}
 57
 58inline static bool kvm_is_dm_lowest_prio(struct kvm_lapic_irq *irq)
 59{
 60#ifdef CONFIG_IA64
 61	return irq->delivery_mode ==
 62		(IOSAPIC_LOWEST_PRIORITY << IOSAPIC_DELIVERY_SHIFT);
 63#else
 64	return irq->delivery_mode == APIC_DM_LOWEST;
 65#endif
 66}
 67
 68int kvm_irq_delivery_to_apic(struct kvm *kvm, struct kvm_lapic *src,
 69		struct kvm_lapic_irq *irq, unsigned long *dest_map)
 70{
 71	int i, r = -1;
 72	struct kvm_vcpu *vcpu, *lowest = NULL;
 73
 74	if (irq->dest_mode == 0 && irq->dest_id == 0xff &&
 75			kvm_is_dm_lowest_prio(irq)) {
 76		printk(KERN_INFO "kvm: apic: phys broadcast and lowest prio\n");
 77		irq->delivery_mode = APIC_DM_FIXED;
 78	}
 79
 80	if (kvm_irq_delivery_to_apic_fast(kvm, src, irq, &r, dest_map))
 81		return r;
 82
 83	kvm_for_each_vcpu(i, vcpu, kvm) {
 84		if (!kvm_apic_present(vcpu))
 85			continue;
 86
 87		if (!kvm_apic_match_dest(vcpu, src, irq->shorthand,
 88					irq->dest_id, irq->dest_mode))
 89			continue;
 90
 91		if (!kvm_is_dm_lowest_prio(irq)) {
 92			if (r < 0)
 93				r = 0;
 94			r += kvm_apic_set_irq(vcpu, irq, dest_map);
 95		} else if (kvm_lapic_enabled(vcpu)) {
 96			if (!lowest)
 97				lowest = vcpu;
 98			else if (kvm_apic_compare_prio(vcpu, lowest) < 0)
 99				lowest = vcpu;
100		}
101	}
102
103	if (lowest)
104		r = kvm_apic_set_irq(lowest, irq, dest_map);
105
106	return r;
107}
108
109static inline void kvm_set_msi_irq(struct kvm_kernel_irq_routing_entry *e,
110				   struct kvm_lapic_irq *irq)
111{
112	trace_kvm_msi_set_irq(e->msi.address_lo, e->msi.data);
113
114	irq->dest_id = (e->msi.address_lo &
115			MSI_ADDR_DEST_ID_MASK) >> MSI_ADDR_DEST_ID_SHIFT;
116	irq->vector = (e->msi.data &
117			MSI_DATA_VECTOR_MASK) >> MSI_DATA_VECTOR_SHIFT;
118	irq->dest_mode = (1 << MSI_ADDR_DEST_MODE_SHIFT) & e->msi.address_lo;
119	irq->trig_mode = (1 << MSI_DATA_TRIGGER_SHIFT) & e->msi.data;
120	irq->delivery_mode = e->msi.data & 0x700;
121	irq->level = 1;
122	irq->shorthand = 0;
123	/* TODO Deal with RH bit of MSI message address */
124}
125
126int kvm_set_msi(struct kvm_kernel_irq_routing_entry *e,
127		struct kvm *kvm, int irq_source_id, int level, bool line_status)
128{
129	struct kvm_lapic_irq irq;
130
131	if (!level)
132		return -1;
133
134	kvm_set_msi_irq(e, &irq);
135
136	return kvm_irq_delivery_to_apic(kvm, NULL, &irq, NULL);
137}
138
139
140static int kvm_set_msi_inatomic(struct kvm_kernel_irq_routing_entry *e,
141			 struct kvm *kvm)
142{
143	struct kvm_lapic_irq irq;
144	int r;
145
146	kvm_set_msi_irq(e, &irq);
147
148	if (kvm_irq_delivery_to_apic_fast(kvm, NULL, &irq, &r, NULL))
149		return r;
150	else
151		return -EWOULDBLOCK;
152}
153
154/*
155 * Deliver an IRQ in an atomic context if we can, or return a failure,
156 * user can retry in a process context.
157 * Return value:
158 *  -EWOULDBLOCK - Can't deliver in atomic context: retry in a process context.
159 *  Other values - No need to retry.
160 */
161int kvm_set_irq_inatomic(struct kvm *kvm, int irq_source_id, u32 irq, int level)
162{
163	struct kvm_kernel_irq_routing_entry *e;
164	int ret = -EINVAL;
165	struct kvm_irq_routing_table *irq_rt;
166
167	trace_kvm_set_irq(irq, level, irq_source_id);
168
169	/*
170	 * Injection into either PIC or IOAPIC might need to scan all CPUs,
171	 * which would need to be retried from thread context;  when same GSI
172	 * is connected to both PIC and IOAPIC, we'd have to report a
173	 * partial failure here.
174	 * Since there's no easy way to do this, we only support injecting MSI
175	 * which is limited to 1:1 GSI mapping.
176	 */
177	rcu_read_lock();
178	irq_rt = rcu_dereference(kvm->irq_routing);
179	if (irq < irq_rt->nr_rt_entries)
180		hlist_for_each_entry(e, &irq_rt->map[irq], link) {
181			if (likely(e->type == KVM_IRQ_ROUTING_MSI))
182				ret = kvm_set_msi_inatomic(e, kvm);
183			else
184				ret = -EWOULDBLOCK;
185			break;
186		}
187	rcu_read_unlock();
188	return ret;
189}
190
191int kvm_request_irq_source_id(struct kvm *kvm)
192{
193	unsigned long *bitmap = &kvm->arch.irq_sources_bitmap;
194	int irq_source_id;
195
196	mutex_lock(&kvm->irq_lock);
197	irq_source_id = find_first_zero_bit(bitmap, BITS_PER_LONG);
198
199	if (irq_source_id >= BITS_PER_LONG) {
200		printk(KERN_WARNING "kvm: exhaust allocatable IRQ sources!\n");
201		irq_source_id = -EFAULT;
202		goto unlock;
203	}
204
205	ASSERT(irq_source_id != KVM_USERSPACE_IRQ_SOURCE_ID);
206#ifdef CONFIG_X86
207	ASSERT(irq_source_id != KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID);
208#endif
209	set_bit(irq_source_id, bitmap);
210unlock:
211	mutex_unlock(&kvm->irq_lock);
212
213	return irq_source_id;
214}
215
216void kvm_free_irq_source_id(struct kvm *kvm, int irq_source_id)
217{
218	ASSERT(irq_source_id != KVM_USERSPACE_IRQ_SOURCE_ID);
219#ifdef CONFIG_X86
220	ASSERT(irq_source_id != KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID);
221#endif
222
223	mutex_lock(&kvm->irq_lock);
224	if (irq_source_id < 0 ||
225	    irq_source_id >= BITS_PER_LONG) {
226		printk(KERN_ERR "kvm: IRQ source ID out of range!\n");
227		goto unlock;
228	}
229	clear_bit(irq_source_id, &kvm->arch.irq_sources_bitmap);
230	if (!irqchip_in_kernel(kvm))
231		goto unlock;
232
233	kvm_ioapic_clear_all(kvm->arch.vioapic, irq_source_id);
234#ifdef CONFIG_X86
235	kvm_pic_clear_all(pic_irqchip(kvm), irq_source_id);
236#endif
237unlock:
238	mutex_unlock(&kvm->irq_lock);
239}
240
241void kvm_register_irq_mask_notifier(struct kvm *kvm, int irq,
242				    struct kvm_irq_mask_notifier *kimn)
243{
244	mutex_lock(&kvm->irq_lock);
245	kimn->irq = irq;
246	hlist_add_head_rcu(&kimn->link, &kvm->mask_notifier_list);
247	mutex_unlock(&kvm->irq_lock);
248}
249
250void kvm_unregister_irq_mask_notifier(struct kvm *kvm, int irq,
251				      struct kvm_irq_mask_notifier *kimn)
252{
253	mutex_lock(&kvm->irq_lock);
254	hlist_del_rcu(&kimn->link);
255	mutex_unlock(&kvm->irq_lock);
256	synchronize_rcu();
257}
258
259void kvm_fire_mask_notifiers(struct kvm *kvm, unsigned irqchip, unsigned pin,
260			     bool mask)
261{
262	struct kvm_irq_mask_notifier *kimn;
263	int gsi;
264
265	rcu_read_lock();
266	gsi = rcu_dereference(kvm->irq_routing)->chip[irqchip][pin];
267	if (gsi != -1)
268		hlist_for_each_entry_rcu(kimn, &kvm->mask_notifier_list, link)
269			if (kimn->irq == gsi)
270				kimn->func(kimn, mask);
271	rcu_read_unlock();
272}
273
274int kvm_set_routing_entry(struct kvm_irq_routing_table *rt,
275			  struct kvm_kernel_irq_routing_entry *e,
276			  const struct kvm_irq_routing_entry *ue)
277{
278	int r = -EINVAL;
279	int delta;
280	unsigned max_pin;
281
282	switch (ue->type) {
283	case KVM_IRQ_ROUTING_IRQCHIP:
284		delta = 0;
285		switch (ue->u.irqchip.irqchip) {
286		case KVM_IRQCHIP_PIC_MASTER:
287			e->set = kvm_set_pic_irq;
288			max_pin = PIC_NUM_PINS;
289			break;
290		case KVM_IRQCHIP_PIC_SLAVE:
291			e->set = kvm_set_pic_irq;
292			max_pin = PIC_NUM_PINS;
293			delta = 8;
294			break;
295		case KVM_IRQCHIP_IOAPIC:
296			max_pin = KVM_IOAPIC_NUM_PINS;
297			e->set = kvm_set_ioapic_irq;
298			break;
299		default:
300			goto out;
301		}
302		e->irqchip.irqchip = ue->u.irqchip.irqchip;
303		e->irqchip.pin = ue->u.irqchip.pin + delta;
304		if (e->irqchip.pin >= max_pin)
305			goto out;
306		rt->chip[ue->u.irqchip.irqchip][e->irqchip.pin] = ue->gsi;
307		break;
308	case KVM_IRQ_ROUTING_MSI:
309		e->set = kvm_set_msi;
310		e->msi.address_lo = ue->u.msi.address_lo;
311		e->msi.address_hi = ue->u.msi.address_hi;
312		e->msi.data = ue->u.msi.data;
313		break;
314	default:
315		goto out;
316	}
317
318	r = 0;
319out:
320	return r;
321}
322
323#define IOAPIC_ROUTING_ENTRY(irq) \
324	{ .gsi = irq, .type = KVM_IRQ_ROUTING_IRQCHIP,	\
325	  .u.irqchip.irqchip = KVM_IRQCHIP_IOAPIC, .u.irqchip.pin = (irq) }
326#define ROUTING_ENTRY1(irq) IOAPIC_ROUTING_ENTRY(irq)
327
328#ifdef CONFIG_X86
329#  define PIC_ROUTING_ENTRY(irq) \
330	{ .gsi = irq, .type = KVM_IRQ_ROUTING_IRQCHIP,	\
331	  .u.irqchip.irqchip = SELECT_PIC(irq), .u.irqchip.pin = (irq) % 8 }
332#  define ROUTING_ENTRY2(irq) \
333	IOAPIC_ROUTING_ENTRY(irq), PIC_ROUTING_ENTRY(irq)
334#else
335#  define ROUTING_ENTRY2(irq) \
336	IOAPIC_ROUTING_ENTRY(irq)
337#endif
338
339static const struct kvm_irq_routing_entry default_routing[] = {
340	ROUTING_ENTRY2(0), ROUTING_ENTRY2(1),
341	ROUTING_ENTRY2(2), ROUTING_ENTRY2(3),
342	ROUTING_ENTRY2(4), ROUTING_ENTRY2(5),
343	ROUTING_ENTRY2(6), ROUTING_ENTRY2(7),
344	ROUTING_ENTRY2(8), ROUTING_ENTRY2(9),
345	ROUTING_ENTRY2(10), ROUTING_ENTRY2(11),
346	ROUTING_ENTRY2(12), ROUTING_ENTRY2(13),
347	ROUTING_ENTRY2(14), ROUTING_ENTRY2(15),
348	ROUTING_ENTRY1(16), ROUTING_ENTRY1(17),
349	ROUTING_ENTRY1(18), ROUTING_ENTRY1(19),
350	ROUTING_ENTRY1(20), ROUTING_ENTRY1(21),
351	ROUTING_ENTRY1(22), ROUTING_ENTRY1(23),
352#ifdef CONFIG_IA64
353	ROUTING_ENTRY1(24), ROUTING_ENTRY1(25),
354	ROUTING_ENTRY1(26), ROUTING_ENTRY1(27),
355	ROUTING_ENTRY1(28), ROUTING_ENTRY1(29),
356	ROUTING_ENTRY1(30), ROUTING_ENTRY1(31),
357	ROUTING_ENTRY1(32), ROUTING_ENTRY1(33),
358	ROUTING_ENTRY1(34), ROUTING_ENTRY1(35),
359	ROUTING_ENTRY1(36), ROUTING_ENTRY1(37),
360	ROUTING_ENTRY1(38), ROUTING_ENTRY1(39),
361	ROUTING_ENTRY1(40), ROUTING_ENTRY1(41),
362	ROUTING_ENTRY1(42), ROUTING_ENTRY1(43),
363	ROUTING_ENTRY1(44), ROUTING_ENTRY1(45),
364	ROUTING_ENTRY1(46), ROUTING_ENTRY1(47),
365#endif
366};
367
368int kvm_setup_default_irq_routing(struct kvm *kvm)
369{
370	return kvm_set_irq_routing(kvm, default_routing,
371				   ARRAY_SIZE(default_routing), 0);
372}