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1/*
2 * Universal Interface for Intel High Definition Audio Codec
3 *
4 * HD audio interface patch for SigmaTel STAC92xx
5 *
6 * Copyright (c) 2005 Embedded Alley Solutions, Inc.
7 * Matt Porter <mporter@embeddedalley.com>
8 *
9 * Based on patch_cmedia.c and patch_realtek.c
10 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
11 *
12 * This driver is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This driver is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 */
26
27#include <linux/init.h>
28#include <linux/delay.h>
29#include <linux/slab.h>
30#include <linux/pci.h>
31#include <linux/dmi.h>
32#include <linux/module.h>
33#include <sound/core.h>
34#include <sound/jack.h>
35#include <sound/tlv.h>
36#include "hda_codec.h"
37#include "hda_local.h"
38#include "hda_auto_parser.h"
39#include "hda_beep.h"
40#include "hda_jack.h"
41#include "hda_generic.h"
42
43enum {
44 STAC_VREF_EVENT = 8,
45 STAC_PWR_EVENT,
46};
47
48enum {
49 STAC_REF,
50 STAC_9200_OQO,
51 STAC_9200_DELL_D21,
52 STAC_9200_DELL_D22,
53 STAC_9200_DELL_D23,
54 STAC_9200_DELL_M21,
55 STAC_9200_DELL_M22,
56 STAC_9200_DELL_M23,
57 STAC_9200_DELL_M24,
58 STAC_9200_DELL_M25,
59 STAC_9200_DELL_M26,
60 STAC_9200_DELL_M27,
61 STAC_9200_M4,
62 STAC_9200_M4_2,
63 STAC_9200_PANASONIC,
64 STAC_9200_EAPD_INIT,
65 STAC_9200_MODELS
66};
67
68enum {
69 STAC_9205_REF,
70 STAC_9205_DELL_M42,
71 STAC_9205_DELL_M43,
72 STAC_9205_DELL_M44,
73 STAC_9205_EAPD,
74 STAC_9205_MODELS
75};
76
77enum {
78 STAC_92HD73XX_NO_JD, /* no jack-detection */
79 STAC_92HD73XX_REF,
80 STAC_92HD73XX_INTEL,
81 STAC_DELL_M6_AMIC,
82 STAC_DELL_M6_DMIC,
83 STAC_DELL_M6_BOTH,
84 STAC_DELL_EQ,
85 STAC_ALIENWARE_M17X,
86 STAC_92HD89XX_HP_FRONT_JACK,
87 STAC_92HD73XX_MODELS
88};
89
90enum {
91 STAC_92HD83XXX_REF,
92 STAC_92HD83XXX_PWR_REF,
93 STAC_DELL_S14,
94 STAC_DELL_VOSTRO_3500,
95 STAC_92HD83XXX_HP_cNB11_INTQUAD,
96 STAC_HP_DV7_4000,
97 STAC_HP_ZEPHYR,
98 STAC_92HD83XXX_HP_LED,
99 STAC_92HD83XXX_HP_INV_LED,
100 STAC_92HD83XXX_HP_MIC_LED,
101 STAC_HP_LED_GPIO10,
102 STAC_92HD83XXX_HEADSET_JACK,
103 STAC_92HD83XXX_HP,
104 STAC_HP_ENVY_BASS,
105 STAC_HP_BNB13_EQ,
106 STAC_92HD83XXX_MODELS
107};
108
109enum {
110 STAC_92HD71BXX_REF,
111 STAC_DELL_M4_1,
112 STAC_DELL_M4_2,
113 STAC_DELL_M4_3,
114 STAC_HP_M4,
115 STAC_HP_DV4,
116 STAC_HP_DV5,
117 STAC_HP_HDX,
118 STAC_92HD71BXX_HP,
119 STAC_92HD71BXX_NO_DMIC,
120 STAC_92HD71BXX_NO_SMUX,
121 STAC_92HD71BXX_MODELS
122};
123
124enum {
125 STAC_925x_REF,
126 STAC_M1,
127 STAC_M1_2,
128 STAC_M2,
129 STAC_M2_2,
130 STAC_M3,
131 STAC_M5,
132 STAC_M6,
133 STAC_925x_MODELS
134};
135
136enum {
137 STAC_D945_REF,
138 STAC_D945GTP3,
139 STAC_D945GTP5,
140 STAC_INTEL_MAC_V1,
141 STAC_INTEL_MAC_V2,
142 STAC_INTEL_MAC_V3,
143 STAC_INTEL_MAC_V4,
144 STAC_INTEL_MAC_V5,
145 STAC_INTEL_MAC_AUTO,
146 STAC_ECS_202,
147 STAC_922X_DELL_D81,
148 STAC_922X_DELL_D82,
149 STAC_922X_DELL_M81,
150 STAC_922X_DELL_M82,
151 STAC_922X_INTEL_MAC_GPIO,
152 STAC_922X_MODELS
153};
154
155enum {
156 STAC_D965_REF_NO_JD, /* no jack-detection */
157 STAC_D965_REF,
158 STAC_D965_3ST,
159 STAC_D965_5ST,
160 STAC_D965_5ST_NO_FP,
161 STAC_D965_VERBS,
162 STAC_DELL_3ST,
163 STAC_DELL_BIOS,
164 STAC_DELL_BIOS_AMIC,
165 STAC_DELL_BIOS_SPDIF,
166 STAC_927X_DELL_DMIC,
167 STAC_927X_VOLKNOB,
168 STAC_927X_MODELS
169};
170
171enum {
172 STAC_9872_VAIO,
173 STAC_9872_MODELS
174};
175
176struct sigmatel_spec {
177 struct hda_gen_spec gen;
178
179 unsigned int eapd_switch: 1;
180 unsigned int linear_tone_beep:1;
181 unsigned int headset_jack:1; /* 4-pin headset jack (hp + mono mic) */
182 unsigned int volknob_init:1; /* special volume-knob initialization */
183 unsigned int powerdown_adcs:1;
184 unsigned int have_spdif_mux:1;
185
186 /* gpio lines */
187 unsigned int eapd_mask;
188 unsigned int gpio_mask;
189 unsigned int gpio_dir;
190 unsigned int gpio_data;
191 unsigned int gpio_mute;
192 unsigned int gpio_led;
193 unsigned int gpio_led_polarity;
194 unsigned int vref_mute_led_nid; /* pin NID for mute-LED vref control */
195 unsigned int vref_led;
196 int default_polarity;
197
198 unsigned int mic_mute_led_gpio; /* capture mute LED GPIO */
199 unsigned int mic_enabled; /* current mic mute state (bitmask) */
200
201 /* stream */
202 unsigned int stream_delay;
203
204 /* analog loopback */
205 const struct snd_kcontrol_new *aloopback_ctl;
206 unsigned int aloopback;
207 unsigned char aloopback_mask;
208 unsigned char aloopback_shift;
209
210 /* power management */
211 unsigned int power_map_bits;
212 unsigned int num_pwrs;
213 const hda_nid_t *pwr_nids;
214 unsigned int active_adcs;
215
216 /* beep widgets */
217 hda_nid_t anabeep_nid;
218
219 /* SPDIF-out mux */
220 const char * const *spdif_labels;
221 struct hda_input_mux spdif_mux;
222 unsigned int cur_smux[2];
223};
224
225#define AC_VERB_IDT_SET_POWER_MAP 0x7ec
226#define AC_VERB_IDT_GET_POWER_MAP 0xfec
227
228static const hda_nid_t stac92hd73xx_pwr_nids[8] = {
229 0x0a, 0x0b, 0x0c, 0xd, 0x0e,
230 0x0f, 0x10, 0x11
231};
232
233static const hda_nid_t stac92hd83xxx_pwr_nids[7] = {
234 0x0a, 0x0b, 0x0c, 0xd, 0x0e,
235 0x0f, 0x10
236};
237
238static const hda_nid_t stac92hd71bxx_pwr_nids[3] = {
239 0x0a, 0x0d, 0x0f
240};
241
242
243/*
244 * PCM hooks
245 */
246static void stac_playback_pcm_hook(struct hda_pcm_stream *hinfo,
247 struct hda_codec *codec,
248 struct snd_pcm_substream *substream,
249 int action)
250{
251 struct sigmatel_spec *spec = codec->spec;
252 if (action == HDA_GEN_PCM_ACT_OPEN && spec->stream_delay)
253 msleep(spec->stream_delay);
254}
255
256static void stac_capture_pcm_hook(struct hda_pcm_stream *hinfo,
257 struct hda_codec *codec,
258 struct snd_pcm_substream *substream,
259 int action)
260{
261 struct sigmatel_spec *spec = codec->spec;
262 int i, idx = 0;
263
264 if (!spec->powerdown_adcs)
265 return;
266
267 for (i = 0; i < spec->gen.num_all_adcs; i++) {
268 if (spec->gen.all_adcs[i] == hinfo->nid) {
269 idx = i;
270 break;
271 }
272 }
273
274 switch (action) {
275 case HDA_GEN_PCM_ACT_OPEN:
276 msleep(40);
277 snd_hda_codec_write(codec, hinfo->nid, 0,
278 AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
279 spec->active_adcs |= (1 << idx);
280 break;
281 case HDA_GEN_PCM_ACT_CLOSE:
282 snd_hda_codec_write(codec, hinfo->nid, 0,
283 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
284 spec->active_adcs &= ~(1 << idx);
285 break;
286 }
287}
288
289/*
290 * Early 2006 Intel Macintoshes with STAC9220X5 codecs seem to have a
291 * funky external mute control using GPIO pins.
292 */
293
294static void stac_gpio_set(struct hda_codec *codec, unsigned int mask,
295 unsigned int dir_mask, unsigned int data)
296{
297 unsigned int gpiostate, gpiomask, gpiodir;
298
299 codec_dbg(codec, "%s msk %x dir %x gpio %x\n", __func__, mask, dir_mask, data);
300
301 gpiostate = snd_hda_codec_read(codec, codec->afg, 0,
302 AC_VERB_GET_GPIO_DATA, 0);
303 gpiostate = (gpiostate & ~dir_mask) | (data & dir_mask);
304
305 gpiomask = snd_hda_codec_read(codec, codec->afg, 0,
306 AC_VERB_GET_GPIO_MASK, 0);
307 gpiomask |= mask;
308
309 gpiodir = snd_hda_codec_read(codec, codec->afg, 0,
310 AC_VERB_GET_GPIO_DIRECTION, 0);
311 gpiodir |= dir_mask;
312
313 /* Configure GPIOx as CMOS */
314 snd_hda_codec_write(codec, codec->afg, 0, 0x7e7, 0);
315
316 snd_hda_codec_write(codec, codec->afg, 0,
317 AC_VERB_SET_GPIO_MASK, gpiomask);
318 snd_hda_codec_read(codec, codec->afg, 0,
319 AC_VERB_SET_GPIO_DIRECTION, gpiodir); /* sync */
320
321 msleep(1);
322
323 snd_hda_codec_read(codec, codec->afg, 0,
324 AC_VERB_SET_GPIO_DATA, gpiostate); /* sync */
325}
326
327/* hook for controlling mic-mute LED GPIO */
328static void stac_capture_led_hook(struct hda_codec *codec,
329 struct snd_kcontrol *kcontrol,
330 struct snd_ctl_elem_value *ucontrol)
331{
332 struct sigmatel_spec *spec = codec->spec;
333 unsigned int mask;
334 bool cur_mute, prev_mute;
335
336 if (!kcontrol || !ucontrol)
337 return;
338
339 mask = 1U << snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
340 prev_mute = !spec->mic_enabled;
341 if (ucontrol->value.integer.value[0] ||
342 ucontrol->value.integer.value[1])
343 spec->mic_enabled |= mask;
344 else
345 spec->mic_enabled &= ~mask;
346 cur_mute = !spec->mic_enabled;
347 if (cur_mute != prev_mute) {
348 if (cur_mute)
349 spec->gpio_data |= spec->mic_mute_led_gpio;
350 else
351 spec->gpio_data &= ~spec->mic_mute_led_gpio;
352 stac_gpio_set(codec, spec->gpio_mask,
353 spec->gpio_dir, spec->gpio_data);
354 }
355}
356
357static int stac_vrefout_set(struct hda_codec *codec,
358 hda_nid_t nid, unsigned int new_vref)
359{
360 int error, pinctl;
361
362 codec_dbg(codec, "%s, nid %x ctl %x\n", __func__, nid, new_vref);
363 pinctl = snd_hda_codec_read(codec, nid, 0,
364 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
365
366 if (pinctl < 0)
367 return pinctl;
368
369 pinctl &= 0xff;
370 pinctl &= ~AC_PINCTL_VREFEN;
371 pinctl |= (new_vref & AC_PINCTL_VREFEN);
372
373 error = snd_hda_set_pin_ctl_cache(codec, nid, pinctl);
374 if (error < 0)
375 return error;
376
377 return 1;
378}
379
380/* prevent codec AFG to D3 state when vref-out pin is used for mute LED */
381/* this hook is set in stac_setup_gpio() */
382static unsigned int stac_vref_led_power_filter(struct hda_codec *codec,
383 hda_nid_t nid,
384 unsigned int power_state)
385{
386 if (nid == codec->afg && power_state == AC_PWRST_D3)
387 return AC_PWRST_D1;
388 return snd_hda_gen_path_power_filter(codec, nid, power_state);
389}
390
391/* update mute-LED accoring to the master switch */
392static void stac_update_led_status(struct hda_codec *codec, int enabled)
393{
394 struct sigmatel_spec *spec = codec->spec;
395 int muted = !enabled;
396
397 if (!spec->gpio_led)
398 return;
399
400 /* LED state is inverted on these systems */
401 if (spec->gpio_led_polarity)
402 muted = !muted;
403
404 if (!spec->vref_mute_led_nid) {
405 if (muted)
406 spec->gpio_data |= spec->gpio_led;
407 else
408 spec->gpio_data &= ~spec->gpio_led;
409 stac_gpio_set(codec, spec->gpio_mask,
410 spec->gpio_dir, spec->gpio_data);
411 } else {
412 spec->vref_led = muted ? AC_PINCTL_VREF_50 : AC_PINCTL_VREF_GRD;
413 stac_vrefout_set(codec, spec->vref_mute_led_nid,
414 spec->vref_led);
415 }
416}
417
418/* vmaster hook to update mute LED */
419static void stac_vmaster_hook(void *private_data, int val)
420{
421 stac_update_led_status(private_data, val);
422}
423
424/* automute hook to handle GPIO mute and EAPD updates */
425static void stac_update_outputs(struct hda_codec *codec)
426{
427 struct sigmatel_spec *spec = codec->spec;
428
429 if (spec->gpio_mute)
430 spec->gen.master_mute =
431 !(snd_hda_codec_read(codec, codec->afg, 0,
432 AC_VERB_GET_GPIO_DATA, 0) & spec->gpio_mute);
433
434 snd_hda_gen_update_outputs(codec);
435
436 if (spec->eapd_mask && spec->eapd_switch) {
437 unsigned int val = spec->gpio_data;
438 if (spec->gen.speaker_muted)
439 val &= ~spec->eapd_mask;
440 else
441 val |= spec->eapd_mask;
442 if (spec->gpio_data != val) {
443 spec->gpio_data = val;
444 stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir,
445 val);
446 }
447 }
448}
449
450static void stac_toggle_power_map(struct hda_codec *codec, hda_nid_t nid,
451 bool enable, bool do_write)
452{
453 struct sigmatel_spec *spec = codec->spec;
454 unsigned int idx, val;
455
456 for (idx = 0; idx < spec->num_pwrs; idx++) {
457 if (spec->pwr_nids[idx] == nid)
458 break;
459 }
460 if (idx >= spec->num_pwrs)
461 return;
462
463 idx = 1 << idx;
464
465 val = spec->power_map_bits;
466 if (enable)
467 val &= ~idx;
468 else
469 val |= idx;
470
471 /* power down unused output ports */
472 if (val != spec->power_map_bits) {
473 spec->power_map_bits = val;
474 if (do_write)
475 snd_hda_codec_write(codec, codec->afg, 0,
476 AC_VERB_IDT_SET_POWER_MAP, val);
477 }
478}
479
480/* update power bit per jack plug/unplug */
481static void jack_update_power(struct hda_codec *codec,
482 struct hda_jack_tbl *jack)
483{
484 struct sigmatel_spec *spec = codec->spec;
485 int i;
486
487 if (!spec->num_pwrs)
488 return;
489
490 if (jack && jack->nid) {
491 stac_toggle_power_map(codec, jack->nid,
492 snd_hda_jack_detect(codec, jack->nid),
493 true);
494 return;
495 }
496
497 /* update all jacks */
498 for (i = 0; i < spec->num_pwrs; i++) {
499 hda_nid_t nid = spec->pwr_nids[i];
500 jack = snd_hda_jack_tbl_get(codec, nid);
501 if (!jack || !jack->action)
502 continue;
503 if (jack->action == STAC_PWR_EVENT ||
504 jack->action <= HDA_GEN_LAST_EVENT)
505 stac_toggle_power_map(codec, nid,
506 snd_hda_jack_detect(codec, nid),
507 false);
508 }
509
510 snd_hda_codec_write(codec, codec->afg, 0, AC_VERB_IDT_SET_POWER_MAP,
511 spec->power_map_bits);
512}
513
514static void stac_hp_automute(struct hda_codec *codec,
515 struct hda_jack_tbl *jack)
516{
517 snd_hda_gen_hp_automute(codec, jack);
518 jack_update_power(codec, jack);
519}
520
521static void stac_line_automute(struct hda_codec *codec,
522 struct hda_jack_tbl *jack)
523{
524 snd_hda_gen_line_automute(codec, jack);
525 jack_update_power(codec, jack);
526}
527
528static void stac_mic_autoswitch(struct hda_codec *codec,
529 struct hda_jack_tbl *jack)
530{
531 snd_hda_gen_mic_autoswitch(codec, jack);
532 jack_update_power(codec, jack);
533}
534
535static void stac_vref_event(struct hda_codec *codec, struct hda_jack_tbl *event)
536{
537 unsigned int data;
538
539 data = snd_hda_codec_read(codec, codec->afg, 0,
540 AC_VERB_GET_GPIO_DATA, 0);
541 /* toggle VREF state based on GPIOx status */
542 snd_hda_codec_write(codec, codec->afg, 0, 0x7e0,
543 !!(data & (1 << event->private_data)));
544}
545
546/* initialize the power map and enable the power event to jacks that
547 * haven't been assigned to automute
548 */
549static void stac_init_power_map(struct hda_codec *codec)
550{
551 struct sigmatel_spec *spec = codec->spec;
552 int i;
553
554 for (i = 0; i < spec->num_pwrs; i++) {
555 hda_nid_t nid = spec->pwr_nids[i];
556 unsigned int def_conf = snd_hda_codec_get_pincfg(codec, nid);
557 def_conf = get_defcfg_connect(def_conf);
558 if (snd_hda_jack_tbl_get(codec, nid))
559 continue;
560 if (def_conf == AC_JACK_PORT_COMPLEX &&
561 !(spec->vref_mute_led_nid == nid ||
562 is_jack_detectable(codec, nid))) {
563 snd_hda_jack_detect_enable_callback(codec, nid,
564 STAC_PWR_EVENT,
565 jack_update_power);
566 } else {
567 if (def_conf == AC_JACK_PORT_NONE)
568 stac_toggle_power_map(codec, nid, false, false);
569 else
570 stac_toggle_power_map(codec, nid, true, false);
571 }
572 }
573}
574
575/*
576 */
577
578static inline bool get_int_hint(struct hda_codec *codec, const char *key,
579 int *valp)
580{
581 return !snd_hda_get_int_hint(codec, key, valp);
582}
583
584/* override some hints from the hwdep entry */
585static void stac_store_hints(struct hda_codec *codec)
586{
587 struct sigmatel_spec *spec = codec->spec;
588 int val;
589
590 if (get_int_hint(codec, "gpio_mask", &spec->gpio_mask)) {
591 spec->eapd_mask = spec->gpio_dir = spec->gpio_data =
592 spec->gpio_mask;
593 }
594 if (get_int_hint(codec, "gpio_dir", &spec->gpio_dir))
595 spec->gpio_mask &= spec->gpio_mask;
596 if (get_int_hint(codec, "gpio_data", &spec->gpio_data))
597 spec->gpio_dir &= spec->gpio_mask;
598 if (get_int_hint(codec, "eapd_mask", &spec->eapd_mask))
599 spec->eapd_mask &= spec->gpio_mask;
600 if (get_int_hint(codec, "gpio_mute", &spec->gpio_mute))
601 spec->gpio_mute &= spec->gpio_mask;
602 val = snd_hda_get_bool_hint(codec, "eapd_switch");
603 if (val >= 0)
604 spec->eapd_switch = val;
605}
606
607/*
608 * loopback controls
609 */
610
611#define stac_aloopback_info snd_ctl_boolean_mono_info
612
613static int stac_aloopback_get(struct snd_kcontrol *kcontrol,
614 struct snd_ctl_elem_value *ucontrol)
615{
616 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
617 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
618 struct sigmatel_spec *spec = codec->spec;
619
620 ucontrol->value.integer.value[0] = !!(spec->aloopback &
621 (spec->aloopback_mask << idx));
622 return 0;
623}
624
625static int stac_aloopback_put(struct snd_kcontrol *kcontrol,
626 struct snd_ctl_elem_value *ucontrol)
627{
628 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
629 struct sigmatel_spec *spec = codec->spec;
630 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
631 unsigned int dac_mode;
632 unsigned int val, idx_val;
633
634 idx_val = spec->aloopback_mask << idx;
635 if (ucontrol->value.integer.value[0])
636 val = spec->aloopback | idx_val;
637 else
638 val = spec->aloopback & ~idx_val;
639 if (spec->aloopback == val)
640 return 0;
641
642 spec->aloopback = val;
643
644 /* Only return the bits defined by the shift value of the
645 * first two bytes of the mask
646 */
647 dac_mode = snd_hda_codec_read(codec, codec->afg, 0,
648 kcontrol->private_value & 0xFFFF, 0x0);
649 dac_mode >>= spec->aloopback_shift;
650
651 if (spec->aloopback & idx_val) {
652 snd_hda_power_up(codec);
653 dac_mode |= idx_val;
654 } else {
655 snd_hda_power_down(codec);
656 dac_mode &= ~idx_val;
657 }
658
659 snd_hda_codec_write_cache(codec, codec->afg, 0,
660 kcontrol->private_value >> 16, dac_mode);
661
662 return 1;
663}
664
665#define STAC_ANALOG_LOOPBACK(verb_read, verb_write, cnt) \
666 { \
667 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
668 .name = "Analog Loopback", \
669 .count = cnt, \
670 .info = stac_aloopback_info, \
671 .get = stac_aloopback_get, \
672 .put = stac_aloopback_put, \
673 .private_value = verb_read | (verb_write << 16), \
674 }
675
676/*
677 * Mute LED handling on HP laptops
678 */
679
680/* check whether it's a HP laptop with a docking port */
681static bool hp_bnb2011_with_dock(struct hda_codec *codec)
682{
683 if (codec->vendor_id != 0x111d7605 &&
684 codec->vendor_id != 0x111d76d1)
685 return false;
686
687 switch (codec->subsystem_id) {
688 case 0x103c1618:
689 case 0x103c1619:
690 case 0x103c161a:
691 case 0x103c161b:
692 case 0x103c161c:
693 case 0x103c161d:
694 case 0x103c161e:
695 case 0x103c161f:
696
697 case 0x103c162a:
698 case 0x103c162b:
699
700 case 0x103c1630:
701 case 0x103c1631:
702
703 case 0x103c1633:
704 case 0x103c1634:
705 case 0x103c1635:
706
707 case 0x103c3587:
708 case 0x103c3588:
709 case 0x103c3589:
710 case 0x103c358a:
711
712 case 0x103c3667:
713 case 0x103c3668:
714 case 0x103c3669:
715
716 return true;
717 }
718 return false;
719}
720
721static bool hp_blike_system(u32 subsystem_id)
722{
723 switch (subsystem_id) {
724 case 0x103c1520:
725 case 0x103c1521:
726 case 0x103c1523:
727 case 0x103c1524:
728 case 0x103c1525:
729 case 0x103c1722:
730 case 0x103c1723:
731 case 0x103c1724:
732 case 0x103c1725:
733 case 0x103c1726:
734 case 0x103c1727:
735 case 0x103c1728:
736 case 0x103c1729:
737 case 0x103c172a:
738 case 0x103c172b:
739 case 0x103c307e:
740 case 0x103c307f:
741 case 0x103c3080:
742 case 0x103c3081:
743 case 0x103c7007:
744 case 0x103c7008:
745 return true;
746 }
747 return false;
748}
749
750static void set_hp_led_gpio(struct hda_codec *codec)
751{
752 struct sigmatel_spec *spec = codec->spec;
753 unsigned int gpio;
754
755 if (spec->gpio_led)
756 return;
757
758 gpio = snd_hda_param_read(codec, codec->afg, AC_PAR_GPIO_CAP);
759 gpio &= AC_GPIO_IO_COUNT;
760 if (gpio > 3)
761 spec->gpio_led = 0x08; /* GPIO 3 */
762 else
763 spec->gpio_led = 0x01; /* GPIO 0 */
764}
765
766/*
767 * This method searches for the mute LED GPIO configuration
768 * provided as OEM string in SMBIOS. The format of that string
769 * is HP_Mute_LED_P_G or HP_Mute_LED_P
770 * where P can be 0 or 1 and defines mute LED GPIO control state (low/high)
771 * that corresponds to the NOT muted state of the master volume
772 * and G is the index of the GPIO to use as the mute LED control (0..9)
773 * If _G portion is missing it is assigned based on the codec ID
774 *
775 * So, HP B-series like systems may have HP_Mute_LED_0 (current models)
776 * or HP_Mute_LED_0_3 (future models) OEM SMBIOS strings
777 *
778 *
779 * The dv-series laptops don't seem to have the HP_Mute_LED* strings in
780 * SMBIOS - at least the ones I have seen do not have them - which include
781 * my own system (HP Pavilion dv6-1110ax) and my cousin's
782 * HP Pavilion dv9500t CTO.
783 * Need more information on whether it is true across the entire series.
784 * -- kunal
785 */
786static int find_mute_led_cfg(struct hda_codec *codec, int default_polarity)
787{
788 struct sigmatel_spec *spec = codec->spec;
789 const struct dmi_device *dev = NULL;
790
791 if (get_int_hint(codec, "gpio_led", &spec->gpio_led)) {
792 get_int_hint(codec, "gpio_led_polarity",
793 &spec->gpio_led_polarity);
794 return 1;
795 }
796
797 while ((dev = dmi_find_device(DMI_DEV_TYPE_OEM_STRING, NULL, dev))) {
798 if (sscanf(dev->name, "HP_Mute_LED_%d_%x",
799 &spec->gpio_led_polarity,
800 &spec->gpio_led) == 2) {
801 unsigned int max_gpio;
802 max_gpio = snd_hda_param_read(codec, codec->afg,
803 AC_PAR_GPIO_CAP);
804 max_gpio &= AC_GPIO_IO_COUNT;
805 if (spec->gpio_led < max_gpio)
806 spec->gpio_led = 1 << spec->gpio_led;
807 else
808 spec->vref_mute_led_nid = spec->gpio_led;
809 return 1;
810 }
811 if (sscanf(dev->name, "HP_Mute_LED_%d",
812 &spec->gpio_led_polarity) == 1) {
813 set_hp_led_gpio(codec);
814 return 1;
815 }
816 /* BIOS bug: unfilled OEM string */
817 if (strstr(dev->name, "HP_Mute_LED_P_G")) {
818 set_hp_led_gpio(codec);
819 if (default_polarity >= 0)
820 spec->gpio_led_polarity = default_polarity;
821 else
822 spec->gpio_led_polarity = 1;
823 return 1;
824 }
825 }
826
827 /*
828 * Fallback case - if we don't find the DMI strings,
829 * we statically set the GPIO - if not a B-series system
830 * and default polarity is provided
831 */
832 if (!hp_blike_system(codec->subsystem_id) &&
833 (default_polarity == 0 || default_polarity == 1)) {
834 set_hp_led_gpio(codec);
835 spec->gpio_led_polarity = default_polarity;
836 return 1;
837 }
838 return 0;
839}
840
841/* check whether a built-in speaker is included in parsed pins */
842static bool has_builtin_speaker(struct hda_codec *codec)
843{
844 struct sigmatel_spec *spec = codec->spec;
845 hda_nid_t *nid_pin;
846 int nids, i;
847
848 if (spec->gen.autocfg.line_out_type == AUTO_PIN_SPEAKER_OUT) {
849 nid_pin = spec->gen.autocfg.line_out_pins;
850 nids = spec->gen.autocfg.line_outs;
851 } else {
852 nid_pin = spec->gen.autocfg.speaker_pins;
853 nids = spec->gen.autocfg.speaker_outs;
854 }
855
856 for (i = 0; i < nids; i++) {
857 unsigned int def_conf = snd_hda_codec_get_pincfg(codec, nid_pin[i]);
858 if (snd_hda_get_input_pin_attr(def_conf) == INPUT_PIN_ATTR_INT)
859 return true;
860 }
861 return false;
862}
863
864/*
865 * PC beep controls
866 */
867
868/* create PC beep volume controls */
869static int stac_auto_create_beep_ctls(struct hda_codec *codec,
870 hda_nid_t nid)
871{
872 struct sigmatel_spec *spec = codec->spec;
873 u32 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
874 struct snd_kcontrol_new *knew;
875 static struct snd_kcontrol_new abeep_mute_ctl =
876 HDA_CODEC_MUTE(NULL, 0, 0, 0);
877 static struct snd_kcontrol_new dbeep_mute_ctl =
878 HDA_CODEC_MUTE_BEEP(NULL, 0, 0, 0);
879 static struct snd_kcontrol_new beep_vol_ctl =
880 HDA_CODEC_VOLUME(NULL, 0, 0, 0);
881
882 /* check for mute support for the the amp */
883 if ((caps & AC_AMPCAP_MUTE) >> AC_AMPCAP_MUTE_SHIFT) {
884 const struct snd_kcontrol_new *temp;
885 if (spec->anabeep_nid == nid)
886 temp = &abeep_mute_ctl;
887 else
888 temp = &dbeep_mute_ctl;
889 knew = snd_hda_gen_add_kctl(&spec->gen,
890 "Beep Playback Switch", temp);
891 if (!knew)
892 return -ENOMEM;
893 knew->private_value =
894 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT);
895 }
896
897 /* check to see if there is volume support for the amp */
898 if ((caps & AC_AMPCAP_NUM_STEPS) >> AC_AMPCAP_NUM_STEPS_SHIFT) {
899 knew = snd_hda_gen_add_kctl(&spec->gen,
900 "Beep Playback Volume",
901 &beep_vol_ctl);
902 if (!knew)
903 return -ENOMEM;
904 knew->private_value =
905 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT);
906 }
907 return 0;
908}
909
910#ifdef CONFIG_SND_HDA_INPUT_BEEP
911#define stac_dig_beep_switch_info snd_ctl_boolean_mono_info
912
913static int stac_dig_beep_switch_get(struct snd_kcontrol *kcontrol,
914 struct snd_ctl_elem_value *ucontrol)
915{
916 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
917 ucontrol->value.integer.value[0] = codec->beep->enabled;
918 return 0;
919}
920
921static int stac_dig_beep_switch_put(struct snd_kcontrol *kcontrol,
922 struct snd_ctl_elem_value *ucontrol)
923{
924 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
925 return snd_hda_enable_beep_device(codec, ucontrol->value.integer.value[0]);
926}
927
928static const struct snd_kcontrol_new stac_dig_beep_ctrl = {
929 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
930 .name = "Beep Playback Switch",
931 .info = stac_dig_beep_switch_info,
932 .get = stac_dig_beep_switch_get,
933 .put = stac_dig_beep_switch_put,
934};
935
936static int stac_beep_switch_ctl(struct hda_codec *codec)
937{
938 struct sigmatel_spec *spec = codec->spec;
939
940 if (!snd_hda_gen_add_kctl(&spec->gen, NULL, &stac_dig_beep_ctrl))
941 return -ENOMEM;
942 return 0;
943}
944#endif
945
946/*
947 * SPDIF-out mux controls
948 */
949
950static int stac_smux_enum_info(struct snd_kcontrol *kcontrol,
951 struct snd_ctl_elem_info *uinfo)
952{
953 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
954 struct sigmatel_spec *spec = codec->spec;
955 return snd_hda_input_mux_info(&spec->spdif_mux, uinfo);
956}
957
958static int stac_smux_enum_get(struct snd_kcontrol *kcontrol,
959 struct snd_ctl_elem_value *ucontrol)
960{
961 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
962 struct sigmatel_spec *spec = codec->spec;
963 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
964
965 ucontrol->value.enumerated.item[0] = spec->cur_smux[smux_idx];
966 return 0;
967}
968
969static int stac_smux_enum_put(struct snd_kcontrol *kcontrol,
970 struct snd_ctl_elem_value *ucontrol)
971{
972 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
973 struct sigmatel_spec *spec = codec->spec;
974 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
975
976 return snd_hda_input_mux_put(codec, &spec->spdif_mux, ucontrol,
977 spec->gen.autocfg.dig_out_pins[smux_idx],
978 &spec->cur_smux[smux_idx]);
979}
980
981static struct snd_kcontrol_new stac_smux_mixer = {
982 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
983 .name = "IEC958 Playback Source",
984 /* count set later */
985 .info = stac_smux_enum_info,
986 .get = stac_smux_enum_get,
987 .put = stac_smux_enum_put,
988};
989
990static const char * const stac_spdif_labels[] = {
991 "Digital Playback", "Analog Mux 1", "Analog Mux 2", NULL
992};
993
994static int stac_create_spdif_mux_ctls(struct hda_codec *codec)
995{
996 struct sigmatel_spec *spec = codec->spec;
997 struct auto_pin_cfg *cfg = &spec->gen.autocfg;
998 const char * const *labels = spec->spdif_labels;
999 struct snd_kcontrol_new *kctl;
1000 int i, num_cons;
1001
1002 if (cfg->dig_outs < 1)
1003 return 0;
1004
1005 num_cons = snd_hda_get_num_conns(codec, cfg->dig_out_pins[0]);
1006 if (num_cons <= 1)
1007 return 0;
1008
1009 if (!labels)
1010 labels = stac_spdif_labels;
1011 for (i = 0; i < num_cons; i++) {
1012 if (snd_BUG_ON(!labels[i]))
1013 return -EINVAL;
1014 snd_hda_add_imux_item(&spec->spdif_mux, labels[i], i, NULL);
1015 }
1016
1017 kctl = snd_hda_gen_add_kctl(&spec->gen, NULL, &stac_smux_mixer);
1018 if (!kctl)
1019 return -ENOMEM;
1020 kctl->count = cfg->dig_outs;
1021
1022 return 0;
1023}
1024
1025/*
1026 */
1027
1028static const struct hda_verb stac9200_core_init[] = {
1029 /* set dac0mux for dac converter */
1030 { 0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
1031 {}
1032};
1033
1034static const struct hda_verb stac9200_eapd_init[] = {
1035 /* set dac0mux for dac converter */
1036 {0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
1037 {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02},
1038 {}
1039};
1040
1041static const struct hda_verb dell_eq_core_init[] = {
1042 /* set master volume to max value without distortion
1043 * and direct control */
1044 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xec},
1045 {}
1046};
1047
1048static const struct hda_verb stac92hd73xx_core_init[] = {
1049 /* set master volume and direct control */
1050 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
1051 {}
1052};
1053
1054static const struct hda_verb stac92hd83xxx_core_init[] = {
1055 /* power state controls amps */
1056 { 0x01, AC_VERB_SET_EAPD, 1 << 2},
1057 {}
1058};
1059
1060static const struct hda_verb stac92hd83xxx_hp_zephyr_init[] = {
1061 { 0x22, 0x785, 0x43 },
1062 { 0x22, 0x782, 0xe0 },
1063 { 0x22, 0x795, 0x00 },
1064 {}
1065};
1066
1067static const struct hda_verb stac92hd71bxx_core_init[] = {
1068 /* set master volume and direct control */
1069 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
1070 {}
1071};
1072
1073static const struct hda_verb stac92hd71bxx_unmute_core_init[] = {
1074 /* unmute right and left channels for nodes 0x0f, 0xa, 0x0d */
1075 { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
1076 { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
1077 { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
1078 {}
1079};
1080
1081static const struct hda_verb stac925x_core_init[] = {
1082 /* set dac0mux for dac converter */
1083 { 0x06, AC_VERB_SET_CONNECT_SEL, 0x00},
1084 /* mute the master volume */
1085 { 0x0e, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE },
1086 {}
1087};
1088
1089static const struct hda_verb stac922x_core_init[] = {
1090 /* set master volume and direct control */
1091 { 0x16, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
1092 {}
1093};
1094
1095static const struct hda_verb d965_core_init[] = {
1096 /* unmute node 0x1b */
1097 { 0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
1098 /* select node 0x03 as DAC */
1099 { 0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
1100 {}
1101};
1102
1103static const struct hda_verb dell_3st_core_init[] = {
1104 /* don't set delta bit */
1105 {0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0x7f},
1106 /* unmute node 0x1b */
1107 {0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
1108 /* select node 0x03 as DAC */
1109 {0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
1110 {}
1111};
1112
1113static const struct hda_verb stac927x_core_init[] = {
1114 /* set master volume and direct control */
1115 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
1116 /* enable analog pc beep path */
1117 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
1118 {}
1119};
1120
1121static const struct hda_verb stac927x_volknob_core_init[] = {
1122 /* don't set delta bit */
1123 {0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0x7f},
1124 /* enable analog pc beep path */
1125 {0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
1126 {}
1127};
1128
1129static const struct hda_verb stac9205_core_init[] = {
1130 /* set master volume and direct control */
1131 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
1132 /* enable analog pc beep path */
1133 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
1134 {}
1135};
1136
1137static const struct snd_kcontrol_new stac92hd73xx_6ch_loopback =
1138 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 3);
1139
1140static const struct snd_kcontrol_new stac92hd73xx_8ch_loopback =
1141 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 4);
1142
1143static const struct snd_kcontrol_new stac92hd73xx_10ch_loopback =
1144 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 5);
1145
1146static const struct snd_kcontrol_new stac92hd71bxx_loopback =
1147 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2);
1148
1149static const struct snd_kcontrol_new stac9205_loopback =
1150 STAC_ANALOG_LOOPBACK(0xFE0, 0x7E0, 1);
1151
1152static const struct snd_kcontrol_new stac927x_loopback =
1153 STAC_ANALOG_LOOPBACK(0xFEB, 0x7EB, 1);
1154
1155static const struct hda_pintbl ref9200_pin_configs[] = {
1156 { 0x08, 0x01c47010 },
1157 { 0x09, 0x01447010 },
1158 { 0x0d, 0x0221401f },
1159 { 0x0e, 0x01114010 },
1160 { 0x0f, 0x02a19020 },
1161 { 0x10, 0x01a19021 },
1162 { 0x11, 0x90100140 },
1163 { 0x12, 0x01813122 },
1164 {}
1165};
1166
1167static const struct hda_pintbl gateway9200_m4_pin_configs[] = {
1168 { 0x08, 0x400000fe },
1169 { 0x09, 0x404500f4 },
1170 { 0x0d, 0x400100f0 },
1171 { 0x0e, 0x90110010 },
1172 { 0x0f, 0x400100f1 },
1173 { 0x10, 0x02a1902e },
1174 { 0x11, 0x500000f2 },
1175 { 0x12, 0x500000f3 },
1176 {}
1177};
1178
1179static const struct hda_pintbl gateway9200_m4_2_pin_configs[] = {
1180 { 0x08, 0x400000fe },
1181 { 0x09, 0x404500f4 },
1182 { 0x0d, 0x400100f0 },
1183 { 0x0e, 0x90110010 },
1184 { 0x0f, 0x400100f1 },
1185 { 0x10, 0x02a1902e },
1186 { 0x11, 0x500000f2 },
1187 { 0x12, 0x500000f3 },
1188 {}
1189};
1190
1191/*
1192 STAC 9200 pin configs for
1193 102801A8
1194 102801DE
1195 102801E8
1196*/
1197static const struct hda_pintbl dell9200_d21_pin_configs[] = {
1198 { 0x08, 0x400001f0 },
1199 { 0x09, 0x400001f1 },
1200 { 0x0d, 0x02214030 },
1201 { 0x0e, 0x01014010 },
1202 { 0x0f, 0x02a19020 },
1203 { 0x10, 0x01a19021 },
1204 { 0x11, 0x90100140 },
1205 { 0x12, 0x01813122 },
1206 {}
1207};
1208
1209/*
1210 STAC 9200 pin configs for
1211 102801C0
1212 102801C1
1213*/
1214static const struct hda_pintbl dell9200_d22_pin_configs[] = {
1215 { 0x08, 0x400001f0 },
1216 { 0x09, 0x400001f1 },
1217 { 0x0d, 0x0221401f },
1218 { 0x0e, 0x01014010 },
1219 { 0x0f, 0x01813020 },
1220 { 0x10, 0x02a19021 },
1221 { 0x11, 0x90100140 },
1222 { 0x12, 0x400001f2 },
1223 {}
1224};
1225
1226/*
1227 STAC 9200 pin configs for
1228 102801C4 (Dell Dimension E310)
1229 102801C5
1230 102801C7
1231 102801D9
1232 102801DA
1233 102801E3
1234*/
1235static const struct hda_pintbl dell9200_d23_pin_configs[] = {
1236 { 0x08, 0x400001f0 },
1237 { 0x09, 0x400001f1 },
1238 { 0x0d, 0x0221401f },
1239 { 0x0e, 0x01014010 },
1240 { 0x0f, 0x01813020 },
1241 { 0x10, 0x01a19021 },
1242 { 0x11, 0x90100140 },
1243 { 0x12, 0x400001f2 },
1244 {}
1245};
1246
1247
1248/*
1249 STAC 9200-32 pin configs for
1250 102801B5 (Dell Inspiron 630m)
1251 102801D8 (Dell Inspiron 640m)
1252*/
1253static const struct hda_pintbl dell9200_m21_pin_configs[] = {
1254 { 0x08, 0x40c003fa },
1255 { 0x09, 0x03441340 },
1256 { 0x0d, 0x0321121f },
1257 { 0x0e, 0x90170310 },
1258 { 0x0f, 0x408003fb },
1259 { 0x10, 0x03a11020 },
1260 { 0x11, 0x401003fc },
1261 { 0x12, 0x403003fd },
1262 {}
1263};
1264
1265/*
1266 STAC 9200-32 pin configs for
1267 102801C2 (Dell Latitude D620)
1268 102801C8
1269 102801CC (Dell Latitude D820)
1270 102801D4
1271 102801D6
1272*/
1273static const struct hda_pintbl dell9200_m22_pin_configs[] = {
1274 { 0x08, 0x40c003fa },
1275 { 0x09, 0x0144131f },
1276 { 0x0d, 0x0321121f },
1277 { 0x0e, 0x90170310 },
1278 { 0x0f, 0x90a70321 },
1279 { 0x10, 0x03a11020 },
1280 { 0x11, 0x401003fb },
1281 { 0x12, 0x40f000fc },
1282 {}
1283};
1284
1285/*
1286 STAC 9200-32 pin configs for
1287 102801CE (Dell XPS M1710)
1288 102801CF (Dell Precision M90)
1289*/
1290static const struct hda_pintbl dell9200_m23_pin_configs[] = {
1291 { 0x08, 0x40c003fa },
1292 { 0x09, 0x01441340 },
1293 { 0x0d, 0x0421421f },
1294 { 0x0e, 0x90170310 },
1295 { 0x0f, 0x408003fb },
1296 { 0x10, 0x04a1102e },
1297 { 0x11, 0x90170311 },
1298 { 0x12, 0x403003fc },
1299 {}
1300};
1301
1302/*
1303 STAC 9200-32 pin configs for
1304 102801C9
1305 102801CA
1306 102801CB (Dell Latitude 120L)
1307 102801D3
1308*/
1309static const struct hda_pintbl dell9200_m24_pin_configs[] = {
1310 { 0x08, 0x40c003fa },
1311 { 0x09, 0x404003fb },
1312 { 0x0d, 0x0321121f },
1313 { 0x0e, 0x90170310 },
1314 { 0x0f, 0x408003fc },
1315 { 0x10, 0x03a11020 },
1316 { 0x11, 0x401003fd },
1317 { 0x12, 0x403003fe },
1318 {}
1319};
1320
1321/*
1322 STAC 9200-32 pin configs for
1323 102801BD (Dell Inspiron E1505n)
1324 102801EE
1325 102801EF
1326*/
1327static const struct hda_pintbl dell9200_m25_pin_configs[] = {
1328 { 0x08, 0x40c003fa },
1329 { 0x09, 0x01441340 },
1330 { 0x0d, 0x0421121f },
1331 { 0x0e, 0x90170310 },
1332 { 0x0f, 0x408003fb },
1333 { 0x10, 0x04a11020 },
1334 { 0x11, 0x401003fc },
1335 { 0x12, 0x403003fd },
1336 {}
1337};
1338
1339/*
1340 STAC 9200-32 pin configs for
1341 102801F5 (Dell Inspiron 1501)
1342 102801F6
1343*/
1344static const struct hda_pintbl dell9200_m26_pin_configs[] = {
1345 { 0x08, 0x40c003fa },
1346 { 0x09, 0x404003fb },
1347 { 0x0d, 0x0421121f },
1348 { 0x0e, 0x90170310 },
1349 { 0x0f, 0x408003fc },
1350 { 0x10, 0x04a11020 },
1351 { 0x11, 0x401003fd },
1352 { 0x12, 0x403003fe },
1353 {}
1354};
1355
1356/*
1357 STAC 9200-32
1358 102801CD (Dell Inspiron E1705/9400)
1359*/
1360static const struct hda_pintbl dell9200_m27_pin_configs[] = {
1361 { 0x08, 0x40c003fa },
1362 { 0x09, 0x01441340 },
1363 { 0x0d, 0x0421121f },
1364 { 0x0e, 0x90170310 },
1365 { 0x0f, 0x90170310 },
1366 { 0x10, 0x04a11020 },
1367 { 0x11, 0x90170310 },
1368 { 0x12, 0x40f003fc },
1369 {}
1370};
1371
1372static const struct hda_pintbl oqo9200_pin_configs[] = {
1373 { 0x08, 0x40c000f0 },
1374 { 0x09, 0x404000f1 },
1375 { 0x0d, 0x0221121f },
1376 { 0x0e, 0x02211210 },
1377 { 0x0f, 0x90170111 },
1378 { 0x10, 0x90a70120 },
1379 { 0x11, 0x400000f2 },
1380 { 0x12, 0x400000f3 },
1381 {}
1382};
1383
1384
1385static void stac9200_fixup_panasonic(struct hda_codec *codec,
1386 const struct hda_fixup *fix, int action)
1387{
1388 struct sigmatel_spec *spec = codec->spec;
1389
1390 if (action == HDA_FIXUP_ACT_PRE_PROBE) {
1391 spec->gpio_mask = spec->gpio_dir = 0x09;
1392 spec->gpio_data = 0x00;
1393 /* CF-74 has no headphone detection, and the driver should *NOT*
1394 * do detection and HP/speaker toggle because the hardware does it.
1395 */
1396 spec->gen.suppress_auto_mute = 1;
1397 }
1398}
1399
1400
1401static const struct hda_fixup stac9200_fixups[] = {
1402 [STAC_REF] = {
1403 .type = HDA_FIXUP_PINS,
1404 .v.pins = ref9200_pin_configs,
1405 },
1406 [STAC_9200_OQO] = {
1407 .type = HDA_FIXUP_PINS,
1408 .v.pins = oqo9200_pin_configs,
1409 .chained = true,
1410 .chain_id = STAC_9200_EAPD_INIT,
1411 },
1412 [STAC_9200_DELL_D21] = {
1413 .type = HDA_FIXUP_PINS,
1414 .v.pins = dell9200_d21_pin_configs,
1415 },
1416 [STAC_9200_DELL_D22] = {
1417 .type = HDA_FIXUP_PINS,
1418 .v.pins = dell9200_d22_pin_configs,
1419 },
1420 [STAC_9200_DELL_D23] = {
1421 .type = HDA_FIXUP_PINS,
1422 .v.pins = dell9200_d23_pin_configs,
1423 },
1424 [STAC_9200_DELL_M21] = {
1425 .type = HDA_FIXUP_PINS,
1426 .v.pins = dell9200_m21_pin_configs,
1427 },
1428 [STAC_9200_DELL_M22] = {
1429 .type = HDA_FIXUP_PINS,
1430 .v.pins = dell9200_m22_pin_configs,
1431 },
1432 [STAC_9200_DELL_M23] = {
1433 .type = HDA_FIXUP_PINS,
1434 .v.pins = dell9200_m23_pin_configs,
1435 },
1436 [STAC_9200_DELL_M24] = {
1437 .type = HDA_FIXUP_PINS,
1438 .v.pins = dell9200_m24_pin_configs,
1439 },
1440 [STAC_9200_DELL_M25] = {
1441 .type = HDA_FIXUP_PINS,
1442 .v.pins = dell9200_m25_pin_configs,
1443 },
1444 [STAC_9200_DELL_M26] = {
1445 .type = HDA_FIXUP_PINS,
1446 .v.pins = dell9200_m26_pin_configs,
1447 },
1448 [STAC_9200_DELL_M27] = {
1449 .type = HDA_FIXUP_PINS,
1450 .v.pins = dell9200_m27_pin_configs,
1451 },
1452 [STAC_9200_M4] = {
1453 .type = HDA_FIXUP_PINS,
1454 .v.pins = gateway9200_m4_pin_configs,
1455 .chained = true,
1456 .chain_id = STAC_9200_EAPD_INIT,
1457 },
1458 [STAC_9200_M4_2] = {
1459 .type = HDA_FIXUP_PINS,
1460 .v.pins = gateway9200_m4_2_pin_configs,
1461 .chained = true,
1462 .chain_id = STAC_9200_EAPD_INIT,
1463 },
1464 [STAC_9200_PANASONIC] = {
1465 .type = HDA_FIXUP_FUNC,
1466 .v.func = stac9200_fixup_panasonic,
1467 },
1468 [STAC_9200_EAPD_INIT] = {
1469 .type = HDA_FIXUP_VERBS,
1470 .v.verbs = (const struct hda_verb[]) {
1471 {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02},
1472 {}
1473 },
1474 },
1475};
1476
1477static const struct hda_model_fixup stac9200_models[] = {
1478 { .id = STAC_REF, .name = "ref" },
1479 { .id = STAC_9200_OQO, .name = "oqo" },
1480 { .id = STAC_9200_DELL_D21, .name = "dell-d21" },
1481 { .id = STAC_9200_DELL_D22, .name = "dell-d22" },
1482 { .id = STAC_9200_DELL_D23, .name = "dell-d23" },
1483 { .id = STAC_9200_DELL_M21, .name = "dell-m21" },
1484 { .id = STAC_9200_DELL_M22, .name = "dell-m22" },
1485 { .id = STAC_9200_DELL_M23, .name = "dell-m23" },
1486 { .id = STAC_9200_DELL_M24, .name = "dell-m24" },
1487 { .id = STAC_9200_DELL_M25, .name = "dell-m25" },
1488 { .id = STAC_9200_DELL_M26, .name = "dell-m26" },
1489 { .id = STAC_9200_DELL_M27, .name = "dell-m27" },
1490 { .id = STAC_9200_M4, .name = "gateway-m4" },
1491 { .id = STAC_9200_M4_2, .name = "gateway-m4-2" },
1492 { .id = STAC_9200_PANASONIC, .name = "panasonic" },
1493 {}
1494};
1495
1496static const struct snd_pci_quirk stac9200_fixup_tbl[] = {
1497 /* SigmaTel reference board */
1498 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1499 "DFI LanParty", STAC_REF),
1500 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
1501 "DFI LanParty", STAC_REF),
1502 /* Dell laptops have BIOS problem */
1503 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a8,
1504 "unknown Dell", STAC_9200_DELL_D21),
1505 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01b5,
1506 "Dell Inspiron 630m", STAC_9200_DELL_M21),
1507 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bd,
1508 "Dell Inspiron E1505n", STAC_9200_DELL_M25),
1509 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c0,
1510 "unknown Dell", STAC_9200_DELL_D22),
1511 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c1,
1512 "unknown Dell", STAC_9200_DELL_D22),
1513 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c2,
1514 "Dell Latitude D620", STAC_9200_DELL_M22),
1515 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c5,
1516 "unknown Dell", STAC_9200_DELL_D23),
1517 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c7,
1518 "unknown Dell", STAC_9200_DELL_D23),
1519 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c8,
1520 "unknown Dell", STAC_9200_DELL_M22),
1521 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c9,
1522 "unknown Dell", STAC_9200_DELL_M24),
1523 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ca,
1524 "unknown Dell", STAC_9200_DELL_M24),
1525 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cb,
1526 "Dell Latitude 120L", STAC_9200_DELL_M24),
1527 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cc,
1528 "Dell Latitude D820", STAC_9200_DELL_M22),
1529 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cd,
1530 "Dell Inspiron E1705/9400", STAC_9200_DELL_M27),
1531 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ce,
1532 "Dell XPS M1710", STAC_9200_DELL_M23),
1533 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cf,
1534 "Dell Precision M90", STAC_9200_DELL_M23),
1535 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d3,
1536 "unknown Dell", STAC_9200_DELL_M22),
1537 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d4,
1538 "unknown Dell", STAC_9200_DELL_M22),
1539 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d6,
1540 "unknown Dell", STAC_9200_DELL_M22),
1541 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d8,
1542 "Dell Inspiron 640m", STAC_9200_DELL_M21),
1543 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d9,
1544 "unknown Dell", STAC_9200_DELL_D23),
1545 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01da,
1546 "unknown Dell", STAC_9200_DELL_D23),
1547 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01de,
1548 "unknown Dell", STAC_9200_DELL_D21),
1549 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e3,
1550 "unknown Dell", STAC_9200_DELL_D23),
1551 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e8,
1552 "unknown Dell", STAC_9200_DELL_D21),
1553 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ee,
1554 "unknown Dell", STAC_9200_DELL_M25),
1555 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ef,
1556 "unknown Dell", STAC_9200_DELL_M25),
1557 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f5,
1558 "Dell Inspiron 1501", STAC_9200_DELL_M26),
1559 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f6,
1560 "unknown Dell", STAC_9200_DELL_M26),
1561 /* Panasonic */
1562 SND_PCI_QUIRK(0x10f7, 0x8338, "Panasonic CF-74", STAC_9200_PANASONIC),
1563 /* Gateway machines needs EAPD to be set on resume */
1564 SND_PCI_QUIRK(0x107b, 0x0205, "Gateway S-7110M", STAC_9200_M4),
1565 SND_PCI_QUIRK(0x107b, 0x0317, "Gateway MT3423, MX341*", STAC_9200_M4_2),
1566 SND_PCI_QUIRK(0x107b, 0x0318, "Gateway ML3019, MT3707", STAC_9200_M4_2),
1567 /* OQO Mobile */
1568 SND_PCI_QUIRK(0x1106, 0x3288, "OQO Model 2", STAC_9200_OQO),
1569 {} /* terminator */
1570};
1571
1572static const struct hda_pintbl ref925x_pin_configs[] = {
1573 { 0x07, 0x40c003f0 },
1574 { 0x08, 0x424503f2 },
1575 { 0x0a, 0x01813022 },
1576 { 0x0b, 0x02a19021 },
1577 { 0x0c, 0x90a70320 },
1578 { 0x0d, 0x02214210 },
1579 { 0x10, 0x01019020 },
1580 { 0x11, 0x9033032e },
1581 {}
1582};
1583
1584static const struct hda_pintbl stac925xM1_pin_configs[] = {
1585 { 0x07, 0x40c003f4 },
1586 { 0x08, 0x424503f2 },
1587 { 0x0a, 0x400000f3 },
1588 { 0x0b, 0x02a19020 },
1589 { 0x0c, 0x40a000f0 },
1590 { 0x0d, 0x90100210 },
1591 { 0x10, 0x400003f1 },
1592 { 0x11, 0x9033032e },
1593 {}
1594};
1595
1596static const struct hda_pintbl stac925xM1_2_pin_configs[] = {
1597 { 0x07, 0x40c003f4 },
1598 { 0x08, 0x424503f2 },
1599 { 0x0a, 0x400000f3 },
1600 { 0x0b, 0x02a19020 },
1601 { 0x0c, 0x40a000f0 },
1602 { 0x0d, 0x90100210 },
1603 { 0x10, 0x400003f1 },
1604 { 0x11, 0x9033032e },
1605 {}
1606};
1607
1608static const struct hda_pintbl stac925xM2_pin_configs[] = {
1609 { 0x07, 0x40c003f4 },
1610 { 0x08, 0x424503f2 },
1611 { 0x0a, 0x400000f3 },
1612 { 0x0b, 0x02a19020 },
1613 { 0x0c, 0x40a000f0 },
1614 { 0x0d, 0x90100210 },
1615 { 0x10, 0x400003f1 },
1616 { 0x11, 0x9033032e },
1617 {}
1618};
1619
1620static const struct hda_pintbl stac925xM2_2_pin_configs[] = {
1621 { 0x07, 0x40c003f4 },
1622 { 0x08, 0x424503f2 },
1623 { 0x0a, 0x400000f3 },
1624 { 0x0b, 0x02a19020 },
1625 { 0x0c, 0x40a000f0 },
1626 { 0x0d, 0x90100210 },
1627 { 0x10, 0x400003f1 },
1628 { 0x11, 0x9033032e },
1629 {}
1630};
1631
1632static const struct hda_pintbl stac925xM3_pin_configs[] = {
1633 { 0x07, 0x40c003f4 },
1634 { 0x08, 0x424503f2 },
1635 { 0x0a, 0x400000f3 },
1636 { 0x0b, 0x02a19020 },
1637 { 0x0c, 0x40a000f0 },
1638 { 0x0d, 0x90100210 },
1639 { 0x10, 0x400003f1 },
1640 { 0x11, 0x503303f3 },
1641 {}
1642};
1643
1644static const struct hda_pintbl stac925xM5_pin_configs[] = {
1645 { 0x07, 0x40c003f4 },
1646 { 0x08, 0x424503f2 },
1647 { 0x0a, 0x400000f3 },
1648 { 0x0b, 0x02a19020 },
1649 { 0x0c, 0x40a000f0 },
1650 { 0x0d, 0x90100210 },
1651 { 0x10, 0x400003f1 },
1652 { 0x11, 0x9033032e },
1653 {}
1654};
1655
1656static const struct hda_pintbl stac925xM6_pin_configs[] = {
1657 { 0x07, 0x40c003f4 },
1658 { 0x08, 0x424503f2 },
1659 { 0x0a, 0x400000f3 },
1660 { 0x0b, 0x02a19020 },
1661 { 0x0c, 0x40a000f0 },
1662 { 0x0d, 0x90100210 },
1663 { 0x10, 0x400003f1 },
1664 { 0x11, 0x90330320 },
1665 {}
1666};
1667
1668static const struct hda_fixup stac925x_fixups[] = {
1669 [STAC_REF] = {
1670 .type = HDA_FIXUP_PINS,
1671 .v.pins = ref925x_pin_configs,
1672 },
1673 [STAC_M1] = {
1674 .type = HDA_FIXUP_PINS,
1675 .v.pins = stac925xM1_pin_configs,
1676 },
1677 [STAC_M1_2] = {
1678 .type = HDA_FIXUP_PINS,
1679 .v.pins = stac925xM1_2_pin_configs,
1680 },
1681 [STAC_M2] = {
1682 .type = HDA_FIXUP_PINS,
1683 .v.pins = stac925xM2_pin_configs,
1684 },
1685 [STAC_M2_2] = {
1686 .type = HDA_FIXUP_PINS,
1687 .v.pins = stac925xM2_2_pin_configs,
1688 },
1689 [STAC_M3] = {
1690 .type = HDA_FIXUP_PINS,
1691 .v.pins = stac925xM3_pin_configs,
1692 },
1693 [STAC_M5] = {
1694 .type = HDA_FIXUP_PINS,
1695 .v.pins = stac925xM5_pin_configs,
1696 },
1697 [STAC_M6] = {
1698 .type = HDA_FIXUP_PINS,
1699 .v.pins = stac925xM6_pin_configs,
1700 },
1701};
1702
1703static const struct hda_model_fixup stac925x_models[] = {
1704 { .id = STAC_REF, .name = "ref" },
1705 { .id = STAC_M1, .name = "m1" },
1706 { .id = STAC_M1_2, .name = "m1-2" },
1707 { .id = STAC_M2, .name = "m2" },
1708 { .id = STAC_M2_2, .name = "m2-2" },
1709 { .id = STAC_M3, .name = "m3" },
1710 { .id = STAC_M5, .name = "m5" },
1711 { .id = STAC_M6, .name = "m6" },
1712 {}
1713};
1714
1715static const struct snd_pci_quirk stac925x_fixup_tbl[] = {
1716 /* SigmaTel reference board */
1717 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, "DFI LanParty", STAC_REF),
1718 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101, "DFI LanParty", STAC_REF),
1719 SND_PCI_QUIRK(0x8384, 0x7632, "Stac9202 Reference Board", STAC_REF),
1720
1721 /* Default table for unknown ID */
1722 SND_PCI_QUIRK(0x1002, 0x437b, "Gateway mobile", STAC_M2_2),
1723
1724 /* gateway machines are checked via codec ssid */
1725 SND_PCI_QUIRK(0x107b, 0x0316, "Gateway M255", STAC_M2),
1726 SND_PCI_QUIRK(0x107b, 0x0366, "Gateway MP6954", STAC_M5),
1727 SND_PCI_QUIRK(0x107b, 0x0461, "Gateway NX560XL", STAC_M1),
1728 SND_PCI_QUIRK(0x107b, 0x0681, "Gateway NX860", STAC_M2),
1729 SND_PCI_QUIRK(0x107b, 0x0367, "Gateway MX6453", STAC_M1_2),
1730 /* Not sure about the brand name for those */
1731 SND_PCI_QUIRK(0x107b, 0x0281, "Gateway mobile", STAC_M1),
1732 SND_PCI_QUIRK(0x107b, 0x0507, "Gateway mobile", STAC_M3),
1733 SND_PCI_QUIRK(0x107b, 0x0281, "Gateway mobile", STAC_M6),
1734 SND_PCI_QUIRK(0x107b, 0x0685, "Gateway mobile", STAC_M2_2),
1735 {} /* terminator */
1736};
1737
1738static const struct hda_pintbl ref92hd73xx_pin_configs[] = {
1739 { 0x0a, 0x02214030 },
1740 { 0x0b, 0x02a19040 },
1741 { 0x0c, 0x01a19020 },
1742 { 0x0d, 0x02214030 },
1743 { 0x0e, 0x0181302e },
1744 { 0x0f, 0x01014010 },
1745 { 0x10, 0x01014020 },
1746 { 0x11, 0x01014030 },
1747 { 0x12, 0x02319040 },
1748 { 0x13, 0x90a000f0 },
1749 { 0x14, 0x90a000f0 },
1750 { 0x22, 0x01452050 },
1751 { 0x23, 0x01452050 },
1752 {}
1753};
1754
1755static const struct hda_pintbl dell_m6_pin_configs[] = {
1756 { 0x0a, 0x0321101f },
1757 { 0x0b, 0x4f00000f },
1758 { 0x0c, 0x4f0000f0 },
1759 { 0x0d, 0x90170110 },
1760 { 0x0e, 0x03a11020 },
1761 { 0x0f, 0x0321101f },
1762 { 0x10, 0x4f0000f0 },
1763 { 0x11, 0x4f0000f0 },
1764 { 0x12, 0x4f0000f0 },
1765 { 0x13, 0x90a60160 },
1766 { 0x14, 0x4f0000f0 },
1767 { 0x22, 0x4f0000f0 },
1768 { 0x23, 0x4f0000f0 },
1769 {}
1770};
1771
1772static const struct hda_pintbl alienware_m17x_pin_configs[] = {
1773 { 0x0a, 0x0321101f },
1774 { 0x0b, 0x0321101f },
1775 { 0x0c, 0x03a11020 },
1776 { 0x0d, 0x03014020 },
1777 { 0x0e, 0x90170110 },
1778 { 0x0f, 0x4f0000f0 },
1779 { 0x10, 0x4f0000f0 },
1780 { 0x11, 0x4f0000f0 },
1781 { 0x12, 0x4f0000f0 },
1782 { 0x13, 0x90a60160 },
1783 { 0x14, 0x4f0000f0 },
1784 { 0x22, 0x4f0000f0 },
1785 { 0x23, 0x904601b0 },
1786 {}
1787};
1788
1789static const struct hda_pintbl intel_dg45id_pin_configs[] = {
1790 { 0x0a, 0x02214230 },
1791 { 0x0b, 0x02A19240 },
1792 { 0x0c, 0x01013214 },
1793 { 0x0d, 0x01014210 },
1794 { 0x0e, 0x01A19250 },
1795 { 0x0f, 0x01011212 },
1796 { 0x10, 0x01016211 },
1797 {}
1798};
1799
1800static const struct hda_pintbl stac92hd89xx_hp_front_jack_pin_configs[] = {
1801 { 0x0a, 0x02214030 },
1802 { 0x0b, 0x02A19010 },
1803 {}
1804};
1805
1806static void stac92hd73xx_fixup_ref(struct hda_codec *codec,
1807 const struct hda_fixup *fix, int action)
1808{
1809 struct sigmatel_spec *spec = codec->spec;
1810
1811 if (action != HDA_FIXUP_ACT_PRE_PROBE)
1812 return;
1813
1814 snd_hda_apply_pincfgs(codec, ref92hd73xx_pin_configs);
1815 spec->gpio_mask = spec->gpio_dir = spec->gpio_data = 0;
1816}
1817
1818static void stac92hd73xx_fixup_dell(struct hda_codec *codec)
1819{
1820 struct sigmatel_spec *spec = codec->spec;
1821
1822 snd_hda_apply_pincfgs(codec, dell_m6_pin_configs);
1823 spec->eapd_switch = 0;
1824}
1825
1826static void stac92hd73xx_fixup_dell_eq(struct hda_codec *codec,
1827 const struct hda_fixup *fix, int action)
1828{
1829 struct sigmatel_spec *spec = codec->spec;
1830
1831 if (action != HDA_FIXUP_ACT_PRE_PROBE)
1832 return;
1833
1834 stac92hd73xx_fixup_dell(codec);
1835 snd_hda_add_verbs(codec, dell_eq_core_init);
1836 spec->volknob_init = 1;
1837}
1838
1839/* Analog Mics */
1840static void stac92hd73xx_fixup_dell_m6_amic(struct hda_codec *codec,
1841 const struct hda_fixup *fix, int action)
1842{
1843 if (action != HDA_FIXUP_ACT_PRE_PROBE)
1844 return;
1845
1846 stac92hd73xx_fixup_dell(codec);
1847 snd_hda_codec_set_pincfg(codec, 0x0b, 0x90A70170);
1848}
1849
1850/* Digital Mics */
1851static void stac92hd73xx_fixup_dell_m6_dmic(struct hda_codec *codec,
1852 const struct hda_fixup *fix, int action)
1853{
1854 if (action != HDA_FIXUP_ACT_PRE_PROBE)
1855 return;
1856
1857 stac92hd73xx_fixup_dell(codec);
1858 snd_hda_codec_set_pincfg(codec, 0x13, 0x90A60160);
1859}
1860
1861/* Both */
1862static void stac92hd73xx_fixup_dell_m6_both(struct hda_codec *codec,
1863 const struct hda_fixup *fix, int action)
1864{
1865 if (action != HDA_FIXUP_ACT_PRE_PROBE)
1866 return;
1867
1868 stac92hd73xx_fixup_dell(codec);
1869 snd_hda_codec_set_pincfg(codec, 0x0b, 0x90A70170);
1870 snd_hda_codec_set_pincfg(codec, 0x13, 0x90A60160);
1871}
1872
1873static void stac92hd73xx_fixup_alienware_m17x(struct hda_codec *codec,
1874 const struct hda_fixup *fix, int action)
1875{
1876 struct sigmatel_spec *spec = codec->spec;
1877
1878 if (action != HDA_FIXUP_ACT_PRE_PROBE)
1879 return;
1880
1881 snd_hda_apply_pincfgs(codec, alienware_m17x_pin_configs);
1882 spec->eapd_switch = 0;
1883}
1884
1885static void stac92hd73xx_fixup_no_jd(struct hda_codec *codec,
1886 const struct hda_fixup *fix, int action)
1887{
1888 if (action == HDA_FIXUP_ACT_PRE_PROBE)
1889 codec->no_jack_detect = 1;
1890}
1891
1892static const struct hda_fixup stac92hd73xx_fixups[] = {
1893 [STAC_92HD73XX_REF] = {
1894 .type = HDA_FIXUP_FUNC,
1895 .v.func = stac92hd73xx_fixup_ref,
1896 },
1897 [STAC_DELL_M6_AMIC] = {
1898 .type = HDA_FIXUP_FUNC,
1899 .v.func = stac92hd73xx_fixup_dell_m6_amic,
1900 },
1901 [STAC_DELL_M6_DMIC] = {
1902 .type = HDA_FIXUP_FUNC,
1903 .v.func = stac92hd73xx_fixup_dell_m6_dmic,
1904 },
1905 [STAC_DELL_M6_BOTH] = {
1906 .type = HDA_FIXUP_FUNC,
1907 .v.func = stac92hd73xx_fixup_dell_m6_both,
1908 },
1909 [STAC_DELL_EQ] = {
1910 .type = HDA_FIXUP_FUNC,
1911 .v.func = stac92hd73xx_fixup_dell_eq,
1912 },
1913 [STAC_ALIENWARE_M17X] = {
1914 .type = HDA_FIXUP_FUNC,
1915 .v.func = stac92hd73xx_fixup_alienware_m17x,
1916 },
1917 [STAC_92HD73XX_INTEL] = {
1918 .type = HDA_FIXUP_PINS,
1919 .v.pins = intel_dg45id_pin_configs,
1920 },
1921 [STAC_92HD73XX_NO_JD] = {
1922 .type = HDA_FIXUP_FUNC,
1923 .v.func = stac92hd73xx_fixup_no_jd,
1924 },
1925 [STAC_92HD89XX_HP_FRONT_JACK] = {
1926 .type = HDA_FIXUP_PINS,
1927 .v.pins = stac92hd89xx_hp_front_jack_pin_configs,
1928 }
1929};
1930
1931static const struct hda_model_fixup stac92hd73xx_models[] = {
1932 { .id = STAC_92HD73XX_NO_JD, .name = "no-jd" },
1933 { .id = STAC_92HD73XX_REF, .name = "ref" },
1934 { .id = STAC_92HD73XX_INTEL, .name = "intel" },
1935 { .id = STAC_DELL_M6_AMIC, .name = "dell-m6-amic" },
1936 { .id = STAC_DELL_M6_DMIC, .name = "dell-m6-dmic" },
1937 { .id = STAC_DELL_M6_BOTH, .name = "dell-m6" },
1938 { .id = STAC_DELL_EQ, .name = "dell-eq" },
1939 { .id = STAC_ALIENWARE_M17X, .name = "alienware" },
1940 {}
1941};
1942
1943static const struct snd_pci_quirk stac92hd73xx_fixup_tbl[] = {
1944 /* SigmaTel reference board */
1945 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1946 "DFI LanParty", STAC_92HD73XX_REF),
1947 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
1948 "DFI LanParty", STAC_92HD73XX_REF),
1949 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5002,
1950 "Intel DG45ID", STAC_92HD73XX_INTEL),
1951 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5003,
1952 "Intel DG45FC", STAC_92HD73XX_INTEL),
1953 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0254,
1954 "Dell Studio 1535", STAC_DELL_M6_DMIC),
1955 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0255,
1956 "unknown Dell", STAC_DELL_M6_DMIC),
1957 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0256,
1958 "unknown Dell", STAC_DELL_M6_BOTH),
1959 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0257,
1960 "unknown Dell", STAC_DELL_M6_BOTH),
1961 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025e,
1962 "unknown Dell", STAC_DELL_M6_AMIC),
1963 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025f,
1964 "unknown Dell", STAC_DELL_M6_AMIC),
1965 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0271,
1966 "unknown Dell", STAC_DELL_M6_DMIC),
1967 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0272,
1968 "unknown Dell", STAC_DELL_M6_DMIC),
1969 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x029f,
1970 "Dell Studio 1537", STAC_DELL_M6_DMIC),
1971 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02a0,
1972 "Dell Studio 17", STAC_DELL_M6_DMIC),
1973 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02be,
1974 "Dell Studio 1555", STAC_DELL_M6_DMIC),
1975 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02bd,
1976 "Dell Studio 1557", STAC_DELL_M6_DMIC),
1977 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02fe,
1978 "Dell Studio XPS 1645", STAC_DELL_M6_DMIC),
1979 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0413,
1980 "Dell Studio 1558", STAC_DELL_M6_DMIC),
1981 /* codec SSID matching */
1982 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02a1,
1983 "Alienware M17x", STAC_ALIENWARE_M17X),
1984 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x043a,
1985 "Alienware M17x", STAC_ALIENWARE_M17X),
1986 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0490,
1987 "Alienware M17x R3", STAC_DELL_EQ),
1988 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2b17,
1989 "unknown HP", STAC_92HD89XX_HP_FRONT_JACK),
1990 {} /* terminator */
1991};
1992
1993static const struct hda_pintbl ref92hd83xxx_pin_configs[] = {
1994 { 0x0a, 0x02214030 },
1995 { 0x0b, 0x02211010 },
1996 { 0x0c, 0x02a19020 },
1997 { 0x0d, 0x02170130 },
1998 { 0x0e, 0x01014050 },
1999 { 0x0f, 0x01819040 },
2000 { 0x10, 0x01014020 },
2001 { 0x11, 0x90a3014e },
2002 { 0x1f, 0x01451160 },
2003 { 0x20, 0x98560170 },
2004 {}
2005};
2006
2007static const struct hda_pintbl dell_s14_pin_configs[] = {
2008 { 0x0a, 0x0221403f },
2009 { 0x0b, 0x0221101f },
2010 { 0x0c, 0x02a19020 },
2011 { 0x0d, 0x90170110 },
2012 { 0x0e, 0x40f000f0 },
2013 { 0x0f, 0x40f000f0 },
2014 { 0x10, 0x40f000f0 },
2015 { 0x11, 0x90a60160 },
2016 { 0x1f, 0x40f000f0 },
2017 { 0x20, 0x40f000f0 },
2018 {}
2019};
2020
2021static const struct hda_pintbl dell_vostro_3500_pin_configs[] = {
2022 { 0x0a, 0x02a11020 },
2023 { 0x0b, 0x0221101f },
2024 { 0x0c, 0x400000f0 },
2025 { 0x0d, 0x90170110 },
2026 { 0x0e, 0x400000f1 },
2027 { 0x0f, 0x400000f2 },
2028 { 0x10, 0x400000f3 },
2029 { 0x11, 0x90a60160 },
2030 { 0x1f, 0x400000f4 },
2031 { 0x20, 0x400000f5 },
2032 {}
2033};
2034
2035static const struct hda_pintbl hp_dv7_4000_pin_configs[] = {
2036 { 0x0a, 0x03a12050 },
2037 { 0x0b, 0x0321201f },
2038 { 0x0c, 0x40f000f0 },
2039 { 0x0d, 0x90170110 },
2040 { 0x0e, 0x40f000f0 },
2041 { 0x0f, 0x40f000f0 },
2042 { 0x10, 0x90170110 },
2043 { 0x11, 0xd5a30140 },
2044 { 0x1f, 0x40f000f0 },
2045 { 0x20, 0x40f000f0 },
2046 {}
2047};
2048
2049static const struct hda_pintbl hp_zephyr_pin_configs[] = {
2050 { 0x0a, 0x01813050 },
2051 { 0x0b, 0x0421201f },
2052 { 0x0c, 0x04a1205e },
2053 { 0x0d, 0x96130310 },
2054 { 0x0e, 0x96130310 },
2055 { 0x0f, 0x0101401f },
2056 { 0x10, 0x1111611f },
2057 { 0x11, 0xd5a30130 },
2058 {}
2059};
2060
2061static const struct hda_pintbl hp_cNB11_intquad_pin_configs[] = {
2062 { 0x0a, 0x40f000f0 },
2063 { 0x0b, 0x0221101f },
2064 { 0x0c, 0x02a11020 },
2065 { 0x0d, 0x92170110 },
2066 { 0x0e, 0x40f000f0 },
2067 { 0x0f, 0x92170110 },
2068 { 0x10, 0x40f000f0 },
2069 { 0x11, 0xd5a30130 },
2070 { 0x1f, 0x40f000f0 },
2071 { 0x20, 0x40f000f0 },
2072 {}
2073};
2074
2075static void stac92hd83xxx_fixup_hp(struct hda_codec *codec,
2076 const struct hda_fixup *fix, int action)
2077{
2078 struct sigmatel_spec *spec = codec->spec;
2079
2080 if (action != HDA_FIXUP_ACT_PRE_PROBE)
2081 return;
2082
2083 if (hp_bnb2011_with_dock(codec)) {
2084 snd_hda_codec_set_pincfg(codec, 0xa, 0x2101201f);
2085 snd_hda_codec_set_pincfg(codec, 0xf, 0x2181205e);
2086 }
2087
2088 if (find_mute_led_cfg(codec, spec->default_polarity))
2089 codec_dbg(codec, "mute LED gpio %d polarity %d\n",
2090 spec->gpio_led,
2091 spec->gpio_led_polarity);
2092
2093 /* allow auto-switching of dock line-in */
2094 spec->gen.line_in_auto_switch = true;
2095}
2096
2097static void stac92hd83xxx_fixup_hp_zephyr(struct hda_codec *codec,
2098 const struct hda_fixup *fix, int action)
2099{
2100 if (action != HDA_FIXUP_ACT_PRE_PROBE)
2101 return;
2102
2103 snd_hda_apply_pincfgs(codec, hp_zephyr_pin_configs);
2104 snd_hda_add_verbs(codec, stac92hd83xxx_hp_zephyr_init);
2105}
2106
2107static void stac92hd83xxx_fixup_hp_led(struct hda_codec *codec,
2108 const struct hda_fixup *fix, int action)
2109{
2110 struct sigmatel_spec *spec = codec->spec;
2111
2112 if (action == HDA_FIXUP_ACT_PRE_PROBE)
2113 spec->default_polarity = 0;
2114}
2115
2116static void stac92hd83xxx_fixup_hp_inv_led(struct hda_codec *codec,
2117 const struct hda_fixup *fix, int action)
2118{
2119 struct sigmatel_spec *spec = codec->spec;
2120
2121 if (action == HDA_FIXUP_ACT_PRE_PROBE)
2122 spec->default_polarity = 1;
2123}
2124
2125static void stac92hd83xxx_fixup_hp_mic_led(struct hda_codec *codec,
2126 const struct hda_fixup *fix, int action)
2127{
2128 struct sigmatel_spec *spec = codec->spec;
2129
2130 if (action == HDA_FIXUP_ACT_PRE_PROBE) {
2131 spec->mic_mute_led_gpio = 0x08; /* GPIO3 */
2132 /* resetting controller clears GPIO, so we need to keep on */
2133 codec->bus->power_keep_link_on = 1;
2134 }
2135}
2136
2137static void stac92hd83xxx_fixup_hp_led_gpio10(struct hda_codec *codec,
2138 const struct hda_fixup *fix, int action)
2139{
2140 struct sigmatel_spec *spec = codec->spec;
2141
2142 if (action == HDA_FIXUP_ACT_PRE_PROBE) {
2143 spec->gpio_led = 0x10; /* GPIO4 */
2144 spec->default_polarity = 0;
2145 }
2146}
2147
2148static void stac92hd83xxx_fixup_headset_jack(struct hda_codec *codec,
2149 const struct hda_fixup *fix, int action)
2150{
2151 struct sigmatel_spec *spec = codec->spec;
2152
2153 if (action == HDA_FIXUP_ACT_PRE_PROBE)
2154 spec->headset_jack = 1;
2155}
2156
2157static const struct hda_verb hp_bnb13_eq_verbs[] = {
2158 /* 44.1KHz base */
2159 { 0x22, 0x7A6, 0x3E },
2160 { 0x22, 0x7A7, 0x68 },
2161 { 0x22, 0x7A8, 0x17 },
2162 { 0x22, 0x7A9, 0x3E },
2163 { 0x22, 0x7AA, 0x68 },
2164 { 0x22, 0x7AB, 0x17 },
2165 { 0x22, 0x7AC, 0x00 },
2166 { 0x22, 0x7AD, 0x80 },
2167 { 0x22, 0x7A6, 0x83 },
2168 { 0x22, 0x7A7, 0x2F },
2169 { 0x22, 0x7A8, 0xD1 },
2170 { 0x22, 0x7A9, 0x83 },
2171 { 0x22, 0x7AA, 0x2F },
2172 { 0x22, 0x7AB, 0xD1 },
2173 { 0x22, 0x7AC, 0x01 },
2174 { 0x22, 0x7AD, 0x80 },
2175 { 0x22, 0x7A6, 0x3E },
2176 { 0x22, 0x7A7, 0x68 },
2177 { 0x22, 0x7A8, 0x17 },
2178 { 0x22, 0x7A9, 0x3E },
2179 { 0x22, 0x7AA, 0x68 },
2180 { 0x22, 0x7AB, 0x17 },
2181 { 0x22, 0x7AC, 0x02 },
2182 { 0x22, 0x7AD, 0x80 },
2183 { 0x22, 0x7A6, 0x7C },
2184 { 0x22, 0x7A7, 0xC6 },
2185 { 0x22, 0x7A8, 0x0C },
2186 { 0x22, 0x7A9, 0x7C },
2187 { 0x22, 0x7AA, 0xC6 },
2188 { 0x22, 0x7AB, 0x0C },
2189 { 0x22, 0x7AC, 0x03 },
2190 { 0x22, 0x7AD, 0x80 },
2191 { 0x22, 0x7A6, 0xC3 },
2192 { 0x22, 0x7A7, 0x25 },
2193 { 0x22, 0x7A8, 0xAF },
2194 { 0x22, 0x7A9, 0xC3 },
2195 { 0x22, 0x7AA, 0x25 },
2196 { 0x22, 0x7AB, 0xAF },
2197 { 0x22, 0x7AC, 0x04 },
2198 { 0x22, 0x7AD, 0x80 },
2199 { 0x22, 0x7A6, 0x3E },
2200 { 0x22, 0x7A7, 0x85 },
2201 { 0x22, 0x7A8, 0x73 },
2202 { 0x22, 0x7A9, 0x3E },
2203 { 0x22, 0x7AA, 0x85 },
2204 { 0x22, 0x7AB, 0x73 },
2205 { 0x22, 0x7AC, 0x05 },
2206 { 0x22, 0x7AD, 0x80 },
2207 { 0x22, 0x7A6, 0x85 },
2208 { 0x22, 0x7A7, 0x39 },
2209 { 0x22, 0x7A8, 0xC7 },
2210 { 0x22, 0x7A9, 0x85 },
2211 { 0x22, 0x7AA, 0x39 },
2212 { 0x22, 0x7AB, 0xC7 },
2213 { 0x22, 0x7AC, 0x06 },
2214 { 0x22, 0x7AD, 0x80 },
2215 { 0x22, 0x7A6, 0x3C },
2216 { 0x22, 0x7A7, 0x90 },
2217 { 0x22, 0x7A8, 0xB0 },
2218 { 0x22, 0x7A9, 0x3C },
2219 { 0x22, 0x7AA, 0x90 },
2220 { 0x22, 0x7AB, 0xB0 },
2221 { 0x22, 0x7AC, 0x07 },
2222 { 0x22, 0x7AD, 0x80 },
2223 { 0x22, 0x7A6, 0x7A },
2224 { 0x22, 0x7A7, 0xC6 },
2225 { 0x22, 0x7A8, 0x39 },
2226 { 0x22, 0x7A9, 0x7A },
2227 { 0x22, 0x7AA, 0xC6 },
2228 { 0x22, 0x7AB, 0x39 },
2229 { 0x22, 0x7AC, 0x08 },
2230 { 0x22, 0x7AD, 0x80 },
2231 { 0x22, 0x7A6, 0xC4 },
2232 { 0x22, 0x7A7, 0xE9 },
2233 { 0x22, 0x7A8, 0xDC },
2234 { 0x22, 0x7A9, 0xC4 },
2235 { 0x22, 0x7AA, 0xE9 },
2236 { 0x22, 0x7AB, 0xDC },
2237 { 0x22, 0x7AC, 0x09 },
2238 { 0x22, 0x7AD, 0x80 },
2239 { 0x22, 0x7A6, 0x3D },
2240 { 0x22, 0x7A7, 0xE1 },
2241 { 0x22, 0x7A8, 0x0D },
2242 { 0x22, 0x7A9, 0x3D },
2243 { 0x22, 0x7AA, 0xE1 },
2244 { 0x22, 0x7AB, 0x0D },
2245 { 0x22, 0x7AC, 0x0A },
2246 { 0x22, 0x7AD, 0x80 },
2247 { 0x22, 0x7A6, 0x89 },
2248 { 0x22, 0x7A7, 0xB6 },
2249 { 0x22, 0x7A8, 0xEB },
2250 { 0x22, 0x7A9, 0x89 },
2251 { 0x22, 0x7AA, 0xB6 },
2252 { 0x22, 0x7AB, 0xEB },
2253 { 0x22, 0x7AC, 0x0B },
2254 { 0x22, 0x7AD, 0x80 },
2255 { 0x22, 0x7A6, 0x39 },
2256 { 0x22, 0x7A7, 0x9D },
2257 { 0x22, 0x7A8, 0xFE },
2258 { 0x22, 0x7A9, 0x39 },
2259 { 0x22, 0x7AA, 0x9D },
2260 { 0x22, 0x7AB, 0xFE },
2261 { 0x22, 0x7AC, 0x0C },
2262 { 0x22, 0x7AD, 0x80 },
2263 { 0x22, 0x7A6, 0x76 },
2264 { 0x22, 0x7A7, 0x49 },
2265 { 0x22, 0x7A8, 0x15 },
2266 { 0x22, 0x7A9, 0x76 },
2267 { 0x22, 0x7AA, 0x49 },
2268 { 0x22, 0x7AB, 0x15 },
2269 { 0x22, 0x7AC, 0x0D },
2270 { 0x22, 0x7AD, 0x80 },
2271 { 0x22, 0x7A6, 0xC8 },
2272 { 0x22, 0x7A7, 0x80 },
2273 { 0x22, 0x7A8, 0xF5 },
2274 { 0x22, 0x7A9, 0xC8 },
2275 { 0x22, 0x7AA, 0x80 },
2276 { 0x22, 0x7AB, 0xF5 },
2277 { 0x22, 0x7AC, 0x0E },
2278 { 0x22, 0x7AD, 0x80 },
2279 { 0x22, 0x7A6, 0x40 },
2280 { 0x22, 0x7A7, 0x00 },
2281 { 0x22, 0x7A8, 0x00 },
2282 { 0x22, 0x7A9, 0x40 },
2283 { 0x22, 0x7AA, 0x00 },
2284 { 0x22, 0x7AB, 0x00 },
2285 { 0x22, 0x7AC, 0x0F },
2286 { 0x22, 0x7AD, 0x80 },
2287 { 0x22, 0x7A6, 0x90 },
2288 { 0x22, 0x7A7, 0x68 },
2289 { 0x22, 0x7A8, 0xF1 },
2290 { 0x22, 0x7A9, 0x90 },
2291 { 0x22, 0x7AA, 0x68 },
2292 { 0x22, 0x7AB, 0xF1 },
2293 { 0x22, 0x7AC, 0x10 },
2294 { 0x22, 0x7AD, 0x80 },
2295 { 0x22, 0x7A6, 0x34 },
2296 { 0x22, 0x7A7, 0x47 },
2297 { 0x22, 0x7A8, 0x6C },
2298 { 0x22, 0x7A9, 0x34 },
2299 { 0x22, 0x7AA, 0x47 },
2300 { 0x22, 0x7AB, 0x6C },
2301 { 0x22, 0x7AC, 0x11 },
2302 { 0x22, 0x7AD, 0x80 },
2303 { 0x22, 0x7A6, 0x6F },
2304 { 0x22, 0x7A7, 0x97 },
2305 { 0x22, 0x7A8, 0x0F },
2306 { 0x22, 0x7A9, 0x6F },
2307 { 0x22, 0x7AA, 0x97 },
2308 { 0x22, 0x7AB, 0x0F },
2309 { 0x22, 0x7AC, 0x12 },
2310 { 0x22, 0x7AD, 0x80 },
2311 { 0x22, 0x7A6, 0xCB },
2312 { 0x22, 0x7A7, 0xB8 },
2313 { 0x22, 0x7A8, 0x94 },
2314 { 0x22, 0x7A9, 0xCB },
2315 { 0x22, 0x7AA, 0xB8 },
2316 { 0x22, 0x7AB, 0x94 },
2317 { 0x22, 0x7AC, 0x13 },
2318 { 0x22, 0x7AD, 0x80 },
2319 { 0x22, 0x7A6, 0x40 },
2320 { 0x22, 0x7A7, 0x00 },
2321 { 0x22, 0x7A8, 0x00 },
2322 { 0x22, 0x7A9, 0x40 },
2323 { 0x22, 0x7AA, 0x00 },
2324 { 0x22, 0x7AB, 0x00 },
2325 { 0x22, 0x7AC, 0x14 },
2326 { 0x22, 0x7AD, 0x80 },
2327 { 0x22, 0x7A6, 0x95 },
2328 { 0x22, 0x7A7, 0x76 },
2329 { 0x22, 0x7A8, 0x5B },
2330 { 0x22, 0x7A9, 0x95 },
2331 { 0x22, 0x7AA, 0x76 },
2332 { 0x22, 0x7AB, 0x5B },
2333 { 0x22, 0x7AC, 0x15 },
2334 { 0x22, 0x7AD, 0x80 },
2335 { 0x22, 0x7A6, 0x31 },
2336 { 0x22, 0x7A7, 0xAC },
2337 { 0x22, 0x7A8, 0x31 },
2338 { 0x22, 0x7A9, 0x31 },
2339 { 0x22, 0x7AA, 0xAC },
2340 { 0x22, 0x7AB, 0x31 },
2341 { 0x22, 0x7AC, 0x16 },
2342 { 0x22, 0x7AD, 0x80 },
2343 { 0x22, 0x7A6, 0x6A },
2344 { 0x22, 0x7A7, 0x89 },
2345 { 0x22, 0x7A8, 0xA5 },
2346 { 0x22, 0x7A9, 0x6A },
2347 { 0x22, 0x7AA, 0x89 },
2348 { 0x22, 0x7AB, 0xA5 },
2349 { 0x22, 0x7AC, 0x17 },
2350 { 0x22, 0x7AD, 0x80 },
2351 { 0x22, 0x7A6, 0xCE },
2352 { 0x22, 0x7A7, 0x53 },
2353 { 0x22, 0x7A8, 0xCF },
2354 { 0x22, 0x7A9, 0xCE },
2355 { 0x22, 0x7AA, 0x53 },
2356 { 0x22, 0x7AB, 0xCF },
2357 { 0x22, 0x7AC, 0x18 },
2358 { 0x22, 0x7AD, 0x80 },
2359 { 0x22, 0x7A6, 0x40 },
2360 { 0x22, 0x7A7, 0x00 },
2361 { 0x22, 0x7A8, 0x00 },
2362 { 0x22, 0x7A9, 0x40 },
2363 { 0x22, 0x7AA, 0x00 },
2364 { 0x22, 0x7AB, 0x00 },
2365 { 0x22, 0x7AC, 0x19 },
2366 { 0x22, 0x7AD, 0x80 },
2367 /* 48KHz base */
2368 { 0x22, 0x7A6, 0x3E },
2369 { 0x22, 0x7A7, 0x88 },
2370 { 0x22, 0x7A8, 0xDC },
2371 { 0x22, 0x7A9, 0x3E },
2372 { 0x22, 0x7AA, 0x88 },
2373 { 0x22, 0x7AB, 0xDC },
2374 { 0x22, 0x7AC, 0x1A },
2375 { 0x22, 0x7AD, 0x80 },
2376 { 0x22, 0x7A6, 0x82 },
2377 { 0x22, 0x7A7, 0xEE },
2378 { 0x22, 0x7A8, 0x46 },
2379 { 0x22, 0x7A9, 0x82 },
2380 { 0x22, 0x7AA, 0xEE },
2381 { 0x22, 0x7AB, 0x46 },
2382 { 0x22, 0x7AC, 0x1B },
2383 { 0x22, 0x7AD, 0x80 },
2384 { 0x22, 0x7A6, 0x3E },
2385 { 0x22, 0x7A7, 0x88 },
2386 { 0x22, 0x7A8, 0xDC },
2387 { 0x22, 0x7A9, 0x3E },
2388 { 0x22, 0x7AA, 0x88 },
2389 { 0x22, 0x7AB, 0xDC },
2390 { 0x22, 0x7AC, 0x1C },
2391 { 0x22, 0x7AD, 0x80 },
2392 { 0x22, 0x7A6, 0x7D },
2393 { 0x22, 0x7A7, 0x09 },
2394 { 0x22, 0x7A8, 0x28 },
2395 { 0x22, 0x7A9, 0x7D },
2396 { 0x22, 0x7AA, 0x09 },
2397 { 0x22, 0x7AB, 0x28 },
2398 { 0x22, 0x7AC, 0x1D },
2399 { 0x22, 0x7AD, 0x80 },
2400 { 0x22, 0x7A6, 0xC2 },
2401 { 0x22, 0x7A7, 0xE5 },
2402 { 0x22, 0x7A8, 0xB4 },
2403 { 0x22, 0x7A9, 0xC2 },
2404 { 0x22, 0x7AA, 0xE5 },
2405 { 0x22, 0x7AB, 0xB4 },
2406 { 0x22, 0x7AC, 0x1E },
2407 { 0x22, 0x7AD, 0x80 },
2408 { 0x22, 0x7A6, 0x3E },
2409 { 0x22, 0x7A7, 0xA3 },
2410 { 0x22, 0x7A8, 0x1F },
2411 { 0x22, 0x7A9, 0x3E },
2412 { 0x22, 0x7AA, 0xA3 },
2413 { 0x22, 0x7AB, 0x1F },
2414 { 0x22, 0x7AC, 0x1F },
2415 { 0x22, 0x7AD, 0x80 },
2416 { 0x22, 0x7A6, 0x84 },
2417 { 0x22, 0x7A7, 0xCA },
2418 { 0x22, 0x7A8, 0xF1 },
2419 { 0x22, 0x7A9, 0x84 },
2420 { 0x22, 0x7AA, 0xCA },
2421 { 0x22, 0x7AB, 0xF1 },
2422 { 0x22, 0x7AC, 0x20 },
2423 { 0x22, 0x7AD, 0x80 },
2424 { 0x22, 0x7A6, 0x3C },
2425 { 0x22, 0x7A7, 0xD5 },
2426 { 0x22, 0x7A8, 0x9C },
2427 { 0x22, 0x7A9, 0x3C },
2428 { 0x22, 0x7AA, 0xD5 },
2429 { 0x22, 0x7AB, 0x9C },
2430 { 0x22, 0x7AC, 0x21 },
2431 { 0x22, 0x7AD, 0x80 },
2432 { 0x22, 0x7A6, 0x7B },
2433 { 0x22, 0x7A7, 0x35 },
2434 { 0x22, 0x7A8, 0x0F },
2435 { 0x22, 0x7A9, 0x7B },
2436 { 0x22, 0x7AA, 0x35 },
2437 { 0x22, 0x7AB, 0x0F },
2438 { 0x22, 0x7AC, 0x22 },
2439 { 0x22, 0x7AD, 0x80 },
2440 { 0x22, 0x7A6, 0xC4 },
2441 { 0x22, 0x7A7, 0x87 },
2442 { 0x22, 0x7A8, 0x45 },
2443 { 0x22, 0x7A9, 0xC4 },
2444 { 0x22, 0x7AA, 0x87 },
2445 { 0x22, 0x7AB, 0x45 },
2446 { 0x22, 0x7AC, 0x23 },
2447 { 0x22, 0x7AD, 0x80 },
2448 { 0x22, 0x7A6, 0x3E },
2449 { 0x22, 0x7A7, 0x0A },
2450 { 0x22, 0x7A8, 0x78 },
2451 { 0x22, 0x7A9, 0x3E },
2452 { 0x22, 0x7AA, 0x0A },
2453 { 0x22, 0x7AB, 0x78 },
2454 { 0x22, 0x7AC, 0x24 },
2455 { 0x22, 0x7AD, 0x80 },
2456 { 0x22, 0x7A6, 0x88 },
2457 { 0x22, 0x7A7, 0xE2 },
2458 { 0x22, 0x7A8, 0x05 },
2459 { 0x22, 0x7A9, 0x88 },
2460 { 0x22, 0x7AA, 0xE2 },
2461 { 0x22, 0x7AB, 0x05 },
2462 { 0x22, 0x7AC, 0x25 },
2463 { 0x22, 0x7AD, 0x80 },
2464 { 0x22, 0x7A6, 0x3A },
2465 { 0x22, 0x7A7, 0x1A },
2466 { 0x22, 0x7A8, 0xA3 },
2467 { 0x22, 0x7A9, 0x3A },
2468 { 0x22, 0x7AA, 0x1A },
2469 { 0x22, 0x7AB, 0xA3 },
2470 { 0x22, 0x7AC, 0x26 },
2471 { 0x22, 0x7AD, 0x80 },
2472 { 0x22, 0x7A6, 0x77 },
2473 { 0x22, 0x7A7, 0x1D },
2474 { 0x22, 0x7A8, 0xFB },
2475 { 0x22, 0x7A9, 0x77 },
2476 { 0x22, 0x7AA, 0x1D },
2477 { 0x22, 0x7AB, 0xFB },
2478 { 0x22, 0x7AC, 0x27 },
2479 { 0x22, 0x7AD, 0x80 },
2480 { 0x22, 0x7A6, 0xC7 },
2481 { 0x22, 0x7A7, 0xDA },
2482 { 0x22, 0x7A8, 0xE5 },
2483 { 0x22, 0x7A9, 0xC7 },
2484 { 0x22, 0x7AA, 0xDA },
2485 { 0x22, 0x7AB, 0xE5 },
2486 { 0x22, 0x7AC, 0x28 },
2487 { 0x22, 0x7AD, 0x80 },
2488 { 0x22, 0x7A6, 0x40 },
2489 { 0x22, 0x7A7, 0x00 },
2490 { 0x22, 0x7A8, 0x00 },
2491 { 0x22, 0x7A9, 0x40 },
2492 { 0x22, 0x7AA, 0x00 },
2493 { 0x22, 0x7AB, 0x00 },
2494 { 0x22, 0x7AC, 0x29 },
2495 { 0x22, 0x7AD, 0x80 },
2496 { 0x22, 0x7A6, 0x8E },
2497 { 0x22, 0x7A7, 0xD7 },
2498 { 0x22, 0x7A8, 0x22 },
2499 { 0x22, 0x7A9, 0x8E },
2500 { 0x22, 0x7AA, 0xD7 },
2501 { 0x22, 0x7AB, 0x22 },
2502 { 0x22, 0x7AC, 0x2A },
2503 { 0x22, 0x7AD, 0x80 },
2504 { 0x22, 0x7A6, 0x35 },
2505 { 0x22, 0x7A7, 0x26 },
2506 { 0x22, 0x7A8, 0xC6 },
2507 { 0x22, 0x7A9, 0x35 },
2508 { 0x22, 0x7AA, 0x26 },
2509 { 0x22, 0x7AB, 0xC6 },
2510 { 0x22, 0x7AC, 0x2B },
2511 { 0x22, 0x7AD, 0x80 },
2512 { 0x22, 0x7A6, 0x71 },
2513 { 0x22, 0x7A7, 0x28 },
2514 { 0x22, 0x7A8, 0xDE },
2515 { 0x22, 0x7A9, 0x71 },
2516 { 0x22, 0x7AA, 0x28 },
2517 { 0x22, 0x7AB, 0xDE },
2518 { 0x22, 0x7AC, 0x2C },
2519 { 0x22, 0x7AD, 0x80 },
2520 { 0x22, 0x7A6, 0xCA },
2521 { 0x22, 0x7A7, 0xD9 },
2522 { 0x22, 0x7A8, 0x3A },
2523 { 0x22, 0x7A9, 0xCA },
2524 { 0x22, 0x7AA, 0xD9 },
2525 { 0x22, 0x7AB, 0x3A },
2526 { 0x22, 0x7AC, 0x2D },
2527 { 0x22, 0x7AD, 0x80 },
2528 { 0x22, 0x7A6, 0x40 },
2529 { 0x22, 0x7A7, 0x00 },
2530 { 0x22, 0x7A8, 0x00 },
2531 { 0x22, 0x7A9, 0x40 },
2532 { 0x22, 0x7AA, 0x00 },
2533 { 0x22, 0x7AB, 0x00 },
2534 { 0x22, 0x7AC, 0x2E },
2535 { 0x22, 0x7AD, 0x80 },
2536 { 0x22, 0x7A6, 0x93 },
2537 { 0x22, 0x7A7, 0x5E },
2538 { 0x22, 0x7A8, 0xD8 },
2539 { 0x22, 0x7A9, 0x93 },
2540 { 0x22, 0x7AA, 0x5E },
2541 { 0x22, 0x7AB, 0xD8 },
2542 { 0x22, 0x7AC, 0x2F },
2543 { 0x22, 0x7AD, 0x80 },
2544 { 0x22, 0x7A6, 0x32 },
2545 { 0x22, 0x7A7, 0xB7 },
2546 { 0x22, 0x7A8, 0xB1 },
2547 { 0x22, 0x7A9, 0x32 },
2548 { 0x22, 0x7AA, 0xB7 },
2549 { 0x22, 0x7AB, 0xB1 },
2550 { 0x22, 0x7AC, 0x30 },
2551 { 0x22, 0x7AD, 0x80 },
2552 { 0x22, 0x7A6, 0x6C },
2553 { 0x22, 0x7A7, 0xA1 },
2554 { 0x22, 0x7A8, 0x28 },
2555 { 0x22, 0x7A9, 0x6C },
2556 { 0x22, 0x7AA, 0xA1 },
2557 { 0x22, 0x7AB, 0x28 },
2558 { 0x22, 0x7AC, 0x31 },
2559 { 0x22, 0x7AD, 0x80 },
2560 { 0x22, 0x7A6, 0xCD },
2561 { 0x22, 0x7A7, 0x48 },
2562 { 0x22, 0x7A8, 0x4F },
2563 { 0x22, 0x7A9, 0xCD },
2564 { 0x22, 0x7AA, 0x48 },
2565 { 0x22, 0x7AB, 0x4F },
2566 { 0x22, 0x7AC, 0x32 },
2567 { 0x22, 0x7AD, 0x80 },
2568 { 0x22, 0x7A6, 0x40 },
2569 { 0x22, 0x7A7, 0x00 },
2570 { 0x22, 0x7A8, 0x00 },
2571 { 0x22, 0x7A9, 0x40 },
2572 { 0x22, 0x7AA, 0x00 },
2573 { 0x22, 0x7AB, 0x00 },
2574 { 0x22, 0x7AC, 0x33 },
2575 { 0x22, 0x7AD, 0x80 },
2576 /* common */
2577 { 0x22, 0x782, 0xC1 },
2578 { 0x22, 0x771, 0x2C },
2579 { 0x22, 0x772, 0x2C },
2580 { 0x22, 0x788, 0x04 },
2581 { 0x01, 0x7B0, 0x08 },
2582 {}
2583};
2584
2585static const struct hda_fixup stac92hd83xxx_fixups[] = {
2586 [STAC_92HD83XXX_REF] = {
2587 .type = HDA_FIXUP_PINS,
2588 .v.pins = ref92hd83xxx_pin_configs,
2589 },
2590 [STAC_92HD83XXX_PWR_REF] = {
2591 .type = HDA_FIXUP_PINS,
2592 .v.pins = ref92hd83xxx_pin_configs,
2593 },
2594 [STAC_DELL_S14] = {
2595 .type = HDA_FIXUP_PINS,
2596 .v.pins = dell_s14_pin_configs,
2597 },
2598 [STAC_DELL_VOSTRO_3500] = {
2599 .type = HDA_FIXUP_PINS,
2600 .v.pins = dell_vostro_3500_pin_configs,
2601 },
2602 [STAC_92HD83XXX_HP_cNB11_INTQUAD] = {
2603 .type = HDA_FIXUP_PINS,
2604 .v.pins = hp_cNB11_intquad_pin_configs,
2605 .chained = true,
2606 .chain_id = STAC_92HD83XXX_HP,
2607 },
2608 [STAC_92HD83XXX_HP] = {
2609 .type = HDA_FIXUP_FUNC,
2610 .v.func = stac92hd83xxx_fixup_hp,
2611 },
2612 [STAC_HP_DV7_4000] = {
2613 .type = HDA_FIXUP_PINS,
2614 .v.pins = hp_dv7_4000_pin_configs,
2615 .chained = true,
2616 .chain_id = STAC_92HD83XXX_HP,
2617 },
2618 [STAC_HP_ZEPHYR] = {
2619 .type = HDA_FIXUP_FUNC,
2620 .v.func = stac92hd83xxx_fixup_hp_zephyr,
2621 .chained = true,
2622 .chain_id = STAC_92HD83XXX_HP,
2623 },
2624 [STAC_92HD83XXX_HP_LED] = {
2625 .type = HDA_FIXUP_FUNC,
2626 .v.func = stac92hd83xxx_fixup_hp_led,
2627 .chained = true,
2628 .chain_id = STAC_92HD83XXX_HP,
2629 },
2630 [STAC_92HD83XXX_HP_INV_LED] = {
2631 .type = HDA_FIXUP_FUNC,
2632 .v.func = stac92hd83xxx_fixup_hp_inv_led,
2633 .chained = true,
2634 .chain_id = STAC_92HD83XXX_HP,
2635 },
2636 [STAC_92HD83XXX_HP_MIC_LED] = {
2637 .type = HDA_FIXUP_FUNC,
2638 .v.func = stac92hd83xxx_fixup_hp_mic_led,
2639 .chained = true,
2640 .chain_id = STAC_92HD83XXX_HP,
2641 },
2642 [STAC_HP_LED_GPIO10] = {
2643 .type = HDA_FIXUP_FUNC,
2644 .v.func = stac92hd83xxx_fixup_hp_led_gpio10,
2645 .chained = true,
2646 .chain_id = STAC_92HD83XXX_HP,
2647 },
2648 [STAC_92HD83XXX_HEADSET_JACK] = {
2649 .type = HDA_FIXUP_FUNC,
2650 .v.func = stac92hd83xxx_fixup_headset_jack,
2651 },
2652 [STAC_HP_ENVY_BASS] = {
2653 .type = HDA_FIXUP_PINS,
2654 .v.pins = (const struct hda_pintbl[]) {
2655 { 0x0f, 0x90170111 },
2656 {}
2657 },
2658 },
2659 [STAC_HP_BNB13_EQ] = {
2660 .type = HDA_FIXUP_VERBS,
2661 .v.verbs = hp_bnb13_eq_verbs,
2662 .chained = true,
2663 .chain_id = STAC_92HD83XXX_HP_MIC_LED,
2664 },
2665};
2666
2667static const struct hda_model_fixup stac92hd83xxx_models[] = {
2668 { .id = STAC_92HD83XXX_REF, .name = "ref" },
2669 { .id = STAC_92HD83XXX_PWR_REF, .name = "mic-ref" },
2670 { .id = STAC_DELL_S14, .name = "dell-s14" },
2671 { .id = STAC_DELL_VOSTRO_3500, .name = "dell-vostro-3500" },
2672 { .id = STAC_92HD83XXX_HP_cNB11_INTQUAD, .name = "hp_cNB11_intquad" },
2673 { .id = STAC_HP_DV7_4000, .name = "hp-dv7-4000" },
2674 { .id = STAC_HP_ZEPHYR, .name = "hp-zephyr" },
2675 { .id = STAC_92HD83XXX_HP_LED, .name = "hp-led" },
2676 { .id = STAC_92HD83XXX_HP_INV_LED, .name = "hp-inv-led" },
2677 { .id = STAC_92HD83XXX_HP_MIC_LED, .name = "hp-mic-led" },
2678 { .id = STAC_92HD83XXX_HEADSET_JACK, .name = "headset-jack" },
2679 { .id = STAC_HP_ENVY_BASS, .name = "hp-envy-bass" },
2680 { .id = STAC_HP_BNB13_EQ, .name = "hp-bnb13-eq" },
2681 {}
2682};
2683
2684static const struct snd_pci_quirk stac92hd83xxx_fixup_tbl[] = {
2685 /* SigmaTel reference board */
2686 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
2687 "DFI LanParty", STAC_92HD83XXX_REF),
2688 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
2689 "DFI LanParty", STAC_92HD83XXX_REF),
2690 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ba,
2691 "unknown Dell", STAC_DELL_S14),
2692 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0532,
2693 "Dell Latitude E6230", STAC_92HD83XXX_HEADSET_JACK),
2694 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0533,
2695 "Dell Latitude E6330", STAC_92HD83XXX_HEADSET_JACK),
2696 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0534,
2697 "Dell Latitude E6430", STAC_92HD83XXX_HEADSET_JACK),
2698 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0535,
2699 "Dell Latitude E6530", STAC_92HD83XXX_HEADSET_JACK),
2700 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x053c,
2701 "Dell Latitude E5430", STAC_92HD83XXX_HEADSET_JACK),
2702 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x053d,
2703 "Dell Latitude E5530", STAC_92HD83XXX_HEADSET_JACK),
2704 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0549,
2705 "Dell Latitude E5430", STAC_92HD83XXX_HEADSET_JACK),
2706 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x057d,
2707 "Dell Latitude E6430s", STAC_92HD83XXX_HEADSET_JACK),
2708 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0584,
2709 "Dell Latitude E6430U", STAC_92HD83XXX_HEADSET_JACK),
2710 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x1028,
2711 "Dell Vostro 3500", STAC_DELL_VOSTRO_3500),
2712 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1656,
2713 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2714 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1657,
2715 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2716 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1658,
2717 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2718 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1659,
2719 "HP Pavilion dv7", STAC_HP_DV7_4000),
2720 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x165A,
2721 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2722 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x165B,
2723 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2724 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1888,
2725 "HP Envy Spectre", STAC_HP_ENVY_BASS),
2726 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1899,
2727 "HP Folio 13", STAC_HP_LED_GPIO10),
2728 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x18df,
2729 "HP Folio", STAC_HP_BNB13_EQ),
2730 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x18F8,
2731 "HP bNB13", STAC_HP_BNB13_EQ),
2732 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1909,
2733 "HP bNB13", STAC_HP_BNB13_EQ),
2734 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x190A,
2735 "HP bNB13", STAC_HP_BNB13_EQ),
2736 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1940,
2737 "HP bNB13", STAC_HP_BNB13_EQ),
2738 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1941,
2739 "HP bNB13", STAC_HP_BNB13_EQ),
2740 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1942,
2741 "HP bNB13", STAC_HP_BNB13_EQ),
2742 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1943,
2743 "HP bNB13", STAC_HP_BNB13_EQ),
2744 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1944,
2745 "HP bNB13", STAC_HP_BNB13_EQ),
2746 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1945,
2747 "HP bNB13", STAC_HP_BNB13_EQ),
2748 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1946,
2749 "HP bNB13", STAC_HP_BNB13_EQ),
2750 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1948,
2751 "HP bNB13", STAC_HP_BNB13_EQ),
2752 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1949,
2753 "HP bNB13", STAC_HP_BNB13_EQ),
2754 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x194A,
2755 "HP bNB13", STAC_HP_BNB13_EQ),
2756 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x194B,
2757 "HP bNB13", STAC_HP_BNB13_EQ),
2758 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x194C,
2759 "HP bNB13", STAC_HP_BNB13_EQ),
2760 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x194E,
2761 "HP bNB13", STAC_HP_BNB13_EQ),
2762 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x194F,
2763 "HP bNB13", STAC_HP_BNB13_EQ),
2764 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1950,
2765 "HP bNB13", STAC_HP_BNB13_EQ),
2766 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1951,
2767 "HP bNB13", STAC_HP_BNB13_EQ),
2768 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x195A,
2769 "HP bNB13", STAC_HP_BNB13_EQ),
2770 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x195B,
2771 "HP bNB13", STAC_HP_BNB13_EQ),
2772 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x195C,
2773 "HP bNB13", STAC_HP_BNB13_EQ),
2774 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1991,
2775 "HP bNB13", STAC_HP_BNB13_EQ),
2776 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2103,
2777 "HP bNB13", STAC_HP_BNB13_EQ),
2778 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2104,
2779 "HP bNB13", STAC_HP_BNB13_EQ),
2780 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2105,
2781 "HP bNB13", STAC_HP_BNB13_EQ),
2782 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2106,
2783 "HP bNB13", STAC_HP_BNB13_EQ),
2784 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2107,
2785 "HP bNB13", STAC_HP_BNB13_EQ),
2786 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2108,
2787 "HP bNB13", STAC_HP_BNB13_EQ),
2788 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2109,
2789 "HP bNB13", STAC_HP_BNB13_EQ),
2790 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x210A,
2791 "HP bNB13", STAC_HP_BNB13_EQ),
2792 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x210B,
2793 "HP bNB13", STAC_HP_BNB13_EQ),
2794 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x211C,
2795 "HP bNB13", STAC_HP_BNB13_EQ),
2796 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x211D,
2797 "HP bNB13", STAC_HP_BNB13_EQ),
2798 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x211E,
2799 "HP bNB13", STAC_HP_BNB13_EQ),
2800 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x211F,
2801 "HP bNB13", STAC_HP_BNB13_EQ),
2802 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2120,
2803 "HP bNB13", STAC_HP_BNB13_EQ),
2804 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2121,
2805 "HP bNB13", STAC_HP_BNB13_EQ),
2806 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2122,
2807 "HP bNB13", STAC_HP_BNB13_EQ),
2808 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2123,
2809 "HP bNB13", STAC_HP_BNB13_EQ),
2810 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x213E,
2811 "HP bNB13", STAC_HP_BNB13_EQ),
2812 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x213F,
2813 "HP bNB13", STAC_HP_BNB13_EQ),
2814 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2140,
2815 "HP bNB13", STAC_HP_BNB13_EQ),
2816 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x21B2,
2817 "HP bNB13", STAC_HP_BNB13_EQ),
2818 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x21B3,
2819 "HP bNB13", STAC_HP_BNB13_EQ),
2820 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x21B5,
2821 "HP bNB13", STAC_HP_BNB13_EQ),
2822 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x21B6,
2823 "HP bNB13", STAC_HP_BNB13_EQ),
2824 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xff00, 0x1900,
2825 "HP", STAC_92HD83XXX_HP_MIC_LED),
2826 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xff00, 0x2000,
2827 "HP", STAC_92HD83XXX_HP_MIC_LED),
2828 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xff00, 0x2100,
2829 "HP", STAC_92HD83XXX_HP_MIC_LED),
2830 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3388,
2831 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2832 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3389,
2833 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2834 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355B,
2835 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2836 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355C,
2837 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2838 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355D,
2839 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2840 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355E,
2841 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2842 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355F,
2843 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2844 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3560,
2845 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2846 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x358B,
2847 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2848 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x358C,
2849 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2850 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x358D,
2851 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2852 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3591,
2853 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2854 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3592,
2855 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2856 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3593,
2857 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2858 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3561,
2859 "HP", STAC_HP_ZEPHYR),
2860 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3660,
2861 "HP Mini", STAC_92HD83XXX_HP_LED),
2862 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x144E,
2863 "HP Pavilion dv5", STAC_92HD83XXX_HP_INV_LED),
2864 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x148a,
2865 "HP Mini", STAC_92HD83XXX_HP_LED),
2866 SND_PCI_QUIRK_VENDOR(PCI_VENDOR_ID_HP, "HP", STAC_92HD83XXX_HP),
2867 {} /* terminator */
2868};
2869
2870/* HP dv7 bass switch - GPIO5 */
2871#define stac_hp_bass_gpio_info snd_ctl_boolean_mono_info
2872static int stac_hp_bass_gpio_get(struct snd_kcontrol *kcontrol,
2873 struct snd_ctl_elem_value *ucontrol)
2874{
2875 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2876 struct sigmatel_spec *spec = codec->spec;
2877 ucontrol->value.integer.value[0] = !!(spec->gpio_data & 0x20);
2878 return 0;
2879}
2880
2881static int stac_hp_bass_gpio_put(struct snd_kcontrol *kcontrol,
2882 struct snd_ctl_elem_value *ucontrol)
2883{
2884 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2885 struct sigmatel_spec *spec = codec->spec;
2886 unsigned int gpio_data;
2887
2888 gpio_data = (spec->gpio_data & ~0x20) |
2889 (ucontrol->value.integer.value[0] ? 0x20 : 0);
2890 if (gpio_data == spec->gpio_data)
2891 return 0;
2892 spec->gpio_data = gpio_data;
2893 stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, spec->gpio_data);
2894 return 1;
2895}
2896
2897static const struct snd_kcontrol_new stac_hp_bass_sw_ctrl = {
2898 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2899 .info = stac_hp_bass_gpio_info,
2900 .get = stac_hp_bass_gpio_get,
2901 .put = stac_hp_bass_gpio_put,
2902};
2903
2904static int stac_add_hp_bass_switch(struct hda_codec *codec)
2905{
2906 struct sigmatel_spec *spec = codec->spec;
2907
2908 if (!snd_hda_gen_add_kctl(&spec->gen, "Bass Speaker Playback Switch",
2909 &stac_hp_bass_sw_ctrl))
2910 return -ENOMEM;
2911
2912 spec->gpio_mask |= 0x20;
2913 spec->gpio_dir |= 0x20;
2914 spec->gpio_data |= 0x20;
2915 return 0;
2916}
2917
2918static const struct hda_pintbl ref92hd71bxx_pin_configs[] = {
2919 { 0x0a, 0x02214030 },
2920 { 0x0b, 0x02a19040 },
2921 { 0x0c, 0x01a19020 },
2922 { 0x0d, 0x01014010 },
2923 { 0x0e, 0x0181302e },
2924 { 0x0f, 0x01014010 },
2925 { 0x14, 0x01019020 },
2926 { 0x18, 0x90a000f0 },
2927 { 0x19, 0x90a000f0 },
2928 { 0x1e, 0x01452050 },
2929 { 0x1f, 0x01452050 },
2930 {}
2931};
2932
2933static const struct hda_pintbl dell_m4_1_pin_configs[] = {
2934 { 0x0a, 0x0421101f },
2935 { 0x0b, 0x04a11221 },
2936 { 0x0c, 0x40f000f0 },
2937 { 0x0d, 0x90170110 },
2938 { 0x0e, 0x23a1902e },
2939 { 0x0f, 0x23014250 },
2940 { 0x14, 0x40f000f0 },
2941 { 0x18, 0x90a000f0 },
2942 { 0x19, 0x40f000f0 },
2943 { 0x1e, 0x4f0000f0 },
2944 { 0x1f, 0x4f0000f0 },
2945 {}
2946};
2947
2948static const struct hda_pintbl dell_m4_2_pin_configs[] = {
2949 { 0x0a, 0x0421101f },
2950 { 0x0b, 0x04a11221 },
2951 { 0x0c, 0x90a70330 },
2952 { 0x0d, 0x90170110 },
2953 { 0x0e, 0x23a1902e },
2954 { 0x0f, 0x23014250 },
2955 { 0x14, 0x40f000f0 },
2956 { 0x18, 0x40f000f0 },
2957 { 0x19, 0x40f000f0 },
2958 { 0x1e, 0x044413b0 },
2959 { 0x1f, 0x044413b0 },
2960 {}
2961};
2962
2963static const struct hda_pintbl dell_m4_3_pin_configs[] = {
2964 { 0x0a, 0x0421101f },
2965 { 0x0b, 0x04a11221 },
2966 { 0x0c, 0x90a70330 },
2967 { 0x0d, 0x90170110 },
2968 { 0x0e, 0x40f000f0 },
2969 { 0x0f, 0x40f000f0 },
2970 { 0x14, 0x40f000f0 },
2971 { 0x18, 0x90a000f0 },
2972 { 0x19, 0x40f000f0 },
2973 { 0x1e, 0x044413b0 },
2974 { 0x1f, 0x044413b0 },
2975 {}
2976};
2977
2978static void stac92hd71bxx_fixup_ref(struct hda_codec *codec,
2979 const struct hda_fixup *fix, int action)
2980{
2981 struct sigmatel_spec *spec = codec->spec;
2982
2983 if (action != HDA_FIXUP_ACT_PRE_PROBE)
2984 return;
2985
2986 snd_hda_apply_pincfgs(codec, ref92hd71bxx_pin_configs);
2987 spec->gpio_mask = spec->gpio_dir = spec->gpio_data = 0;
2988}
2989
2990static void stac92hd71bxx_fixup_hp_m4(struct hda_codec *codec,
2991 const struct hda_fixup *fix, int action)
2992{
2993 struct sigmatel_spec *spec = codec->spec;
2994 struct hda_jack_tbl *jack;
2995
2996 if (action != HDA_FIXUP_ACT_PRE_PROBE)
2997 return;
2998
2999 /* Enable VREF power saving on GPIO1 detect */
3000 snd_hda_codec_write_cache(codec, codec->afg, 0,
3001 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x02);
3002 snd_hda_jack_detect_enable_callback(codec, codec->afg,
3003 STAC_VREF_EVENT,
3004 stac_vref_event);
3005 jack = snd_hda_jack_tbl_get(codec, codec->afg);
3006 if (jack)
3007 jack->private_data = 0x02;
3008
3009 spec->gpio_mask |= 0x02;
3010
3011 /* enable internal microphone */
3012 snd_hda_codec_set_pincfg(codec, 0x0e, 0x01813040);
3013}
3014
3015static void stac92hd71bxx_fixup_hp_dv4(struct hda_codec *codec,
3016 const struct hda_fixup *fix, int action)
3017{
3018 struct sigmatel_spec *spec = codec->spec;
3019
3020 if (action != HDA_FIXUP_ACT_PRE_PROBE)
3021 return;
3022 spec->gpio_led = 0x01;
3023}
3024
3025static void stac92hd71bxx_fixup_hp_dv5(struct hda_codec *codec,
3026 const struct hda_fixup *fix, int action)
3027{
3028 unsigned int cap;
3029
3030 switch (action) {
3031 case HDA_FIXUP_ACT_PRE_PROBE:
3032 snd_hda_codec_set_pincfg(codec, 0x0d, 0x90170010);
3033 break;
3034
3035 case HDA_FIXUP_ACT_PROBE:
3036 /* enable bass on HP dv7 */
3037 cap = snd_hda_param_read(codec, 0x1, AC_PAR_GPIO_CAP);
3038 cap &= AC_GPIO_IO_COUNT;
3039 if (cap >= 6)
3040 stac_add_hp_bass_switch(codec);
3041 break;
3042 }
3043}
3044
3045static void stac92hd71bxx_fixup_hp_hdx(struct hda_codec *codec,
3046 const struct hda_fixup *fix, int action)
3047{
3048 struct sigmatel_spec *spec = codec->spec;
3049
3050 if (action != HDA_FIXUP_ACT_PRE_PROBE)
3051 return;
3052 spec->gpio_led = 0x08;
3053}
3054
3055
3056static void stac92hd71bxx_fixup_hp(struct hda_codec *codec,
3057 const struct hda_fixup *fix, int action)
3058{
3059 struct sigmatel_spec *spec = codec->spec;
3060
3061 if (action != HDA_FIXUP_ACT_PRE_PROBE)
3062 return;
3063
3064 if (hp_blike_system(codec->subsystem_id)) {
3065 unsigned int pin_cfg = snd_hda_codec_get_pincfg(codec, 0x0f);
3066 if (get_defcfg_device(pin_cfg) == AC_JACK_LINE_OUT ||
3067 get_defcfg_device(pin_cfg) == AC_JACK_SPEAKER ||
3068 get_defcfg_device(pin_cfg) == AC_JACK_HP_OUT) {
3069 /* It was changed in the BIOS to just satisfy MS DTM.
3070 * Lets turn it back into slaved HP
3071 */
3072 pin_cfg = (pin_cfg & (~AC_DEFCFG_DEVICE))
3073 | (AC_JACK_HP_OUT <<
3074 AC_DEFCFG_DEVICE_SHIFT);
3075 pin_cfg = (pin_cfg & (~(AC_DEFCFG_DEF_ASSOC
3076 | AC_DEFCFG_SEQUENCE)))
3077 | 0x1f;
3078 snd_hda_codec_set_pincfg(codec, 0x0f, pin_cfg);
3079 }
3080 }
3081
3082 if (find_mute_led_cfg(codec, 1))
3083 codec_dbg(codec, "mute LED gpio %d polarity %d\n",
3084 spec->gpio_led,
3085 spec->gpio_led_polarity);
3086
3087}
3088
3089static const struct hda_fixup stac92hd71bxx_fixups[] = {
3090 [STAC_92HD71BXX_REF] = {
3091 .type = HDA_FIXUP_FUNC,
3092 .v.func = stac92hd71bxx_fixup_ref,
3093 },
3094 [STAC_DELL_M4_1] = {
3095 .type = HDA_FIXUP_PINS,
3096 .v.pins = dell_m4_1_pin_configs,
3097 },
3098 [STAC_DELL_M4_2] = {
3099 .type = HDA_FIXUP_PINS,
3100 .v.pins = dell_m4_2_pin_configs,
3101 },
3102 [STAC_DELL_M4_3] = {
3103 .type = HDA_FIXUP_PINS,
3104 .v.pins = dell_m4_3_pin_configs,
3105 },
3106 [STAC_HP_M4] = {
3107 .type = HDA_FIXUP_FUNC,
3108 .v.func = stac92hd71bxx_fixup_hp_m4,
3109 .chained = true,
3110 .chain_id = STAC_92HD71BXX_HP,
3111 },
3112 [STAC_HP_DV4] = {
3113 .type = HDA_FIXUP_FUNC,
3114 .v.func = stac92hd71bxx_fixup_hp_dv4,
3115 .chained = true,
3116 .chain_id = STAC_HP_DV5,
3117 },
3118 [STAC_HP_DV5] = {
3119 .type = HDA_FIXUP_FUNC,
3120 .v.func = stac92hd71bxx_fixup_hp_dv5,
3121 .chained = true,
3122 .chain_id = STAC_92HD71BXX_HP,
3123 },
3124 [STAC_HP_HDX] = {
3125 .type = HDA_FIXUP_FUNC,
3126 .v.func = stac92hd71bxx_fixup_hp_hdx,
3127 .chained = true,
3128 .chain_id = STAC_92HD71BXX_HP,
3129 },
3130 [STAC_92HD71BXX_HP] = {
3131 .type = HDA_FIXUP_FUNC,
3132 .v.func = stac92hd71bxx_fixup_hp,
3133 },
3134};
3135
3136static const struct hda_model_fixup stac92hd71bxx_models[] = {
3137 { .id = STAC_92HD71BXX_REF, .name = "ref" },
3138 { .id = STAC_DELL_M4_1, .name = "dell-m4-1" },
3139 { .id = STAC_DELL_M4_2, .name = "dell-m4-2" },
3140 { .id = STAC_DELL_M4_3, .name = "dell-m4-3" },
3141 { .id = STAC_HP_M4, .name = "hp-m4" },
3142 { .id = STAC_HP_DV4, .name = "hp-dv4" },
3143 { .id = STAC_HP_DV5, .name = "hp-dv5" },
3144 { .id = STAC_HP_HDX, .name = "hp-hdx" },
3145 { .id = STAC_HP_DV4, .name = "hp-dv4-1222nr" },
3146 {}
3147};
3148
3149static const struct snd_pci_quirk stac92hd71bxx_fixup_tbl[] = {
3150 /* SigmaTel reference board */
3151 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
3152 "DFI LanParty", STAC_92HD71BXX_REF),
3153 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
3154 "DFI LanParty", STAC_92HD71BXX_REF),
3155 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x1720,
3156 "HP", STAC_HP_DV5),
3157 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3080,
3158 "HP", STAC_HP_DV5),
3159 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x30f0,
3160 "HP dv4-7", STAC_HP_DV4),
3161 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3600,
3162 "HP dv4-7", STAC_HP_DV5),
3163 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3610,
3164 "HP HDX", STAC_HP_HDX), /* HDX18 */
3165 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x361a,
3166 "HP mini 1000", STAC_HP_M4),
3167 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x361b,
3168 "HP HDX", STAC_HP_HDX), /* HDX16 */
3169 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3620,
3170 "HP dv6", STAC_HP_DV5),
3171 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3061,
3172 "HP dv6", STAC_HP_DV5), /* HP dv6-1110ax */
3173 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x363e,
3174 "HP DV6", STAC_HP_DV5),
3175 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x7010,
3176 "HP", STAC_HP_DV5),
3177 SND_PCI_QUIRK_VENDOR(PCI_VENDOR_ID_HP, "HP", STAC_92HD71BXX_HP),
3178 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0233,
3179 "unknown Dell", STAC_DELL_M4_1),
3180 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0234,
3181 "unknown Dell", STAC_DELL_M4_1),
3182 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0250,
3183 "unknown Dell", STAC_DELL_M4_1),
3184 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024f,
3185 "unknown Dell", STAC_DELL_M4_1),
3186 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024d,
3187 "unknown Dell", STAC_DELL_M4_1),
3188 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0251,
3189 "unknown Dell", STAC_DELL_M4_1),
3190 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0277,
3191 "unknown Dell", STAC_DELL_M4_1),
3192 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0263,
3193 "unknown Dell", STAC_DELL_M4_2),
3194 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0265,
3195 "unknown Dell", STAC_DELL_M4_2),
3196 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0262,
3197 "unknown Dell", STAC_DELL_M4_2),
3198 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0264,
3199 "unknown Dell", STAC_DELL_M4_2),
3200 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02aa,
3201 "unknown Dell", STAC_DELL_M4_3),
3202 {} /* terminator */
3203};
3204
3205static const struct hda_pintbl ref922x_pin_configs[] = {
3206 { 0x0a, 0x01014010 },
3207 { 0x0b, 0x01016011 },
3208 { 0x0c, 0x01012012 },
3209 { 0x0d, 0x0221401f },
3210 { 0x0e, 0x01813122 },
3211 { 0x0f, 0x01011014 },
3212 { 0x10, 0x01441030 },
3213 { 0x11, 0x01c41030 },
3214 { 0x15, 0x40000100 },
3215 { 0x1b, 0x40000100 },
3216 {}
3217};
3218
3219/*
3220 STAC 922X pin configs for
3221 102801A7
3222 102801AB
3223 102801A9
3224 102801D1
3225 102801D2
3226*/
3227static const struct hda_pintbl dell_922x_d81_pin_configs[] = {
3228 { 0x0a, 0x02214030 },
3229 { 0x0b, 0x01a19021 },
3230 { 0x0c, 0x01111012 },
3231 { 0x0d, 0x01114010 },
3232 { 0x0e, 0x02a19020 },
3233 { 0x0f, 0x01117011 },
3234 { 0x10, 0x400001f0 },
3235 { 0x11, 0x400001f1 },
3236 { 0x15, 0x01813122 },
3237 { 0x1b, 0x400001f2 },
3238 {}
3239};
3240
3241/*
3242 STAC 922X pin configs for
3243 102801AC
3244 102801D0
3245*/
3246static const struct hda_pintbl dell_922x_d82_pin_configs[] = {
3247 { 0x0a, 0x02214030 },
3248 { 0x0b, 0x01a19021 },
3249 { 0x0c, 0x01111012 },
3250 { 0x0d, 0x01114010 },
3251 { 0x0e, 0x02a19020 },
3252 { 0x0f, 0x01117011 },
3253 { 0x10, 0x01451140 },
3254 { 0x11, 0x400001f0 },
3255 { 0x15, 0x01813122 },
3256 { 0x1b, 0x400001f1 },
3257 {}
3258};
3259
3260/*
3261 STAC 922X pin configs for
3262 102801BF
3263*/
3264static const struct hda_pintbl dell_922x_m81_pin_configs[] = {
3265 { 0x0a, 0x0321101f },
3266 { 0x0b, 0x01112024 },
3267 { 0x0c, 0x01111222 },
3268 { 0x0d, 0x91174220 },
3269 { 0x0e, 0x03a11050 },
3270 { 0x0f, 0x01116221 },
3271 { 0x10, 0x90a70330 },
3272 { 0x11, 0x01452340 },
3273 { 0x15, 0x40C003f1 },
3274 { 0x1b, 0x405003f0 },
3275 {}
3276};
3277
3278/*
3279 STAC 9221 A1 pin configs for
3280 102801D7 (Dell XPS M1210)
3281*/
3282static const struct hda_pintbl dell_922x_m82_pin_configs[] = {
3283 { 0x0a, 0x02211211 },
3284 { 0x0b, 0x408103ff },
3285 { 0x0c, 0x02a1123e },
3286 { 0x0d, 0x90100310 },
3287 { 0x0e, 0x408003f1 },
3288 { 0x0f, 0x0221121f },
3289 { 0x10, 0x03451340 },
3290 { 0x11, 0x40c003f2 },
3291 { 0x15, 0x508003f3 },
3292 { 0x1b, 0x405003f4 },
3293 {}
3294};
3295
3296static const struct hda_pintbl d945gtp3_pin_configs[] = {
3297 { 0x0a, 0x0221401f },
3298 { 0x0b, 0x01a19022 },
3299 { 0x0c, 0x01813021 },
3300 { 0x0d, 0x01014010 },
3301 { 0x0e, 0x40000100 },
3302 { 0x0f, 0x40000100 },
3303 { 0x10, 0x40000100 },
3304 { 0x11, 0x40000100 },
3305 { 0x15, 0x02a19120 },
3306 { 0x1b, 0x40000100 },
3307 {}
3308};
3309
3310static const struct hda_pintbl d945gtp5_pin_configs[] = {
3311 { 0x0a, 0x0221401f },
3312 { 0x0b, 0x01011012 },
3313 { 0x0c, 0x01813024 },
3314 { 0x0d, 0x01014010 },
3315 { 0x0e, 0x01a19021 },
3316 { 0x0f, 0x01016011 },
3317 { 0x10, 0x01452130 },
3318 { 0x11, 0x40000100 },
3319 { 0x15, 0x02a19320 },
3320 { 0x1b, 0x40000100 },
3321 {}
3322};
3323
3324static const struct hda_pintbl intel_mac_v1_pin_configs[] = {
3325 { 0x0a, 0x0121e21f },
3326 { 0x0b, 0x400000ff },
3327 { 0x0c, 0x9017e110 },
3328 { 0x0d, 0x400000fd },
3329 { 0x0e, 0x400000fe },
3330 { 0x0f, 0x0181e020 },
3331 { 0x10, 0x1145e030 },
3332 { 0x11, 0x11c5e240 },
3333 { 0x15, 0x400000fc },
3334 { 0x1b, 0x400000fb },
3335 {}
3336};
3337
3338static const struct hda_pintbl intel_mac_v2_pin_configs[] = {
3339 { 0x0a, 0x0121e21f },
3340 { 0x0b, 0x90a7012e },
3341 { 0x0c, 0x9017e110 },
3342 { 0x0d, 0x400000fd },
3343 { 0x0e, 0x400000fe },
3344 { 0x0f, 0x0181e020 },
3345 { 0x10, 0x1145e230 },
3346 { 0x11, 0x500000fa },
3347 { 0x15, 0x400000fc },
3348 { 0x1b, 0x400000fb },
3349 {}
3350};
3351
3352static const struct hda_pintbl intel_mac_v3_pin_configs[] = {
3353 { 0x0a, 0x0121e21f },
3354 { 0x0b, 0x90a7012e },
3355 { 0x0c, 0x9017e110 },
3356 { 0x0d, 0x400000fd },
3357 { 0x0e, 0x400000fe },
3358 { 0x0f, 0x0181e020 },
3359 { 0x10, 0x1145e230 },
3360 { 0x11, 0x11c5e240 },
3361 { 0x15, 0x400000fc },
3362 { 0x1b, 0x400000fb },
3363 {}
3364};
3365
3366static const struct hda_pintbl intel_mac_v4_pin_configs[] = {
3367 { 0x0a, 0x0321e21f },
3368 { 0x0b, 0x03a1e02e },
3369 { 0x0c, 0x9017e110 },
3370 { 0x0d, 0x9017e11f },
3371 { 0x0e, 0x400000fe },
3372 { 0x0f, 0x0381e020 },
3373 { 0x10, 0x1345e230 },
3374 { 0x11, 0x13c5e240 },
3375 { 0x15, 0x400000fc },
3376 { 0x1b, 0x400000fb },
3377 {}
3378};
3379
3380static const struct hda_pintbl intel_mac_v5_pin_configs[] = {
3381 { 0x0a, 0x0321e21f },
3382 { 0x0b, 0x03a1e02e },
3383 { 0x0c, 0x9017e110 },
3384 { 0x0d, 0x9017e11f },
3385 { 0x0e, 0x400000fe },
3386 { 0x0f, 0x0381e020 },
3387 { 0x10, 0x1345e230 },
3388 { 0x11, 0x13c5e240 },
3389 { 0x15, 0x400000fc },
3390 { 0x1b, 0x400000fb },
3391 {}
3392};
3393
3394static const struct hda_pintbl ecs202_pin_configs[] = {
3395 { 0x0a, 0x0221401f },
3396 { 0x0b, 0x02a19020 },
3397 { 0x0c, 0x01a19020 },
3398 { 0x0d, 0x01114010 },
3399 { 0x0e, 0x408000f0 },
3400 { 0x0f, 0x01813022 },
3401 { 0x10, 0x074510a0 },
3402 { 0x11, 0x40c400f1 },
3403 { 0x15, 0x9037012e },
3404 { 0x1b, 0x40e000f2 },
3405 {}
3406};
3407
3408/* codec SSIDs for Intel Mac sharing the same PCI SSID 8384:7680 */
3409static const struct snd_pci_quirk stac922x_intel_mac_fixup_tbl[] = {
3410 SND_PCI_QUIRK(0x0000, 0x0100, "Mac Mini", STAC_INTEL_MAC_V3),
3411 SND_PCI_QUIRK(0x106b, 0x0800, "Mac", STAC_INTEL_MAC_V1),
3412 SND_PCI_QUIRK(0x106b, 0x0600, "Mac", STAC_INTEL_MAC_V2),
3413 SND_PCI_QUIRK(0x106b, 0x0700, "Mac", STAC_INTEL_MAC_V2),
3414 SND_PCI_QUIRK(0x106b, 0x0e00, "Mac", STAC_INTEL_MAC_V3),
3415 SND_PCI_QUIRK(0x106b, 0x0f00, "Mac", STAC_INTEL_MAC_V3),
3416 SND_PCI_QUIRK(0x106b, 0x1600, "Mac", STAC_INTEL_MAC_V3),
3417 SND_PCI_QUIRK(0x106b, 0x1700, "Mac", STAC_INTEL_MAC_V3),
3418 SND_PCI_QUIRK(0x106b, 0x0200, "Mac", STAC_INTEL_MAC_V3),
3419 SND_PCI_QUIRK(0x106b, 0x1e00, "Mac", STAC_INTEL_MAC_V3),
3420 SND_PCI_QUIRK(0x106b, 0x1a00, "Mac", STAC_INTEL_MAC_V4),
3421 SND_PCI_QUIRK(0x106b, 0x0a00, "Mac", STAC_INTEL_MAC_V5),
3422 SND_PCI_QUIRK(0x106b, 0x2200, "Mac", STAC_INTEL_MAC_V5),
3423 {}
3424};
3425
3426static const struct hda_fixup stac922x_fixups[];
3427
3428/* remap the fixup from codec SSID and apply it */
3429static void stac922x_fixup_intel_mac_auto(struct hda_codec *codec,
3430 const struct hda_fixup *fix,
3431 int action)
3432{
3433 if (action != HDA_FIXUP_ACT_PRE_PROBE)
3434 return;
3435 snd_hda_pick_fixup(codec, NULL, stac922x_intel_mac_fixup_tbl,
3436 stac922x_fixups);
3437 if (codec->fixup_id != STAC_INTEL_MAC_AUTO)
3438 snd_hda_apply_fixup(codec, action);
3439}
3440
3441static void stac922x_fixup_intel_mac_gpio(struct hda_codec *codec,
3442 const struct hda_fixup *fix,
3443 int action)
3444{
3445 struct sigmatel_spec *spec = codec->spec;
3446
3447 if (action == HDA_FIXUP_ACT_PRE_PROBE) {
3448 spec->gpio_mask = spec->gpio_dir = 0x03;
3449 spec->gpio_data = 0x03;
3450 }
3451}
3452
3453static const struct hda_fixup stac922x_fixups[] = {
3454 [STAC_D945_REF] = {
3455 .type = HDA_FIXUP_PINS,
3456 .v.pins = ref922x_pin_configs,
3457 },
3458 [STAC_D945GTP3] = {
3459 .type = HDA_FIXUP_PINS,
3460 .v.pins = d945gtp3_pin_configs,
3461 },
3462 [STAC_D945GTP5] = {
3463 .type = HDA_FIXUP_PINS,
3464 .v.pins = d945gtp5_pin_configs,
3465 },
3466 [STAC_INTEL_MAC_AUTO] = {
3467 .type = HDA_FIXUP_FUNC,
3468 .v.func = stac922x_fixup_intel_mac_auto,
3469 },
3470 [STAC_INTEL_MAC_V1] = {
3471 .type = HDA_FIXUP_PINS,
3472 .v.pins = intel_mac_v1_pin_configs,
3473 .chained = true,
3474 .chain_id = STAC_922X_INTEL_MAC_GPIO,
3475 },
3476 [STAC_INTEL_MAC_V2] = {
3477 .type = HDA_FIXUP_PINS,
3478 .v.pins = intel_mac_v2_pin_configs,
3479 .chained = true,
3480 .chain_id = STAC_922X_INTEL_MAC_GPIO,
3481 },
3482 [STAC_INTEL_MAC_V3] = {
3483 .type = HDA_FIXUP_PINS,
3484 .v.pins = intel_mac_v3_pin_configs,
3485 .chained = true,
3486 .chain_id = STAC_922X_INTEL_MAC_GPIO,
3487 },
3488 [STAC_INTEL_MAC_V4] = {
3489 .type = HDA_FIXUP_PINS,
3490 .v.pins = intel_mac_v4_pin_configs,
3491 .chained = true,
3492 .chain_id = STAC_922X_INTEL_MAC_GPIO,
3493 },
3494 [STAC_INTEL_MAC_V5] = {
3495 .type = HDA_FIXUP_PINS,
3496 .v.pins = intel_mac_v5_pin_configs,
3497 .chained = true,
3498 .chain_id = STAC_922X_INTEL_MAC_GPIO,
3499 },
3500 [STAC_922X_INTEL_MAC_GPIO] = {
3501 .type = HDA_FIXUP_FUNC,
3502 .v.func = stac922x_fixup_intel_mac_gpio,
3503 },
3504 [STAC_ECS_202] = {
3505 .type = HDA_FIXUP_PINS,
3506 .v.pins = ecs202_pin_configs,
3507 },
3508 [STAC_922X_DELL_D81] = {
3509 .type = HDA_FIXUP_PINS,
3510 .v.pins = dell_922x_d81_pin_configs,
3511 },
3512 [STAC_922X_DELL_D82] = {
3513 .type = HDA_FIXUP_PINS,
3514 .v.pins = dell_922x_d82_pin_configs,
3515 },
3516 [STAC_922X_DELL_M81] = {
3517 .type = HDA_FIXUP_PINS,
3518 .v.pins = dell_922x_m81_pin_configs,
3519 },
3520 [STAC_922X_DELL_M82] = {
3521 .type = HDA_FIXUP_PINS,
3522 .v.pins = dell_922x_m82_pin_configs,
3523 },
3524};
3525
3526static const struct hda_model_fixup stac922x_models[] = {
3527 { .id = STAC_D945_REF, .name = "ref" },
3528 { .id = STAC_D945GTP5, .name = "5stack" },
3529 { .id = STAC_D945GTP3, .name = "3stack" },
3530 { .id = STAC_INTEL_MAC_V1, .name = "intel-mac-v1" },
3531 { .id = STAC_INTEL_MAC_V2, .name = "intel-mac-v2" },
3532 { .id = STAC_INTEL_MAC_V3, .name = "intel-mac-v3" },
3533 { .id = STAC_INTEL_MAC_V4, .name = "intel-mac-v4" },
3534 { .id = STAC_INTEL_MAC_V5, .name = "intel-mac-v5" },
3535 { .id = STAC_INTEL_MAC_AUTO, .name = "intel-mac-auto" },
3536 { .id = STAC_ECS_202, .name = "ecs202" },
3537 { .id = STAC_922X_DELL_D81, .name = "dell-d81" },
3538 { .id = STAC_922X_DELL_D82, .name = "dell-d82" },
3539 { .id = STAC_922X_DELL_M81, .name = "dell-m81" },
3540 { .id = STAC_922X_DELL_M82, .name = "dell-m82" },
3541 /* for backward compatibility */
3542 { .id = STAC_INTEL_MAC_V3, .name = "macmini" },
3543 { .id = STAC_INTEL_MAC_V5, .name = "macbook" },
3544 { .id = STAC_INTEL_MAC_V3, .name = "macbook-pro-v1" },
3545 { .id = STAC_INTEL_MAC_V3, .name = "macbook-pro" },
3546 { .id = STAC_INTEL_MAC_V2, .name = "imac-intel" },
3547 { .id = STAC_INTEL_MAC_V3, .name = "imac-intel-20" },
3548 {}
3549};
3550
3551static const struct snd_pci_quirk stac922x_fixup_tbl[] = {
3552 /* SigmaTel reference board */
3553 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
3554 "DFI LanParty", STAC_D945_REF),
3555 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
3556 "DFI LanParty", STAC_D945_REF),
3557 /* Intel 945G based systems */
3558 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0101,
3559 "Intel D945G", STAC_D945GTP3),
3560 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0202,
3561 "Intel D945G", STAC_D945GTP3),
3562 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0606,
3563 "Intel D945G", STAC_D945GTP3),
3564 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0601,
3565 "Intel D945G", STAC_D945GTP3),
3566 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0111,
3567 "Intel D945G", STAC_D945GTP3),
3568 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1115,
3569 "Intel D945G", STAC_D945GTP3),
3570 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1116,
3571 "Intel D945G", STAC_D945GTP3),
3572 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1117,
3573 "Intel D945G", STAC_D945GTP3),
3574 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1118,
3575 "Intel D945G", STAC_D945GTP3),
3576 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1119,
3577 "Intel D945G", STAC_D945GTP3),
3578 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x8826,
3579 "Intel D945G", STAC_D945GTP3),
3580 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5049,
3581 "Intel D945G", STAC_D945GTP3),
3582 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5055,
3583 "Intel D945G", STAC_D945GTP3),
3584 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5048,
3585 "Intel D945G", STAC_D945GTP3),
3586 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0110,
3587 "Intel D945G", STAC_D945GTP3),
3588 /* Intel D945G 5-stack systems */
3589 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0404,
3590 "Intel D945G", STAC_D945GTP5),
3591 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0303,
3592 "Intel D945G", STAC_D945GTP5),
3593 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0013,
3594 "Intel D945G", STAC_D945GTP5),
3595 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0417,
3596 "Intel D945G", STAC_D945GTP5),
3597 /* Intel 945P based systems */
3598 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0b0b,
3599 "Intel D945P", STAC_D945GTP3),
3600 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0112,
3601 "Intel D945P", STAC_D945GTP3),
3602 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0d0d,
3603 "Intel D945P", STAC_D945GTP3),
3604 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0909,
3605 "Intel D945P", STAC_D945GTP3),
3606 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0505,
3607 "Intel D945P", STAC_D945GTP3),
3608 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0707,
3609 "Intel D945P", STAC_D945GTP5),
3610 /* other intel */
3611 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0204,
3612 "Intel D945", STAC_D945_REF),
3613 /* other systems */
3614
3615 /* Apple Intel Mac (Mac Mini, MacBook, MacBook Pro...) */
3616 SND_PCI_QUIRK(0x8384, 0x7680, "Mac", STAC_INTEL_MAC_AUTO),
3617
3618 /* Dell systems */
3619 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a7,
3620 "unknown Dell", STAC_922X_DELL_D81),
3621 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a9,
3622 "unknown Dell", STAC_922X_DELL_D81),
3623 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ab,
3624 "unknown Dell", STAC_922X_DELL_D81),
3625 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ac,
3626 "unknown Dell", STAC_922X_DELL_D82),
3627 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bf,
3628 "unknown Dell", STAC_922X_DELL_M81),
3629 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d0,
3630 "unknown Dell", STAC_922X_DELL_D82),
3631 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d1,
3632 "unknown Dell", STAC_922X_DELL_D81),
3633 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d2,
3634 "unknown Dell", STAC_922X_DELL_D81),
3635 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d7,
3636 "Dell XPS M1210", STAC_922X_DELL_M82),
3637 /* ECS/PC Chips boards */
3638 SND_PCI_QUIRK_MASK(0x1019, 0xf000, 0x2000,
3639 "ECS/PC chips", STAC_ECS_202),
3640 {} /* terminator */
3641};
3642
3643static const struct hda_pintbl ref927x_pin_configs[] = {
3644 { 0x0a, 0x02214020 },
3645 { 0x0b, 0x02a19080 },
3646 { 0x0c, 0x0181304e },
3647 { 0x0d, 0x01014010 },
3648 { 0x0e, 0x01a19040 },
3649 { 0x0f, 0x01011012 },
3650 { 0x10, 0x01016011 },
3651 { 0x11, 0x0101201f },
3652 { 0x12, 0x183301f0 },
3653 { 0x13, 0x18a001f0 },
3654 { 0x14, 0x18a001f0 },
3655 { 0x21, 0x01442070 },
3656 { 0x22, 0x01c42190 },
3657 { 0x23, 0x40000100 },
3658 {}
3659};
3660
3661static const struct hda_pintbl d965_3st_pin_configs[] = {
3662 { 0x0a, 0x0221401f },
3663 { 0x0b, 0x02a19120 },
3664 { 0x0c, 0x40000100 },
3665 { 0x0d, 0x01014011 },
3666 { 0x0e, 0x01a19021 },
3667 { 0x0f, 0x01813024 },
3668 { 0x10, 0x40000100 },
3669 { 0x11, 0x40000100 },
3670 { 0x12, 0x40000100 },
3671 { 0x13, 0x40000100 },
3672 { 0x14, 0x40000100 },
3673 { 0x21, 0x40000100 },
3674 { 0x22, 0x40000100 },
3675 { 0x23, 0x40000100 },
3676 {}
3677};
3678
3679static const struct hda_pintbl d965_5st_pin_configs[] = {
3680 { 0x0a, 0x02214020 },
3681 { 0x0b, 0x02a19080 },
3682 { 0x0c, 0x0181304e },
3683 { 0x0d, 0x01014010 },
3684 { 0x0e, 0x01a19040 },
3685 { 0x0f, 0x01011012 },
3686 { 0x10, 0x01016011 },
3687 { 0x11, 0x40000100 },
3688 { 0x12, 0x40000100 },
3689 { 0x13, 0x40000100 },
3690 { 0x14, 0x40000100 },
3691 { 0x21, 0x01442070 },
3692 { 0x22, 0x40000100 },
3693 { 0x23, 0x40000100 },
3694 {}
3695};
3696
3697static const struct hda_pintbl d965_5st_no_fp_pin_configs[] = {
3698 { 0x0a, 0x40000100 },
3699 { 0x0b, 0x40000100 },
3700 { 0x0c, 0x0181304e },
3701 { 0x0d, 0x01014010 },
3702 { 0x0e, 0x01a19040 },
3703 { 0x0f, 0x01011012 },
3704 { 0x10, 0x01016011 },
3705 { 0x11, 0x40000100 },
3706 { 0x12, 0x40000100 },
3707 { 0x13, 0x40000100 },
3708 { 0x14, 0x40000100 },
3709 { 0x21, 0x01442070 },
3710 { 0x22, 0x40000100 },
3711 { 0x23, 0x40000100 },
3712 {}
3713};
3714
3715static const struct hda_pintbl dell_3st_pin_configs[] = {
3716 { 0x0a, 0x02211230 },
3717 { 0x0b, 0x02a11220 },
3718 { 0x0c, 0x01a19040 },
3719 { 0x0d, 0x01114210 },
3720 { 0x0e, 0x01111212 },
3721 { 0x0f, 0x01116211 },
3722 { 0x10, 0x01813050 },
3723 { 0x11, 0x01112214 },
3724 { 0x12, 0x403003fa },
3725 { 0x13, 0x90a60040 },
3726 { 0x14, 0x90a60040 },
3727 { 0x21, 0x404003fb },
3728 { 0x22, 0x40c003fc },
3729 { 0x23, 0x40000100 },
3730 {}
3731};
3732
3733static void stac927x_fixup_ref_no_jd(struct hda_codec *codec,
3734 const struct hda_fixup *fix, int action)
3735{
3736 /* no jack detecion for ref-no-jd model */
3737 if (action == HDA_FIXUP_ACT_PRE_PROBE)
3738 codec->no_jack_detect = 1;
3739}
3740
3741static void stac927x_fixup_ref(struct hda_codec *codec,
3742 const struct hda_fixup *fix, int action)
3743{
3744 struct sigmatel_spec *spec = codec->spec;
3745
3746 if (action == HDA_FIXUP_ACT_PRE_PROBE) {
3747 snd_hda_apply_pincfgs(codec, ref927x_pin_configs);
3748 spec->eapd_mask = spec->gpio_mask = 0;
3749 spec->gpio_dir = spec->gpio_data = 0;
3750 }
3751}
3752
3753static void stac927x_fixup_dell_dmic(struct hda_codec *codec,
3754 const struct hda_fixup *fix, int action)
3755{
3756 struct sigmatel_spec *spec = codec->spec;
3757
3758 if (action != HDA_FIXUP_ACT_PRE_PROBE)
3759 return;
3760
3761 if (codec->subsystem_id != 0x1028022f) {
3762 /* GPIO2 High = Enable EAPD */
3763 spec->eapd_mask = spec->gpio_mask = 0x04;
3764 spec->gpio_dir = spec->gpio_data = 0x04;
3765 }
3766
3767 snd_hda_add_verbs(codec, dell_3st_core_init);
3768 spec->volknob_init = 1;
3769}
3770
3771static void stac927x_fixup_volknob(struct hda_codec *codec,
3772 const struct hda_fixup *fix, int action)
3773{
3774 struct sigmatel_spec *spec = codec->spec;
3775
3776 if (action == HDA_FIXUP_ACT_PRE_PROBE) {
3777 snd_hda_add_verbs(codec, stac927x_volknob_core_init);
3778 spec->volknob_init = 1;
3779 }
3780}
3781
3782static const struct hda_fixup stac927x_fixups[] = {
3783 [STAC_D965_REF_NO_JD] = {
3784 .type = HDA_FIXUP_FUNC,
3785 .v.func = stac927x_fixup_ref_no_jd,
3786 .chained = true,
3787 .chain_id = STAC_D965_REF,
3788 },
3789 [STAC_D965_REF] = {
3790 .type = HDA_FIXUP_FUNC,
3791 .v.func = stac927x_fixup_ref,
3792 },
3793 [STAC_D965_3ST] = {
3794 .type = HDA_FIXUP_PINS,
3795 .v.pins = d965_3st_pin_configs,
3796 .chained = true,
3797 .chain_id = STAC_D965_VERBS,
3798 },
3799 [STAC_D965_5ST] = {
3800 .type = HDA_FIXUP_PINS,
3801 .v.pins = d965_5st_pin_configs,
3802 .chained = true,
3803 .chain_id = STAC_D965_VERBS,
3804 },
3805 [STAC_D965_VERBS] = {
3806 .type = HDA_FIXUP_VERBS,
3807 .v.verbs = d965_core_init,
3808 },
3809 [STAC_D965_5ST_NO_FP] = {
3810 .type = HDA_FIXUP_PINS,
3811 .v.pins = d965_5st_no_fp_pin_configs,
3812 },
3813 [STAC_DELL_3ST] = {
3814 .type = HDA_FIXUP_PINS,
3815 .v.pins = dell_3st_pin_configs,
3816 .chained = true,
3817 .chain_id = STAC_927X_DELL_DMIC,
3818 },
3819 [STAC_DELL_BIOS] = {
3820 .type = HDA_FIXUP_PINS,
3821 .v.pins = (const struct hda_pintbl[]) {
3822 /* correct the front output jack as a hp out */
3823 { 0x0f, 0x0221101f },
3824 /* correct the front input jack as a mic */
3825 { 0x0e, 0x02a79130 },
3826 {}
3827 },
3828 .chained = true,
3829 .chain_id = STAC_927X_DELL_DMIC,
3830 },
3831 [STAC_DELL_BIOS_AMIC] = {
3832 .type = HDA_FIXUP_PINS,
3833 .v.pins = (const struct hda_pintbl[]) {
3834 /* configure the analog microphone on some laptops */
3835 { 0x0c, 0x90a79130 },
3836 {}
3837 },
3838 .chained = true,
3839 .chain_id = STAC_DELL_BIOS,
3840 },
3841 [STAC_DELL_BIOS_SPDIF] = {
3842 .type = HDA_FIXUP_PINS,
3843 .v.pins = (const struct hda_pintbl[]) {
3844 /* correct the device field to SPDIF out */
3845 { 0x21, 0x01442070 },
3846 {}
3847 },
3848 .chained = true,
3849 .chain_id = STAC_DELL_BIOS,
3850 },
3851 [STAC_927X_DELL_DMIC] = {
3852 .type = HDA_FIXUP_FUNC,
3853 .v.func = stac927x_fixup_dell_dmic,
3854 },
3855 [STAC_927X_VOLKNOB] = {
3856 .type = HDA_FIXUP_FUNC,
3857 .v.func = stac927x_fixup_volknob,
3858 },
3859};
3860
3861static const struct hda_model_fixup stac927x_models[] = {
3862 { .id = STAC_D965_REF_NO_JD, .name = "ref-no-jd" },
3863 { .id = STAC_D965_REF, .name = "ref" },
3864 { .id = STAC_D965_3ST, .name = "3stack" },
3865 { .id = STAC_D965_5ST, .name = "5stack" },
3866 { .id = STAC_D965_5ST_NO_FP, .name = "5stack-no-fp" },
3867 { .id = STAC_DELL_3ST, .name = "dell-3stack" },
3868 { .id = STAC_DELL_BIOS, .name = "dell-bios" },
3869 { .id = STAC_DELL_BIOS_AMIC, .name = "dell-bios-amic" },
3870 { .id = STAC_927X_VOLKNOB, .name = "volknob" },
3871 {}
3872};
3873
3874static const struct snd_pci_quirk stac927x_fixup_tbl[] = {
3875 /* SigmaTel reference board */
3876 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
3877 "DFI LanParty", STAC_D965_REF),
3878 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
3879 "DFI LanParty", STAC_D965_REF),
3880 /* Intel 946 based systems */
3881 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x3d01, "Intel D946", STAC_D965_3ST),
3882 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xa301, "Intel D946", STAC_D965_3ST),
3883 /* 965 based 3 stack systems */
3884 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2100,
3885 "Intel D965", STAC_D965_3ST),
3886 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2000,
3887 "Intel D965", STAC_D965_3ST),
3888 /* Dell 3 stack systems */
3889 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01dd, "Dell Dimension E520", STAC_DELL_3ST),
3890 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ed, "Dell ", STAC_DELL_3ST),
3891 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f4, "Dell ", STAC_DELL_3ST),
3892 /* Dell 3 stack systems with verb table in BIOS */
3893 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f3, "Dell Inspiron 1420", STAC_DELL_BIOS),
3894 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f7, "Dell XPS M1730", STAC_DELL_BIOS),
3895 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0227, "Dell Vostro 1400 ", STAC_DELL_BIOS),
3896 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022e, "Dell ", STAC_DELL_BIOS_SPDIF),
3897 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022f, "Dell Inspiron 1525", STAC_DELL_BIOS),
3898 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0242, "Dell ", STAC_DELL_BIOS),
3899 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0243, "Dell ", STAC_DELL_BIOS),
3900 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ff, "Dell ", STAC_DELL_BIOS),
3901 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0209, "Dell XPS 1330", STAC_DELL_BIOS_SPDIF),
3902 /* 965 based 5 stack systems */
3903 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2300,
3904 "Intel D965", STAC_D965_5ST),
3905 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2500,
3906 "Intel D965", STAC_D965_5ST),
3907 /* volume-knob fixes */
3908 SND_PCI_QUIRK_VENDOR(0x10cf, "FSC", STAC_927X_VOLKNOB),
3909 {} /* terminator */
3910};
3911
3912static const struct hda_pintbl ref9205_pin_configs[] = {
3913 { 0x0a, 0x40000100 },
3914 { 0x0b, 0x40000100 },
3915 { 0x0c, 0x01016011 },
3916 { 0x0d, 0x01014010 },
3917 { 0x0e, 0x01813122 },
3918 { 0x0f, 0x01a19021 },
3919 { 0x14, 0x01019020 },
3920 { 0x16, 0x40000100 },
3921 { 0x17, 0x90a000f0 },
3922 { 0x18, 0x90a000f0 },
3923 { 0x21, 0x01441030 },
3924 { 0x22, 0x01c41030 },
3925 {}
3926};
3927
3928/*
3929 STAC 9205 pin configs for
3930 102801F1
3931 102801F2
3932 102801FC
3933 102801FD
3934 10280204
3935 1028021F
3936 10280228 (Dell Vostro 1500)
3937 10280229 (Dell Vostro 1700)
3938*/
3939static const struct hda_pintbl dell_9205_m42_pin_configs[] = {
3940 { 0x0a, 0x0321101F },
3941 { 0x0b, 0x03A11020 },
3942 { 0x0c, 0x400003FA },
3943 { 0x0d, 0x90170310 },
3944 { 0x0e, 0x400003FB },
3945 { 0x0f, 0x400003FC },
3946 { 0x14, 0x400003FD },
3947 { 0x16, 0x40F000F9 },
3948 { 0x17, 0x90A60330 },
3949 { 0x18, 0x400003FF },
3950 { 0x21, 0x0144131F },
3951 { 0x22, 0x40C003FE },
3952 {}
3953};
3954
3955/*
3956 STAC 9205 pin configs for
3957 102801F9
3958 102801FA
3959 102801FE
3960 102801FF (Dell Precision M4300)
3961 10280206
3962 10280200
3963 10280201
3964*/
3965static const struct hda_pintbl dell_9205_m43_pin_configs[] = {
3966 { 0x0a, 0x0321101f },
3967 { 0x0b, 0x03a11020 },
3968 { 0x0c, 0x90a70330 },
3969 { 0x0d, 0x90170310 },
3970 { 0x0e, 0x400000fe },
3971 { 0x0f, 0x400000ff },
3972 { 0x14, 0x400000fd },
3973 { 0x16, 0x40f000f9 },
3974 { 0x17, 0x400000fa },
3975 { 0x18, 0x400000fc },
3976 { 0x21, 0x0144131f },
3977 { 0x22, 0x40c003f8 },
3978 /* Enable SPDIF in/out */
3979 { 0x1f, 0x01441030 },
3980 { 0x20, 0x1c410030 },
3981 {}
3982};
3983
3984static const struct hda_pintbl dell_9205_m44_pin_configs[] = {
3985 { 0x0a, 0x0421101f },
3986 { 0x0b, 0x04a11020 },
3987 { 0x0c, 0x400003fa },
3988 { 0x0d, 0x90170310 },
3989 { 0x0e, 0x400003fb },
3990 { 0x0f, 0x400003fc },
3991 { 0x14, 0x400003fd },
3992 { 0x16, 0x400003f9 },
3993 { 0x17, 0x90a60330 },
3994 { 0x18, 0x400003ff },
3995 { 0x21, 0x01441340 },
3996 { 0x22, 0x40c003fe },
3997 {}
3998};
3999
4000static void stac9205_fixup_ref(struct hda_codec *codec,
4001 const struct hda_fixup *fix, int action)
4002{
4003 struct sigmatel_spec *spec = codec->spec;
4004
4005 if (action == HDA_FIXUP_ACT_PRE_PROBE) {
4006 snd_hda_apply_pincfgs(codec, ref9205_pin_configs);
4007 /* SPDIF-In enabled */
4008 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0;
4009 }
4010}
4011
4012static void stac9205_fixup_dell_m43(struct hda_codec *codec,
4013 const struct hda_fixup *fix, int action)
4014{
4015 struct sigmatel_spec *spec = codec->spec;
4016 struct hda_jack_tbl *jack;
4017
4018 if (action == HDA_FIXUP_ACT_PRE_PROBE) {
4019 snd_hda_apply_pincfgs(codec, dell_9205_m43_pin_configs);
4020
4021 /* Enable unsol response for GPIO4/Dock HP connection */
4022 snd_hda_codec_write_cache(codec, codec->afg, 0,
4023 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x10);
4024 snd_hda_jack_detect_enable_callback(codec, codec->afg,
4025 STAC_VREF_EVENT,
4026 stac_vref_event);
4027 jack = snd_hda_jack_tbl_get(codec, codec->afg);
4028 if (jack)
4029 jack->private_data = 0x01;
4030
4031 spec->gpio_dir = 0x0b;
4032 spec->eapd_mask = 0x01;
4033 spec->gpio_mask = 0x1b;
4034 spec->gpio_mute = 0x10;
4035 /* GPIO0 High = EAPD, GPIO1 Low = Headphone Mute,
4036 * GPIO3 Low = DRM
4037 */
4038 spec->gpio_data = 0x01;
4039 }
4040}
4041
4042static void stac9205_fixup_eapd(struct hda_codec *codec,
4043 const struct hda_fixup *fix, int action)
4044{
4045 struct sigmatel_spec *spec = codec->spec;
4046
4047 if (action == HDA_FIXUP_ACT_PRE_PROBE)
4048 spec->eapd_switch = 0;
4049}
4050
4051static const struct hda_fixup stac9205_fixups[] = {
4052 [STAC_9205_REF] = {
4053 .type = HDA_FIXUP_FUNC,
4054 .v.func = stac9205_fixup_ref,
4055 },
4056 [STAC_9205_DELL_M42] = {
4057 .type = HDA_FIXUP_PINS,
4058 .v.pins = dell_9205_m42_pin_configs,
4059 },
4060 [STAC_9205_DELL_M43] = {
4061 .type = HDA_FIXUP_FUNC,
4062 .v.func = stac9205_fixup_dell_m43,
4063 },
4064 [STAC_9205_DELL_M44] = {
4065 .type = HDA_FIXUP_PINS,
4066 .v.pins = dell_9205_m44_pin_configs,
4067 },
4068 [STAC_9205_EAPD] = {
4069 .type = HDA_FIXUP_FUNC,
4070 .v.func = stac9205_fixup_eapd,
4071 },
4072 {}
4073};
4074
4075static const struct hda_model_fixup stac9205_models[] = {
4076 { .id = STAC_9205_REF, .name = "ref" },
4077 { .id = STAC_9205_DELL_M42, .name = "dell-m42" },
4078 { .id = STAC_9205_DELL_M43, .name = "dell-m43" },
4079 { .id = STAC_9205_DELL_M44, .name = "dell-m44" },
4080 { .id = STAC_9205_EAPD, .name = "eapd" },
4081 {}
4082};
4083
4084static const struct snd_pci_quirk stac9205_fixup_tbl[] = {
4085 /* SigmaTel reference board */
4086 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
4087 "DFI LanParty", STAC_9205_REF),
4088 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xfb30,
4089 "SigmaTel", STAC_9205_REF),
4090 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
4091 "DFI LanParty", STAC_9205_REF),
4092 /* Dell */
4093 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1,
4094 "unknown Dell", STAC_9205_DELL_M42),
4095 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2,
4096 "unknown Dell", STAC_9205_DELL_M42),
4097 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f8,
4098 "Dell Precision", STAC_9205_DELL_M43),
4099 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f9,
4100 "Dell Precision", STAC_9205_DELL_M43),
4101 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fa,
4102 "Dell Precision", STAC_9205_DELL_M43),
4103 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc,
4104 "unknown Dell", STAC_9205_DELL_M42),
4105 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd,
4106 "unknown Dell", STAC_9205_DELL_M42),
4107 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fe,
4108 "Dell Precision", STAC_9205_DELL_M43),
4109 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ff,
4110 "Dell Precision M4300", STAC_9205_DELL_M43),
4111 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0204,
4112 "unknown Dell", STAC_9205_DELL_M42),
4113 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0206,
4114 "Dell Precision", STAC_9205_DELL_M43),
4115 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021b,
4116 "Dell Precision", STAC_9205_DELL_M43),
4117 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021c,
4118 "Dell Precision", STAC_9205_DELL_M43),
4119 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021f,
4120 "Dell Inspiron", STAC_9205_DELL_M44),
4121 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0228,
4122 "Dell Vostro 1500", STAC_9205_DELL_M42),
4123 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0229,
4124 "Dell Vostro 1700", STAC_9205_DELL_M42),
4125 /* Gateway */
4126 SND_PCI_QUIRK(0x107b, 0x0560, "Gateway T6834c", STAC_9205_EAPD),
4127 SND_PCI_QUIRK(0x107b, 0x0565, "Gateway T1616", STAC_9205_EAPD),
4128 {} /* terminator */
4129};
4130
4131static int stac_parse_auto_config(struct hda_codec *codec)
4132{
4133 struct sigmatel_spec *spec = codec->spec;
4134 int err;
4135 int flags = 0;
4136
4137 if (spec->headset_jack)
4138 flags |= HDA_PINCFG_HEADSET_MIC;
4139
4140 err = snd_hda_parse_pin_defcfg(codec, &spec->gen.autocfg, NULL, flags);
4141 if (err < 0)
4142 return err;
4143
4144 /* add hooks */
4145 spec->gen.pcm_playback_hook = stac_playback_pcm_hook;
4146 spec->gen.pcm_capture_hook = stac_capture_pcm_hook;
4147
4148 spec->gen.automute_hook = stac_update_outputs;
4149 spec->gen.hp_automute_hook = stac_hp_automute;
4150 spec->gen.line_automute_hook = stac_line_automute;
4151 spec->gen.mic_autoswitch_hook = stac_mic_autoswitch;
4152
4153 err = snd_hda_gen_parse_auto_config(codec, &spec->gen.autocfg);
4154 if (err < 0)
4155 return err;
4156
4157 /* minimum value is actually mute */
4158 spec->gen.vmaster_tlv[3] |= TLV_DB_SCALE_MUTE;
4159
4160 /* setup analog beep controls */
4161 if (spec->anabeep_nid > 0) {
4162 err = stac_auto_create_beep_ctls(codec,
4163 spec->anabeep_nid);
4164 if (err < 0)
4165 return err;
4166 }
4167
4168 /* setup digital beep controls and input device */
4169#ifdef CONFIG_SND_HDA_INPUT_BEEP
4170 if (spec->gen.beep_nid) {
4171 hda_nid_t nid = spec->gen.beep_nid;
4172 unsigned int caps;
4173
4174 err = stac_auto_create_beep_ctls(codec, nid);
4175 if (err < 0)
4176 return err;
4177 if (codec->beep) {
4178 /* IDT/STAC codecs have linear beep tone parameter */
4179 codec->beep->linear_tone = spec->linear_tone_beep;
4180 /* if no beep switch is available, make its own one */
4181 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
4182 if (!(caps & AC_AMPCAP_MUTE)) {
4183 err = stac_beep_switch_ctl(codec);
4184 if (err < 0)
4185 return err;
4186 }
4187 }
4188 }
4189#endif
4190
4191 if (spec->gpio_led)
4192 spec->gen.vmaster_mute.hook = stac_vmaster_hook;
4193
4194 if (spec->aloopback_ctl &&
4195 snd_hda_get_bool_hint(codec, "loopback") == 1) {
4196 if (!snd_hda_gen_add_kctl(&spec->gen, NULL, spec->aloopback_ctl))
4197 return -ENOMEM;
4198 }
4199
4200 if (spec->have_spdif_mux) {
4201 err = stac_create_spdif_mux_ctls(codec);
4202 if (err < 0)
4203 return err;
4204 }
4205
4206 stac_init_power_map(codec);
4207
4208 return 0;
4209}
4210
4211
4212static int stac_init(struct hda_codec *codec)
4213{
4214 struct sigmatel_spec *spec = codec->spec;
4215 int i;
4216
4217 /* override some hints */
4218 stac_store_hints(codec);
4219
4220 /* set up GPIO */
4221 /* turn on EAPD statically when spec->eapd_switch isn't set.
4222 * otherwise, unsol event will turn it on/off dynamically
4223 */
4224 if (!spec->eapd_switch)
4225 spec->gpio_data |= spec->eapd_mask;
4226 stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, spec->gpio_data);
4227
4228 snd_hda_gen_init(codec);
4229
4230 /* sync the power-map */
4231 if (spec->num_pwrs)
4232 snd_hda_codec_write(codec, codec->afg, 0,
4233 AC_VERB_IDT_SET_POWER_MAP,
4234 spec->power_map_bits);
4235
4236 /* power down inactive ADCs */
4237 if (spec->powerdown_adcs) {
4238 for (i = 0; i < spec->gen.num_all_adcs; i++) {
4239 if (spec->active_adcs & (1 << i))
4240 continue;
4241 snd_hda_codec_write(codec, spec->gen.all_adcs[i], 0,
4242 AC_VERB_SET_POWER_STATE,
4243 AC_PWRST_D3);
4244 }
4245 }
4246
4247 return 0;
4248}
4249
4250static void stac_shutup(struct hda_codec *codec)
4251{
4252 struct sigmatel_spec *spec = codec->spec;
4253
4254 snd_hda_shutup_pins(codec);
4255
4256 if (spec->eapd_mask)
4257 stac_gpio_set(codec, spec->gpio_mask,
4258 spec->gpio_dir, spec->gpio_data &
4259 ~spec->eapd_mask);
4260}
4261
4262#define stac_free snd_hda_gen_free
4263
4264#ifdef CONFIG_PROC_FS
4265static void stac92hd_proc_hook(struct snd_info_buffer *buffer,
4266 struct hda_codec *codec, hda_nid_t nid)
4267{
4268 if (nid == codec->afg)
4269 snd_iprintf(buffer, "Power-Map: 0x%02x\n",
4270 snd_hda_codec_read(codec, nid, 0,
4271 AC_VERB_IDT_GET_POWER_MAP, 0));
4272}
4273
4274static void analog_loop_proc_hook(struct snd_info_buffer *buffer,
4275 struct hda_codec *codec,
4276 unsigned int verb)
4277{
4278 snd_iprintf(buffer, "Analog Loopback: 0x%02x\n",
4279 snd_hda_codec_read(codec, codec->afg, 0, verb, 0));
4280}
4281
4282/* stac92hd71bxx, stac92hd73xx */
4283static void stac92hd7x_proc_hook(struct snd_info_buffer *buffer,
4284 struct hda_codec *codec, hda_nid_t nid)
4285{
4286 stac92hd_proc_hook(buffer, codec, nid);
4287 if (nid == codec->afg)
4288 analog_loop_proc_hook(buffer, codec, 0xfa0);
4289}
4290
4291static void stac9205_proc_hook(struct snd_info_buffer *buffer,
4292 struct hda_codec *codec, hda_nid_t nid)
4293{
4294 if (nid == codec->afg)
4295 analog_loop_proc_hook(buffer, codec, 0xfe0);
4296}
4297
4298static void stac927x_proc_hook(struct snd_info_buffer *buffer,
4299 struct hda_codec *codec, hda_nid_t nid)
4300{
4301 if (nid == codec->afg)
4302 analog_loop_proc_hook(buffer, codec, 0xfeb);
4303}
4304#else
4305#define stac92hd_proc_hook NULL
4306#define stac92hd7x_proc_hook NULL
4307#define stac9205_proc_hook NULL
4308#define stac927x_proc_hook NULL
4309#endif
4310
4311#ifdef CONFIG_PM
4312static int stac_suspend(struct hda_codec *codec)
4313{
4314 stac_shutup(codec);
4315 return 0;
4316}
4317#else
4318#define stac_suspend NULL
4319#endif /* CONFIG_PM */
4320
4321static const struct hda_codec_ops stac_patch_ops = {
4322 .build_controls = snd_hda_gen_build_controls,
4323 .build_pcms = snd_hda_gen_build_pcms,
4324 .init = stac_init,
4325 .free = stac_free,
4326 .unsol_event = snd_hda_jack_unsol_event,
4327#ifdef CONFIG_PM
4328 .suspend = stac_suspend,
4329#endif
4330 .reboot_notify = stac_shutup,
4331};
4332
4333static int alloc_stac_spec(struct hda_codec *codec)
4334{
4335 struct sigmatel_spec *spec;
4336
4337 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4338 if (!spec)
4339 return -ENOMEM;
4340 snd_hda_gen_spec_init(&spec->gen);
4341 codec->spec = spec;
4342 codec->no_trigger_sense = 1; /* seems common with STAC/IDT codecs */
4343 return 0;
4344}
4345
4346static int patch_stac9200(struct hda_codec *codec)
4347{
4348 struct sigmatel_spec *spec;
4349 int err;
4350
4351 err = alloc_stac_spec(codec);
4352 if (err < 0)
4353 return err;
4354
4355 spec = codec->spec;
4356 spec->linear_tone_beep = 1;
4357 spec->gen.own_eapd_ctl = 1;
4358
4359 codec->patch_ops = stac_patch_ops;
4360 codec->power_filter = snd_hda_codec_eapd_power_filter;
4361
4362 snd_hda_add_verbs(codec, stac9200_eapd_init);
4363
4364 snd_hda_pick_fixup(codec, stac9200_models, stac9200_fixup_tbl,
4365 stac9200_fixups);
4366 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
4367
4368 err = stac_parse_auto_config(codec);
4369 if (err < 0) {
4370 stac_free(codec);
4371 return err;
4372 }
4373
4374 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
4375
4376 return 0;
4377}
4378
4379static int patch_stac925x(struct hda_codec *codec)
4380{
4381 struct sigmatel_spec *spec;
4382 int err;
4383
4384 err = alloc_stac_spec(codec);
4385 if (err < 0)
4386 return err;
4387
4388 spec = codec->spec;
4389 spec->linear_tone_beep = 1;
4390 spec->gen.own_eapd_ctl = 1;
4391
4392 codec->patch_ops = stac_patch_ops;
4393
4394 snd_hda_add_verbs(codec, stac925x_core_init);
4395
4396 snd_hda_pick_fixup(codec, stac925x_models, stac925x_fixup_tbl,
4397 stac925x_fixups);
4398 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
4399
4400 err = stac_parse_auto_config(codec);
4401 if (err < 0) {
4402 stac_free(codec);
4403 return err;
4404 }
4405
4406 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
4407
4408 return 0;
4409}
4410
4411static int patch_stac92hd73xx(struct hda_codec *codec)
4412{
4413 struct sigmatel_spec *spec;
4414 int err;
4415 int num_dacs;
4416
4417 err = alloc_stac_spec(codec);
4418 if (err < 0)
4419 return err;
4420
4421 spec = codec->spec;
4422 spec->linear_tone_beep = 0;
4423 spec->gen.mixer_nid = 0x1d;
4424 spec->have_spdif_mux = 1;
4425
4426 num_dacs = snd_hda_get_num_conns(codec, 0x0a) - 1;
4427 if (num_dacs < 3 || num_dacs > 5) {
4428 codec_warn(codec,
4429 "Could not determine number of channels defaulting to DAC count\n");
4430 num_dacs = 5;
4431 }
4432
4433 switch (num_dacs) {
4434 case 0x3: /* 6 Channel */
4435 spec->aloopback_ctl = &stac92hd73xx_6ch_loopback;
4436 break;
4437 case 0x4: /* 8 Channel */
4438 spec->aloopback_ctl = &stac92hd73xx_8ch_loopback;
4439 break;
4440 case 0x5: /* 10 Channel */
4441 spec->aloopback_ctl = &stac92hd73xx_10ch_loopback;
4442 break;
4443 }
4444
4445 spec->aloopback_mask = 0x01;
4446 spec->aloopback_shift = 8;
4447
4448 spec->gen.beep_nid = 0x1c; /* digital beep */
4449
4450 /* GPIO0 High = Enable EAPD */
4451 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
4452 spec->gpio_data = 0x01;
4453
4454 spec->eapd_switch = 1;
4455
4456 spec->num_pwrs = ARRAY_SIZE(stac92hd73xx_pwr_nids);
4457 spec->pwr_nids = stac92hd73xx_pwr_nids;
4458
4459 spec->gen.own_eapd_ctl = 1;
4460 spec->gen.power_down_unused = 1;
4461
4462 codec->patch_ops = stac_patch_ops;
4463
4464 snd_hda_pick_fixup(codec, stac92hd73xx_models, stac92hd73xx_fixup_tbl,
4465 stac92hd73xx_fixups);
4466 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
4467
4468 if (!spec->volknob_init)
4469 snd_hda_add_verbs(codec, stac92hd73xx_core_init);
4470
4471 err = stac_parse_auto_config(codec);
4472 if (err < 0) {
4473 stac_free(codec);
4474 return err;
4475 }
4476
4477 /* Don't GPIO-mute speakers if there are no internal speakers, because
4478 * the GPIO might be necessary for Headphone
4479 */
4480 if (spec->eapd_switch && !has_builtin_speaker(codec))
4481 spec->eapd_switch = 0;
4482
4483 codec->proc_widget_hook = stac92hd7x_proc_hook;
4484
4485 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
4486
4487 return 0;
4488}
4489
4490static void stac_setup_gpio(struct hda_codec *codec)
4491{
4492 struct sigmatel_spec *spec = codec->spec;
4493
4494 spec->gpio_mask |= spec->eapd_mask;
4495 if (spec->gpio_led) {
4496 if (!spec->vref_mute_led_nid) {
4497 spec->gpio_mask |= spec->gpio_led;
4498 spec->gpio_dir |= spec->gpio_led;
4499 spec->gpio_data |= spec->gpio_led;
4500 } else {
4501 codec->power_filter = stac_vref_led_power_filter;
4502 }
4503 }
4504
4505 if (spec->mic_mute_led_gpio) {
4506 spec->gpio_mask |= spec->mic_mute_led_gpio;
4507 spec->gpio_dir |= spec->mic_mute_led_gpio;
4508 spec->mic_enabled = 0;
4509 spec->gpio_data |= spec->mic_mute_led_gpio;
4510
4511 spec->gen.cap_sync_hook = stac_capture_led_hook;
4512 }
4513}
4514
4515static int patch_stac92hd83xxx(struct hda_codec *codec)
4516{
4517 struct sigmatel_spec *spec;
4518 int err;
4519
4520 err = alloc_stac_spec(codec);
4521 if (err < 0)
4522 return err;
4523
4524 codec->epss = 0; /* longer delay needed for D3 */
4525
4526 spec = codec->spec;
4527 spec->linear_tone_beep = 0;
4528 spec->gen.own_eapd_ctl = 1;
4529 spec->gen.power_down_unused = 1;
4530 spec->gen.mixer_nid = 0x1b;
4531
4532 spec->gen.beep_nid = 0x21; /* digital beep */
4533 spec->pwr_nids = stac92hd83xxx_pwr_nids;
4534 spec->num_pwrs = ARRAY_SIZE(stac92hd83xxx_pwr_nids);
4535 spec->default_polarity = -1; /* no default cfg */
4536
4537 codec->patch_ops = stac_patch_ops;
4538
4539 snd_hda_add_verbs(codec, stac92hd83xxx_core_init);
4540
4541 snd_hda_pick_fixup(codec, stac92hd83xxx_models, stac92hd83xxx_fixup_tbl,
4542 stac92hd83xxx_fixups);
4543 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
4544
4545 stac_setup_gpio(codec);
4546
4547 err = stac_parse_auto_config(codec);
4548 if (err < 0) {
4549 stac_free(codec);
4550 return err;
4551 }
4552
4553 codec->proc_widget_hook = stac92hd_proc_hook;
4554
4555 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
4556
4557 return 0;
4558}
4559
4560static const hda_nid_t stac92hd95_pwr_nids[] = {
4561 0x0a, 0x0b, 0x0c, 0x0d
4562};
4563
4564static int patch_stac92hd95(struct hda_codec *codec)
4565{
4566 struct sigmatel_spec *spec;
4567 int err;
4568
4569 err = alloc_stac_spec(codec);
4570 if (err < 0)
4571 return err;
4572
4573 codec->epss = 0; /* longer delay needed for D3 */
4574
4575 spec = codec->spec;
4576 spec->linear_tone_beep = 0;
4577 spec->gen.own_eapd_ctl = 1;
4578 spec->gen.power_down_unused = 1;
4579
4580 spec->gen.beep_nid = 0x19; /* digital beep */
4581 spec->pwr_nids = stac92hd95_pwr_nids;
4582 spec->num_pwrs = ARRAY_SIZE(stac92hd95_pwr_nids);
4583 spec->default_polarity = -1; /* no default cfg */
4584
4585 codec->patch_ops = stac_patch_ops;
4586
4587 err = stac_parse_auto_config(codec);
4588 if (err < 0) {
4589 stac_free(codec);
4590 return err;
4591 }
4592
4593 codec->proc_widget_hook = stac92hd_proc_hook;
4594
4595 return 0;
4596}
4597
4598static int patch_stac92hd71bxx(struct hda_codec *codec)
4599{
4600 struct sigmatel_spec *spec;
4601 const struct hda_verb *unmute_init = stac92hd71bxx_unmute_core_init;
4602 int err;
4603
4604 err = alloc_stac_spec(codec);
4605 if (err < 0)
4606 return err;
4607
4608 spec = codec->spec;
4609 spec->linear_tone_beep = 0;
4610 spec->gen.own_eapd_ctl = 1;
4611 spec->gen.power_down_unused = 1;
4612 spec->gen.mixer_nid = 0x17;
4613 spec->have_spdif_mux = 1;
4614
4615 codec->patch_ops = stac_patch_ops;
4616
4617 /* GPIO0 = EAPD */
4618 spec->gpio_mask = 0x01;
4619 spec->gpio_dir = 0x01;
4620 spec->gpio_data = 0x01;
4621
4622 switch (codec->vendor_id) {
4623 case 0x111d76b6: /* 4 Port without Analog Mixer */
4624 case 0x111d76b7:
4625 unmute_init++;
4626 break;
4627 case 0x111d7608: /* 5 Port with Analog Mixer */
4628 if ((codec->revision_id & 0xf) == 0 ||
4629 (codec->revision_id & 0xf) == 1)
4630 spec->stream_delay = 40; /* 40 milliseconds */
4631
4632 /* disable VSW */
4633 unmute_init++;
4634 snd_hda_codec_set_pincfg(codec, 0x0f, 0x40f000f0);
4635 snd_hda_codec_set_pincfg(codec, 0x19, 0x40f000f3);
4636 break;
4637 case 0x111d7603: /* 6 Port with Analog Mixer */
4638 if ((codec->revision_id & 0xf) == 1)
4639 spec->stream_delay = 40; /* 40 milliseconds */
4640
4641 break;
4642 }
4643
4644 if (get_wcaps_type(get_wcaps(codec, 0x28)) == AC_WID_VOL_KNB)
4645 snd_hda_add_verbs(codec, stac92hd71bxx_core_init);
4646
4647 if (get_wcaps(codec, 0xa) & AC_WCAP_IN_AMP)
4648 snd_hda_sequence_write_cache(codec, unmute_init);
4649
4650 spec->aloopback_ctl = &stac92hd71bxx_loopback;
4651 spec->aloopback_mask = 0x50;
4652 spec->aloopback_shift = 0;
4653
4654 spec->powerdown_adcs = 1;
4655 spec->gen.beep_nid = 0x26; /* digital beep */
4656 spec->num_pwrs = ARRAY_SIZE(stac92hd71bxx_pwr_nids);
4657 spec->pwr_nids = stac92hd71bxx_pwr_nids;
4658
4659 snd_hda_pick_fixup(codec, stac92hd71bxx_models, stac92hd71bxx_fixup_tbl,
4660 stac92hd71bxx_fixups);
4661 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
4662
4663 stac_setup_gpio(codec);
4664
4665 err = stac_parse_auto_config(codec);
4666 if (err < 0) {
4667 stac_free(codec);
4668 return err;
4669 }
4670
4671 codec->proc_widget_hook = stac92hd7x_proc_hook;
4672
4673 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
4674
4675 return 0;
4676}
4677
4678static int patch_stac922x(struct hda_codec *codec)
4679{
4680 struct sigmatel_spec *spec;
4681 int err;
4682
4683 err = alloc_stac_spec(codec);
4684 if (err < 0)
4685 return err;
4686
4687 spec = codec->spec;
4688 spec->linear_tone_beep = 1;
4689 spec->gen.own_eapd_ctl = 1;
4690
4691 codec->patch_ops = stac_patch_ops;
4692
4693 snd_hda_add_verbs(codec, stac922x_core_init);
4694
4695 /* Fix Mux capture level; max to 2 */
4696 snd_hda_override_amp_caps(codec, 0x12, HDA_OUTPUT,
4697 (0 << AC_AMPCAP_OFFSET_SHIFT) |
4698 (2 << AC_AMPCAP_NUM_STEPS_SHIFT) |
4699 (0x27 << AC_AMPCAP_STEP_SIZE_SHIFT) |
4700 (0 << AC_AMPCAP_MUTE_SHIFT));
4701
4702 snd_hda_pick_fixup(codec, stac922x_models, stac922x_fixup_tbl,
4703 stac922x_fixups);
4704 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
4705
4706 err = stac_parse_auto_config(codec);
4707 if (err < 0) {
4708 stac_free(codec);
4709 return err;
4710 }
4711
4712 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
4713
4714 return 0;
4715}
4716
4717static const char * const stac927x_spdif_labels[] = {
4718 "Digital Playback", "ADAT", "Analog Mux 1",
4719 "Analog Mux 2", "Analog Mux 3", NULL
4720};
4721
4722static int patch_stac927x(struct hda_codec *codec)
4723{
4724 struct sigmatel_spec *spec;
4725 int err;
4726
4727 err = alloc_stac_spec(codec);
4728 if (err < 0)
4729 return err;
4730
4731 spec = codec->spec;
4732 spec->linear_tone_beep = 1;
4733 spec->gen.own_eapd_ctl = 1;
4734 spec->have_spdif_mux = 1;
4735 spec->spdif_labels = stac927x_spdif_labels;
4736
4737 spec->gen.beep_nid = 0x23; /* digital beep */
4738
4739 /* GPIO0 High = Enable EAPD */
4740 spec->eapd_mask = spec->gpio_mask = 0x01;
4741 spec->gpio_dir = spec->gpio_data = 0x01;
4742
4743 spec->aloopback_ctl = &stac927x_loopback;
4744 spec->aloopback_mask = 0x40;
4745 spec->aloopback_shift = 0;
4746 spec->eapd_switch = 1;
4747
4748 codec->patch_ops = stac_patch_ops;
4749
4750 snd_hda_pick_fixup(codec, stac927x_models, stac927x_fixup_tbl,
4751 stac927x_fixups);
4752 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
4753
4754 if (!spec->volknob_init)
4755 snd_hda_add_verbs(codec, stac927x_core_init);
4756
4757 err = stac_parse_auto_config(codec);
4758 if (err < 0) {
4759 stac_free(codec);
4760 return err;
4761 }
4762
4763 codec->proc_widget_hook = stac927x_proc_hook;
4764
4765 /*
4766 * !!FIXME!!
4767 * The STAC927x seem to require fairly long delays for certain
4768 * command sequences. With too short delays (even if the answer
4769 * is set to RIRB properly), it results in the silence output
4770 * on some hardwares like Dell.
4771 *
4772 * The below flag enables the longer delay (see get_response
4773 * in hda_intel.c).
4774 */
4775 codec->bus->needs_damn_long_delay = 1;
4776
4777 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
4778
4779 return 0;
4780}
4781
4782static int patch_stac9205(struct hda_codec *codec)
4783{
4784 struct sigmatel_spec *spec;
4785 int err;
4786
4787 err = alloc_stac_spec(codec);
4788 if (err < 0)
4789 return err;
4790
4791 spec = codec->spec;
4792 spec->linear_tone_beep = 1;
4793 spec->gen.own_eapd_ctl = 1;
4794 spec->have_spdif_mux = 1;
4795
4796 spec->gen.beep_nid = 0x23; /* digital beep */
4797
4798 snd_hda_add_verbs(codec, stac9205_core_init);
4799 spec->aloopback_ctl = &stac9205_loopback;
4800
4801 spec->aloopback_mask = 0x40;
4802 spec->aloopback_shift = 0;
4803
4804 /* GPIO0 High = EAPD */
4805 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
4806 spec->gpio_data = 0x01;
4807
4808 /* Turn on/off EAPD per HP plugging */
4809 spec->eapd_switch = 1;
4810
4811 codec->patch_ops = stac_patch_ops;
4812
4813 snd_hda_pick_fixup(codec, stac9205_models, stac9205_fixup_tbl,
4814 stac9205_fixups);
4815 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
4816
4817 err = stac_parse_auto_config(codec);
4818 if (err < 0) {
4819 stac_free(codec);
4820 return err;
4821 }
4822
4823 codec->proc_widget_hook = stac9205_proc_hook;
4824
4825 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
4826
4827 return 0;
4828}
4829
4830/*
4831 * STAC9872 hack
4832 */
4833
4834static const struct hda_verb stac9872_core_init[] = {
4835 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
4836 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
4837 {}
4838};
4839
4840static const struct hda_pintbl stac9872_vaio_pin_configs[] = {
4841 { 0x0a, 0x03211020 },
4842 { 0x0b, 0x411111f0 },
4843 { 0x0c, 0x411111f0 },
4844 { 0x0d, 0x03a15030 },
4845 { 0x0e, 0x411111f0 },
4846 { 0x0f, 0x90170110 },
4847 { 0x11, 0x411111f0 },
4848 { 0x13, 0x411111f0 },
4849 { 0x14, 0x90a7013e },
4850 {}
4851};
4852
4853static const struct hda_model_fixup stac9872_models[] = {
4854 { .id = STAC_9872_VAIO, .name = "vaio" },
4855 {}
4856};
4857
4858static const struct hda_fixup stac9872_fixups[] = {
4859 [STAC_9872_VAIO] = {
4860 .type = HDA_FIXUP_PINS,
4861 .v.pins = stac9872_vaio_pin_configs,
4862 },
4863};
4864
4865static const struct snd_pci_quirk stac9872_fixup_tbl[] = {
4866 SND_PCI_QUIRK_MASK(0x104d, 0xfff0, 0x81e0,
4867 "Sony VAIO F/S", STAC_9872_VAIO),
4868 {} /* terminator */
4869};
4870
4871static int patch_stac9872(struct hda_codec *codec)
4872{
4873 struct sigmatel_spec *spec;
4874 int err;
4875
4876 err = alloc_stac_spec(codec);
4877 if (err < 0)
4878 return err;
4879
4880 spec = codec->spec;
4881 spec->linear_tone_beep = 1;
4882 spec->gen.own_eapd_ctl = 1;
4883
4884 codec->patch_ops = stac_patch_ops;
4885
4886 snd_hda_add_verbs(codec, stac9872_core_init);
4887
4888 snd_hda_pick_fixup(codec, stac9872_models, stac9872_fixup_tbl,
4889 stac9872_fixups);
4890 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
4891
4892 err = stac_parse_auto_config(codec);
4893 if (err < 0) {
4894 stac_free(codec);
4895 return -EINVAL;
4896 }
4897
4898 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
4899
4900 return 0;
4901}
4902
4903
4904/*
4905 * patch entries
4906 */
4907static const struct hda_codec_preset snd_hda_preset_sigmatel[] = {
4908 { .id = 0x83847690, .name = "STAC9200", .patch = patch_stac9200 },
4909 { .id = 0x83847882, .name = "STAC9220 A1", .patch = patch_stac922x },
4910 { .id = 0x83847680, .name = "STAC9221 A1", .patch = patch_stac922x },
4911 { .id = 0x83847880, .name = "STAC9220 A2", .patch = patch_stac922x },
4912 { .id = 0x83847681, .name = "STAC9220D/9223D A2", .patch = patch_stac922x },
4913 { .id = 0x83847682, .name = "STAC9221 A2", .patch = patch_stac922x },
4914 { .id = 0x83847683, .name = "STAC9221D A2", .patch = patch_stac922x },
4915 { .id = 0x83847618, .name = "STAC9227", .patch = patch_stac927x },
4916 { .id = 0x83847619, .name = "STAC9227", .patch = patch_stac927x },
4917 { .id = 0x83847616, .name = "STAC9228", .patch = patch_stac927x },
4918 { .id = 0x83847617, .name = "STAC9228", .patch = patch_stac927x },
4919 { .id = 0x83847614, .name = "STAC9229", .patch = patch_stac927x },
4920 { .id = 0x83847615, .name = "STAC9229", .patch = patch_stac927x },
4921 { .id = 0x83847620, .name = "STAC9274", .patch = patch_stac927x },
4922 { .id = 0x83847621, .name = "STAC9274D", .patch = patch_stac927x },
4923 { .id = 0x83847622, .name = "STAC9273X", .patch = patch_stac927x },
4924 { .id = 0x83847623, .name = "STAC9273D", .patch = patch_stac927x },
4925 { .id = 0x83847624, .name = "STAC9272X", .patch = patch_stac927x },
4926 { .id = 0x83847625, .name = "STAC9272D", .patch = patch_stac927x },
4927 { .id = 0x83847626, .name = "STAC9271X", .patch = patch_stac927x },
4928 { .id = 0x83847627, .name = "STAC9271D", .patch = patch_stac927x },
4929 { .id = 0x83847628, .name = "STAC9274X5NH", .patch = patch_stac927x },
4930 { .id = 0x83847629, .name = "STAC9274D5NH", .patch = patch_stac927x },
4931 { .id = 0x83847632, .name = "STAC9202", .patch = patch_stac925x },
4932 { .id = 0x83847633, .name = "STAC9202D", .patch = patch_stac925x },
4933 { .id = 0x83847634, .name = "STAC9250", .patch = patch_stac925x },
4934 { .id = 0x83847635, .name = "STAC9250D", .patch = patch_stac925x },
4935 { .id = 0x83847636, .name = "STAC9251", .patch = patch_stac925x },
4936 { .id = 0x83847637, .name = "STAC9250D", .patch = patch_stac925x },
4937 { .id = 0x83847645, .name = "92HD206X", .patch = patch_stac927x },
4938 { .id = 0x83847646, .name = "92HD206D", .patch = patch_stac927x },
4939 /* The following does not take into account .id=0x83847661 when subsys =
4940 * 104D0C00 which is STAC9225s. Because of this, some SZ Notebooks are
4941 * currently not fully supported.
4942 */
4943 { .id = 0x83847661, .name = "CXD9872RD/K", .patch = patch_stac9872 },
4944 { .id = 0x83847662, .name = "STAC9872AK", .patch = patch_stac9872 },
4945 { .id = 0x83847664, .name = "CXD9872AKD", .patch = patch_stac9872 },
4946 { .id = 0x83847698, .name = "STAC9205", .patch = patch_stac9205 },
4947 { .id = 0x838476a0, .name = "STAC9205", .patch = patch_stac9205 },
4948 { .id = 0x838476a1, .name = "STAC9205D", .patch = patch_stac9205 },
4949 { .id = 0x838476a2, .name = "STAC9204", .patch = patch_stac9205 },
4950 { .id = 0x838476a3, .name = "STAC9204D", .patch = patch_stac9205 },
4951 { .id = 0x838476a4, .name = "STAC9255", .patch = patch_stac9205 },
4952 { .id = 0x838476a5, .name = "STAC9255D", .patch = patch_stac9205 },
4953 { .id = 0x838476a6, .name = "STAC9254", .patch = patch_stac9205 },
4954 { .id = 0x838476a7, .name = "STAC9254D", .patch = patch_stac9205 },
4955 { .id = 0x111d7603, .name = "92HD75B3X5", .patch = patch_stac92hd71bxx},
4956 { .id = 0x111d7604, .name = "92HD83C1X5", .patch = patch_stac92hd83xxx},
4957 { .id = 0x111d76d4, .name = "92HD83C1C5", .patch = patch_stac92hd83xxx},
4958 { .id = 0x111d7605, .name = "92HD81B1X5", .patch = patch_stac92hd83xxx},
4959 { .id = 0x111d76d5, .name = "92HD81B1C5", .patch = patch_stac92hd83xxx},
4960 { .id = 0x111d76d1, .name = "92HD87B1/3", .patch = patch_stac92hd83xxx},
4961 { .id = 0x111d76d9, .name = "92HD87B2/4", .patch = patch_stac92hd83xxx},
4962 { .id = 0x111d7666, .name = "92HD88B3", .patch = patch_stac92hd83xxx},
4963 { .id = 0x111d7667, .name = "92HD88B1", .patch = patch_stac92hd83xxx},
4964 { .id = 0x111d7668, .name = "92HD88B2", .patch = patch_stac92hd83xxx},
4965 { .id = 0x111d7669, .name = "92HD88B4", .patch = patch_stac92hd83xxx},
4966 { .id = 0x111d7608, .name = "92HD75B2X5", .patch = patch_stac92hd71bxx},
4967 { .id = 0x111d7674, .name = "92HD73D1X5", .patch = patch_stac92hd73xx },
4968 { .id = 0x111d7675, .name = "92HD73C1X5", .patch = patch_stac92hd73xx },
4969 { .id = 0x111d7676, .name = "92HD73E1X5", .patch = patch_stac92hd73xx },
4970 { .id = 0x111d7695, .name = "92HD95", .patch = patch_stac92hd95 },
4971 { .id = 0x111d76b0, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
4972 { .id = 0x111d76b1, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
4973 { .id = 0x111d76b2, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
4974 { .id = 0x111d76b3, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
4975 { .id = 0x111d76b4, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
4976 { .id = 0x111d76b5, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
4977 { .id = 0x111d76b6, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
4978 { .id = 0x111d76b7, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
4979 { .id = 0x111d76c0, .name = "92HD89C3", .patch = patch_stac92hd73xx },
4980 { .id = 0x111d76c1, .name = "92HD89C2", .patch = patch_stac92hd73xx },
4981 { .id = 0x111d76c2, .name = "92HD89C1", .patch = patch_stac92hd73xx },
4982 { .id = 0x111d76c3, .name = "92HD89B3", .patch = patch_stac92hd73xx },
4983 { .id = 0x111d76c4, .name = "92HD89B2", .patch = patch_stac92hd73xx },
4984 { .id = 0x111d76c5, .name = "92HD89B1", .patch = patch_stac92hd73xx },
4985 { .id = 0x111d76c6, .name = "92HD89E3", .patch = patch_stac92hd73xx },
4986 { .id = 0x111d76c7, .name = "92HD89E2", .patch = patch_stac92hd73xx },
4987 { .id = 0x111d76c8, .name = "92HD89E1", .patch = patch_stac92hd73xx },
4988 { .id = 0x111d76c9, .name = "92HD89D3", .patch = patch_stac92hd73xx },
4989 { .id = 0x111d76ca, .name = "92HD89D2", .patch = patch_stac92hd73xx },
4990 { .id = 0x111d76cb, .name = "92HD89D1", .patch = patch_stac92hd73xx },
4991 { .id = 0x111d76cc, .name = "92HD89F3", .patch = patch_stac92hd73xx },
4992 { .id = 0x111d76cd, .name = "92HD89F2", .patch = patch_stac92hd73xx },
4993 { .id = 0x111d76ce, .name = "92HD89F1", .patch = patch_stac92hd73xx },
4994 { .id = 0x111d76df, .name = "92HD93BXX", .patch = patch_stac92hd83xxx},
4995 { .id = 0x111d76e0, .name = "92HD91BXX", .patch = patch_stac92hd83xxx},
4996 { .id = 0x111d76e3, .name = "92HD98BXX", .patch = patch_stac92hd83xxx},
4997 { .id = 0x111d76e5, .name = "92HD99BXX", .patch = patch_stac92hd83xxx},
4998 { .id = 0x111d76e7, .name = "92HD90BXX", .patch = patch_stac92hd83xxx},
4999 { .id = 0x111d76e8, .name = "92HD66B1X5", .patch = patch_stac92hd83xxx},
5000 { .id = 0x111d76e9, .name = "92HD66B2X5", .patch = patch_stac92hd83xxx},
5001 { .id = 0x111d76ea, .name = "92HD66B3X5", .patch = patch_stac92hd83xxx},
5002 { .id = 0x111d76eb, .name = "92HD66C1X5", .patch = patch_stac92hd83xxx},
5003 { .id = 0x111d76ec, .name = "92HD66C2X5", .patch = patch_stac92hd83xxx},
5004 { .id = 0x111d76ed, .name = "92HD66C3X5", .patch = patch_stac92hd83xxx},
5005 { .id = 0x111d76ee, .name = "92HD66B1X3", .patch = patch_stac92hd83xxx},
5006 { .id = 0x111d76ef, .name = "92HD66B2X3", .patch = patch_stac92hd83xxx},
5007 { .id = 0x111d76f0, .name = "92HD66B3X3", .patch = patch_stac92hd83xxx},
5008 { .id = 0x111d76f1, .name = "92HD66C1X3", .patch = patch_stac92hd83xxx},
5009 { .id = 0x111d76f2, .name = "92HD66C2X3", .patch = patch_stac92hd83xxx},
5010 { .id = 0x111d76f3, .name = "92HD66C3/65", .patch = patch_stac92hd83xxx},
5011 {} /* terminator */
5012};
5013
5014MODULE_ALIAS("snd-hda-codec-id:8384*");
5015MODULE_ALIAS("snd-hda-codec-id:111d*");
5016
5017MODULE_LICENSE("GPL");
5018MODULE_DESCRIPTION("IDT/Sigmatel HD-audio codec");
5019
5020static struct hda_codec_preset_list sigmatel_list = {
5021 .preset = snd_hda_preset_sigmatel,
5022 .owner = THIS_MODULE,
5023};
5024
5025static int __init patch_sigmatel_init(void)
5026{
5027 return snd_hda_add_codec_preset(&sigmatel_list);
5028}
5029
5030static void __exit patch_sigmatel_exit(void)
5031{
5032 snd_hda_delete_codec_preset(&sigmatel_list);
5033}
5034
5035module_init(patch_sigmatel_init)
5036module_exit(patch_sigmatel_exit)
1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * Universal Interface for Intel High Definition Audio Codec
4 *
5 * HD audio interface patch for SigmaTel STAC92xx
6 *
7 * Copyright (c) 2005 Embedded Alley Solutions, Inc.
8 * Matt Porter <mporter@embeddedalley.com>
9 *
10 * Based on patch_cmedia.c and patch_realtek.c
11 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
12 */
13
14#include <linux/init.h>
15#include <linux/delay.h>
16#include <linux/slab.h>
17#include <linux/pci.h>
18#include <linux/dmi.h>
19#include <linux/module.h>
20#include <sound/core.h>
21#include <sound/jack.h>
22#include <sound/hda_codec.h>
23#include "hda_local.h"
24#include "hda_auto_parser.h"
25#include "hda_beep.h"
26#include "hda_jack.h"
27#include "hda_generic.h"
28
29enum {
30 STAC_REF,
31 STAC_9200_OQO,
32 STAC_9200_DELL_D21,
33 STAC_9200_DELL_D22,
34 STAC_9200_DELL_D23,
35 STAC_9200_DELL_M21,
36 STAC_9200_DELL_M22,
37 STAC_9200_DELL_M23,
38 STAC_9200_DELL_M24,
39 STAC_9200_DELL_M25,
40 STAC_9200_DELL_M26,
41 STAC_9200_DELL_M27,
42 STAC_9200_M4,
43 STAC_9200_M4_2,
44 STAC_9200_PANASONIC,
45 STAC_9200_EAPD_INIT,
46 STAC_9200_MODELS
47};
48
49enum {
50 STAC_9205_REF,
51 STAC_9205_DELL_M42,
52 STAC_9205_DELL_M43,
53 STAC_9205_DELL_M44,
54 STAC_9205_EAPD,
55 STAC_9205_MODELS
56};
57
58enum {
59 STAC_92HD73XX_NO_JD, /* no jack-detection */
60 STAC_92HD73XX_REF,
61 STAC_92HD73XX_INTEL,
62 STAC_DELL_M6_AMIC,
63 STAC_DELL_M6_DMIC,
64 STAC_DELL_M6_BOTH,
65 STAC_DELL_EQ,
66 STAC_ALIENWARE_M17X,
67 STAC_ELO_VUPOINT_15MX,
68 STAC_92HD89XX_HP_FRONT_JACK,
69 STAC_92HD89XX_HP_Z1_G2_RIGHT_MIC_JACK,
70 STAC_92HD73XX_ASUS_MOBO,
71 STAC_92HD73XX_MODELS
72};
73
74enum {
75 STAC_92HD83XXX_REF,
76 STAC_92HD83XXX_PWR_REF,
77 STAC_DELL_S14,
78 STAC_DELL_VOSTRO_3500,
79 STAC_92HD83XXX_HP_cNB11_INTQUAD,
80 STAC_HP_DV7_4000,
81 STAC_HP_ZEPHYR,
82 STAC_92HD83XXX_HP_LED,
83 STAC_92HD83XXX_HP_INV_LED,
84 STAC_92HD83XXX_HP_MIC_LED,
85 STAC_HP_LED_GPIO10,
86 STAC_92HD83XXX_HEADSET_JACK,
87 STAC_92HD83XXX_HP,
88 STAC_HP_ENVY_BASS,
89 STAC_HP_BNB13_EQ,
90 STAC_HP_ENVY_TS_BASS,
91 STAC_HP_ENVY_TS_DAC_BIND,
92 STAC_92HD83XXX_GPIO10_EAPD,
93 STAC_92HD83XXX_MODELS
94};
95
96enum {
97 STAC_92HD71BXX_REF,
98 STAC_DELL_M4_1,
99 STAC_DELL_M4_2,
100 STAC_DELL_M4_3,
101 STAC_HP_M4,
102 STAC_HP_DV4,
103 STAC_HP_DV5,
104 STAC_HP_HDX,
105 STAC_92HD71BXX_HP,
106 STAC_92HD71BXX_NO_DMIC,
107 STAC_92HD71BXX_NO_SMUX,
108 STAC_92HD71BXX_MODELS
109};
110
111enum {
112 STAC_92HD95_HP_LED,
113 STAC_92HD95_HP_BASS,
114 STAC_92HD95_MODELS
115};
116
117enum {
118 STAC_925x_REF,
119 STAC_M1,
120 STAC_M1_2,
121 STAC_M2,
122 STAC_M2_2,
123 STAC_M3,
124 STAC_M5,
125 STAC_M6,
126 STAC_925x_MODELS
127};
128
129enum {
130 STAC_D945_REF,
131 STAC_D945GTP3,
132 STAC_D945GTP5,
133 STAC_INTEL_MAC_V1,
134 STAC_INTEL_MAC_V2,
135 STAC_INTEL_MAC_V3,
136 STAC_INTEL_MAC_V4,
137 STAC_INTEL_MAC_V5,
138 STAC_INTEL_MAC_AUTO,
139 STAC_ECS_202,
140 STAC_922X_DELL_D81,
141 STAC_922X_DELL_D82,
142 STAC_922X_DELL_M81,
143 STAC_922X_DELL_M82,
144 STAC_922X_INTEL_MAC_GPIO,
145 STAC_922X_MODELS
146};
147
148enum {
149 STAC_D965_REF_NO_JD, /* no jack-detection */
150 STAC_D965_REF,
151 STAC_D965_3ST,
152 STAC_D965_5ST,
153 STAC_D965_5ST_NO_FP,
154 STAC_D965_VERBS,
155 STAC_DELL_3ST,
156 STAC_DELL_BIOS,
157 STAC_NEMO_DEFAULT,
158 STAC_DELL_BIOS_AMIC,
159 STAC_DELL_BIOS_SPDIF,
160 STAC_927X_DELL_DMIC,
161 STAC_927X_VOLKNOB,
162 STAC_927X_MODELS
163};
164
165enum {
166 STAC_9872_VAIO,
167 STAC_9872_MODELS
168};
169
170struct sigmatel_spec {
171 struct hda_gen_spec gen;
172
173 unsigned int eapd_switch: 1;
174 unsigned int linear_tone_beep:1;
175 unsigned int headset_jack:1; /* 4-pin headset jack (hp + mono mic) */
176 unsigned int volknob_init:1; /* special volume-knob initialization */
177 unsigned int powerdown_adcs:1;
178 unsigned int have_spdif_mux:1;
179
180 /* gpio lines */
181 unsigned int eapd_mask;
182 unsigned int gpio_mask;
183 unsigned int gpio_dir;
184 unsigned int gpio_data;
185 unsigned int gpio_mute;
186 unsigned int gpio_led;
187 unsigned int gpio_led_polarity;
188 unsigned int vref_mute_led_nid; /* pin NID for mute-LED vref control */
189 unsigned int vref_led;
190 int default_polarity;
191
192 unsigned int mic_mute_led_gpio; /* capture mute LED GPIO */
193 unsigned int mic_enabled; /* current mic mute state (bitmask) */
194
195 /* stream */
196 unsigned int stream_delay;
197
198 /* analog loopback */
199 const struct snd_kcontrol_new *aloopback_ctl;
200 unsigned int aloopback;
201 unsigned char aloopback_mask;
202 unsigned char aloopback_shift;
203
204 /* power management */
205 unsigned int power_map_bits;
206 unsigned int num_pwrs;
207 const hda_nid_t *pwr_nids;
208 unsigned int active_adcs;
209
210 /* beep widgets */
211 hda_nid_t anabeep_nid;
212 bool beep_power_on;
213
214 /* SPDIF-out mux */
215 const char * const *spdif_labels;
216 struct hda_input_mux spdif_mux;
217 unsigned int cur_smux[2];
218};
219
220#define AC_VERB_IDT_SET_POWER_MAP 0x7ec
221#define AC_VERB_IDT_GET_POWER_MAP 0xfec
222
223static const hda_nid_t stac92hd73xx_pwr_nids[8] = {
224 0x0a, 0x0b, 0x0c, 0xd, 0x0e,
225 0x0f, 0x10, 0x11
226};
227
228static const hda_nid_t stac92hd83xxx_pwr_nids[7] = {
229 0x0a, 0x0b, 0x0c, 0xd, 0x0e,
230 0x0f, 0x10
231};
232
233static const hda_nid_t stac92hd71bxx_pwr_nids[3] = {
234 0x0a, 0x0d, 0x0f
235};
236
237
238/*
239 * PCM hooks
240 */
241static void stac_playback_pcm_hook(struct hda_pcm_stream *hinfo,
242 struct hda_codec *codec,
243 struct snd_pcm_substream *substream,
244 int action)
245{
246 struct sigmatel_spec *spec = codec->spec;
247 if (action == HDA_GEN_PCM_ACT_OPEN && spec->stream_delay)
248 msleep(spec->stream_delay);
249}
250
251static void stac_capture_pcm_hook(struct hda_pcm_stream *hinfo,
252 struct hda_codec *codec,
253 struct snd_pcm_substream *substream,
254 int action)
255{
256 struct sigmatel_spec *spec = codec->spec;
257 int i, idx = 0;
258
259 if (!spec->powerdown_adcs)
260 return;
261
262 for (i = 0; i < spec->gen.num_all_adcs; i++) {
263 if (spec->gen.all_adcs[i] == hinfo->nid) {
264 idx = i;
265 break;
266 }
267 }
268
269 switch (action) {
270 case HDA_GEN_PCM_ACT_OPEN:
271 msleep(40);
272 snd_hda_codec_write(codec, hinfo->nid, 0,
273 AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
274 spec->active_adcs |= (1 << idx);
275 break;
276 case HDA_GEN_PCM_ACT_CLOSE:
277 snd_hda_codec_write(codec, hinfo->nid, 0,
278 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
279 spec->active_adcs &= ~(1 << idx);
280 break;
281 }
282}
283
284/*
285 * Early 2006 Intel Macintoshes with STAC9220X5 codecs seem to have a
286 * funky external mute control using GPIO pins.
287 */
288
289static void stac_gpio_set(struct hda_codec *codec, unsigned int mask,
290 unsigned int dir_mask, unsigned int data)
291{
292 unsigned int gpiostate, gpiomask, gpiodir;
293 hda_nid_t fg = codec->core.afg;
294
295 codec_dbg(codec, "%s msk %x dir %x gpio %x\n", __func__, mask, dir_mask, data);
296
297 gpiostate = snd_hda_codec_read(codec, fg, 0,
298 AC_VERB_GET_GPIO_DATA, 0);
299 gpiostate = (gpiostate & ~dir_mask) | (data & dir_mask);
300
301 gpiomask = snd_hda_codec_read(codec, fg, 0,
302 AC_VERB_GET_GPIO_MASK, 0);
303 gpiomask |= mask;
304
305 gpiodir = snd_hda_codec_read(codec, fg, 0,
306 AC_VERB_GET_GPIO_DIRECTION, 0);
307 gpiodir |= dir_mask;
308
309 /* Configure GPIOx as CMOS */
310 snd_hda_codec_write(codec, fg, 0, 0x7e7, 0);
311
312 snd_hda_codec_write(codec, fg, 0,
313 AC_VERB_SET_GPIO_MASK, gpiomask);
314 snd_hda_codec_read(codec, fg, 0,
315 AC_VERB_SET_GPIO_DIRECTION, gpiodir); /* sync */
316
317 msleep(1);
318
319 snd_hda_codec_read(codec, fg, 0,
320 AC_VERB_SET_GPIO_DATA, gpiostate); /* sync */
321}
322
323/* hook for controlling mic-mute LED GPIO */
324static int stac_capture_led_update(struct led_classdev *led_cdev,
325 enum led_brightness brightness)
326{
327 struct hda_codec *codec = dev_to_hda_codec(led_cdev->dev->parent);
328 struct sigmatel_spec *spec = codec->spec;
329
330 if (brightness)
331 spec->gpio_data |= spec->mic_mute_led_gpio;
332 else
333 spec->gpio_data &= ~spec->mic_mute_led_gpio;
334 stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, spec->gpio_data);
335 return 0;
336}
337
338static int stac_vrefout_set(struct hda_codec *codec,
339 hda_nid_t nid, unsigned int new_vref)
340{
341 int error, pinctl;
342
343 codec_dbg(codec, "%s, nid %x ctl %x\n", __func__, nid, new_vref);
344 pinctl = snd_hda_codec_read(codec, nid, 0,
345 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
346
347 if (pinctl < 0)
348 return pinctl;
349
350 pinctl &= 0xff;
351 pinctl &= ~AC_PINCTL_VREFEN;
352 pinctl |= (new_vref & AC_PINCTL_VREFEN);
353
354 error = snd_hda_set_pin_ctl_cache(codec, nid, pinctl);
355 if (error < 0)
356 return error;
357
358 return 1;
359}
360
361/* prevent codec AFG to D3 state when vref-out pin is used for mute LED */
362/* this hook is set in stac_setup_gpio() */
363static unsigned int stac_vref_led_power_filter(struct hda_codec *codec,
364 hda_nid_t nid,
365 unsigned int power_state)
366{
367 if (nid == codec->core.afg && power_state == AC_PWRST_D3)
368 return AC_PWRST_D1;
369 return snd_hda_gen_path_power_filter(codec, nid, power_state);
370}
371
372/* update mute-LED accoring to the master switch */
373static void stac_update_led_status(struct hda_codec *codec, bool muted)
374{
375 struct sigmatel_spec *spec = codec->spec;
376
377 if (!spec->gpio_led)
378 return;
379
380 /* LED state is inverted on these systems */
381 if (spec->gpio_led_polarity)
382 muted = !muted;
383
384 if (!spec->vref_mute_led_nid) {
385 if (muted)
386 spec->gpio_data |= spec->gpio_led;
387 else
388 spec->gpio_data &= ~spec->gpio_led;
389 stac_gpio_set(codec, spec->gpio_mask,
390 spec->gpio_dir, spec->gpio_data);
391 } else {
392 spec->vref_led = muted ? AC_PINCTL_VREF_50 : AC_PINCTL_VREF_GRD;
393 stac_vrefout_set(codec, spec->vref_mute_led_nid,
394 spec->vref_led);
395 }
396}
397
398/* vmaster hook to update mute LED */
399static int stac_vmaster_hook(struct led_classdev *led_cdev,
400 enum led_brightness brightness)
401{
402 struct hda_codec *codec = dev_to_hda_codec(led_cdev->dev->parent);
403
404 stac_update_led_status(codec, brightness);
405 return 0;
406}
407
408/* automute hook to handle GPIO mute and EAPD updates */
409static void stac_update_outputs(struct hda_codec *codec)
410{
411 struct sigmatel_spec *spec = codec->spec;
412
413 if (spec->gpio_mute)
414 spec->gen.master_mute =
415 !(snd_hda_codec_read(codec, codec->core.afg, 0,
416 AC_VERB_GET_GPIO_DATA, 0) & spec->gpio_mute);
417
418 snd_hda_gen_update_outputs(codec);
419
420 if (spec->eapd_mask && spec->eapd_switch) {
421 unsigned int val = spec->gpio_data;
422 if (spec->gen.speaker_muted)
423 val &= ~spec->eapd_mask;
424 else
425 val |= spec->eapd_mask;
426 if (spec->gpio_data != val) {
427 spec->gpio_data = val;
428 stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir,
429 val);
430 }
431 }
432}
433
434static void stac_toggle_power_map(struct hda_codec *codec, hda_nid_t nid,
435 bool enable, bool do_write)
436{
437 struct sigmatel_spec *spec = codec->spec;
438 unsigned int idx, val;
439
440 for (idx = 0; idx < spec->num_pwrs; idx++) {
441 if (spec->pwr_nids[idx] == nid)
442 break;
443 }
444 if (idx >= spec->num_pwrs)
445 return;
446
447 idx = 1 << idx;
448
449 val = spec->power_map_bits;
450 if (enable)
451 val &= ~idx;
452 else
453 val |= idx;
454
455 /* power down unused output ports */
456 if (val != spec->power_map_bits) {
457 spec->power_map_bits = val;
458 if (do_write)
459 snd_hda_codec_write(codec, codec->core.afg, 0,
460 AC_VERB_IDT_SET_POWER_MAP, val);
461 }
462}
463
464/* update power bit per jack plug/unplug */
465static void jack_update_power(struct hda_codec *codec,
466 struct hda_jack_callback *jack)
467{
468 struct sigmatel_spec *spec = codec->spec;
469 int i;
470
471 if (!spec->num_pwrs)
472 return;
473
474 if (jack && jack->nid) {
475 stac_toggle_power_map(codec, jack->nid,
476 snd_hda_jack_detect(codec, jack->nid),
477 true);
478 return;
479 }
480
481 /* update all jacks */
482 for (i = 0; i < spec->num_pwrs; i++) {
483 hda_nid_t nid = spec->pwr_nids[i];
484 if (!snd_hda_jack_tbl_get(codec, nid))
485 continue;
486 stac_toggle_power_map(codec, nid,
487 snd_hda_jack_detect(codec, nid),
488 false);
489 }
490
491 snd_hda_codec_write(codec, codec->core.afg, 0,
492 AC_VERB_IDT_SET_POWER_MAP,
493 spec->power_map_bits);
494}
495
496static void stac_vref_event(struct hda_codec *codec,
497 struct hda_jack_callback *event)
498{
499 unsigned int data;
500
501 data = snd_hda_codec_read(codec, codec->core.afg, 0,
502 AC_VERB_GET_GPIO_DATA, 0);
503 /* toggle VREF state based on GPIOx status */
504 snd_hda_codec_write(codec, codec->core.afg, 0, 0x7e0,
505 !!(data & (1 << event->private_data)));
506}
507
508/* initialize the power map and enable the power event to jacks that
509 * haven't been assigned to automute
510 */
511static void stac_init_power_map(struct hda_codec *codec)
512{
513 struct sigmatel_spec *spec = codec->spec;
514 int i;
515
516 for (i = 0; i < spec->num_pwrs; i++) {
517 hda_nid_t nid = spec->pwr_nids[i];
518 unsigned int def_conf = snd_hda_codec_get_pincfg(codec, nid);
519 def_conf = get_defcfg_connect(def_conf);
520 if (def_conf == AC_JACK_PORT_COMPLEX &&
521 spec->vref_mute_led_nid != nid &&
522 is_jack_detectable(codec, nid)) {
523 snd_hda_jack_detect_enable_callback(codec, nid,
524 jack_update_power);
525 } else {
526 if (def_conf == AC_JACK_PORT_NONE)
527 stac_toggle_power_map(codec, nid, false, false);
528 else
529 stac_toggle_power_map(codec, nid, true, false);
530 }
531 }
532}
533
534/*
535 */
536
537static inline bool get_int_hint(struct hda_codec *codec, const char *key,
538 int *valp)
539{
540 return !snd_hda_get_int_hint(codec, key, valp);
541}
542
543/* override some hints from the hwdep entry */
544static void stac_store_hints(struct hda_codec *codec)
545{
546 struct sigmatel_spec *spec = codec->spec;
547 int val;
548
549 if (get_int_hint(codec, "gpio_mask", &spec->gpio_mask)) {
550 spec->eapd_mask = spec->gpio_dir = spec->gpio_data =
551 spec->gpio_mask;
552 }
553 if (get_int_hint(codec, "gpio_dir", &spec->gpio_dir))
554 spec->gpio_dir &= spec->gpio_mask;
555 if (get_int_hint(codec, "gpio_data", &spec->gpio_data))
556 spec->gpio_data &= spec->gpio_mask;
557 if (get_int_hint(codec, "eapd_mask", &spec->eapd_mask))
558 spec->eapd_mask &= spec->gpio_mask;
559 if (get_int_hint(codec, "gpio_mute", &spec->gpio_mute))
560 spec->gpio_mute &= spec->gpio_mask;
561 val = snd_hda_get_bool_hint(codec, "eapd_switch");
562 if (val >= 0)
563 spec->eapd_switch = val;
564}
565
566/*
567 * loopback controls
568 */
569
570#define stac_aloopback_info snd_ctl_boolean_mono_info
571
572static int stac_aloopback_get(struct snd_kcontrol *kcontrol,
573 struct snd_ctl_elem_value *ucontrol)
574{
575 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
576 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
577 struct sigmatel_spec *spec = codec->spec;
578
579 ucontrol->value.integer.value[0] = !!(spec->aloopback &
580 (spec->aloopback_mask << idx));
581 return 0;
582}
583
584static int stac_aloopback_put(struct snd_kcontrol *kcontrol,
585 struct snd_ctl_elem_value *ucontrol)
586{
587 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
588 struct sigmatel_spec *spec = codec->spec;
589 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
590 unsigned int dac_mode;
591 unsigned int val, idx_val;
592
593 idx_val = spec->aloopback_mask << idx;
594 if (ucontrol->value.integer.value[0])
595 val = spec->aloopback | idx_val;
596 else
597 val = spec->aloopback & ~idx_val;
598 if (spec->aloopback == val)
599 return 0;
600
601 spec->aloopback = val;
602
603 /* Only return the bits defined by the shift value of the
604 * first two bytes of the mask
605 */
606 dac_mode = snd_hda_codec_read(codec, codec->core.afg, 0,
607 kcontrol->private_value & 0xFFFF, 0x0);
608 dac_mode >>= spec->aloopback_shift;
609
610 if (spec->aloopback & idx_val) {
611 snd_hda_power_up(codec);
612 dac_mode |= idx_val;
613 } else {
614 snd_hda_power_down(codec);
615 dac_mode &= ~idx_val;
616 }
617
618 snd_hda_codec_write_cache(codec, codec->core.afg, 0,
619 kcontrol->private_value >> 16, dac_mode);
620
621 return 1;
622}
623
624#define STAC_ANALOG_LOOPBACK(verb_read, verb_write, cnt) \
625 { \
626 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
627 .name = "Analog Loopback", \
628 .count = cnt, \
629 .info = stac_aloopback_info, \
630 .get = stac_aloopback_get, \
631 .put = stac_aloopback_put, \
632 .private_value = verb_read | (verb_write << 16), \
633 }
634
635/*
636 * Mute LED handling on HP laptops
637 */
638
639/* check whether it's a HP laptop with a docking port */
640static bool hp_bnb2011_with_dock(struct hda_codec *codec)
641{
642 if (codec->core.vendor_id != 0x111d7605 &&
643 codec->core.vendor_id != 0x111d76d1)
644 return false;
645
646 switch (codec->core.subsystem_id) {
647 case 0x103c1618:
648 case 0x103c1619:
649 case 0x103c161a:
650 case 0x103c161b:
651 case 0x103c161c:
652 case 0x103c161d:
653 case 0x103c161e:
654 case 0x103c161f:
655
656 case 0x103c162a:
657 case 0x103c162b:
658
659 case 0x103c1630:
660 case 0x103c1631:
661
662 case 0x103c1633:
663 case 0x103c1634:
664 case 0x103c1635:
665
666 case 0x103c3587:
667 case 0x103c3588:
668 case 0x103c3589:
669 case 0x103c358a:
670
671 case 0x103c3667:
672 case 0x103c3668:
673 case 0x103c3669:
674
675 return true;
676 }
677 return false;
678}
679
680static bool hp_blike_system(u32 subsystem_id)
681{
682 switch (subsystem_id) {
683 case 0x103c1473: /* HP ProBook 6550b */
684 case 0x103c1520:
685 case 0x103c1521:
686 case 0x103c1523:
687 case 0x103c1524:
688 case 0x103c1525:
689 case 0x103c1722:
690 case 0x103c1723:
691 case 0x103c1724:
692 case 0x103c1725:
693 case 0x103c1726:
694 case 0x103c1727:
695 case 0x103c1728:
696 case 0x103c1729:
697 case 0x103c172a:
698 case 0x103c172b:
699 case 0x103c307e:
700 case 0x103c307f:
701 case 0x103c3080:
702 case 0x103c3081:
703 case 0x103c7007:
704 case 0x103c7008:
705 return true;
706 }
707 return false;
708}
709
710static void set_hp_led_gpio(struct hda_codec *codec)
711{
712 struct sigmatel_spec *spec = codec->spec;
713 unsigned int gpio;
714
715 if (spec->gpio_led)
716 return;
717
718 gpio = snd_hda_param_read(codec, codec->core.afg, AC_PAR_GPIO_CAP);
719 gpio &= AC_GPIO_IO_COUNT;
720 if (gpio > 3)
721 spec->gpio_led = 0x08; /* GPIO 3 */
722 else
723 spec->gpio_led = 0x01; /* GPIO 0 */
724}
725
726/*
727 * This method searches for the mute LED GPIO configuration
728 * provided as OEM string in SMBIOS. The format of that string
729 * is HP_Mute_LED_P_G or HP_Mute_LED_P
730 * where P can be 0 or 1 and defines mute LED GPIO control state (low/high)
731 * that corresponds to the NOT muted state of the master volume
732 * and G is the index of the GPIO to use as the mute LED control (0..9)
733 * If _G portion is missing it is assigned based on the codec ID
734 *
735 * So, HP B-series like systems may have HP_Mute_LED_0 (current models)
736 * or HP_Mute_LED_0_3 (future models) OEM SMBIOS strings
737 *
738 *
739 * The dv-series laptops don't seem to have the HP_Mute_LED* strings in
740 * SMBIOS - at least the ones I have seen do not have them - which include
741 * my own system (HP Pavilion dv6-1110ax) and my cousin's
742 * HP Pavilion dv9500t CTO.
743 * Need more information on whether it is true across the entire series.
744 * -- kunal
745 */
746static int find_mute_led_cfg(struct hda_codec *codec, int default_polarity)
747{
748 struct sigmatel_spec *spec = codec->spec;
749 const struct dmi_device *dev = NULL;
750
751 if (get_int_hint(codec, "gpio_led", &spec->gpio_led)) {
752 get_int_hint(codec, "gpio_led_polarity",
753 &spec->gpio_led_polarity);
754 return 1;
755 }
756
757 while ((dev = dmi_find_device(DMI_DEV_TYPE_OEM_STRING, NULL, dev))) {
758 if (sscanf(dev->name, "HP_Mute_LED_%u_%x",
759 &spec->gpio_led_polarity,
760 &spec->gpio_led) == 2) {
761 unsigned int max_gpio;
762 max_gpio = snd_hda_param_read(codec, codec->core.afg,
763 AC_PAR_GPIO_CAP);
764 max_gpio &= AC_GPIO_IO_COUNT;
765 if (spec->gpio_led < max_gpio)
766 spec->gpio_led = 1 << spec->gpio_led;
767 else
768 spec->vref_mute_led_nid = spec->gpio_led;
769 return 1;
770 }
771 if (sscanf(dev->name, "HP_Mute_LED_%u",
772 &spec->gpio_led_polarity) == 1) {
773 set_hp_led_gpio(codec);
774 return 1;
775 }
776 /* BIOS bug: unfilled OEM string */
777 if (strstr(dev->name, "HP_Mute_LED_P_G")) {
778 set_hp_led_gpio(codec);
779 if (default_polarity >= 0)
780 spec->gpio_led_polarity = default_polarity;
781 else
782 spec->gpio_led_polarity = 1;
783 return 1;
784 }
785 }
786
787 /*
788 * Fallback case - if we don't find the DMI strings,
789 * we statically set the GPIO - if not a B-series system
790 * and default polarity is provided
791 */
792 if (!hp_blike_system(codec->core.subsystem_id) &&
793 (default_polarity == 0 || default_polarity == 1)) {
794 set_hp_led_gpio(codec);
795 spec->gpio_led_polarity = default_polarity;
796 return 1;
797 }
798 return 0;
799}
800
801/* check whether a built-in speaker is included in parsed pins */
802static bool has_builtin_speaker(struct hda_codec *codec)
803{
804 struct sigmatel_spec *spec = codec->spec;
805 const hda_nid_t *nid_pin;
806 int nids, i;
807
808 if (spec->gen.autocfg.line_out_type == AUTO_PIN_SPEAKER_OUT) {
809 nid_pin = spec->gen.autocfg.line_out_pins;
810 nids = spec->gen.autocfg.line_outs;
811 } else {
812 nid_pin = spec->gen.autocfg.speaker_pins;
813 nids = spec->gen.autocfg.speaker_outs;
814 }
815
816 for (i = 0; i < nids; i++) {
817 unsigned int def_conf = snd_hda_codec_get_pincfg(codec, nid_pin[i]);
818 if (snd_hda_get_input_pin_attr(def_conf) == INPUT_PIN_ATTR_INT)
819 return true;
820 }
821 return false;
822}
823
824/*
825 * PC beep controls
826 */
827
828/* create PC beep volume controls */
829static int stac_auto_create_beep_ctls(struct hda_codec *codec,
830 hda_nid_t nid)
831{
832 struct sigmatel_spec *spec = codec->spec;
833 u32 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
834 struct snd_kcontrol_new *knew;
835 static const struct snd_kcontrol_new abeep_mute_ctl =
836 HDA_CODEC_MUTE(NULL, 0, 0, 0);
837 static const struct snd_kcontrol_new dbeep_mute_ctl =
838 HDA_CODEC_MUTE_BEEP(NULL, 0, 0, 0);
839 static const struct snd_kcontrol_new beep_vol_ctl =
840 HDA_CODEC_VOLUME(NULL, 0, 0, 0);
841
842 /* check for mute support for the amp */
843 if ((caps & AC_AMPCAP_MUTE) >> AC_AMPCAP_MUTE_SHIFT) {
844 const struct snd_kcontrol_new *temp;
845 if (spec->anabeep_nid == nid)
846 temp = &abeep_mute_ctl;
847 else
848 temp = &dbeep_mute_ctl;
849 knew = snd_hda_gen_add_kctl(&spec->gen,
850 "Beep Playback Switch", temp);
851 if (!knew)
852 return -ENOMEM;
853 knew->private_value =
854 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT);
855 }
856
857 /* check to see if there is volume support for the amp */
858 if ((caps & AC_AMPCAP_NUM_STEPS) >> AC_AMPCAP_NUM_STEPS_SHIFT) {
859 knew = snd_hda_gen_add_kctl(&spec->gen,
860 "Beep Playback Volume",
861 &beep_vol_ctl);
862 if (!knew)
863 return -ENOMEM;
864 knew->private_value =
865 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT);
866 }
867 return 0;
868}
869
870#ifdef CONFIG_SND_HDA_INPUT_BEEP
871#define stac_dig_beep_switch_info snd_ctl_boolean_mono_info
872
873static int stac_dig_beep_switch_get(struct snd_kcontrol *kcontrol,
874 struct snd_ctl_elem_value *ucontrol)
875{
876 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
877 ucontrol->value.integer.value[0] = codec->beep->enabled;
878 return 0;
879}
880
881static int stac_dig_beep_switch_put(struct snd_kcontrol *kcontrol,
882 struct snd_ctl_elem_value *ucontrol)
883{
884 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
885 return snd_hda_enable_beep_device(codec, ucontrol->value.integer.value[0]);
886}
887
888static const struct snd_kcontrol_new stac_dig_beep_ctrl = {
889 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
890 .name = "Beep Playback Switch",
891 .info = stac_dig_beep_switch_info,
892 .get = stac_dig_beep_switch_get,
893 .put = stac_dig_beep_switch_put,
894};
895
896static int stac_beep_switch_ctl(struct hda_codec *codec)
897{
898 struct sigmatel_spec *spec = codec->spec;
899
900 if (!snd_hda_gen_add_kctl(&spec->gen, NULL, &stac_dig_beep_ctrl))
901 return -ENOMEM;
902 return 0;
903}
904#endif
905
906/*
907 * SPDIF-out mux controls
908 */
909
910static int stac_smux_enum_info(struct snd_kcontrol *kcontrol,
911 struct snd_ctl_elem_info *uinfo)
912{
913 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
914 struct sigmatel_spec *spec = codec->spec;
915 return snd_hda_input_mux_info(&spec->spdif_mux, uinfo);
916}
917
918static int stac_smux_enum_get(struct snd_kcontrol *kcontrol,
919 struct snd_ctl_elem_value *ucontrol)
920{
921 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
922 struct sigmatel_spec *spec = codec->spec;
923 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
924
925 ucontrol->value.enumerated.item[0] = spec->cur_smux[smux_idx];
926 return 0;
927}
928
929static int stac_smux_enum_put(struct snd_kcontrol *kcontrol,
930 struct snd_ctl_elem_value *ucontrol)
931{
932 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
933 struct sigmatel_spec *spec = codec->spec;
934 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
935
936 return snd_hda_input_mux_put(codec, &spec->spdif_mux, ucontrol,
937 spec->gen.autocfg.dig_out_pins[smux_idx],
938 &spec->cur_smux[smux_idx]);
939}
940
941static const struct snd_kcontrol_new stac_smux_mixer = {
942 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
943 .name = "IEC958 Playback Source",
944 /* count set later */
945 .info = stac_smux_enum_info,
946 .get = stac_smux_enum_get,
947 .put = stac_smux_enum_put,
948};
949
950static const char * const stac_spdif_labels[] = {
951 "Digital Playback", "Analog Mux 1", "Analog Mux 2", NULL
952};
953
954static int stac_create_spdif_mux_ctls(struct hda_codec *codec)
955{
956 struct sigmatel_spec *spec = codec->spec;
957 struct auto_pin_cfg *cfg = &spec->gen.autocfg;
958 const char * const *labels = spec->spdif_labels;
959 struct snd_kcontrol_new *kctl;
960 int i, num_cons;
961
962 if (cfg->dig_outs < 1)
963 return 0;
964
965 num_cons = snd_hda_get_num_conns(codec, cfg->dig_out_pins[0]);
966 if (num_cons <= 1)
967 return 0;
968
969 if (!labels)
970 labels = stac_spdif_labels;
971 for (i = 0; i < num_cons; i++) {
972 if (snd_BUG_ON(!labels[i]))
973 return -EINVAL;
974 snd_hda_add_imux_item(codec, &spec->spdif_mux, labels[i], i, NULL);
975 }
976
977 kctl = snd_hda_gen_add_kctl(&spec->gen, NULL, &stac_smux_mixer);
978 if (!kctl)
979 return -ENOMEM;
980 kctl->count = cfg->dig_outs;
981
982 return 0;
983}
984
985static const struct hda_verb stac9200_eapd_init[] = {
986 /* set dac0mux for dac converter */
987 {0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
988 {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02},
989 {}
990};
991
992static const struct hda_verb dell_eq_core_init[] = {
993 /* set master volume to max value without distortion
994 * and direct control */
995 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xec},
996 {}
997};
998
999static const struct hda_verb stac92hd73xx_core_init[] = {
1000 /* set master volume and direct control */
1001 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
1002 {}
1003};
1004
1005static const struct hda_verb stac92hd83xxx_core_init[] = {
1006 /* power state controls amps */
1007 { 0x01, AC_VERB_SET_EAPD, 1 << 2},
1008 {}
1009};
1010
1011static const struct hda_verb stac92hd83xxx_hp_zephyr_init[] = {
1012 { 0x22, 0x785, 0x43 },
1013 { 0x22, 0x782, 0xe0 },
1014 { 0x22, 0x795, 0x00 },
1015 {}
1016};
1017
1018static const struct hda_verb stac92hd71bxx_core_init[] = {
1019 /* set master volume and direct control */
1020 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
1021 {}
1022};
1023
1024static const hda_nid_t stac92hd71bxx_unmute_nids[] = {
1025 /* unmute right and left channels for nodes 0x0f, 0xa, 0x0d */
1026 0x0f, 0x0a, 0x0d, 0
1027};
1028
1029static const struct hda_verb stac925x_core_init[] = {
1030 /* set dac0mux for dac converter */
1031 { 0x06, AC_VERB_SET_CONNECT_SEL, 0x00},
1032 /* mute the master volume */
1033 { 0x0e, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE },
1034 {}
1035};
1036
1037static const struct hda_verb stac922x_core_init[] = {
1038 /* set master volume and direct control */
1039 { 0x16, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
1040 {}
1041};
1042
1043static const struct hda_verb d965_core_init[] = {
1044 /* unmute node 0x1b */
1045 { 0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
1046 /* select node 0x03 as DAC */
1047 { 0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
1048 {}
1049};
1050
1051static const struct hda_verb dell_3st_core_init[] = {
1052 /* don't set delta bit */
1053 {0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0x7f},
1054 /* unmute node 0x1b */
1055 {0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
1056 /* select node 0x03 as DAC */
1057 {0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
1058 {}
1059};
1060
1061static const struct hda_verb stac927x_core_init[] = {
1062 /* set master volume and direct control */
1063 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
1064 /* enable analog pc beep path */
1065 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
1066 {}
1067};
1068
1069static const struct hda_verb stac927x_volknob_core_init[] = {
1070 /* don't set delta bit */
1071 {0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0x7f},
1072 /* enable analog pc beep path */
1073 {0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
1074 {}
1075};
1076
1077static const struct hda_verb stac9205_core_init[] = {
1078 /* set master volume and direct control */
1079 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
1080 /* enable analog pc beep path */
1081 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
1082 {}
1083};
1084
1085static const struct snd_kcontrol_new stac92hd73xx_6ch_loopback =
1086 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 3);
1087
1088static const struct snd_kcontrol_new stac92hd73xx_8ch_loopback =
1089 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 4);
1090
1091static const struct snd_kcontrol_new stac92hd73xx_10ch_loopback =
1092 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 5);
1093
1094static const struct snd_kcontrol_new stac92hd71bxx_loopback =
1095 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2);
1096
1097static const struct snd_kcontrol_new stac9205_loopback =
1098 STAC_ANALOG_LOOPBACK(0xFE0, 0x7E0, 1);
1099
1100static const struct snd_kcontrol_new stac927x_loopback =
1101 STAC_ANALOG_LOOPBACK(0xFEB, 0x7EB, 1);
1102
1103static const struct hda_pintbl ref9200_pin_configs[] = {
1104 { 0x08, 0x01c47010 },
1105 { 0x09, 0x01447010 },
1106 { 0x0d, 0x0221401f },
1107 { 0x0e, 0x01114010 },
1108 { 0x0f, 0x02a19020 },
1109 { 0x10, 0x01a19021 },
1110 { 0x11, 0x90100140 },
1111 { 0x12, 0x01813122 },
1112 {}
1113};
1114
1115static const struct hda_pintbl gateway9200_m4_pin_configs[] = {
1116 { 0x08, 0x400000fe },
1117 { 0x09, 0x404500f4 },
1118 { 0x0d, 0x400100f0 },
1119 { 0x0e, 0x90110010 },
1120 { 0x0f, 0x400100f1 },
1121 { 0x10, 0x02a1902e },
1122 { 0x11, 0x500000f2 },
1123 { 0x12, 0x500000f3 },
1124 {}
1125};
1126
1127static const struct hda_pintbl gateway9200_m4_2_pin_configs[] = {
1128 { 0x08, 0x400000fe },
1129 { 0x09, 0x404500f4 },
1130 { 0x0d, 0x400100f0 },
1131 { 0x0e, 0x90110010 },
1132 { 0x0f, 0x400100f1 },
1133 { 0x10, 0x02a1902e },
1134 { 0x11, 0x500000f2 },
1135 { 0x12, 0x500000f3 },
1136 {}
1137};
1138
1139/*
1140 STAC 9200 pin configs for
1141 102801A8
1142 102801DE
1143 102801E8
1144*/
1145static const struct hda_pintbl dell9200_d21_pin_configs[] = {
1146 { 0x08, 0x400001f0 },
1147 { 0x09, 0x400001f1 },
1148 { 0x0d, 0x02214030 },
1149 { 0x0e, 0x01014010 },
1150 { 0x0f, 0x02a19020 },
1151 { 0x10, 0x01a19021 },
1152 { 0x11, 0x90100140 },
1153 { 0x12, 0x01813122 },
1154 {}
1155};
1156
1157/*
1158 STAC 9200 pin configs for
1159 102801C0
1160 102801C1
1161*/
1162static const struct hda_pintbl dell9200_d22_pin_configs[] = {
1163 { 0x08, 0x400001f0 },
1164 { 0x09, 0x400001f1 },
1165 { 0x0d, 0x0221401f },
1166 { 0x0e, 0x01014010 },
1167 { 0x0f, 0x01813020 },
1168 { 0x10, 0x02a19021 },
1169 { 0x11, 0x90100140 },
1170 { 0x12, 0x400001f2 },
1171 {}
1172};
1173
1174/*
1175 STAC 9200 pin configs for
1176 102801C4 (Dell Dimension E310)
1177 102801C5
1178 102801C7
1179 102801D9
1180 102801DA
1181 102801E3
1182*/
1183static const struct hda_pintbl dell9200_d23_pin_configs[] = {
1184 { 0x08, 0x400001f0 },
1185 { 0x09, 0x400001f1 },
1186 { 0x0d, 0x0221401f },
1187 { 0x0e, 0x01014010 },
1188 { 0x0f, 0x01813020 },
1189 { 0x10, 0x01a19021 },
1190 { 0x11, 0x90100140 },
1191 { 0x12, 0x400001f2 },
1192 {}
1193};
1194
1195
1196/*
1197 STAC 9200-32 pin configs for
1198 102801B5 (Dell Inspiron 630m)
1199 102801D8 (Dell Inspiron 640m)
1200*/
1201static const struct hda_pintbl dell9200_m21_pin_configs[] = {
1202 { 0x08, 0x40c003fa },
1203 { 0x09, 0x03441340 },
1204 { 0x0d, 0x0321121f },
1205 { 0x0e, 0x90170310 },
1206 { 0x0f, 0x408003fb },
1207 { 0x10, 0x03a11020 },
1208 { 0x11, 0x401003fc },
1209 { 0x12, 0x403003fd },
1210 {}
1211};
1212
1213/*
1214 STAC 9200-32 pin configs for
1215 102801C2 (Dell Latitude D620)
1216 102801C8
1217 102801CC (Dell Latitude D820)
1218 102801D4
1219 102801D6
1220*/
1221static const struct hda_pintbl dell9200_m22_pin_configs[] = {
1222 { 0x08, 0x40c003fa },
1223 { 0x09, 0x0144131f },
1224 { 0x0d, 0x0321121f },
1225 { 0x0e, 0x90170310 },
1226 { 0x0f, 0x90a70321 },
1227 { 0x10, 0x03a11020 },
1228 { 0x11, 0x401003fb },
1229 { 0x12, 0x40f000fc },
1230 {}
1231};
1232
1233/*
1234 STAC 9200-32 pin configs for
1235 102801CE (Dell XPS M1710)
1236 102801CF (Dell Precision M90)
1237*/
1238static const struct hda_pintbl dell9200_m23_pin_configs[] = {
1239 { 0x08, 0x40c003fa },
1240 { 0x09, 0x01441340 },
1241 { 0x0d, 0x0421421f },
1242 { 0x0e, 0x90170310 },
1243 { 0x0f, 0x408003fb },
1244 { 0x10, 0x04a1102e },
1245 { 0x11, 0x90170311 },
1246 { 0x12, 0x403003fc },
1247 {}
1248};
1249
1250/*
1251 STAC 9200-32 pin configs for
1252 102801C9
1253 102801CA
1254 102801CB (Dell Latitude 120L)
1255 102801D3
1256*/
1257static const struct hda_pintbl dell9200_m24_pin_configs[] = {
1258 { 0x08, 0x40c003fa },
1259 { 0x09, 0x404003fb },
1260 { 0x0d, 0x0321121f },
1261 { 0x0e, 0x90170310 },
1262 { 0x0f, 0x408003fc },
1263 { 0x10, 0x03a11020 },
1264 { 0x11, 0x401003fd },
1265 { 0x12, 0x403003fe },
1266 {}
1267};
1268
1269/*
1270 STAC 9200-32 pin configs for
1271 102801BD (Dell Inspiron E1505n)
1272 102801EE
1273 102801EF
1274*/
1275static const struct hda_pintbl dell9200_m25_pin_configs[] = {
1276 { 0x08, 0x40c003fa },
1277 { 0x09, 0x01441340 },
1278 { 0x0d, 0x0421121f },
1279 { 0x0e, 0x90170310 },
1280 { 0x0f, 0x408003fb },
1281 { 0x10, 0x04a11020 },
1282 { 0x11, 0x401003fc },
1283 { 0x12, 0x403003fd },
1284 {}
1285};
1286
1287/*
1288 STAC 9200-32 pin configs for
1289 102801F5 (Dell Inspiron 1501)
1290 102801F6
1291*/
1292static const struct hda_pintbl dell9200_m26_pin_configs[] = {
1293 { 0x08, 0x40c003fa },
1294 { 0x09, 0x404003fb },
1295 { 0x0d, 0x0421121f },
1296 { 0x0e, 0x90170310 },
1297 { 0x0f, 0x408003fc },
1298 { 0x10, 0x04a11020 },
1299 { 0x11, 0x401003fd },
1300 { 0x12, 0x403003fe },
1301 {}
1302};
1303
1304/*
1305 STAC 9200-32
1306 102801CD (Dell Inspiron E1705/9400)
1307*/
1308static const struct hda_pintbl dell9200_m27_pin_configs[] = {
1309 { 0x08, 0x40c003fa },
1310 { 0x09, 0x01441340 },
1311 { 0x0d, 0x0421121f },
1312 { 0x0e, 0x90170310 },
1313 { 0x0f, 0x90170310 },
1314 { 0x10, 0x04a11020 },
1315 { 0x11, 0x90170310 },
1316 { 0x12, 0x40f003fc },
1317 {}
1318};
1319
1320static const struct hda_pintbl oqo9200_pin_configs[] = {
1321 { 0x08, 0x40c000f0 },
1322 { 0x09, 0x404000f1 },
1323 { 0x0d, 0x0221121f },
1324 { 0x0e, 0x02211210 },
1325 { 0x0f, 0x90170111 },
1326 { 0x10, 0x90a70120 },
1327 { 0x11, 0x400000f2 },
1328 { 0x12, 0x400000f3 },
1329 {}
1330};
1331
1332/*
1333 * STAC 92HD700
1334 * 18881000 Amigaone X1000
1335 */
1336static const struct hda_pintbl nemo_pin_configs[] = {
1337 { 0x0a, 0x02214020 }, /* Front panel HP socket */
1338 { 0x0b, 0x02a19080 }, /* Front Mic */
1339 { 0x0c, 0x0181304e }, /* Line in */
1340 { 0x0d, 0x01014010 }, /* Line out */
1341 { 0x0e, 0x01a19040 }, /* Rear Mic */
1342 { 0x0f, 0x01011012 }, /* Rear speakers */
1343 { 0x10, 0x01016011 }, /* Center speaker */
1344 { 0x11, 0x01012014 }, /* Side speakers (7.1) */
1345 { 0x12, 0x103301f0 }, /* Motherboard CD line in connector */
1346 { 0x13, 0x411111f0 }, /* Unused */
1347 { 0x14, 0x411111f0 }, /* Unused */
1348 { 0x21, 0x01442170 }, /* S/PDIF line out */
1349 { 0x22, 0x411111f0 }, /* Unused */
1350 { 0x23, 0x411111f0 }, /* Unused */
1351 {}
1352};
1353
1354static void stac9200_fixup_panasonic(struct hda_codec *codec,
1355 const struct hda_fixup *fix, int action)
1356{
1357 struct sigmatel_spec *spec = codec->spec;
1358
1359 if (action == HDA_FIXUP_ACT_PRE_PROBE) {
1360 spec->gpio_mask = spec->gpio_dir = 0x09;
1361 spec->gpio_data = 0x00;
1362 /* CF-74 has no headphone detection, and the driver should *NOT*
1363 * do detection and HP/speaker toggle because the hardware does it.
1364 */
1365 spec->gen.suppress_auto_mute = 1;
1366 }
1367}
1368
1369
1370static const struct hda_fixup stac9200_fixups[] = {
1371 [STAC_REF] = {
1372 .type = HDA_FIXUP_PINS,
1373 .v.pins = ref9200_pin_configs,
1374 },
1375 [STAC_9200_OQO] = {
1376 .type = HDA_FIXUP_PINS,
1377 .v.pins = oqo9200_pin_configs,
1378 .chained = true,
1379 .chain_id = STAC_9200_EAPD_INIT,
1380 },
1381 [STAC_9200_DELL_D21] = {
1382 .type = HDA_FIXUP_PINS,
1383 .v.pins = dell9200_d21_pin_configs,
1384 },
1385 [STAC_9200_DELL_D22] = {
1386 .type = HDA_FIXUP_PINS,
1387 .v.pins = dell9200_d22_pin_configs,
1388 },
1389 [STAC_9200_DELL_D23] = {
1390 .type = HDA_FIXUP_PINS,
1391 .v.pins = dell9200_d23_pin_configs,
1392 },
1393 [STAC_9200_DELL_M21] = {
1394 .type = HDA_FIXUP_PINS,
1395 .v.pins = dell9200_m21_pin_configs,
1396 },
1397 [STAC_9200_DELL_M22] = {
1398 .type = HDA_FIXUP_PINS,
1399 .v.pins = dell9200_m22_pin_configs,
1400 },
1401 [STAC_9200_DELL_M23] = {
1402 .type = HDA_FIXUP_PINS,
1403 .v.pins = dell9200_m23_pin_configs,
1404 },
1405 [STAC_9200_DELL_M24] = {
1406 .type = HDA_FIXUP_PINS,
1407 .v.pins = dell9200_m24_pin_configs,
1408 },
1409 [STAC_9200_DELL_M25] = {
1410 .type = HDA_FIXUP_PINS,
1411 .v.pins = dell9200_m25_pin_configs,
1412 },
1413 [STAC_9200_DELL_M26] = {
1414 .type = HDA_FIXUP_PINS,
1415 .v.pins = dell9200_m26_pin_configs,
1416 },
1417 [STAC_9200_DELL_M27] = {
1418 .type = HDA_FIXUP_PINS,
1419 .v.pins = dell9200_m27_pin_configs,
1420 },
1421 [STAC_9200_M4] = {
1422 .type = HDA_FIXUP_PINS,
1423 .v.pins = gateway9200_m4_pin_configs,
1424 .chained = true,
1425 .chain_id = STAC_9200_EAPD_INIT,
1426 },
1427 [STAC_9200_M4_2] = {
1428 .type = HDA_FIXUP_PINS,
1429 .v.pins = gateway9200_m4_2_pin_configs,
1430 .chained = true,
1431 .chain_id = STAC_9200_EAPD_INIT,
1432 },
1433 [STAC_9200_PANASONIC] = {
1434 .type = HDA_FIXUP_FUNC,
1435 .v.func = stac9200_fixup_panasonic,
1436 },
1437 [STAC_9200_EAPD_INIT] = {
1438 .type = HDA_FIXUP_VERBS,
1439 .v.verbs = (const struct hda_verb[]) {
1440 {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02},
1441 {}
1442 },
1443 },
1444};
1445
1446static const struct hda_model_fixup stac9200_models[] = {
1447 { .id = STAC_REF, .name = "ref" },
1448 { .id = STAC_9200_OQO, .name = "oqo" },
1449 { .id = STAC_9200_DELL_D21, .name = "dell-d21" },
1450 { .id = STAC_9200_DELL_D22, .name = "dell-d22" },
1451 { .id = STAC_9200_DELL_D23, .name = "dell-d23" },
1452 { .id = STAC_9200_DELL_M21, .name = "dell-m21" },
1453 { .id = STAC_9200_DELL_M22, .name = "dell-m22" },
1454 { .id = STAC_9200_DELL_M23, .name = "dell-m23" },
1455 { .id = STAC_9200_DELL_M24, .name = "dell-m24" },
1456 { .id = STAC_9200_DELL_M25, .name = "dell-m25" },
1457 { .id = STAC_9200_DELL_M26, .name = "dell-m26" },
1458 { .id = STAC_9200_DELL_M27, .name = "dell-m27" },
1459 { .id = STAC_9200_M4, .name = "gateway-m4" },
1460 { .id = STAC_9200_M4_2, .name = "gateway-m4-2" },
1461 { .id = STAC_9200_PANASONIC, .name = "panasonic" },
1462 {}
1463};
1464
1465static const struct hda_quirk stac9200_fixup_tbl[] = {
1466 /* SigmaTel reference board */
1467 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1468 "DFI LanParty", STAC_REF),
1469 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
1470 "DFI LanParty", STAC_REF),
1471 /* Dell laptops have BIOS problem */
1472 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a8,
1473 "unknown Dell", STAC_9200_DELL_D21),
1474 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01b5,
1475 "Dell Inspiron 630m", STAC_9200_DELL_M21),
1476 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bd,
1477 "Dell Inspiron E1505n", STAC_9200_DELL_M25),
1478 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c0,
1479 "unknown Dell", STAC_9200_DELL_D22),
1480 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c1,
1481 "unknown Dell", STAC_9200_DELL_D22),
1482 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c2,
1483 "Dell Latitude D620", STAC_9200_DELL_M22),
1484 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c5,
1485 "unknown Dell", STAC_9200_DELL_D23),
1486 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c7,
1487 "unknown Dell", STAC_9200_DELL_D23),
1488 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c8,
1489 "unknown Dell", STAC_9200_DELL_M22),
1490 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c9,
1491 "unknown Dell", STAC_9200_DELL_M24),
1492 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ca,
1493 "unknown Dell", STAC_9200_DELL_M24),
1494 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cb,
1495 "Dell Latitude 120L", STAC_9200_DELL_M24),
1496 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cc,
1497 "Dell Latitude D820", STAC_9200_DELL_M22),
1498 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cd,
1499 "Dell Inspiron E1705/9400", STAC_9200_DELL_M27),
1500 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ce,
1501 "Dell XPS M1710", STAC_9200_DELL_M23),
1502 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cf,
1503 "Dell Precision M90", STAC_9200_DELL_M23),
1504 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d3,
1505 "unknown Dell", STAC_9200_DELL_M22),
1506 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d4,
1507 "unknown Dell", STAC_9200_DELL_M22),
1508 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d6,
1509 "unknown Dell", STAC_9200_DELL_M22),
1510 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d8,
1511 "Dell Inspiron 640m", STAC_9200_DELL_M21),
1512 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d9,
1513 "unknown Dell", STAC_9200_DELL_D23),
1514 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01da,
1515 "unknown Dell", STAC_9200_DELL_D23),
1516 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01de,
1517 "unknown Dell", STAC_9200_DELL_D21),
1518 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e3,
1519 "unknown Dell", STAC_9200_DELL_D23),
1520 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e8,
1521 "unknown Dell", STAC_9200_DELL_D21),
1522 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ee,
1523 "unknown Dell", STAC_9200_DELL_M25),
1524 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ef,
1525 "unknown Dell", STAC_9200_DELL_M25),
1526 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f5,
1527 "Dell Inspiron 1501", STAC_9200_DELL_M26),
1528 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f6,
1529 "unknown Dell", STAC_9200_DELL_M26),
1530 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0201,
1531 "Dell Latitude D430", STAC_9200_DELL_M22),
1532 /* Panasonic */
1533 SND_PCI_QUIRK(0x10f7, 0x8338, "Panasonic CF-74", STAC_9200_PANASONIC),
1534 /* Gateway machines needs EAPD to be set on resume */
1535 SND_PCI_QUIRK(0x107b, 0x0205, "Gateway S-7110M", STAC_9200_M4),
1536 SND_PCI_QUIRK(0x107b, 0x0317, "Gateway MT3423, MX341*", STAC_9200_M4_2),
1537 SND_PCI_QUIRK(0x107b, 0x0318, "Gateway ML3019, MT3707", STAC_9200_M4_2),
1538 /* OQO Mobile */
1539 SND_PCI_QUIRK(0x1106, 0x3288, "OQO Model 2", STAC_9200_OQO),
1540 {} /* terminator */
1541};
1542
1543static const struct hda_pintbl ref925x_pin_configs[] = {
1544 { 0x07, 0x40c003f0 },
1545 { 0x08, 0x424503f2 },
1546 { 0x0a, 0x01813022 },
1547 { 0x0b, 0x02a19021 },
1548 { 0x0c, 0x90a70320 },
1549 { 0x0d, 0x02214210 },
1550 { 0x10, 0x01019020 },
1551 { 0x11, 0x9033032e },
1552 {}
1553};
1554
1555static const struct hda_pintbl stac925xM1_pin_configs[] = {
1556 { 0x07, 0x40c003f4 },
1557 { 0x08, 0x424503f2 },
1558 { 0x0a, 0x400000f3 },
1559 { 0x0b, 0x02a19020 },
1560 { 0x0c, 0x40a000f0 },
1561 { 0x0d, 0x90100210 },
1562 { 0x10, 0x400003f1 },
1563 { 0x11, 0x9033032e },
1564 {}
1565};
1566
1567static const struct hda_pintbl stac925xM1_2_pin_configs[] = {
1568 { 0x07, 0x40c003f4 },
1569 { 0x08, 0x424503f2 },
1570 { 0x0a, 0x400000f3 },
1571 { 0x0b, 0x02a19020 },
1572 { 0x0c, 0x40a000f0 },
1573 { 0x0d, 0x90100210 },
1574 { 0x10, 0x400003f1 },
1575 { 0x11, 0x9033032e },
1576 {}
1577};
1578
1579static const struct hda_pintbl stac925xM2_pin_configs[] = {
1580 { 0x07, 0x40c003f4 },
1581 { 0x08, 0x424503f2 },
1582 { 0x0a, 0x400000f3 },
1583 { 0x0b, 0x02a19020 },
1584 { 0x0c, 0x40a000f0 },
1585 { 0x0d, 0x90100210 },
1586 { 0x10, 0x400003f1 },
1587 { 0x11, 0x9033032e },
1588 {}
1589};
1590
1591static const struct hda_pintbl stac925xM2_2_pin_configs[] = {
1592 { 0x07, 0x40c003f4 },
1593 { 0x08, 0x424503f2 },
1594 { 0x0a, 0x400000f3 },
1595 { 0x0b, 0x02a19020 },
1596 { 0x0c, 0x40a000f0 },
1597 { 0x0d, 0x90100210 },
1598 { 0x10, 0x400003f1 },
1599 { 0x11, 0x9033032e },
1600 {}
1601};
1602
1603static const struct hda_pintbl stac925xM3_pin_configs[] = {
1604 { 0x07, 0x40c003f4 },
1605 { 0x08, 0x424503f2 },
1606 { 0x0a, 0x400000f3 },
1607 { 0x0b, 0x02a19020 },
1608 { 0x0c, 0x40a000f0 },
1609 { 0x0d, 0x90100210 },
1610 { 0x10, 0x400003f1 },
1611 { 0x11, 0x503303f3 },
1612 {}
1613};
1614
1615static const struct hda_pintbl stac925xM5_pin_configs[] = {
1616 { 0x07, 0x40c003f4 },
1617 { 0x08, 0x424503f2 },
1618 { 0x0a, 0x400000f3 },
1619 { 0x0b, 0x02a19020 },
1620 { 0x0c, 0x40a000f0 },
1621 { 0x0d, 0x90100210 },
1622 { 0x10, 0x400003f1 },
1623 { 0x11, 0x9033032e },
1624 {}
1625};
1626
1627static const struct hda_pintbl stac925xM6_pin_configs[] = {
1628 { 0x07, 0x40c003f4 },
1629 { 0x08, 0x424503f2 },
1630 { 0x0a, 0x400000f3 },
1631 { 0x0b, 0x02a19020 },
1632 { 0x0c, 0x40a000f0 },
1633 { 0x0d, 0x90100210 },
1634 { 0x10, 0x400003f1 },
1635 { 0x11, 0x90330320 },
1636 {}
1637};
1638
1639static const struct hda_fixup stac925x_fixups[] = {
1640 [STAC_REF] = {
1641 .type = HDA_FIXUP_PINS,
1642 .v.pins = ref925x_pin_configs,
1643 },
1644 [STAC_M1] = {
1645 .type = HDA_FIXUP_PINS,
1646 .v.pins = stac925xM1_pin_configs,
1647 },
1648 [STAC_M1_2] = {
1649 .type = HDA_FIXUP_PINS,
1650 .v.pins = stac925xM1_2_pin_configs,
1651 },
1652 [STAC_M2] = {
1653 .type = HDA_FIXUP_PINS,
1654 .v.pins = stac925xM2_pin_configs,
1655 },
1656 [STAC_M2_2] = {
1657 .type = HDA_FIXUP_PINS,
1658 .v.pins = stac925xM2_2_pin_configs,
1659 },
1660 [STAC_M3] = {
1661 .type = HDA_FIXUP_PINS,
1662 .v.pins = stac925xM3_pin_configs,
1663 },
1664 [STAC_M5] = {
1665 .type = HDA_FIXUP_PINS,
1666 .v.pins = stac925xM5_pin_configs,
1667 },
1668 [STAC_M6] = {
1669 .type = HDA_FIXUP_PINS,
1670 .v.pins = stac925xM6_pin_configs,
1671 },
1672};
1673
1674static const struct hda_model_fixup stac925x_models[] = {
1675 { .id = STAC_REF, .name = "ref" },
1676 { .id = STAC_M1, .name = "m1" },
1677 { .id = STAC_M1_2, .name = "m1-2" },
1678 { .id = STAC_M2, .name = "m2" },
1679 { .id = STAC_M2_2, .name = "m2-2" },
1680 { .id = STAC_M3, .name = "m3" },
1681 { .id = STAC_M5, .name = "m5" },
1682 { .id = STAC_M6, .name = "m6" },
1683 {}
1684};
1685
1686static const struct hda_quirk stac925x_fixup_tbl[] = {
1687 /* SigmaTel reference board */
1688 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, "DFI LanParty", STAC_REF),
1689 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101, "DFI LanParty", STAC_REF),
1690 SND_PCI_QUIRK(0x8384, 0x7632, "Stac9202 Reference Board", STAC_REF),
1691
1692 /* Default table for unknown ID */
1693 SND_PCI_QUIRK(0x1002, 0x437b, "Gateway mobile", STAC_M2_2),
1694
1695 /* gateway machines are checked via codec ssid */
1696 SND_PCI_QUIRK(0x107b, 0x0316, "Gateway M255", STAC_M2),
1697 SND_PCI_QUIRK(0x107b, 0x0366, "Gateway MP6954", STAC_M5),
1698 SND_PCI_QUIRK(0x107b, 0x0461, "Gateway NX560XL", STAC_M1),
1699 SND_PCI_QUIRK(0x107b, 0x0681, "Gateway NX860", STAC_M2),
1700 SND_PCI_QUIRK(0x107b, 0x0367, "Gateway MX6453", STAC_M1_2),
1701 /* Not sure about the brand name for those */
1702 SND_PCI_QUIRK(0x107b, 0x0281, "Gateway mobile", STAC_M1),
1703 SND_PCI_QUIRK(0x107b, 0x0507, "Gateway mobile", STAC_M3),
1704 SND_PCI_QUIRK(0x107b, 0x0281, "Gateway mobile", STAC_M6),
1705 SND_PCI_QUIRK(0x107b, 0x0685, "Gateway mobile", STAC_M2_2),
1706 {} /* terminator */
1707};
1708
1709static const struct hda_pintbl ref92hd73xx_pin_configs[] = {
1710 // Port A-H
1711 { 0x0a, 0x02214030 },
1712 { 0x0b, 0x02a19040 },
1713 { 0x0c, 0x01a19020 },
1714 { 0x0d, 0x02214030 },
1715 { 0x0e, 0x0181302e },
1716 { 0x0f, 0x01014010 },
1717 { 0x10, 0x01014020 },
1718 { 0x11, 0x01014030 },
1719 // CD in
1720 { 0x12, 0x02319040 },
1721 // Digial Mic ins
1722 { 0x13, 0x90a000f0 },
1723 { 0x14, 0x90a000f0 },
1724 // Digital outs
1725 { 0x22, 0x01452050 },
1726 { 0x23, 0x01452050 },
1727 {}
1728};
1729
1730static const struct hda_pintbl dell_m6_pin_configs[] = {
1731 { 0x0a, 0x0321101f },
1732 { 0x0b, 0x4f00000f },
1733 { 0x0c, 0x4f0000f0 },
1734 { 0x0d, 0x90170110 },
1735 { 0x0e, 0x03a11020 },
1736 { 0x0f, 0x0321101f },
1737 { 0x10, 0x4f0000f0 },
1738 { 0x11, 0x4f0000f0 },
1739 { 0x12, 0x4f0000f0 },
1740 { 0x13, 0x90a60160 },
1741 { 0x14, 0x4f0000f0 },
1742 { 0x22, 0x4f0000f0 },
1743 { 0x23, 0x4f0000f0 },
1744 {}
1745};
1746
1747static const struct hda_pintbl alienware_m17x_pin_configs[] = {
1748 { 0x0a, 0x0321101f },
1749 { 0x0b, 0x0321101f },
1750 { 0x0c, 0x03a11020 },
1751 { 0x0d, 0x03014020 },
1752 { 0x0e, 0x90170110 },
1753 { 0x0f, 0x4f0000f0 },
1754 { 0x10, 0x4f0000f0 },
1755 { 0x11, 0x4f0000f0 },
1756 { 0x12, 0x4f0000f0 },
1757 { 0x13, 0x90a60160 },
1758 { 0x14, 0x4f0000f0 },
1759 { 0x22, 0x4f0000f0 },
1760 { 0x23, 0x904601b0 },
1761 {}
1762};
1763
1764static const struct hda_pintbl intel_dg45id_pin_configs[] = {
1765 // Analog outputs
1766 { 0x0a, 0x02214230 },
1767 { 0x0b, 0x02A19240 },
1768 { 0x0c, 0x01013214 },
1769 { 0x0d, 0x01014210 },
1770 { 0x0e, 0x01A19250 },
1771 { 0x0f, 0x01011212 },
1772 { 0x10, 0x01016211 },
1773 // Digital output
1774 { 0x22, 0x01451380 },
1775 { 0x23, 0x40f000f0 },
1776 {}
1777};
1778
1779static const struct hda_pintbl stac92hd89xx_hp_front_jack_pin_configs[] = {
1780 { 0x0a, 0x02214030 },
1781 { 0x0b, 0x02A19010 },
1782 {}
1783};
1784
1785static const struct hda_pintbl stac92hd89xx_hp_z1_g2_right_mic_jack_pin_configs[] = {
1786 { 0x0e, 0x400000f0 },
1787 {}
1788};
1789
1790static void stac92hd73xx_fixup_ref(struct hda_codec *codec,
1791 const struct hda_fixup *fix, int action)
1792{
1793 struct sigmatel_spec *spec = codec->spec;
1794
1795 if (action != HDA_FIXUP_ACT_PRE_PROBE)
1796 return;
1797
1798 snd_hda_apply_pincfgs(codec, ref92hd73xx_pin_configs);
1799 spec->gpio_mask = spec->gpio_dir = spec->gpio_data = 0;
1800}
1801
1802static void stac92hd73xx_fixup_dell(struct hda_codec *codec)
1803{
1804 struct sigmatel_spec *spec = codec->spec;
1805
1806 snd_hda_apply_pincfgs(codec, dell_m6_pin_configs);
1807 spec->eapd_switch = 0;
1808}
1809
1810static void stac92hd73xx_fixup_dell_eq(struct hda_codec *codec,
1811 const struct hda_fixup *fix, int action)
1812{
1813 struct sigmatel_spec *spec = codec->spec;
1814
1815 if (action != HDA_FIXUP_ACT_PRE_PROBE)
1816 return;
1817
1818 stac92hd73xx_fixup_dell(codec);
1819 snd_hda_add_verbs(codec, dell_eq_core_init);
1820 spec->volknob_init = 1;
1821}
1822
1823/* Analog Mics */
1824static void stac92hd73xx_fixup_dell_m6_amic(struct hda_codec *codec,
1825 const struct hda_fixup *fix, int action)
1826{
1827 if (action != HDA_FIXUP_ACT_PRE_PROBE)
1828 return;
1829
1830 stac92hd73xx_fixup_dell(codec);
1831 snd_hda_codec_set_pincfg(codec, 0x0b, 0x90A70170);
1832}
1833
1834/* Digital Mics */
1835static void stac92hd73xx_fixup_dell_m6_dmic(struct hda_codec *codec,
1836 const struct hda_fixup *fix, int action)
1837{
1838 if (action != HDA_FIXUP_ACT_PRE_PROBE)
1839 return;
1840
1841 stac92hd73xx_fixup_dell(codec);
1842 snd_hda_codec_set_pincfg(codec, 0x13, 0x90A60160);
1843}
1844
1845/* Both */
1846static void stac92hd73xx_fixup_dell_m6_both(struct hda_codec *codec,
1847 const struct hda_fixup *fix, int action)
1848{
1849 if (action != HDA_FIXUP_ACT_PRE_PROBE)
1850 return;
1851
1852 stac92hd73xx_fixup_dell(codec);
1853 snd_hda_codec_set_pincfg(codec, 0x0b, 0x90A70170);
1854 snd_hda_codec_set_pincfg(codec, 0x13, 0x90A60160);
1855}
1856
1857static void stac92hd73xx_fixup_alienware_m17x(struct hda_codec *codec,
1858 const struct hda_fixup *fix, int action)
1859{
1860 struct sigmatel_spec *spec = codec->spec;
1861
1862 if (action != HDA_FIXUP_ACT_PRE_PROBE)
1863 return;
1864
1865 snd_hda_apply_pincfgs(codec, alienware_m17x_pin_configs);
1866 spec->eapd_switch = 0;
1867}
1868
1869static void stac92hd73xx_fixup_no_jd(struct hda_codec *codec,
1870 const struct hda_fixup *fix, int action)
1871{
1872 if (action == HDA_FIXUP_ACT_PRE_PROBE)
1873 codec->no_jack_detect = 1;
1874}
1875
1876
1877static void stac92hd73xx_disable_automute(struct hda_codec *codec,
1878 const struct hda_fixup *fix, int action)
1879{
1880 struct sigmatel_spec *spec = codec->spec;
1881
1882 if (action != HDA_FIXUP_ACT_PRE_PROBE)
1883 return;
1884
1885 spec->gen.suppress_auto_mute = 1;
1886}
1887
1888static const struct hda_fixup stac92hd73xx_fixups[] = {
1889 [STAC_92HD73XX_REF] = {
1890 .type = HDA_FIXUP_FUNC,
1891 .v.func = stac92hd73xx_fixup_ref,
1892 },
1893 [STAC_DELL_M6_AMIC] = {
1894 .type = HDA_FIXUP_FUNC,
1895 .v.func = stac92hd73xx_fixup_dell_m6_amic,
1896 },
1897 [STAC_DELL_M6_DMIC] = {
1898 .type = HDA_FIXUP_FUNC,
1899 .v.func = stac92hd73xx_fixup_dell_m6_dmic,
1900 },
1901 [STAC_DELL_M6_BOTH] = {
1902 .type = HDA_FIXUP_FUNC,
1903 .v.func = stac92hd73xx_fixup_dell_m6_both,
1904 },
1905 [STAC_DELL_EQ] = {
1906 .type = HDA_FIXUP_FUNC,
1907 .v.func = stac92hd73xx_fixup_dell_eq,
1908 },
1909 [STAC_ALIENWARE_M17X] = {
1910 .type = HDA_FIXUP_FUNC,
1911 .v.func = stac92hd73xx_fixup_alienware_m17x,
1912 },
1913 [STAC_ELO_VUPOINT_15MX] = {
1914 .type = HDA_FIXUP_FUNC,
1915 .v.func = stac92hd73xx_disable_automute,
1916 },
1917 [STAC_92HD73XX_INTEL] = {
1918 .type = HDA_FIXUP_PINS,
1919 .v.pins = intel_dg45id_pin_configs,
1920 },
1921 [STAC_92HD73XX_NO_JD] = {
1922 .type = HDA_FIXUP_FUNC,
1923 .v.func = stac92hd73xx_fixup_no_jd,
1924 },
1925 [STAC_92HD89XX_HP_FRONT_JACK] = {
1926 .type = HDA_FIXUP_PINS,
1927 .v.pins = stac92hd89xx_hp_front_jack_pin_configs,
1928 },
1929 [STAC_92HD89XX_HP_Z1_G2_RIGHT_MIC_JACK] = {
1930 .type = HDA_FIXUP_PINS,
1931 .v.pins = stac92hd89xx_hp_z1_g2_right_mic_jack_pin_configs,
1932 },
1933 [STAC_92HD73XX_ASUS_MOBO] = {
1934 .type = HDA_FIXUP_PINS,
1935 .v.pins = (const struct hda_pintbl[]) {
1936 /* enable 5.1 and SPDIF out */
1937 { 0x0c, 0x01014411 },
1938 { 0x0d, 0x01014410 },
1939 { 0x0e, 0x01014412 },
1940 { 0x22, 0x014b1180 },
1941 { }
1942 }
1943 },
1944};
1945
1946static const struct hda_model_fixup stac92hd73xx_models[] = {
1947 { .id = STAC_92HD73XX_NO_JD, .name = "no-jd" },
1948 { .id = STAC_92HD73XX_REF, .name = "ref" },
1949 { .id = STAC_92HD73XX_INTEL, .name = "intel" },
1950 { .id = STAC_DELL_M6_AMIC, .name = "dell-m6-amic" },
1951 { .id = STAC_DELL_M6_DMIC, .name = "dell-m6-dmic" },
1952 { .id = STAC_DELL_M6_BOTH, .name = "dell-m6" },
1953 { .id = STAC_DELL_EQ, .name = "dell-eq" },
1954 { .id = STAC_ALIENWARE_M17X, .name = "alienware" },
1955 { .id = STAC_ELO_VUPOINT_15MX, .name = "elo-vupoint-15mx" },
1956 { .id = STAC_92HD73XX_ASUS_MOBO, .name = "asus-mobo" },
1957 {}
1958};
1959
1960static const struct hda_quirk stac92hd73xx_fixup_tbl[] = {
1961 /* SigmaTel reference board */
1962 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1963 "DFI LanParty", STAC_92HD73XX_REF),
1964 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
1965 "DFI LanParty", STAC_92HD73XX_REF),
1966 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5001,
1967 "Intel DP45SG", STAC_92HD73XX_INTEL),
1968 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5002,
1969 "Intel DG45ID", STAC_92HD73XX_INTEL),
1970 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5003,
1971 "Intel DG45FC", STAC_92HD73XX_INTEL),
1972 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0254,
1973 "Dell Studio 1535", STAC_DELL_M6_DMIC),
1974 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0255,
1975 "unknown Dell", STAC_DELL_M6_DMIC),
1976 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0256,
1977 "unknown Dell", STAC_DELL_M6_BOTH),
1978 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0257,
1979 "unknown Dell", STAC_DELL_M6_BOTH),
1980 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025e,
1981 "unknown Dell", STAC_DELL_M6_AMIC),
1982 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025f,
1983 "unknown Dell", STAC_DELL_M6_AMIC),
1984 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0271,
1985 "unknown Dell", STAC_DELL_M6_DMIC),
1986 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0272,
1987 "unknown Dell", STAC_DELL_M6_DMIC),
1988 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x029f,
1989 "Dell Studio 1537", STAC_DELL_M6_DMIC),
1990 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02a0,
1991 "Dell Studio 17", STAC_DELL_M6_DMIC),
1992 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02be,
1993 "Dell Studio 1555", STAC_DELL_M6_DMIC),
1994 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02bd,
1995 "Dell Studio 1557", STAC_DELL_M6_DMIC),
1996 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02fe,
1997 "Dell Studio XPS 1645", STAC_DELL_M6_DMIC),
1998 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0413,
1999 "Dell Studio 1558", STAC_DELL_M6_DMIC),
2000 /* codec SSID matching */
2001 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02a1,
2002 "Alienware M17x", STAC_ALIENWARE_M17X),
2003 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x043a,
2004 "Alienware M17x", STAC_ALIENWARE_M17X),
2005 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0490,
2006 "Alienware M17x R3", STAC_DELL_EQ),
2007 SND_PCI_QUIRK(0x1059, 0x1011,
2008 "ELO VuPoint 15MX", STAC_ELO_VUPOINT_15MX),
2009 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1927,
2010 "HP Z1 G2", STAC_92HD89XX_HP_Z1_G2_RIGHT_MIC_JACK),
2011 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2b17,
2012 "unknown HP", STAC_92HD89XX_HP_FRONT_JACK),
2013 SND_PCI_QUIRK(PCI_VENDOR_ID_ASUSTEK, 0x83f8, "ASUS AT4NM10",
2014 STAC_92HD73XX_ASUS_MOBO),
2015 {} /* terminator */
2016};
2017
2018static const struct hda_pintbl ref92hd83xxx_pin_configs[] = {
2019 { 0x0a, 0x02214030 },
2020 { 0x0b, 0x02211010 },
2021 { 0x0c, 0x02a19020 },
2022 { 0x0d, 0x02170130 },
2023 { 0x0e, 0x01014050 },
2024 { 0x0f, 0x01819040 },
2025 { 0x10, 0x01014020 },
2026 { 0x11, 0x90a3014e },
2027 { 0x1f, 0x01451160 },
2028 { 0x20, 0x98560170 },
2029 {}
2030};
2031
2032static const struct hda_pintbl dell_s14_pin_configs[] = {
2033 { 0x0a, 0x0221403f },
2034 { 0x0b, 0x0221101f },
2035 { 0x0c, 0x02a19020 },
2036 { 0x0d, 0x90170110 },
2037 { 0x0e, 0x40f000f0 },
2038 { 0x0f, 0x40f000f0 },
2039 { 0x10, 0x40f000f0 },
2040 { 0x11, 0x90a60160 },
2041 { 0x1f, 0x40f000f0 },
2042 { 0x20, 0x40f000f0 },
2043 {}
2044};
2045
2046static const struct hda_pintbl dell_vostro_3500_pin_configs[] = {
2047 { 0x0a, 0x02a11020 },
2048 { 0x0b, 0x0221101f },
2049 { 0x0c, 0x400000f0 },
2050 { 0x0d, 0x90170110 },
2051 { 0x0e, 0x400000f1 },
2052 { 0x0f, 0x400000f2 },
2053 { 0x10, 0x400000f3 },
2054 { 0x11, 0x90a60160 },
2055 { 0x1f, 0x400000f4 },
2056 { 0x20, 0x400000f5 },
2057 {}
2058};
2059
2060static const struct hda_pintbl hp_dv7_4000_pin_configs[] = {
2061 { 0x0a, 0x03a12050 },
2062 { 0x0b, 0x0321201f },
2063 { 0x0c, 0x40f000f0 },
2064 { 0x0d, 0x90170110 },
2065 { 0x0e, 0x40f000f0 },
2066 { 0x0f, 0x40f000f0 },
2067 { 0x10, 0x90170110 },
2068 { 0x11, 0xd5a30140 },
2069 { 0x1f, 0x40f000f0 },
2070 { 0x20, 0x40f000f0 },
2071 {}
2072};
2073
2074static const struct hda_pintbl hp_zephyr_pin_configs[] = {
2075 { 0x0a, 0x01813050 },
2076 { 0x0b, 0x0421201f },
2077 { 0x0c, 0x04a1205e },
2078 { 0x0d, 0x96130310 },
2079 { 0x0e, 0x96130310 },
2080 { 0x0f, 0x0101401f },
2081 { 0x10, 0x1111611f },
2082 { 0x11, 0xd5a30130 },
2083 {}
2084};
2085
2086static const struct hda_pintbl hp_cNB11_intquad_pin_configs[] = {
2087 { 0x0a, 0x40f000f0 },
2088 { 0x0b, 0x0221101f },
2089 { 0x0c, 0x02a11020 },
2090 { 0x0d, 0x92170110 },
2091 { 0x0e, 0x40f000f0 },
2092 { 0x0f, 0x92170110 },
2093 { 0x10, 0x40f000f0 },
2094 { 0x11, 0xd5a30130 },
2095 { 0x1f, 0x40f000f0 },
2096 { 0x20, 0x40f000f0 },
2097 {}
2098};
2099
2100static void stac92hd83xxx_fixup_hp(struct hda_codec *codec,
2101 const struct hda_fixup *fix, int action)
2102{
2103 struct sigmatel_spec *spec = codec->spec;
2104
2105 if (action != HDA_FIXUP_ACT_PRE_PROBE)
2106 return;
2107
2108 if (hp_bnb2011_with_dock(codec)) {
2109 snd_hda_codec_set_pincfg(codec, 0xa, 0x2101201f);
2110 snd_hda_codec_set_pincfg(codec, 0xf, 0x2181205e);
2111 }
2112
2113 if (find_mute_led_cfg(codec, spec->default_polarity))
2114 codec_dbg(codec, "mute LED gpio %d polarity %d\n",
2115 spec->gpio_led,
2116 spec->gpio_led_polarity);
2117
2118 /* allow auto-switching of dock line-in */
2119 spec->gen.line_in_auto_switch = true;
2120}
2121
2122static void stac92hd83xxx_fixup_hp_zephyr(struct hda_codec *codec,
2123 const struct hda_fixup *fix, int action)
2124{
2125 if (action != HDA_FIXUP_ACT_PRE_PROBE)
2126 return;
2127
2128 snd_hda_apply_pincfgs(codec, hp_zephyr_pin_configs);
2129 snd_hda_add_verbs(codec, stac92hd83xxx_hp_zephyr_init);
2130}
2131
2132static void stac92hd83xxx_fixup_hp_led(struct hda_codec *codec,
2133 const struct hda_fixup *fix, int action)
2134{
2135 struct sigmatel_spec *spec = codec->spec;
2136
2137 if (action == HDA_FIXUP_ACT_PRE_PROBE)
2138 spec->default_polarity = 0;
2139}
2140
2141static void stac92hd83xxx_fixup_hp_inv_led(struct hda_codec *codec,
2142 const struct hda_fixup *fix, int action)
2143{
2144 struct sigmatel_spec *spec = codec->spec;
2145
2146 if (action == HDA_FIXUP_ACT_PRE_PROBE)
2147 spec->default_polarity = 1;
2148}
2149
2150static void stac92hd83xxx_fixup_hp_mic_led(struct hda_codec *codec,
2151 const struct hda_fixup *fix, int action)
2152{
2153 struct sigmatel_spec *spec = codec->spec;
2154
2155 if (action == HDA_FIXUP_ACT_PRE_PROBE) {
2156 spec->mic_mute_led_gpio = 0x08; /* GPIO3 */
2157 /* resetting controller clears GPIO, so we need to keep on */
2158 codec->core.power_caps &= ~AC_PWRST_CLKSTOP;
2159 }
2160}
2161
2162static void stac92hd83xxx_fixup_hp_led_gpio10(struct hda_codec *codec,
2163 const struct hda_fixup *fix, int action)
2164{
2165 struct sigmatel_spec *spec = codec->spec;
2166
2167 if (action == HDA_FIXUP_ACT_PRE_PROBE) {
2168 spec->gpio_led = 0x10; /* GPIO4 */
2169 spec->default_polarity = 0;
2170 }
2171}
2172
2173static void stac92hd83xxx_fixup_headset_jack(struct hda_codec *codec,
2174 const struct hda_fixup *fix, int action)
2175{
2176 struct sigmatel_spec *spec = codec->spec;
2177
2178 if (action == HDA_FIXUP_ACT_PRE_PROBE)
2179 spec->headset_jack = 1;
2180}
2181
2182static void stac92hd83xxx_fixup_gpio10_eapd(struct hda_codec *codec,
2183 const struct hda_fixup *fix,
2184 int action)
2185{
2186 struct sigmatel_spec *spec = codec->spec;
2187
2188 if (action != HDA_FIXUP_ACT_PRE_PROBE)
2189 return;
2190 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir =
2191 spec->gpio_data = 0x10;
2192 spec->eapd_switch = 0;
2193}
2194
2195static void hp_envy_ts_fixup_dac_bind(struct hda_codec *codec,
2196 const struct hda_fixup *fix,
2197 int action)
2198{
2199 struct sigmatel_spec *spec = codec->spec;
2200 static const hda_nid_t preferred_pairs[] = {
2201 0xd, 0x13,
2202 0
2203 };
2204
2205 if (action != HDA_FIXUP_ACT_PRE_PROBE)
2206 return;
2207
2208 spec->gen.preferred_dacs = preferred_pairs;
2209}
2210
2211static const struct hda_verb hp_bnb13_eq_verbs[] = {
2212 /* 44.1KHz base */
2213 { 0x22, 0x7A6, 0x3E },
2214 { 0x22, 0x7A7, 0x68 },
2215 { 0x22, 0x7A8, 0x17 },
2216 { 0x22, 0x7A9, 0x3E },
2217 { 0x22, 0x7AA, 0x68 },
2218 { 0x22, 0x7AB, 0x17 },
2219 { 0x22, 0x7AC, 0x00 },
2220 { 0x22, 0x7AD, 0x80 },
2221 { 0x22, 0x7A6, 0x83 },
2222 { 0x22, 0x7A7, 0x2F },
2223 { 0x22, 0x7A8, 0xD1 },
2224 { 0x22, 0x7A9, 0x83 },
2225 { 0x22, 0x7AA, 0x2F },
2226 { 0x22, 0x7AB, 0xD1 },
2227 { 0x22, 0x7AC, 0x01 },
2228 { 0x22, 0x7AD, 0x80 },
2229 { 0x22, 0x7A6, 0x3E },
2230 { 0x22, 0x7A7, 0x68 },
2231 { 0x22, 0x7A8, 0x17 },
2232 { 0x22, 0x7A9, 0x3E },
2233 { 0x22, 0x7AA, 0x68 },
2234 { 0x22, 0x7AB, 0x17 },
2235 { 0x22, 0x7AC, 0x02 },
2236 { 0x22, 0x7AD, 0x80 },
2237 { 0x22, 0x7A6, 0x7C },
2238 { 0x22, 0x7A7, 0xC6 },
2239 { 0x22, 0x7A8, 0x0C },
2240 { 0x22, 0x7A9, 0x7C },
2241 { 0x22, 0x7AA, 0xC6 },
2242 { 0x22, 0x7AB, 0x0C },
2243 { 0x22, 0x7AC, 0x03 },
2244 { 0x22, 0x7AD, 0x80 },
2245 { 0x22, 0x7A6, 0xC3 },
2246 { 0x22, 0x7A7, 0x25 },
2247 { 0x22, 0x7A8, 0xAF },
2248 { 0x22, 0x7A9, 0xC3 },
2249 { 0x22, 0x7AA, 0x25 },
2250 { 0x22, 0x7AB, 0xAF },
2251 { 0x22, 0x7AC, 0x04 },
2252 { 0x22, 0x7AD, 0x80 },
2253 { 0x22, 0x7A6, 0x3E },
2254 { 0x22, 0x7A7, 0x85 },
2255 { 0x22, 0x7A8, 0x73 },
2256 { 0x22, 0x7A9, 0x3E },
2257 { 0x22, 0x7AA, 0x85 },
2258 { 0x22, 0x7AB, 0x73 },
2259 { 0x22, 0x7AC, 0x05 },
2260 { 0x22, 0x7AD, 0x80 },
2261 { 0x22, 0x7A6, 0x85 },
2262 { 0x22, 0x7A7, 0x39 },
2263 { 0x22, 0x7A8, 0xC7 },
2264 { 0x22, 0x7A9, 0x85 },
2265 { 0x22, 0x7AA, 0x39 },
2266 { 0x22, 0x7AB, 0xC7 },
2267 { 0x22, 0x7AC, 0x06 },
2268 { 0x22, 0x7AD, 0x80 },
2269 { 0x22, 0x7A6, 0x3C },
2270 { 0x22, 0x7A7, 0x90 },
2271 { 0x22, 0x7A8, 0xB0 },
2272 { 0x22, 0x7A9, 0x3C },
2273 { 0x22, 0x7AA, 0x90 },
2274 { 0x22, 0x7AB, 0xB0 },
2275 { 0x22, 0x7AC, 0x07 },
2276 { 0x22, 0x7AD, 0x80 },
2277 { 0x22, 0x7A6, 0x7A },
2278 { 0x22, 0x7A7, 0xC6 },
2279 { 0x22, 0x7A8, 0x39 },
2280 { 0x22, 0x7A9, 0x7A },
2281 { 0x22, 0x7AA, 0xC6 },
2282 { 0x22, 0x7AB, 0x39 },
2283 { 0x22, 0x7AC, 0x08 },
2284 { 0x22, 0x7AD, 0x80 },
2285 { 0x22, 0x7A6, 0xC4 },
2286 { 0x22, 0x7A7, 0xE9 },
2287 { 0x22, 0x7A8, 0xDC },
2288 { 0x22, 0x7A9, 0xC4 },
2289 { 0x22, 0x7AA, 0xE9 },
2290 { 0x22, 0x7AB, 0xDC },
2291 { 0x22, 0x7AC, 0x09 },
2292 { 0x22, 0x7AD, 0x80 },
2293 { 0x22, 0x7A6, 0x3D },
2294 { 0x22, 0x7A7, 0xE1 },
2295 { 0x22, 0x7A8, 0x0D },
2296 { 0x22, 0x7A9, 0x3D },
2297 { 0x22, 0x7AA, 0xE1 },
2298 { 0x22, 0x7AB, 0x0D },
2299 { 0x22, 0x7AC, 0x0A },
2300 { 0x22, 0x7AD, 0x80 },
2301 { 0x22, 0x7A6, 0x89 },
2302 { 0x22, 0x7A7, 0xB6 },
2303 { 0x22, 0x7A8, 0xEB },
2304 { 0x22, 0x7A9, 0x89 },
2305 { 0x22, 0x7AA, 0xB6 },
2306 { 0x22, 0x7AB, 0xEB },
2307 { 0x22, 0x7AC, 0x0B },
2308 { 0x22, 0x7AD, 0x80 },
2309 { 0x22, 0x7A6, 0x39 },
2310 { 0x22, 0x7A7, 0x9D },
2311 { 0x22, 0x7A8, 0xFE },
2312 { 0x22, 0x7A9, 0x39 },
2313 { 0x22, 0x7AA, 0x9D },
2314 { 0x22, 0x7AB, 0xFE },
2315 { 0x22, 0x7AC, 0x0C },
2316 { 0x22, 0x7AD, 0x80 },
2317 { 0x22, 0x7A6, 0x76 },
2318 { 0x22, 0x7A7, 0x49 },
2319 { 0x22, 0x7A8, 0x15 },
2320 { 0x22, 0x7A9, 0x76 },
2321 { 0x22, 0x7AA, 0x49 },
2322 { 0x22, 0x7AB, 0x15 },
2323 { 0x22, 0x7AC, 0x0D },
2324 { 0x22, 0x7AD, 0x80 },
2325 { 0x22, 0x7A6, 0xC8 },
2326 { 0x22, 0x7A7, 0x80 },
2327 { 0x22, 0x7A8, 0xF5 },
2328 { 0x22, 0x7A9, 0xC8 },
2329 { 0x22, 0x7AA, 0x80 },
2330 { 0x22, 0x7AB, 0xF5 },
2331 { 0x22, 0x7AC, 0x0E },
2332 { 0x22, 0x7AD, 0x80 },
2333 { 0x22, 0x7A6, 0x40 },
2334 { 0x22, 0x7A7, 0x00 },
2335 { 0x22, 0x7A8, 0x00 },
2336 { 0x22, 0x7A9, 0x40 },
2337 { 0x22, 0x7AA, 0x00 },
2338 { 0x22, 0x7AB, 0x00 },
2339 { 0x22, 0x7AC, 0x0F },
2340 { 0x22, 0x7AD, 0x80 },
2341 { 0x22, 0x7A6, 0x90 },
2342 { 0x22, 0x7A7, 0x68 },
2343 { 0x22, 0x7A8, 0xF1 },
2344 { 0x22, 0x7A9, 0x90 },
2345 { 0x22, 0x7AA, 0x68 },
2346 { 0x22, 0x7AB, 0xF1 },
2347 { 0x22, 0x7AC, 0x10 },
2348 { 0x22, 0x7AD, 0x80 },
2349 { 0x22, 0x7A6, 0x34 },
2350 { 0x22, 0x7A7, 0x47 },
2351 { 0x22, 0x7A8, 0x6C },
2352 { 0x22, 0x7A9, 0x34 },
2353 { 0x22, 0x7AA, 0x47 },
2354 { 0x22, 0x7AB, 0x6C },
2355 { 0x22, 0x7AC, 0x11 },
2356 { 0x22, 0x7AD, 0x80 },
2357 { 0x22, 0x7A6, 0x6F },
2358 { 0x22, 0x7A7, 0x97 },
2359 { 0x22, 0x7A8, 0x0F },
2360 { 0x22, 0x7A9, 0x6F },
2361 { 0x22, 0x7AA, 0x97 },
2362 { 0x22, 0x7AB, 0x0F },
2363 { 0x22, 0x7AC, 0x12 },
2364 { 0x22, 0x7AD, 0x80 },
2365 { 0x22, 0x7A6, 0xCB },
2366 { 0x22, 0x7A7, 0xB8 },
2367 { 0x22, 0x7A8, 0x94 },
2368 { 0x22, 0x7A9, 0xCB },
2369 { 0x22, 0x7AA, 0xB8 },
2370 { 0x22, 0x7AB, 0x94 },
2371 { 0x22, 0x7AC, 0x13 },
2372 { 0x22, 0x7AD, 0x80 },
2373 { 0x22, 0x7A6, 0x40 },
2374 { 0x22, 0x7A7, 0x00 },
2375 { 0x22, 0x7A8, 0x00 },
2376 { 0x22, 0x7A9, 0x40 },
2377 { 0x22, 0x7AA, 0x00 },
2378 { 0x22, 0x7AB, 0x00 },
2379 { 0x22, 0x7AC, 0x14 },
2380 { 0x22, 0x7AD, 0x80 },
2381 { 0x22, 0x7A6, 0x95 },
2382 { 0x22, 0x7A7, 0x76 },
2383 { 0x22, 0x7A8, 0x5B },
2384 { 0x22, 0x7A9, 0x95 },
2385 { 0x22, 0x7AA, 0x76 },
2386 { 0x22, 0x7AB, 0x5B },
2387 { 0x22, 0x7AC, 0x15 },
2388 { 0x22, 0x7AD, 0x80 },
2389 { 0x22, 0x7A6, 0x31 },
2390 { 0x22, 0x7A7, 0xAC },
2391 { 0x22, 0x7A8, 0x31 },
2392 { 0x22, 0x7A9, 0x31 },
2393 { 0x22, 0x7AA, 0xAC },
2394 { 0x22, 0x7AB, 0x31 },
2395 { 0x22, 0x7AC, 0x16 },
2396 { 0x22, 0x7AD, 0x80 },
2397 { 0x22, 0x7A6, 0x6A },
2398 { 0x22, 0x7A7, 0x89 },
2399 { 0x22, 0x7A8, 0xA5 },
2400 { 0x22, 0x7A9, 0x6A },
2401 { 0x22, 0x7AA, 0x89 },
2402 { 0x22, 0x7AB, 0xA5 },
2403 { 0x22, 0x7AC, 0x17 },
2404 { 0x22, 0x7AD, 0x80 },
2405 { 0x22, 0x7A6, 0xCE },
2406 { 0x22, 0x7A7, 0x53 },
2407 { 0x22, 0x7A8, 0xCF },
2408 { 0x22, 0x7A9, 0xCE },
2409 { 0x22, 0x7AA, 0x53 },
2410 { 0x22, 0x7AB, 0xCF },
2411 { 0x22, 0x7AC, 0x18 },
2412 { 0x22, 0x7AD, 0x80 },
2413 { 0x22, 0x7A6, 0x40 },
2414 { 0x22, 0x7A7, 0x00 },
2415 { 0x22, 0x7A8, 0x00 },
2416 { 0x22, 0x7A9, 0x40 },
2417 { 0x22, 0x7AA, 0x00 },
2418 { 0x22, 0x7AB, 0x00 },
2419 { 0x22, 0x7AC, 0x19 },
2420 { 0x22, 0x7AD, 0x80 },
2421 /* 48KHz base */
2422 { 0x22, 0x7A6, 0x3E },
2423 { 0x22, 0x7A7, 0x88 },
2424 { 0x22, 0x7A8, 0xDC },
2425 { 0x22, 0x7A9, 0x3E },
2426 { 0x22, 0x7AA, 0x88 },
2427 { 0x22, 0x7AB, 0xDC },
2428 { 0x22, 0x7AC, 0x1A },
2429 { 0x22, 0x7AD, 0x80 },
2430 { 0x22, 0x7A6, 0x82 },
2431 { 0x22, 0x7A7, 0xEE },
2432 { 0x22, 0x7A8, 0x46 },
2433 { 0x22, 0x7A9, 0x82 },
2434 { 0x22, 0x7AA, 0xEE },
2435 { 0x22, 0x7AB, 0x46 },
2436 { 0x22, 0x7AC, 0x1B },
2437 { 0x22, 0x7AD, 0x80 },
2438 { 0x22, 0x7A6, 0x3E },
2439 { 0x22, 0x7A7, 0x88 },
2440 { 0x22, 0x7A8, 0xDC },
2441 { 0x22, 0x7A9, 0x3E },
2442 { 0x22, 0x7AA, 0x88 },
2443 { 0x22, 0x7AB, 0xDC },
2444 { 0x22, 0x7AC, 0x1C },
2445 { 0x22, 0x7AD, 0x80 },
2446 { 0x22, 0x7A6, 0x7D },
2447 { 0x22, 0x7A7, 0x09 },
2448 { 0x22, 0x7A8, 0x28 },
2449 { 0x22, 0x7A9, 0x7D },
2450 { 0x22, 0x7AA, 0x09 },
2451 { 0x22, 0x7AB, 0x28 },
2452 { 0x22, 0x7AC, 0x1D },
2453 { 0x22, 0x7AD, 0x80 },
2454 { 0x22, 0x7A6, 0xC2 },
2455 { 0x22, 0x7A7, 0xE5 },
2456 { 0x22, 0x7A8, 0xB4 },
2457 { 0x22, 0x7A9, 0xC2 },
2458 { 0x22, 0x7AA, 0xE5 },
2459 { 0x22, 0x7AB, 0xB4 },
2460 { 0x22, 0x7AC, 0x1E },
2461 { 0x22, 0x7AD, 0x80 },
2462 { 0x22, 0x7A6, 0x3E },
2463 { 0x22, 0x7A7, 0xA3 },
2464 { 0x22, 0x7A8, 0x1F },
2465 { 0x22, 0x7A9, 0x3E },
2466 { 0x22, 0x7AA, 0xA3 },
2467 { 0x22, 0x7AB, 0x1F },
2468 { 0x22, 0x7AC, 0x1F },
2469 { 0x22, 0x7AD, 0x80 },
2470 { 0x22, 0x7A6, 0x84 },
2471 { 0x22, 0x7A7, 0xCA },
2472 { 0x22, 0x7A8, 0xF1 },
2473 { 0x22, 0x7A9, 0x84 },
2474 { 0x22, 0x7AA, 0xCA },
2475 { 0x22, 0x7AB, 0xF1 },
2476 { 0x22, 0x7AC, 0x20 },
2477 { 0x22, 0x7AD, 0x80 },
2478 { 0x22, 0x7A6, 0x3C },
2479 { 0x22, 0x7A7, 0xD5 },
2480 { 0x22, 0x7A8, 0x9C },
2481 { 0x22, 0x7A9, 0x3C },
2482 { 0x22, 0x7AA, 0xD5 },
2483 { 0x22, 0x7AB, 0x9C },
2484 { 0x22, 0x7AC, 0x21 },
2485 { 0x22, 0x7AD, 0x80 },
2486 { 0x22, 0x7A6, 0x7B },
2487 { 0x22, 0x7A7, 0x35 },
2488 { 0x22, 0x7A8, 0x0F },
2489 { 0x22, 0x7A9, 0x7B },
2490 { 0x22, 0x7AA, 0x35 },
2491 { 0x22, 0x7AB, 0x0F },
2492 { 0x22, 0x7AC, 0x22 },
2493 { 0x22, 0x7AD, 0x80 },
2494 { 0x22, 0x7A6, 0xC4 },
2495 { 0x22, 0x7A7, 0x87 },
2496 { 0x22, 0x7A8, 0x45 },
2497 { 0x22, 0x7A9, 0xC4 },
2498 { 0x22, 0x7AA, 0x87 },
2499 { 0x22, 0x7AB, 0x45 },
2500 { 0x22, 0x7AC, 0x23 },
2501 { 0x22, 0x7AD, 0x80 },
2502 { 0x22, 0x7A6, 0x3E },
2503 { 0x22, 0x7A7, 0x0A },
2504 { 0x22, 0x7A8, 0x78 },
2505 { 0x22, 0x7A9, 0x3E },
2506 { 0x22, 0x7AA, 0x0A },
2507 { 0x22, 0x7AB, 0x78 },
2508 { 0x22, 0x7AC, 0x24 },
2509 { 0x22, 0x7AD, 0x80 },
2510 { 0x22, 0x7A6, 0x88 },
2511 { 0x22, 0x7A7, 0xE2 },
2512 { 0x22, 0x7A8, 0x05 },
2513 { 0x22, 0x7A9, 0x88 },
2514 { 0x22, 0x7AA, 0xE2 },
2515 { 0x22, 0x7AB, 0x05 },
2516 { 0x22, 0x7AC, 0x25 },
2517 { 0x22, 0x7AD, 0x80 },
2518 { 0x22, 0x7A6, 0x3A },
2519 { 0x22, 0x7A7, 0x1A },
2520 { 0x22, 0x7A8, 0xA3 },
2521 { 0x22, 0x7A9, 0x3A },
2522 { 0x22, 0x7AA, 0x1A },
2523 { 0x22, 0x7AB, 0xA3 },
2524 { 0x22, 0x7AC, 0x26 },
2525 { 0x22, 0x7AD, 0x80 },
2526 { 0x22, 0x7A6, 0x77 },
2527 { 0x22, 0x7A7, 0x1D },
2528 { 0x22, 0x7A8, 0xFB },
2529 { 0x22, 0x7A9, 0x77 },
2530 { 0x22, 0x7AA, 0x1D },
2531 { 0x22, 0x7AB, 0xFB },
2532 { 0x22, 0x7AC, 0x27 },
2533 { 0x22, 0x7AD, 0x80 },
2534 { 0x22, 0x7A6, 0xC7 },
2535 { 0x22, 0x7A7, 0xDA },
2536 { 0x22, 0x7A8, 0xE5 },
2537 { 0x22, 0x7A9, 0xC7 },
2538 { 0x22, 0x7AA, 0xDA },
2539 { 0x22, 0x7AB, 0xE5 },
2540 { 0x22, 0x7AC, 0x28 },
2541 { 0x22, 0x7AD, 0x80 },
2542 { 0x22, 0x7A6, 0x40 },
2543 { 0x22, 0x7A7, 0x00 },
2544 { 0x22, 0x7A8, 0x00 },
2545 { 0x22, 0x7A9, 0x40 },
2546 { 0x22, 0x7AA, 0x00 },
2547 { 0x22, 0x7AB, 0x00 },
2548 { 0x22, 0x7AC, 0x29 },
2549 { 0x22, 0x7AD, 0x80 },
2550 { 0x22, 0x7A6, 0x8E },
2551 { 0x22, 0x7A7, 0xD7 },
2552 { 0x22, 0x7A8, 0x22 },
2553 { 0x22, 0x7A9, 0x8E },
2554 { 0x22, 0x7AA, 0xD7 },
2555 { 0x22, 0x7AB, 0x22 },
2556 { 0x22, 0x7AC, 0x2A },
2557 { 0x22, 0x7AD, 0x80 },
2558 { 0x22, 0x7A6, 0x35 },
2559 { 0x22, 0x7A7, 0x26 },
2560 { 0x22, 0x7A8, 0xC6 },
2561 { 0x22, 0x7A9, 0x35 },
2562 { 0x22, 0x7AA, 0x26 },
2563 { 0x22, 0x7AB, 0xC6 },
2564 { 0x22, 0x7AC, 0x2B },
2565 { 0x22, 0x7AD, 0x80 },
2566 { 0x22, 0x7A6, 0x71 },
2567 { 0x22, 0x7A7, 0x28 },
2568 { 0x22, 0x7A8, 0xDE },
2569 { 0x22, 0x7A9, 0x71 },
2570 { 0x22, 0x7AA, 0x28 },
2571 { 0x22, 0x7AB, 0xDE },
2572 { 0x22, 0x7AC, 0x2C },
2573 { 0x22, 0x7AD, 0x80 },
2574 { 0x22, 0x7A6, 0xCA },
2575 { 0x22, 0x7A7, 0xD9 },
2576 { 0x22, 0x7A8, 0x3A },
2577 { 0x22, 0x7A9, 0xCA },
2578 { 0x22, 0x7AA, 0xD9 },
2579 { 0x22, 0x7AB, 0x3A },
2580 { 0x22, 0x7AC, 0x2D },
2581 { 0x22, 0x7AD, 0x80 },
2582 { 0x22, 0x7A6, 0x40 },
2583 { 0x22, 0x7A7, 0x00 },
2584 { 0x22, 0x7A8, 0x00 },
2585 { 0x22, 0x7A9, 0x40 },
2586 { 0x22, 0x7AA, 0x00 },
2587 { 0x22, 0x7AB, 0x00 },
2588 { 0x22, 0x7AC, 0x2E },
2589 { 0x22, 0x7AD, 0x80 },
2590 { 0x22, 0x7A6, 0x93 },
2591 { 0x22, 0x7A7, 0x5E },
2592 { 0x22, 0x7A8, 0xD8 },
2593 { 0x22, 0x7A9, 0x93 },
2594 { 0x22, 0x7AA, 0x5E },
2595 { 0x22, 0x7AB, 0xD8 },
2596 { 0x22, 0x7AC, 0x2F },
2597 { 0x22, 0x7AD, 0x80 },
2598 { 0x22, 0x7A6, 0x32 },
2599 { 0x22, 0x7A7, 0xB7 },
2600 { 0x22, 0x7A8, 0xB1 },
2601 { 0x22, 0x7A9, 0x32 },
2602 { 0x22, 0x7AA, 0xB7 },
2603 { 0x22, 0x7AB, 0xB1 },
2604 { 0x22, 0x7AC, 0x30 },
2605 { 0x22, 0x7AD, 0x80 },
2606 { 0x22, 0x7A6, 0x6C },
2607 { 0x22, 0x7A7, 0xA1 },
2608 { 0x22, 0x7A8, 0x28 },
2609 { 0x22, 0x7A9, 0x6C },
2610 { 0x22, 0x7AA, 0xA1 },
2611 { 0x22, 0x7AB, 0x28 },
2612 { 0x22, 0x7AC, 0x31 },
2613 { 0x22, 0x7AD, 0x80 },
2614 { 0x22, 0x7A6, 0xCD },
2615 { 0x22, 0x7A7, 0x48 },
2616 { 0x22, 0x7A8, 0x4F },
2617 { 0x22, 0x7A9, 0xCD },
2618 { 0x22, 0x7AA, 0x48 },
2619 { 0x22, 0x7AB, 0x4F },
2620 { 0x22, 0x7AC, 0x32 },
2621 { 0x22, 0x7AD, 0x80 },
2622 { 0x22, 0x7A6, 0x40 },
2623 { 0x22, 0x7A7, 0x00 },
2624 { 0x22, 0x7A8, 0x00 },
2625 { 0x22, 0x7A9, 0x40 },
2626 { 0x22, 0x7AA, 0x00 },
2627 { 0x22, 0x7AB, 0x00 },
2628 { 0x22, 0x7AC, 0x33 },
2629 { 0x22, 0x7AD, 0x80 },
2630 /* common */
2631 { 0x22, 0x782, 0xC1 },
2632 { 0x22, 0x771, 0x2C },
2633 { 0x22, 0x772, 0x2C },
2634 { 0x22, 0x788, 0x04 },
2635 { 0x01, 0x7B0, 0x08 },
2636 {}
2637};
2638
2639static const struct hda_fixup stac92hd83xxx_fixups[] = {
2640 [STAC_92HD83XXX_REF] = {
2641 .type = HDA_FIXUP_PINS,
2642 .v.pins = ref92hd83xxx_pin_configs,
2643 },
2644 [STAC_92HD83XXX_PWR_REF] = {
2645 .type = HDA_FIXUP_PINS,
2646 .v.pins = ref92hd83xxx_pin_configs,
2647 },
2648 [STAC_DELL_S14] = {
2649 .type = HDA_FIXUP_PINS,
2650 .v.pins = dell_s14_pin_configs,
2651 },
2652 [STAC_DELL_VOSTRO_3500] = {
2653 .type = HDA_FIXUP_PINS,
2654 .v.pins = dell_vostro_3500_pin_configs,
2655 },
2656 [STAC_92HD83XXX_HP_cNB11_INTQUAD] = {
2657 .type = HDA_FIXUP_PINS,
2658 .v.pins = hp_cNB11_intquad_pin_configs,
2659 .chained = true,
2660 .chain_id = STAC_92HD83XXX_HP,
2661 },
2662 [STAC_92HD83XXX_HP] = {
2663 .type = HDA_FIXUP_FUNC,
2664 .v.func = stac92hd83xxx_fixup_hp,
2665 },
2666 [STAC_HP_DV7_4000] = {
2667 .type = HDA_FIXUP_PINS,
2668 .v.pins = hp_dv7_4000_pin_configs,
2669 .chained = true,
2670 .chain_id = STAC_92HD83XXX_HP,
2671 },
2672 [STAC_HP_ZEPHYR] = {
2673 .type = HDA_FIXUP_FUNC,
2674 .v.func = stac92hd83xxx_fixup_hp_zephyr,
2675 .chained = true,
2676 .chain_id = STAC_92HD83XXX_HP,
2677 },
2678 [STAC_92HD83XXX_HP_LED] = {
2679 .type = HDA_FIXUP_FUNC,
2680 .v.func = stac92hd83xxx_fixup_hp_led,
2681 .chained = true,
2682 .chain_id = STAC_92HD83XXX_HP,
2683 },
2684 [STAC_92HD83XXX_HP_INV_LED] = {
2685 .type = HDA_FIXUP_FUNC,
2686 .v.func = stac92hd83xxx_fixup_hp_inv_led,
2687 .chained = true,
2688 .chain_id = STAC_92HD83XXX_HP,
2689 },
2690 [STAC_92HD83XXX_HP_MIC_LED] = {
2691 .type = HDA_FIXUP_FUNC,
2692 .v.func = stac92hd83xxx_fixup_hp_mic_led,
2693 .chained = true,
2694 .chain_id = STAC_92HD83XXX_HP,
2695 },
2696 [STAC_HP_LED_GPIO10] = {
2697 .type = HDA_FIXUP_FUNC,
2698 .v.func = stac92hd83xxx_fixup_hp_led_gpio10,
2699 .chained = true,
2700 .chain_id = STAC_92HD83XXX_HP,
2701 },
2702 [STAC_92HD83XXX_HEADSET_JACK] = {
2703 .type = HDA_FIXUP_FUNC,
2704 .v.func = stac92hd83xxx_fixup_headset_jack,
2705 },
2706 [STAC_HP_ENVY_BASS] = {
2707 .type = HDA_FIXUP_PINS,
2708 .v.pins = (const struct hda_pintbl[]) {
2709 { 0x0f, 0x90170111 },
2710 {}
2711 },
2712 },
2713 [STAC_HP_BNB13_EQ] = {
2714 .type = HDA_FIXUP_VERBS,
2715 .v.verbs = hp_bnb13_eq_verbs,
2716 .chained = true,
2717 .chain_id = STAC_92HD83XXX_HP_MIC_LED,
2718 },
2719 [STAC_HP_ENVY_TS_BASS] = {
2720 .type = HDA_FIXUP_PINS,
2721 .v.pins = (const struct hda_pintbl[]) {
2722 { 0x10, 0x92170111 },
2723 {}
2724 },
2725 },
2726 [STAC_HP_ENVY_TS_DAC_BIND] = {
2727 .type = HDA_FIXUP_FUNC,
2728 .v.func = hp_envy_ts_fixup_dac_bind,
2729 .chained = true,
2730 .chain_id = STAC_HP_ENVY_TS_BASS,
2731 },
2732 [STAC_92HD83XXX_GPIO10_EAPD] = {
2733 .type = HDA_FIXUP_FUNC,
2734 .v.func = stac92hd83xxx_fixup_gpio10_eapd,
2735 },
2736};
2737
2738static const struct hda_model_fixup stac92hd83xxx_models[] = {
2739 { .id = STAC_92HD83XXX_REF, .name = "ref" },
2740 { .id = STAC_92HD83XXX_PWR_REF, .name = "mic-ref" },
2741 { .id = STAC_DELL_S14, .name = "dell-s14" },
2742 { .id = STAC_DELL_VOSTRO_3500, .name = "dell-vostro-3500" },
2743 { .id = STAC_92HD83XXX_HP_cNB11_INTQUAD, .name = "hp_cNB11_intquad" },
2744 { .id = STAC_HP_DV7_4000, .name = "hp-dv7-4000" },
2745 { .id = STAC_HP_ZEPHYR, .name = "hp-zephyr" },
2746 { .id = STAC_92HD83XXX_HP_LED, .name = "hp-led" },
2747 { .id = STAC_92HD83XXX_HP_INV_LED, .name = "hp-inv-led" },
2748 { .id = STAC_92HD83XXX_HP_MIC_LED, .name = "hp-mic-led" },
2749 { .id = STAC_92HD83XXX_HEADSET_JACK, .name = "headset-jack" },
2750 { .id = STAC_HP_ENVY_BASS, .name = "hp-envy-bass" },
2751 { .id = STAC_HP_BNB13_EQ, .name = "hp-bnb13-eq" },
2752 { .id = STAC_HP_ENVY_TS_BASS, .name = "hp-envy-ts-bass" },
2753 {}
2754};
2755
2756static const struct hda_quirk stac92hd83xxx_fixup_tbl[] = {
2757 /* SigmaTel reference board */
2758 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
2759 "DFI LanParty", STAC_92HD83XXX_REF),
2760 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
2761 "DFI LanParty", STAC_92HD83XXX_REF),
2762 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ba,
2763 "unknown Dell", STAC_DELL_S14),
2764 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0532,
2765 "Dell Latitude E6230", STAC_92HD83XXX_HEADSET_JACK),
2766 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0533,
2767 "Dell Latitude E6330", STAC_92HD83XXX_HEADSET_JACK),
2768 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0534,
2769 "Dell Latitude E6430", STAC_92HD83XXX_HEADSET_JACK),
2770 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0535,
2771 "Dell Latitude E6530", STAC_92HD83XXX_HEADSET_JACK),
2772 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x053c,
2773 "Dell Latitude E5430", STAC_92HD83XXX_HEADSET_JACK),
2774 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x053d,
2775 "Dell Latitude E5530", STAC_92HD83XXX_HEADSET_JACK),
2776 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0549,
2777 "Dell Latitude E5430", STAC_92HD83XXX_HEADSET_JACK),
2778 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x057d,
2779 "Dell Latitude E6430s", STAC_92HD83XXX_HEADSET_JACK),
2780 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0584,
2781 "Dell Latitude E6430U", STAC_92HD83XXX_HEADSET_JACK),
2782 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x1028,
2783 "Dell Vostro 3500", STAC_DELL_VOSTRO_3500),
2784 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1656,
2785 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2786 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1657,
2787 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2788 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1658,
2789 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2790 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1659,
2791 "HP Pavilion dv7", STAC_HP_DV7_4000),
2792 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x165A,
2793 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2794 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x165B,
2795 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2796 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1888,
2797 "HP Envy Spectre", STAC_HP_ENVY_BASS),
2798 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1899,
2799 "HP Folio 13", STAC_HP_LED_GPIO10),
2800 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x18df,
2801 "HP Folio", STAC_HP_BNB13_EQ),
2802 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x18F8,
2803 "HP bNB13", STAC_HP_BNB13_EQ),
2804 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1909,
2805 "HP bNB13", STAC_HP_BNB13_EQ),
2806 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x190A,
2807 "HP bNB13", STAC_HP_BNB13_EQ),
2808 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x190e,
2809 "HP ENVY TS", STAC_HP_ENVY_TS_BASS),
2810 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1967,
2811 "HP ENVY TS", STAC_HP_ENVY_TS_DAC_BIND),
2812 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1940,
2813 "HP bNB13", STAC_HP_BNB13_EQ),
2814 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1941,
2815 "HP bNB13", STAC_HP_BNB13_EQ),
2816 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1942,
2817 "HP bNB13", STAC_HP_BNB13_EQ),
2818 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1943,
2819 "HP bNB13", STAC_HP_BNB13_EQ),
2820 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1944,
2821 "HP bNB13", STAC_HP_BNB13_EQ),
2822 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1945,
2823 "HP bNB13", STAC_HP_BNB13_EQ),
2824 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1946,
2825 "HP bNB13", STAC_HP_BNB13_EQ),
2826 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1948,
2827 "HP bNB13", STAC_HP_BNB13_EQ),
2828 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1949,
2829 "HP bNB13", STAC_HP_BNB13_EQ),
2830 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x194A,
2831 "HP bNB13", STAC_HP_BNB13_EQ),
2832 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x194B,
2833 "HP bNB13", STAC_HP_BNB13_EQ),
2834 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x194C,
2835 "HP bNB13", STAC_HP_BNB13_EQ),
2836 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x194E,
2837 "HP bNB13", STAC_HP_BNB13_EQ),
2838 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x194F,
2839 "HP bNB13", STAC_HP_BNB13_EQ),
2840 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1950,
2841 "HP bNB13", STAC_HP_BNB13_EQ),
2842 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1951,
2843 "HP bNB13", STAC_HP_BNB13_EQ),
2844 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x195A,
2845 "HP bNB13", STAC_HP_BNB13_EQ),
2846 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x195B,
2847 "HP bNB13", STAC_HP_BNB13_EQ),
2848 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x195C,
2849 "HP bNB13", STAC_HP_BNB13_EQ),
2850 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1991,
2851 "HP bNB13", STAC_HP_BNB13_EQ),
2852 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2103,
2853 "HP bNB13", STAC_HP_BNB13_EQ),
2854 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2104,
2855 "HP bNB13", STAC_HP_BNB13_EQ),
2856 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2105,
2857 "HP bNB13", STAC_HP_BNB13_EQ),
2858 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2106,
2859 "HP bNB13", STAC_HP_BNB13_EQ),
2860 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2107,
2861 "HP bNB13", STAC_HP_BNB13_EQ),
2862 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2108,
2863 "HP bNB13", STAC_HP_BNB13_EQ),
2864 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2109,
2865 "HP bNB13", STAC_HP_BNB13_EQ),
2866 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x210A,
2867 "HP bNB13", STAC_HP_BNB13_EQ),
2868 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x210B,
2869 "HP bNB13", STAC_HP_BNB13_EQ),
2870 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x211C,
2871 "HP bNB13", STAC_HP_BNB13_EQ),
2872 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x211D,
2873 "HP bNB13", STAC_HP_BNB13_EQ),
2874 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x211E,
2875 "HP bNB13", STAC_HP_BNB13_EQ),
2876 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x211F,
2877 "HP bNB13", STAC_HP_BNB13_EQ),
2878 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2120,
2879 "HP bNB13", STAC_HP_BNB13_EQ),
2880 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2121,
2881 "HP bNB13", STAC_HP_BNB13_EQ),
2882 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2122,
2883 "HP bNB13", STAC_HP_BNB13_EQ),
2884 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2123,
2885 "HP bNB13", STAC_HP_BNB13_EQ),
2886 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x213E,
2887 "HP bNB13", STAC_HP_BNB13_EQ),
2888 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x213F,
2889 "HP bNB13", STAC_HP_BNB13_EQ),
2890 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2140,
2891 "HP bNB13", STAC_HP_BNB13_EQ),
2892 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x21B2,
2893 "HP bNB13", STAC_HP_BNB13_EQ),
2894 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x21B3,
2895 "HP bNB13", STAC_HP_BNB13_EQ),
2896 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x21B5,
2897 "HP bNB13", STAC_HP_BNB13_EQ),
2898 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x21B6,
2899 "HP bNB13", STAC_HP_BNB13_EQ),
2900 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xff00, 0x1900,
2901 "HP", STAC_92HD83XXX_HP_MIC_LED),
2902 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xff00, 0x2000,
2903 "HP", STAC_92HD83XXX_HP_MIC_LED),
2904 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xff00, 0x2100,
2905 "HP", STAC_92HD83XXX_HP_MIC_LED),
2906 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3388,
2907 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2908 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3389,
2909 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2910 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355B,
2911 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2912 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355C,
2913 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2914 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355D,
2915 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2916 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355E,
2917 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2918 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355F,
2919 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2920 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3560,
2921 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2922 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x358B,
2923 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2924 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x358C,
2925 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2926 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x358D,
2927 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2928 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3591,
2929 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2930 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3592,
2931 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2932 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3593,
2933 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2934 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3561,
2935 "HP", STAC_HP_ZEPHYR),
2936 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3660,
2937 "HP Mini", STAC_92HD83XXX_HP_LED),
2938 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x144E,
2939 "HP Pavilion dv5", STAC_92HD83XXX_HP_INV_LED),
2940 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x148a,
2941 "HP Mini", STAC_92HD83XXX_HP_LED),
2942 SND_PCI_QUIRK_VENDOR(PCI_VENDOR_ID_HP, "HP", STAC_92HD83XXX_HP),
2943 /* match both for 0xfa91 and 0xfa93 */
2944 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_TOSHIBA, 0xfffd, 0xfa91,
2945 "Toshiba Satellite S50D", STAC_92HD83XXX_GPIO10_EAPD),
2946 {} /* terminator */
2947};
2948
2949/* HP dv7 bass switch - GPIO5 */
2950#define stac_hp_bass_gpio_info snd_ctl_boolean_mono_info
2951static int stac_hp_bass_gpio_get(struct snd_kcontrol *kcontrol,
2952 struct snd_ctl_elem_value *ucontrol)
2953{
2954 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2955 struct sigmatel_spec *spec = codec->spec;
2956 ucontrol->value.integer.value[0] = !!(spec->gpio_data & 0x20);
2957 return 0;
2958}
2959
2960static int stac_hp_bass_gpio_put(struct snd_kcontrol *kcontrol,
2961 struct snd_ctl_elem_value *ucontrol)
2962{
2963 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2964 struct sigmatel_spec *spec = codec->spec;
2965 unsigned int gpio_data;
2966
2967 gpio_data = (spec->gpio_data & ~0x20) |
2968 (ucontrol->value.integer.value[0] ? 0x20 : 0);
2969 if (gpio_data == spec->gpio_data)
2970 return 0;
2971 spec->gpio_data = gpio_data;
2972 stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, spec->gpio_data);
2973 return 1;
2974}
2975
2976static const struct snd_kcontrol_new stac_hp_bass_sw_ctrl = {
2977 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2978 .info = stac_hp_bass_gpio_info,
2979 .get = stac_hp_bass_gpio_get,
2980 .put = stac_hp_bass_gpio_put,
2981};
2982
2983static int stac_add_hp_bass_switch(struct hda_codec *codec)
2984{
2985 struct sigmatel_spec *spec = codec->spec;
2986
2987 if (!snd_hda_gen_add_kctl(&spec->gen, "Bass Speaker Playback Switch",
2988 &stac_hp_bass_sw_ctrl))
2989 return -ENOMEM;
2990
2991 spec->gpio_mask |= 0x20;
2992 spec->gpio_dir |= 0x20;
2993 spec->gpio_data |= 0x20;
2994 return 0;
2995}
2996
2997static const struct hda_pintbl ref92hd71bxx_pin_configs[] = {
2998 { 0x0a, 0x02214030 },
2999 { 0x0b, 0x02a19040 },
3000 { 0x0c, 0x01a19020 },
3001 { 0x0d, 0x01014010 },
3002 { 0x0e, 0x0181302e },
3003 { 0x0f, 0x01014010 },
3004 { 0x14, 0x01019020 },
3005 { 0x18, 0x90a000f0 },
3006 { 0x19, 0x90a000f0 },
3007 { 0x1e, 0x01452050 },
3008 { 0x1f, 0x01452050 },
3009 {}
3010};
3011
3012static const struct hda_pintbl dell_m4_1_pin_configs[] = {
3013 { 0x0a, 0x0421101f },
3014 { 0x0b, 0x04a11221 },
3015 { 0x0c, 0x40f000f0 },
3016 { 0x0d, 0x90170110 },
3017 { 0x0e, 0x23a1902e },
3018 { 0x0f, 0x23014250 },
3019 { 0x14, 0x40f000f0 },
3020 { 0x18, 0x90a000f0 },
3021 { 0x19, 0x40f000f0 },
3022 { 0x1e, 0x4f0000f0 },
3023 { 0x1f, 0x4f0000f0 },
3024 {}
3025};
3026
3027static const struct hda_pintbl dell_m4_2_pin_configs[] = {
3028 { 0x0a, 0x0421101f },
3029 { 0x0b, 0x04a11221 },
3030 { 0x0c, 0x90a70330 },
3031 { 0x0d, 0x90170110 },
3032 { 0x0e, 0x23a1902e },
3033 { 0x0f, 0x23014250 },
3034 { 0x14, 0x40f000f0 },
3035 { 0x18, 0x40f000f0 },
3036 { 0x19, 0x40f000f0 },
3037 { 0x1e, 0x044413b0 },
3038 { 0x1f, 0x044413b0 },
3039 {}
3040};
3041
3042static const struct hda_pintbl dell_m4_3_pin_configs[] = {
3043 { 0x0a, 0x0421101f },
3044 { 0x0b, 0x04a11221 },
3045 { 0x0c, 0x90a70330 },
3046 { 0x0d, 0x90170110 },
3047 { 0x0e, 0x40f000f0 },
3048 { 0x0f, 0x40f000f0 },
3049 { 0x14, 0x40f000f0 },
3050 { 0x18, 0x90a000f0 },
3051 { 0x19, 0x40f000f0 },
3052 { 0x1e, 0x044413b0 },
3053 { 0x1f, 0x044413b0 },
3054 {}
3055};
3056
3057static void stac92hd71bxx_fixup_ref(struct hda_codec *codec,
3058 const struct hda_fixup *fix, int action)
3059{
3060 struct sigmatel_spec *spec = codec->spec;
3061
3062 if (action != HDA_FIXUP_ACT_PRE_PROBE)
3063 return;
3064
3065 snd_hda_apply_pincfgs(codec, ref92hd71bxx_pin_configs);
3066 spec->gpio_mask = spec->gpio_dir = spec->gpio_data = 0;
3067}
3068
3069static void stac92hd71bxx_fixup_hp_m4(struct hda_codec *codec,
3070 const struct hda_fixup *fix, int action)
3071{
3072 struct sigmatel_spec *spec = codec->spec;
3073 struct hda_jack_callback *jack;
3074
3075 if (action != HDA_FIXUP_ACT_PRE_PROBE)
3076 return;
3077
3078 /* Enable VREF power saving on GPIO1 detect */
3079 snd_hda_codec_write_cache(codec, codec->core.afg, 0,
3080 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x02);
3081 jack = snd_hda_jack_detect_enable_callback(codec, codec->core.afg,
3082 stac_vref_event);
3083 if (!IS_ERR(jack))
3084 jack->private_data = 0x02;
3085
3086 spec->gpio_mask |= 0x02;
3087
3088 /* enable internal microphone */
3089 snd_hda_codec_set_pincfg(codec, 0x0e, 0x01813040);
3090}
3091
3092static void stac92hd71bxx_fixup_hp_dv4(struct hda_codec *codec,
3093 const struct hda_fixup *fix, int action)
3094{
3095 struct sigmatel_spec *spec = codec->spec;
3096
3097 if (action != HDA_FIXUP_ACT_PRE_PROBE)
3098 return;
3099 spec->gpio_led = 0x01;
3100}
3101
3102static void stac92hd71bxx_fixup_hp_dv5(struct hda_codec *codec,
3103 const struct hda_fixup *fix, int action)
3104{
3105 unsigned int cap;
3106
3107 switch (action) {
3108 case HDA_FIXUP_ACT_PRE_PROBE:
3109 snd_hda_codec_set_pincfg(codec, 0x0d, 0x90170010);
3110 break;
3111
3112 case HDA_FIXUP_ACT_PROBE:
3113 /* enable bass on HP dv7 */
3114 cap = snd_hda_param_read(codec, 0x1, AC_PAR_GPIO_CAP);
3115 cap &= AC_GPIO_IO_COUNT;
3116 if (cap >= 6)
3117 stac_add_hp_bass_switch(codec);
3118 break;
3119 }
3120}
3121
3122static void stac92hd71bxx_fixup_hp_hdx(struct hda_codec *codec,
3123 const struct hda_fixup *fix, int action)
3124{
3125 struct sigmatel_spec *spec = codec->spec;
3126
3127 if (action != HDA_FIXUP_ACT_PRE_PROBE)
3128 return;
3129 spec->gpio_led = 0x08;
3130}
3131
3132static bool is_hp_output(struct hda_codec *codec, hda_nid_t pin)
3133{
3134 unsigned int pin_cfg = snd_hda_codec_get_pincfg(codec, pin);
3135
3136 /* count line-out, too, as BIOS sets often so */
3137 return get_defcfg_connect(pin_cfg) != AC_JACK_PORT_NONE &&
3138 (get_defcfg_device(pin_cfg) == AC_JACK_LINE_OUT ||
3139 get_defcfg_device(pin_cfg) == AC_JACK_HP_OUT);
3140}
3141
3142static void fixup_hp_headphone(struct hda_codec *codec, hda_nid_t pin)
3143{
3144 unsigned int pin_cfg = snd_hda_codec_get_pincfg(codec, pin);
3145
3146 /* It was changed in the BIOS to just satisfy MS DTM.
3147 * Lets turn it back into follower HP
3148 */
3149 pin_cfg = (pin_cfg & (~AC_DEFCFG_DEVICE)) |
3150 (AC_JACK_HP_OUT << AC_DEFCFG_DEVICE_SHIFT);
3151 pin_cfg = (pin_cfg & (~(AC_DEFCFG_DEF_ASSOC | AC_DEFCFG_SEQUENCE))) |
3152 0x1f;
3153 snd_hda_codec_set_pincfg(codec, pin, pin_cfg);
3154}
3155
3156static void stac92hd71bxx_fixup_hp(struct hda_codec *codec,
3157 const struct hda_fixup *fix, int action)
3158{
3159 struct sigmatel_spec *spec = codec->spec;
3160
3161 if (action != HDA_FIXUP_ACT_PRE_PROBE)
3162 return;
3163
3164 /* when both output A and F are assigned, these are supposedly
3165 * dock and built-in headphones; fix both pin configs
3166 */
3167 if (is_hp_output(codec, 0x0a) && is_hp_output(codec, 0x0f)) {
3168 fixup_hp_headphone(codec, 0x0a);
3169 fixup_hp_headphone(codec, 0x0f);
3170 }
3171
3172 if (find_mute_led_cfg(codec, 1))
3173 codec_dbg(codec, "mute LED gpio %d polarity %d\n",
3174 spec->gpio_led,
3175 spec->gpio_led_polarity);
3176
3177}
3178
3179static const struct hda_fixup stac92hd71bxx_fixups[] = {
3180 [STAC_92HD71BXX_REF] = {
3181 .type = HDA_FIXUP_FUNC,
3182 .v.func = stac92hd71bxx_fixup_ref,
3183 },
3184 [STAC_DELL_M4_1] = {
3185 .type = HDA_FIXUP_PINS,
3186 .v.pins = dell_m4_1_pin_configs,
3187 },
3188 [STAC_DELL_M4_2] = {
3189 .type = HDA_FIXUP_PINS,
3190 .v.pins = dell_m4_2_pin_configs,
3191 },
3192 [STAC_DELL_M4_3] = {
3193 .type = HDA_FIXUP_PINS,
3194 .v.pins = dell_m4_3_pin_configs,
3195 },
3196 [STAC_HP_M4] = {
3197 .type = HDA_FIXUP_FUNC,
3198 .v.func = stac92hd71bxx_fixup_hp_m4,
3199 .chained = true,
3200 .chain_id = STAC_92HD71BXX_HP,
3201 },
3202 [STAC_HP_DV4] = {
3203 .type = HDA_FIXUP_FUNC,
3204 .v.func = stac92hd71bxx_fixup_hp_dv4,
3205 .chained = true,
3206 .chain_id = STAC_HP_DV5,
3207 },
3208 [STAC_HP_DV5] = {
3209 .type = HDA_FIXUP_FUNC,
3210 .v.func = stac92hd71bxx_fixup_hp_dv5,
3211 .chained = true,
3212 .chain_id = STAC_92HD71BXX_HP,
3213 },
3214 [STAC_HP_HDX] = {
3215 .type = HDA_FIXUP_FUNC,
3216 .v.func = stac92hd71bxx_fixup_hp_hdx,
3217 .chained = true,
3218 .chain_id = STAC_92HD71BXX_HP,
3219 },
3220 [STAC_92HD71BXX_HP] = {
3221 .type = HDA_FIXUP_FUNC,
3222 .v.func = stac92hd71bxx_fixup_hp,
3223 },
3224};
3225
3226static const struct hda_model_fixup stac92hd71bxx_models[] = {
3227 { .id = STAC_92HD71BXX_REF, .name = "ref" },
3228 { .id = STAC_DELL_M4_1, .name = "dell-m4-1" },
3229 { .id = STAC_DELL_M4_2, .name = "dell-m4-2" },
3230 { .id = STAC_DELL_M4_3, .name = "dell-m4-3" },
3231 { .id = STAC_HP_M4, .name = "hp-m4" },
3232 { .id = STAC_HP_DV4, .name = "hp-dv4" },
3233 { .id = STAC_HP_DV5, .name = "hp-dv5" },
3234 { .id = STAC_HP_HDX, .name = "hp-hdx" },
3235 { .id = STAC_HP_DV4, .name = "hp-dv4-1222nr" },
3236 {}
3237};
3238
3239static const struct hda_quirk stac92hd71bxx_fixup_tbl[] = {
3240 /* SigmaTel reference board */
3241 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
3242 "DFI LanParty", STAC_92HD71BXX_REF),
3243 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
3244 "DFI LanParty", STAC_92HD71BXX_REF),
3245 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x1720,
3246 "HP", STAC_HP_DV5),
3247 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3080,
3248 "HP", STAC_HP_DV5),
3249 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x30f0,
3250 "HP dv4-7", STAC_HP_DV4),
3251 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3600,
3252 "HP dv4-7", STAC_HP_DV5),
3253 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3610,
3254 "HP HDX", STAC_HP_HDX), /* HDX18 */
3255 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x361a,
3256 "HP mini 1000", STAC_HP_M4),
3257 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x361b,
3258 "HP HDX", STAC_HP_HDX), /* HDX16 */
3259 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3620,
3260 "HP dv6", STAC_HP_DV5),
3261 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3061,
3262 "HP dv6", STAC_HP_DV5), /* HP dv6-1110ax */
3263 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x363e,
3264 "HP DV6", STAC_HP_DV5),
3265 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x7010,
3266 "HP", STAC_HP_DV5),
3267 SND_PCI_QUIRK_VENDOR(PCI_VENDOR_ID_HP, "HP", STAC_92HD71BXX_HP),
3268 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0233,
3269 "unknown Dell", STAC_DELL_M4_1),
3270 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0234,
3271 "unknown Dell", STAC_DELL_M4_1),
3272 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0250,
3273 "unknown Dell", STAC_DELL_M4_1),
3274 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024f,
3275 "unknown Dell", STAC_DELL_M4_1),
3276 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024d,
3277 "unknown Dell", STAC_DELL_M4_1),
3278 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0251,
3279 "unknown Dell", STAC_DELL_M4_1),
3280 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0277,
3281 "unknown Dell", STAC_DELL_M4_1),
3282 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0263,
3283 "unknown Dell", STAC_DELL_M4_2),
3284 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0265,
3285 "unknown Dell", STAC_DELL_M4_2),
3286 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0262,
3287 "unknown Dell", STAC_DELL_M4_2),
3288 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0264,
3289 "unknown Dell", STAC_DELL_M4_2),
3290 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02aa,
3291 "unknown Dell", STAC_DELL_M4_3),
3292 {} /* terminator */
3293};
3294
3295static const struct hda_pintbl ref922x_pin_configs[] = {
3296 { 0x0a, 0x01014010 },
3297 { 0x0b, 0x01016011 },
3298 { 0x0c, 0x01012012 },
3299 { 0x0d, 0x0221401f },
3300 { 0x0e, 0x01813122 },
3301 { 0x0f, 0x01011014 },
3302 { 0x10, 0x01441030 },
3303 { 0x11, 0x01c41030 },
3304 { 0x15, 0x40000100 },
3305 { 0x1b, 0x40000100 },
3306 {}
3307};
3308
3309/*
3310 STAC 922X pin configs for
3311 102801A7
3312 102801AB
3313 102801A9
3314 102801D1
3315 102801D2
3316*/
3317static const struct hda_pintbl dell_922x_d81_pin_configs[] = {
3318 { 0x0a, 0x02214030 },
3319 { 0x0b, 0x01a19021 },
3320 { 0x0c, 0x01111012 },
3321 { 0x0d, 0x01114010 },
3322 { 0x0e, 0x02a19020 },
3323 { 0x0f, 0x01117011 },
3324 { 0x10, 0x400001f0 },
3325 { 0x11, 0x400001f1 },
3326 { 0x15, 0x01813122 },
3327 { 0x1b, 0x400001f2 },
3328 {}
3329};
3330
3331/*
3332 STAC 922X pin configs for
3333 102801AC
3334 102801D0
3335*/
3336static const struct hda_pintbl dell_922x_d82_pin_configs[] = {
3337 { 0x0a, 0x02214030 },
3338 { 0x0b, 0x01a19021 },
3339 { 0x0c, 0x01111012 },
3340 { 0x0d, 0x01114010 },
3341 { 0x0e, 0x02a19020 },
3342 { 0x0f, 0x01117011 },
3343 { 0x10, 0x01451140 },
3344 { 0x11, 0x400001f0 },
3345 { 0x15, 0x01813122 },
3346 { 0x1b, 0x400001f1 },
3347 {}
3348};
3349
3350/*
3351 STAC 922X pin configs for
3352 102801BF
3353*/
3354static const struct hda_pintbl dell_922x_m81_pin_configs[] = {
3355 { 0x0a, 0x0321101f },
3356 { 0x0b, 0x01112024 },
3357 { 0x0c, 0x01111222 },
3358 { 0x0d, 0x91174220 },
3359 { 0x0e, 0x03a11050 },
3360 { 0x0f, 0x01116221 },
3361 { 0x10, 0x90a70330 },
3362 { 0x11, 0x01452340 },
3363 { 0x15, 0x40C003f1 },
3364 { 0x1b, 0x405003f0 },
3365 {}
3366};
3367
3368/*
3369 STAC 9221 A1 pin configs for
3370 102801D7 (Dell XPS M1210)
3371*/
3372static const struct hda_pintbl dell_922x_m82_pin_configs[] = {
3373 { 0x0a, 0x02211211 },
3374 { 0x0b, 0x408103ff },
3375 { 0x0c, 0x02a1123e },
3376 { 0x0d, 0x90100310 },
3377 { 0x0e, 0x408003f1 },
3378 { 0x0f, 0x0221121f },
3379 { 0x10, 0x03451340 },
3380 { 0x11, 0x40c003f2 },
3381 { 0x15, 0x508003f3 },
3382 { 0x1b, 0x405003f4 },
3383 {}
3384};
3385
3386static const struct hda_pintbl d945gtp3_pin_configs[] = {
3387 { 0x0a, 0x0221401f },
3388 { 0x0b, 0x01a19022 },
3389 { 0x0c, 0x01813021 },
3390 { 0x0d, 0x01014010 },
3391 { 0x0e, 0x40000100 },
3392 { 0x0f, 0x40000100 },
3393 { 0x10, 0x40000100 },
3394 { 0x11, 0x40000100 },
3395 { 0x15, 0x02a19120 },
3396 { 0x1b, 0x40000100 },
3397 {}
3398};
3399
3400static const struct hda_pintbl d945gtp5_pin_configs[] = {
3401 { 0x0a, 0x0221401f },
3402 { 0x0b, 0x01011012 },
3403 { 0x0c, 0x01813024 },
3404 { 0x0d, 0x01014010 },
3405 { 0x0e, 0x01a19021 },
3406 { 0x0f, 0x01016011 },
3407 { 0x10, 0x01452130 },
3408 { 0x11, 0x40000100 },
3409 { 0x15, 0x02a19320 },
3410 { 0x1b, 0x40000100 },
3411 {}
3412};
3413
3414static const struct hda_pintbl intel_mac_v1_pin_configs[] = {
3415 { 0x0a, 0x0121e21f },
3416 { 0x0b, 0x400000ff },
3417 { 0x0c, 0x9017e110 },
3418 { 0x0d, 0x400000fd },
3419 { 0x0e, 0x400000fe },
3420 { 0x0f, 0x0181e020 },
3421 { 0x10, 0x1145e030 },
3422 { 0x11, 0x11c5e240 },
3423 { 0x15, 0x400000fc },
3424 { 0x1b, 0x400000fb },
3425 {}
3426};
3427
3428static const struct hda_pintbl intel_mac_v2_pin_configs[] = {
3429 { 0x0a, 0x0121e21f },
3430 { 0x0b, 0x90a7012e },
3431 { 0x0c, 0x9017e110 },
3432 { 0x0d, 0x400000fd },
3433 { 0x0e, 0x400000fe },
3434 { 0x0f, 0x0181e020 },
3435 { 0x10, 0x1145e230 },
3436 { 0x11, 0x500000fa },
3437 { 0x15, 0x400000fc },
3438 { 0x1b, 0x400000fb },
3439 {}
3440};
3441
3442static const struct hda_pintbl intel_mac_v3_pin_configs[] = {
3443 { 0x0a, 0x0121e21f },
3444 { 0x0b, 0x90a7012e },
3445 { 0x0c, 0x9017e110 },
3446 { 0x0d, 0x400000fd },
3447 { 0x0e, 0x400000fe },
3448 { 0x0f, 0x0181e020 },
3449 { 0x10, 0x1145e230 },
3450 { 0x11, 0x11c5e240 },
3451 { 0x15, 0x400000fc },
3452 { 0x1b, 0x400000fb },
3453 {}
3454};
3455
3456static const struct hda_pintbl intel_mac_v4_pin_configs[] = {
3457 { 0x0a, 0x0321e21f },
3458 { 0x0b, 0x03a1e02e },
3459 { 0x0c, 0x9017e110 },
3460 { 0x0d, 0x9017e11f },
3461 { 0x0e, 0x400000fe },
3462 { 0x0f, 0x0381e020 },
3463 { 0x10, 0x1345e230 },
3464 { 0x11, 0x13c5e240 },
3465 { 0x15, 0x400000fc },
3466 { 0x1b, 0x400000fb },
3467 {}
3468};
3469
3470static const struct hda_pintbl intel_mac_v5_pin_configs[] = {
3471 { 0x0a, 0x0321e21f },
3472 { 0x0b, 0x03a1e02e },
3473 { 0x0c, 0x9017e110 },
3474 { 0x0d, 0x9017e11f },
3475 { 0x0e, 0x400000fe },
3476 { 0x0f, 0x0381e020 },
3477 { 0x10, 0x1345e230 },
3478 { 0x11, 0x13c5e240 },
3479 { 0x15, 0x400000fc },
3480 { 0x1b, 0x400000fb },
3481 {}
3482};
3483
3484static const struct hda_pintbl ecs202_pin_configs[] = {
3485 { 0x0a, 0x0221401f },
3486 { 0x0b, 0x02a19020 },
3487 { 0x0c, 0x01a19020 },
3488 { 0x0d, 0x01114010 },
3489 { 0x0e, 0x408000f0 },
3490 { 0x0f, 0x01813022 },
3491 { 0x10, 0x074510a0 },
3492 { 0x11, 0x40c400f1 },
3493 { 0x15, 0x9037012e },
3494 { 0x1b, 0x40e000f2 },
3495 {}
3496};
3497
3498/* codec SSIDs for Intel Mac sharing the same PCI SSID 8384:7680 */
3499static const struct hda_quirk stac922x_intel_mac_fixup_tbl[] = {
3500 SND_PCI_QUIRK(0x0000, 0x0100, "Mac Mini", STAC_INTEL_MAC_V3),
3501 SND_PCI_QUIRK(0x106b, 0x0800, "Mac", STAC_INTEL_MAC_V1),
3502 SND_PCI_QUIRK(0x106b, 0x0600, "Mac", STAC_INTEL_MAC_V2),
3503 SND_PCI_QUIRK(0x106b, 0x0700, "Mac", STAC_INTEL_MAC_V2),
3504 SND_PCI_QUIRK(0x106b, 0x0e00, "Mac", STAC_INTEL_MAC_V3),
3505 SND_PCI_QUIRK(0x106b, 0x0f00, "Mac", STAC_INTEL_MAC_V3),
3506 SND_PCI_QUIRK(0x106b, 0x1600, "Mac", STAC_INTEL_MAC_V3),
3507 SND_PCI_QUIRK(0x106b, 0x1700, "Mac", STAC_INTEL_MAC_V3),
3508 SND_PCI_QUIRK(0x106b, 0x0200, "Mac", STAC_INTEL_MAC_V3),
3509 SND_PCI_QUIRK(0x106b, 0x1e00, "Mac", STAC_INTEL_MAC_V3),
3510 SND_PCI_QUIRK(0x106b, 0x1a00, "Mac", STAC_INTEL_MAC_V4),
3511 SND_PCI_QUIRK(0x106b, 0x0a00, "Mac", STAC_INTEL_MAC_V5),
3512 SND_PCI_QUIRK(0x106b, 0x2200, "Mac", STAC_INTEL_MAC_V5),
3513 {}
3514};
3515
3516static const struct hda_fixup stac922x_fixups[];
3517
3518/* remap the fixup from codec SSID and apply it */
3519static void stac922x_fixup_intel_mac_auto(struct hda_codec *codec,
3520 const struct hda_fixup *fix,
3521 int action)
3522{
3523 if (action != HDA_FIXUP_ACT_PRE_PROBE)
3524 return;
3525
3526 codec->fixup_id = HDA_FIXUP_ID_NOT_SET;
3527 snd_hda_pick_fixup(codec, NULL, stac922x_intel_mac_fixup_tbl,
3528 stac922x_fixups);
3529 if (codec->fixup_id != HDA_FIXUP_ID_NOT_SET)
3530 snd_hda_apply_fixup(codec, action);
3531}
3532
3533static void stac922x_fixup_intel_mac_gpio(struct hda_codec *codec,
3534 const struct hda_fixup *fix,
3535 int action)
3536{
3537 struct sigmatel_spec *spec = codec->spec;
3538
3539 if (action == HDA_FIXUP_ACT_PRE_PROBE) {
3540 spec->gpio_mask = spec->gpio_dir = 0x03;
3541 spec->gpio_data = 0x03;
3542 }
3543}
3544
3545static const struct hda_fixup stac922x_fixups[] = {
3546 [STAC_D945_REF] = {
3547 .type = HDA_FIXUP_PINS,
3548 .v.pins = ref922x_pin_configs,
3549 },
3550 [STAC_D945GTP3] = {
3551 .type = HDA_FIXUP_PINS,
3552 .v.pins = d945gtp3_pin_configs,
3553 },
3554 [STAC_D945GTP5] = {
3555 .type = HDA_FIXUP_PINS,
3556 .v.pins = d945gtp5_pin_configs,
3557 },
3558 [STAC_INTEL_MAC_AUTO] = {
3559 .type = HDA_FIXUP_FUNC,
3560 .v.func = stac922x_fixup_intel_mac_auto,
3561 },
3562 [STAC_INTEL_MAC_V1] = {
3563 .type = HDA_FIXUP_PINS,
3564 .v.pins = intel_mac_v1_pin_configs,
3565 .chained = true,
3566 .chain_id = STAC_922X_INTEL_MAC_GPIO,
3567 },
3568 [STAC_INTEL_MAC_V2] = {
3569 .type = HDA_FIXUP_PINS,
3570 .v.pins = intel_mac_v2_pin_configs,
3571 .chained = true,
3572 .chain_id = STAC_922X_INTEL_MAC_GPIO,
3573 },
3574 [STAC_INTEL_MAC_V3] = {
3575 .type = HDA_FIXUP_PINS,
3576 .v.pins = intel_mac_v3_pin_configs,
3577 .chained = true,
3578 .chain_id = STAC_922X_INTEL_MAC_GPIO,
3579 },
3580 [STAC_INTEL_MAC_V4] = {
3581 .type = HDA_FIXUP_PINS,
3582 .v.pins = intel_mac_v4_pin_configs,
3583 .chained = true,
3584 .chain_id = STAC_922X_INTEL_MAC_GPIO,
3585 },
3586 [STAC_INTEL_MAC_V5] = {
3587 .type = HDA_FIXUP_PINS,
3588 .v.pins = intel_mac_v5_pin_configs,
3589 .chained = true,
3590 .chain_id = STAC_922X_INTEL_MAC_GPIO,
3591 },
3592 [STAC_922X_INTEL_MAC_GPIO] = {
3593 .type = HDA_FIXUP_FUNC,
3594 .v.func = stac922x_fixup_intel_mac_gpio,
3595 },
3596 [STAC_ECS_202] = {
3597 .type = HDA_FIXUP_PINS,
3598 .v.pins = ecs202_pin_configs,
3599 },
3600 [STAC_922X_DELL_D81] = {
3601 .type = HDA_FIXUP_PINS,
3602 .v.pins = dell_922x_d81_pin_configs,
3603 },
3604 [STAC_922X_DELL_D82] = {
3605 .type = HDA_FIXUP_PINS,
3606 .v.pins = dell_922x_d82_pin_configs,
3607 },
3608 [STAC_922X_DELL_M81] = {
3609 .type = HDA_FIXUP_PINS,
3610 .v.pins = dell_922x_m81_pin_configs,
3611 },
3612 [STAC_922X_DELL_M82] = {
3613 .type = HDA_FIXUP_PINS,
3614 .v.pins = dell_922x_m82_pin_configs,
3615 },
3616};
3617
3618static const struct hda_model_fixup stac922x_models[] = {
3619 { .id = STAC_D945_REF, .name = "ref" },
3620 { .id = STAC_D945GTP5, .name = "5stack" },
3621 { .id = STAC_D945GTP3, .name = "3stack" },
3622 { .id = STAC_INTEL_MAC_V1, .name = "intel-mac-v1" },
3623 { .id = STAC_INTEL_MAC_V2, .name = "intel-mac-v2" },
3624 { .id = STAC_INTEL_MAC_V3, .name = "intel-mac-v3" },
3625 { .id = STAC_INTEL_MAC_V4, .name = "intel-mac-v4" },
3626 { .id = STAC_INTEL_MAC_V5, .name = "intel-mac-v5" },
3627 { .id = STAC_INTEL_MAC_AUTO, .name = "intel-mac-auto" },
3628 { .id = STAC_ECS_202, .name = "ecs202" },
3629 { .id = STAC_922X_DELL_D81, .name = "dell-d81" },
3630 { .id = STAC_922X_DELL_D82, .name = "dell-d82" },
3631 { .id = STAC_922X_DELL_M81, .name = "dell-m81" },
3632 { .id = STAC_922X_DELL_M82, .name = "dell-m82" },
3633 /* for backward compatibility */
3634 { .id = STAC_INTEL_MAC_V3, .name = "macmini" },
3635 { .id = STAC_INTEL_MAC_V5, .name = "macbook" },
3636 { .id = STAC_INTEL_MAC_V3, .name = "macbook-pro-v1" },
3637 { .id = STAC_INTEL_MAC_V3, .name = "macbook-pro" },
3638 { .id = STAC_INTEL_MAC_V2, .name = "imac-intel" },
3639 { .id = STAC_INTEL_MAC_V3, .name = "imac-intel-20" },
3640 {}
3641};
3642
3643static const struct hda_quirk stac922x_fixup_tbl[] = {
3644 /* SigmaTel reference board */
3645 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
3646 "DFI LanParty", STAC_D945_REF),
3647 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
3648 "DFI LanParty", STAC_D945_REF),
3649 /* Intel 945G based systems */
3650 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0101,
3651 "Intel D945G", STAC_D945GTP3),
3652 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0202,
3653 "Intel D945G", STAC_D945GTP3),
3654 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0606,
3655 "Intel D945G", STAC_D945GTP3),
3656 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0601,
3657 "Intel D945G", STAC_D945GTP3),
3658 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0111,
3659 "Intel D945G", STAC_D945GTP3),
3660 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1115,
3661 "Intel D945G", STAC_D945GTP3),
3662 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1116,
3663 "Intel D945G", STAC_D945GTP3),
3664 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1117,
3665 "Intel D945G", STAC_D945GTP3),
3666 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1118,
3667 "Intel D945G", STAC_D945GTP3),
3668 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1119,
3669 "Intel D945G", STAC_D945GTP3),
3670 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x8826,
3671 "Intel D945G", STAC_D945GTP3),
3672 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5049,
3673 "Intel D945G", STAC_D945GTP3),
3674 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5055,
3675 "Intel D945G", STAC_D945GTP3),
3676 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5048,
3677 "Intel D945G", STAC_D945GTP3),
3678 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0110,
3679 "Intel D945G", STAC_D945GTP3),
3680 /* Intel D945G 5-stack systems */
3681 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0404,
3682 "Intel D945G", STAC_D945GTP5),
3683 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0303,
3684 "Intel D945G", STAC_D945GTP5),
3685 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0013,
3686 "Intel D945G", STAC_D945GTP5),
3687 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0417,
3688 "Intel D945G", STAC_D945GTP5),
3689 /* Intel 945P based systems */
3690 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0b0b,
3691 "Intel D945P", STAC_D945GTP3),
3692 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0112,
3693 "Intel D945P", STAC_D945GTP3),
3694 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0d0d,
3695 "Intel D945P", STAC_D945GTP3),
3696 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0909,
3697 "Intel D945P", STAC_D945GTP3),
3698 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0505,
3699 "Intel D945P", STAC_D945GTP3),
3700 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0707,
3701 "Intel D945P", STAC_D945GTP5),
3702 /* other intel */
3703 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0204,
3704 "Intel D945", STAC_D945_REF),
3705 /* other systems */
3706
3707 /* Apple Intel Mac (Mac Mini, MacBook, MacBook Pro...) */
3708 SND_PCI_QUIRK(0x8384, 0x7680, "Mac", STAC_INTEL_MAC_AUTO),
3709
3710 /* Dell systems */
3711 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a7,
3712 "unknown Dell", STAC_922X_DELL_D81),
3713 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a9,
3714 "unknown Dell", STAC_922X_DELL_D81),
3715 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ab,
3716 "unknown Dell", STAC_922X_DELL_D81),
3717 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ac,
3718 "unknown Dell", STAC_922X_DELL_D82),
3719 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bf,
3720 "unknown Dell", STAC_922X_DELL_M81),
3721 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d0,
3722 "unknown Dell", STAC_922X_DELL_D82),
3723 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d1,
3724 "unknown Dell", STAC_922X_DELL_D81),
3725 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d2,
3726 "unknown Dell", STAC_922X_DELL_D81),
3727 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d7,
3728 "Dell XPS M1210", STAC_922X_DELL_M82),
3729 /* ECS/PC Chips boards */
3730 SND_PCI_QUIRK_MASK(0x1019, 0xf000, 0x2000,
3731 "ECS/PC chips", STAC_ECS_202),
3732 {} /* terminator */
3733};
3734
3735static const struct hda_pintbl ref927x_pin_configs[] = {
3736 { 0x0a, 0x02214020 },
3737 { 0x0b, 0x02a19080 },
3738 { 0x0c, 0x0181304e },
3739 { 0x0d, 0x01014010 },
3740 { 0x0e, 0x01a19040 },
3741 { 0x0f, 0x01011012 },
3742 { 0x10, 0x01016011 },
3743 { 0x11, 0x0101201f },
3744 { 0x12, 0x183301f0 },
3745 { 0x13, 0x18a001f0 },
3746 { 0x14, 0x18a001f0 },
3747 { 0x21, 0x01442070 },
3748 { 0x22, 0x01c42190 },
3749 { 0x23, 0x40000100 },
3750 {}
3751};
3752
3753static const struct hda_pintbl d965_3st_pin_configs[] = {
3754 { 0x0a, 0x0221401f },
3755 { 0x0b, 0x02a19120 },
3756 { 0x0c, 0x40000100 },
3757 { 0x0d, 0x01014011 },
3758 { 0x0e, 0x01a19021 },
3759 { 0x0f, 0x01813024 },
3760 { 0x10, 0x40000100 },
3761 { 0x11, 0x40000100 },
3762 { 0x12, 0x40000100 },
3763 { 0x13, 0x40000100 },
3764 { 0x14, 0x40000100 },
3765 { 0x21, 0x40000100 },
3766 { 0x22, 0x40000100 },
3767 { 0x23, 0x40000100 },
3768 {}
3769};
3770
3771static const struct hda_pintbl d965_5st_pin_configs[] = {
3772 { 0x0a, 0x02214020 },
3773 { 0x0b, 0x02a19080 },
3774 { 0x0c, 0x0181304e },
3775 { 0x0d, 0x01014010 },
3776 { 0x0e, 0x01a19040 },
3777 { 0x0f, 0x01011012 },
3778 { 0x10, 0x01016011 },
3779 { 0x11, 0x40000100 },
3780 { 0x12, 0x40000100 },
3781 { 0x13, 0x40000100 },
3782 { 0x14, 0x40000100 },
3783 { 0x21, 0x01442070 },
3784 { 0x22, 0x40000100 },
3785 { 0x23, 0x40000100 },
3786 {}
3787};
3788
3789static const struct hda_pintbl d965_5st_no_fp_pin_configs[] = {
3790 { 0x0a, 0x40000100 },
3791 { 0x0b, 0x40000100 },
3792 { 0x0c, 0x0181304e },
3793 { 0x0d, 0x01014010 },
3794 { 0x0e, 0x01a19040 },
3795 { 0x0f, 0x01011012 },
3796 { 0x10, 0x01016011 },
3797 { 0x11, 0x40000100 },
3798 { 0x12, 0x40000100 },
3799 { 0x13, 0x40000100 },
3800 { 0x14, 0x40000100 },
3801 { 0x21, 0x01442070 },
3802 { 0x22, 0x40000100 },
3803 { 0x23, 0x40000100 },
3804 {}
3805};
3806
3807static const struct hda_pintbl dell_3st_pin_configs[] = {
3808 { 0x0a, 0x02211230 },
3809 { 0x0b, 0x02a11220 },
3810 { 0x0c, 0x01a19040 },
3811 { 0x0d, 0x01114210 },
3812 { 0x0e, 0x01111212 },
3813 { 0x0f, 0x01116211 },
3814 { 0x10, 0x01813050 },
3815 { 0x11, 0x01112214 },
3816 { 0x12, 0x403003fa },
3817 { 0x13, 0x90a60040 },
3818 { 0x14, 0x90a60040 },
3819 { 0x21, 0x404003fb },
3820 { 0x22, 0x40c003fc },
3821 { 0x23, 0x40000100 },
3822 {}
3823};
3824
3825static void stac927x_fixup_ref_no_jd(struct hda_codec *codec,
3826 const struct hda_fixup *fix, int action)
3827{
3828 /* no jack detecion for ref-no-jd model */
3829 if (action == HDA_FIXUP_ACT_PRE_PROBE)
3830 codec->no_jack_detect = 1;
3831}
3832
3833static void stac927x_fixup_ref(struct hda_codec *codec,
3834 const struct hda_fixup *fix, int action)
3835{
3836 struct sigmatel_spec *spec = codec->spec;
3837
3838 if (action == HDA_FIXUP_ACT_PRE_PROBE) {
3839 snd_hda_apply_pincfgs(codec, ref927x_pin_configs);
3840 spec->eapd_mask = spec->gpio_mask = 0;
3841 spec->gpio_dir = spec->gpio_data = 0;
3842 }
3843}
3844
3845static void stac927x_fixup_dell_dmic(struct hda_codec *codec,
3846 const struct hda_fixup *fix, int action)
3847{
3848 struct sigmatel_spec *spec = codec->spec;
3849
3850 if (action != HDA_FIXUP_ACT_PRE_PROBE)
3851 return;
3852
3853 if (codec->core.subsystem_id != 0x1028022f) {
3854 /* GPIO2 High = Enable EAPD */
3855 spec->eapd_mask = spec->gpio_mask = 0x04;
3856 spec->gpio_dir = spec->gpio_data = 0x04;
3857 }
3858
3859 snd_hda_add_verbs(codec, dell_3st_core_init);
3860 spec->volknob_init = 1;
3861}
3862
3863static void stac927x_fixup_volknob(struct hda_codec *codec,
3864 const struct hda_fixup *fix, int action)
3865{
3866 struct sigmatel_spec *spec = codec->spec;
3867
3868 if (action == HDA_FIXUP_ACT_PRE_PROBE) {
3869 snd_hda_add_verbs(codec, stac927x_volknob_core_init);
3870 spec->volknob_init = 1;
3871 }
3872}
3873
3874static const struct hda_fixup stac927x_fixups[] = {
3875 [STAC_D965_REF_NO_JD] = {
3876 .type = HDA_FIXUP_FUNC,
3877 .v.func = stac927x_fixup_ref_no_jd,
3878 .chained = true,
3879 .chain_id = STAC_D965_REF,
3880 },
3881 [STAC_D965_REF] = {
3882 .type = HDA_FIXUP_FUNC,
3883 .v.func = stac927x_fixup_ref,
3884 },
3885 [STAC_D965_3ST] = {
3886 .type = HDA_FIXUP_PINS,
3887 .v.pins = d965_3st_pin_configs,
3888 .chained = true,
3889 .chain_id = STAC_D965_VERBS,
3890 },
3891 [STAC_D965_5ST] = {
3892 .type = HDA_FIXUP_PINS,
3893 .v.pins = d965_5st_pin_configs,
3894 .chained = true,
3895 .chain_id = STAC_D965_VERBS,
3896 },
3897 [STAC_D965_VERBS] = {
3898 .type = HDA_FIXUP_VERBS,
3899 .v.verbs = d965_core_init,
3900 },
3901 [STAC_D965_5ST_NO_FP] = {
3902 .type = HDA_FIXUP_PINS,
3903 .v.pins = d965_5st_no_fp_pin_configs,
3904 },
3905 [STAC_NEMO_DEFAULT] = {
3906 .type = HDA_FIXUP_PINS,
3907 .v.pins = nemo_pin_configs,
3908 },
3909 [STAC_DELL_3ST] = {
3910 .type = HDA_FIXUP_PINS,
3911 .v.pins = dell_3st_pin_configs,
3912 .chained = true,
3913 .chain_id = STAC_927X_DELL_DMIC,
3914 },
3915 [STAC_DELL_BIOS] = {
3916 .type = HDA_FIXUP_PINS,
3917 .v.pins = (const struct hda_pintbl[]) {
3918 /* correct the front output jack as a hp out */
3919 { 0x0f, 0x0221101f },
3920 /* correct the front input jack as a mic */
3921 { 0x0e, 0x02a79130 },
3922 {}
3923 },
3924 .chained = true,
3925 .chain_id = STAC_927X_DELL_DMIC,
3926 },
3927 [STAC_DELL_BIOS_AMIC] = {
3928 .type = HDA_FIXUP_PINS,
3929 .v.pins = (const struct hda_pintbl[]) {
3930 /* configure the analog microphone on some laptops */
3931 { 0x0c, 0x90a79130 },
3932 {}
3933 },
3934 .chained = true,
3935 .chain_id = STAC_DELL_BIOS,
3936 },
3937 [STAC_DELL_BIOS_SPDIF] = {
3938 .type = HDA_FIXUP_PINS,
3939 .v.pins = (const struct hda_pintbl[]) {
3940 /* correct the device field to SPDIF out */
3941 { 0x21, 0x01442070 },
3942 {}
3943 },
3944 .chained = true,
3945 .chain_id = STAC_DELL_BIOS,
3946 },
3947 [STAC_927X_DELL_DMIC] = {
3948 .type = HDA_FIXUP_FUNC,
3949 .v.func = stac927x_fixup_dell_dmic,
3950 },
3951 [STAC_927X_VOLKNOB] = {
3952 .type = HDA_FIXUP_FUNC,
3953 .v.func = stac927x_fixup_volknob,
3954 },
3955};
3956
3957static const struct hda_model_fixup stac927x_models[] = {
3958 { .id = STAC_D965_REF_NO_JD, .name = "ref-no-jd" },
3959 { .id = STAC_D965_REF, .name = "ref" },
3960 { .id = STAC_D965_3ST, .name = "3stack" },
3961 { .id = STAC_D965_5ST, .name = "5stack" },
3962 { .id = STAC_D965_5ST_NO_FP, .name = "5stack-no-fp" },
3963 { .id = STAC_DELL_3ST, .name = "dell-3stack" },
3964 { .id = STAC_DELL_BIOS, .name = "dell-bios" },
3965 { .id = STAC_NEMO_DEFAULT, .name = "nemo-default" },
3966 { .id = STAC_DELL_BIOS_AMIC, .name = "dell-bios-amic" },
3967 { .id = STAC_927X_VOLKNOB, .name = "volknob" },
3968 {}
3969};
3970
3971static const struct hda_quirk stac927x_fixup_tbl[] = {
3972 /* SigmaTel reference board */
3973 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
3974 "DFI LanParty", STAC_D965_REF),
3975 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
3976 "DFI LanParty", STAC_D965_REF),
3977 /* Intel 946 based systems */
3978 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x3d01, "Intel D946", STAC_D965_3ST),
3979 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xa301, "Intel D946", STAC_D965_3ST),
3980 /* 965 based 3 stack systems */
3981 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2100,
3982 "Intel D965", STAC_D965_3ST),
3983 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2000,
3984 "Intel D965", STAC_D965_3ST),
3985 /* Dell 3 stack systems */
3986 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01dd, "Dell Dimension E520", STAC_DELL_3ST),
3987 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ed, "Dell ", STAC_DELL_3ST),
3988 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f4, "Dell ", STAC_DELL_3ST),
3989 /* Dell 3 stack systems with verb table in BIOS */
3990 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f3, "Dell Inspiron 1420", STAC_DELL_BIOS),
3991 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f7, "Dell XPS M1730", STAC_DELL_BIOS),
3992 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0227, "Dell Vostro 1400 ", STAC_DELL_BIOS),
3993 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022e, "Dell ", STAC_DELL_BIOS_SPDIF),
3994 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022f, "Dell Inspiron 1525", STAC_DELL_BIOS),
3995 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0242, "Dell ", STAC_DELL_BIOS),
3996 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0243, "Dell ", STAC_DELL_BIOS),
3997 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ff, "Dell ", STAC_DELL_BIOS),
3998 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0209, "Dell XPS 1330", STAC_DELL_BIOS_SPDIF),
3999 /* 965 based 5 stack systems */
4000 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2300,
4001 "Intel D965", STAC_D965_5ST),
4002 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2500,
4003 "Intel D965", STAC_D965_5ST),
4004 /* Nemo */
4005 SND_PCI_QUIRK(0x1888, 0x1000, "AmigaOne X1000", STAC_NEMO_DEFAULT),
4006 /* volume-knob fixes */
4007 SND_PCI_QUIRK_VENDOR(0x10cf, "FSC", STAC_927X_VOLKNOB),
4008 {} /* terminator */
4009};
4010
4011static const struct hda_pintbl ref9205_pin_configs[] = {
4012 { 0x0a, 0x40000100 },
4013 { 0x0b, 0x40000100 },
4014 { 0x0c, 0x01016011 },
4015 { 0x0d, 0x01014010 },
4016 { 0x0e, 0x01813122 },
4017 { 0x0f, 0x01a19021 },
4018 { 0x14, 0x01019020 },
4019 { 0x16, 0x40000100 },
4020 { 0x17, 0x90a000f0 },
4021 { 0x18, 0x90a000f0 },
4022 { 0x21, 0x01441030 },
4023 { 0x22, 0x01c41030 },
4024 {}
4025};
4026
4027/*
4028 STAC 9205 pin configs for
4029 102801F1
4030 102801F2
4031 102801FC
4032 102801FD
4033 10280204
4034 1028021F
4035 10280228 (Dell Vostro 1500)
4036 10280229 (Dell Vostro 1700)
4037*/
4038static const struct hda_pintbl dell_9205_m42_pin_configs[] = {
4039 { 0x0a, 0x0321101F },
4040 { 0x0b, 0x03A11020 },
4041 { 0x0c, 0x400003FA },
4042 { 0x0d, 0x90170310 },
4043 { 0x0e, 0x400003FB },
4044 { 0x0f, 0x400003FC },
4045 { 0x14, 0x400003FD },
4046 { 0x16, 0x40F000F9 },
4047 { 0x17, 0x90A60330 },
4048 { 0x18, 0x400003FF },
4049 { 0x21, 0x0144131F },
4050 { 0x22, 0x40C003FE },
4051 {}
4052};
4053
4054/*
4055 STAC 9205 pin configs for
4056 102801F9
4057 102801FA
4058 102801FE
4059 102801FF (Dell Precision M4300)
4060 10280206
4061 10280200
4062 10280201
4063*/
4064static const struct hda_pintbl dell_9205_m43_pin_configs[] = {
4065 { 0x0a, 0x0321101f },
4066 { 0x0b, 0x03a11020 },
4067 { 0x0c, 0x90a70330 },
4068 { 0x0d, 0x90170310 },
4069 { 0x0e, 0x400000fe },
4070 { 0x0f, 0x400000ff },
4071 { 0x14, 0x400000fd },
4072 { 0x16, 0x40f000f9 },
4073 { 0x17, 0x400000fa },
4074 { 0x18, 0x400000fc },
4075 { 0x21, 0x0144131f },
4076 { 0x22, 0x40c003f8 },
4077 /* Enable SPDIF in/out */
4078 { 0x1f, 0x01441030 },
4079 { 0x20, 0x1c410030 },
4080 {}
4081};
4082
4083static const struct hda_pintbl dell_9205_m44_pin_configs[] = {
4084 { 0x0a, 0x0421101f },
4085 { 0x0b, 0x04a11020 },
4086 { 0x0c, 0x400003fa },
4087 { 0x0d, 0x90170310 },
4088 { 0x0e, 0x400003fb },
4089 { 0x0f, 0x400003fc },
4090 { 0x14, 0x400003fd },
4091 { 0x16, 0x400003f9 },
4092 { 0x17, 0x90a60330 },
4093 { 0x18, 0x400003ff },
4094 { 0x21, 0x01441340 },
4095 { 0x22, 0x40c003fe },
4096 {}
4097};
4098
4099static void stac9205_fixup_ref(struct hda_codec *codec,
4100 const struct hda_fixup *fix, int action)
4101{
4102 struct sigmatel_spec *spec = codec->spec;
4103
4104 if (action == HDA_FIXUP_ACT_PRE_PROBE) {
4105 snd_hda_apply_pincfgs(codec, ref9205_pin_configs);
4106 /* SPDIF-In enabled */
4107 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0;
4108 }
4109}
4110
4111static void stac9205_fixup_dell_m43(struct hda_codec *codec,
4112 const struct hda_fixup *fix, int action)
4113{
4114 struct sigmatel_spec *spec = codec->spec;
4115 struct hda_jack_callback *jack;
4116
4117 if (action == HDA_FIXUP_ACT_PRE_PROBE) {
4118 snd_hda_apply_pincfgs(codec, dell_9205_m43_pin_configs);
4119
4120 /* Enable unsol response for GPIO4/Dock HP connection */
4121 snd_hda_codec_write_cache(codec, codec->core.afg, 0,
4122 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x10);
4123 jack = snd_hda_jack_detect_enable_callback(codec, codec->core.afg,
4124 stac_vref_event);
4125 if (!IS_ERR(jack))
4126 jack->private_data = 0x01;
4127
4128 spec->gpio_dir = 0x0b;
4129 spec->eapd_mask = 0x01;
4130 spec->gpio_mask = 0x1b;
4131 spec->gpio_mute = 0x10;
4132 /* GPIO0 High = EAPD, GPIO1 Low = Headphone Mute,
4133 * GPIO3 Low = DRM
4134 */
4135 spec->gpio_data = 0x01;
4136 }
4137}
4138
4139static void stac9205_fixup_eapd(struct hda_codec *codec,
4140 const struct hda_fixup *fix, int action)
4141{
4142 struct sigmatel_spec *spec = codec->spec;
4143
4144 if (action == HDA_FIXUP_ACT_PRE_PROBE)
4145 spec->eapd_switch = 0;
4146}
4147
4148static const struct hda_fixup stac9205_fixups[] = {
4149 [STAC_9205_REF] = {
4150 .type = HDA_FIXUP_FUNC,
4151 .v.func = stac9205_fixup_ref,
4152 },
4153 [STAC_9205_DELL_M42] = {
4154 .type = HDA_FIXUP_PINS,
4155 .v.pins = dell_9205_m42_pin_configs,
4156 },
4157 [STAC_9205_DELL_M43] = {
4158 .type = HDA_FIXUP_FUNC,
4159 .v.func = stac9205_fixup_dell_m43,
4160 },
4161 [STAC_9205_DELL_M44] = {
4162 .type = HDA_FIXUP_PINS,
4163 .v.pins = dell_9205_m44_pin_configs,
4164 },
4165 [STAC_9205_EAPD] = {
4166 .type = HDA_FIXUP_FUNC,
4167 .v.func = stac9205_fixup_eapd,
4168 },
4169 {}
4170};
4171
4172static const struct hda_model_fixup stac9205_models[] = {
4173 { .id = STAC_9205_REF, .name = "ref" },
4174 { .id = STAC_9205_DELL_M42, .name = "dell-m42" },
4175 { .id = STAC_9205_DELL_M43, .name = "dell-m43" },
4176 { .id = STAC_9205_DELL_M44, .name = "dell-m44" },
4177 { .id = STAC_9205_EAPD, .name = "eapd" },
4178 {}
4179};
4180
4181static const struct hda_quirk stac9205_fixup_tbl[] = {
4182 /* SigmaTel reference board */
4183 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
4184 "DFI LanParty", STAC_9205_REF),
4185 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xfb30,
4186 "SigmaTel", STAC_9205_REF),
4187 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
4188 "DFI LanParty", STAC_9205_REF),
4189 /* Dell */
4190 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1,
4191 "unknown Dell", STAC_9205_DELL_M42),
4192 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2,
4193 "unknown Dell", STAC_9205_DELL_M42),
4194 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f8,
4195 "Dell Precision", STAC_9205_DELL_M43),
4196 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f9,
4197 "Dell Precision", STAC_9205_DELL_M43),
4198 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fa,
4199 "Dell Precision", STAC_9205_DELL_M43),
4200 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc,
4201 "unknown Dell", STAC_9205_DELL_M42),
4202 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd,
4203 "unknown Dell", STAC_9205_DELL_M42),
4204 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fe,
4205 "Dell Precision", STAC_9205_DELL_M43),
4206 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ff,
4207 "Dell Precision M4300", STAC_9205_DELL_M43),
4208 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0204,
4209 "unknown Dell", STAC_9205_DELL_M42),
4210 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0206,
4211 "Dell Precision", STAC_9205_DELL_M43),
4212 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021b,
4213 "Dell Precision", STAC_9205_DELL_M43),
4214 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021c,
4215 "Dell Precision", STAC_9205_DELL_M43),
4216 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021f,
4217 "Dell Inspiron", STAC_9205_DELL_M44),
4218 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0228,
4219 "Dell Vostro 1500", STAC_9205_DELL_M42),
4220 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0229,
4221 "Dell Vostro 1700", STAC_9205_DELL_M42),
4222 /* Gateway */
4223 SND_PCI_QUIRK(0x107b, 0x0560, "Gateway T6834c", STAC_9205_EAPD),
4224 SND_PCI_QUIRK(0x107b, 0x0565, "Gateway T1616", STAC_9205_EAPD),
4225 {} /* terminator */
4226};
4227
4228static void stac92hd95_fixup_hp_led(struct hda_codec *codec,
4229 const struct hda_fixup *fix, int action)
4230{
4231 struct sigmatel_spec *spec = codec->spec;
4232
4233 if (action != HDA_FIXUP_ACT_PRE_PROBE)
4234 return;
4235
4236 if (find_mute_led_cfg(codec, spec->default_polarity))
4237 codec_dbg(codec, "mute LED gpio %d polarity %d\n",
4238 spec->gpio_led,
4239 spec->gpio_led_polarity);
4240}
4241
4242static const struct hda_fixup stac92hd95_fixups[] = {
4243 [STAC_92HD95_HP_LED] = {
4244 .type = HDA_FIXUP_FUNC,
4245 .v.func = stac92hd95_fixup_hp_led,
4246 },
4247 [STAC_92HD95_HP_BASS] = {
4248 .type = HDA_FIXUP_VERBS,
4249 .v.verbs = (const struct hda_verb[]) {
4250 {0x1a, 0x795, 0x00}, /* HPF to 100Hz */
4251 {}
4252 },
4253 .chained = true,
4254 .chain_id = STAC_92HD95_HP_LED,
4255 },
4256};
4257
4258static const struct hda_quirk stac92hd95_fixup_tbl[] = {
4259 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1911, "HP Spectre 13", STAC_92HD95_HP_BASS),
4260 {} /* terminator */
4261};
4262
4263static const struct hda_model_fixup stac92hd95_models[] = {
4264 { .id = STAC_92HD95_HP_LED, .name = "hp-led" },
4265 { .id = STAC_92HD95_HP_BASS, .name = "hp-bass" },
4266 {}
4267};
4268
4269
4270static int stac_parse_auto_config(struct hda_codec *codec)
4271{
4272 struct sigmatel_spec *spec = codec->spec;
4273 int err;
4274 int flags = 0;
4275
4276 if (spec->headset_jack)
4277 flags |= HDA_PINCFG_HEADSET_MIC;
4278
4279 err = snd_hda_parse_pin_defcfg(codec, &spec->gen.autocfg, NULL, flags);
4280 if (err < 0)
4281 return err;
4282
4283 /* add hooks */
4284 spec->gen.pcm_playback_hook = stac_playback_pcm_hook;
4285 spec->gen.pcm_capture_hook = stac_capture_pcm_hook;
4286
4287 spec->gen.automute_hook = stac_update_outputs;
4288
4289 if (spec->gpio_led)
4290 snd_hda_gen_add_mute_led_cdev(codec, stac_vmaster_hook);
4291
4292 err = snd_hda_gen_parse_auto_config(codec, &spec->gen.autocfg);
4293 if (err < 0)
4294 return err;
4295
4296 if (spec->vref_mute_led_nid) {
4297 err = snd_hda_gen_fix_pin_power(codec, spec->vref_mute_led_nid);
4298 if (err < 0)
4299 return err;
4300 }
4301
4302 /* setup analog beep controls */
4303 if (spec->anabeep_nid > 0) {
4304 err = stac_auto_create_beep_ctls(codec,
4305 spec->anabeep_nid);
4306 if (err < 0)
4307 return err;
4308 }
4309
4310 /* setup digital beep controls and input device */
4311#ifdef CONFIG_SND_HDA_INPUT_BEEP
4312 if (spec->gen.beep_nid) {
4313 hda_nid_t nid = spec->gen.beep_nid;
4314 unsigned int caps;
4315
4316 err = stac_auto_create_beep_ctls(codec, nid);
4317 if (err < 0)
4318 return err;
4319 if (codec->beep) {
4320 /* IDT/STAC codecs have linear beep tone parameter */
4321 codec->beep->linear_tone = spec->linear_tone_beep;
4322 /* keep power up while beep is enabled */
4323 codec->beep->keep_power_at_enable = 1;
4324 /* if no beep switch is available, make its own one */
4325 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
4326 if (!(caps & AC_AMPCAP_MUTE)) {
4327 err = stac_beep_switch_ctl(codec);
4328 if (err < 0)
4329 return err;
4330 }
4331 }
4332 }
4333#endif
4334
4335 if (spec->aloopback_ctl &&
4336 snd_hda_get_bool_hint(codec, "loopback") == 1) {
4337 unsigned int wr_verb =
4338 spec->aloopback_ctl->private_value >> 16;
4339 if (snd_hdac_regmap_add_vendor_verb(&codec->core, wr_verb))
4340 return -ENOMEM;
4341 if (!snd_hda_gen_add_kctl(&spec->gen, NULL, spec->aloopback_ctl))
4342 return -ENOMEM;
4343 }
4344
4345 if (spec->have_spdif_mux) {
4346 err = stac_create_spdif_mux_ctls(codec);
4347 if (err < 0)
4348 return err;
4349 }
4350
4351 stac_init_power_map(codec);
4352
4353 return 0;
4354}
4355
4356static int stac_init(struct hda_codec *codec)
4357{
4358 struct sigmatel_spec *spec = codec->spec;
4359 int i;
4360
4361 /* override some hints */
4362 stac_store_hints(codec);
4363
4364 /* set up GPIO */
4365 /* turn on EAPD statically when spec->eapd_switch isn't set.
4366 * otherwise, unsol event will turn it on/off dynamically
4367 */
4368 if (!spec->eapd_switch)
4369 spec->gpio_data |= spec->eapd_mask;
4370 stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, spec->gpio_data);
4371
4372 snd_hda_gen_init(codec);
4373
4374 /* sync the power-map */
4375 if (spec->num_pwrs)
4376 snd_hda_codec_write(codec, codec->core.afg, 0,
4377 AC_VERB_IDT_SET_POWER_MAP,
4378 spec->power_map_bits);
4379
4380 /* power down inactive ADCs */
4381 if (spec->powerdown_adcs) {
4382 for (i = 0; i < spec->gen.num_all_adcs; i++) {
4383 if (spec->active_adcs & (1 << i))
4384 continue;
4385 snd_hda_codec_write(codec, spec->gen.all_adcs[i], 0,
4386 AC_VERB_SET_POWER_STATE,
4387 AC_PWRST_D3);
4388 }
4389 }
4390
4391 return 0;
4392}
4393
4394#define stac_free snd_hda_gen_free
4395
4396#ifdef CONFIG_SND_PROC_FS
4397static void stac92hd_proc_hook(struct snd_info_buffer *buffer,
4398 struct hda_codec *codec, hda_nid_t nid)
4399{
4400 if (nid == codec->core.afg)
4401 snd_iprintf(buffer, "Power-Map: 0x%02x\n",
4402 snd_hda_codec_read(codec, nid, 0,
4403 AC_VERB_IDT_GET_POWER_MAP, 0));
4404}
4405
4406static void analog_loop_proc_hook(struct snd_info_buffer *buffer,
4407 struct hda_codec *codec,
4408 unsigned int verb)
4409{
4410 snd_iprintf(buffer, "Analog Loopback: 0x%02x\n",
4411 snd_hda_codec_read(codec, codec->core.afg, 0, verb, 0));
4412}
4413
4414/* stac92hd71bxx, stac92hd73xx */
4415static void stac92hd7x_proc_hook(struct snd_info_buffer *buffer,
4416 struct hda_codec *codec, hda_nid_t nid)
4417{
4418 stac92hd_proc_hook(buffer, codec, nid);
4419 if (nid == codec->core.afg)
4420 analog_loop_proc_hook(buffer, codec, 0xfa0);
4421}
4422
4423static void stac9205_proc_hook(struct snd_info_buffer *buffer,
4424 struct hda_codec *codec, hda_nid_t nid)
4425{
4426 if (nid == codec->core.afg)
4427 analog_loop_proc_hook(buffer, codec, 0xfe0);
4428}
4429
4430static void stac927x_proc_hook(struct snd_info_buffer *buffer,
4431 struct hda_codec *codec, hda_nid_t nid)
4432{
4433 if (nid == codec->core.afg)
4434 analog_loop_proc_hook(buffer, codec, 0xfeb);
4435}
4436#else
4437#define stac92hd_proc_hook NULL
4438#define stac92hd7x_proc_hook NULL
4439#define stac9205_proc_hook NULL
4440#define stac927x_proc_hook NULL
4441#endif
4442
4443static int stac_suspend(struct hda_codec *codec)
4444{
4445 struct sigmatel_spec *spec = codec->spec;
4446
4447 snd_hda_shutup_pins(codec);
4448
4449 if (spec->eapd_mask)
4450 stac_gpio_set(codec, spec->gpio_mask,
4451 spec->gpio_dir, spec->gpio_data &
4452 ~spec->eapd_mask);
4453
4454 return 0;
4455}
4456
4457static const struct hda_codec_ops stac_patch_ops = {
4458 .build_controls = snd_hda_gen_build_controls,
4459 .build_pcms = snd_hda_gen_build_pcms,
4460 .init = stac_init,
4461 .free = stac_free,
4462 .unsol_event = snd_hda_jack_unsol_event,
4463 .suspend = stac_suspend,
4464};
4465
4466static int alloc_stac_spec(struct hda_codec *codec)
4467{
4468 struct sigmatel_spec *spec;
4469
4470 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4471 if (!spec)
4472 return -ENOMEM;
4473 snd_hda_gen_spec_init(&spec->gen);
4474 codec->spec = spec;
4475 codec->no_trigger_sense = 1; /* seems common with STAC/IDT codecs */
4476 spec->gen.dac_min_mute = true;
4477 codec->patch_ops = stac_patch_ops;
4478 return 0;
4479}
4480
4481static int patch_stac9200(struct hda_codec *codec)
4482{
4483 struct sigmatel_spec *spec;
4484 int err;
4485
4486 err = alloc_stac_spec(codec);
4487 if (err < 0)
4488 return err;
4489
4490 spec = codec->spec;
4491 spec->linear_tone_beep = 1;
4492 spec->gen.own_eapd_ctl = 1;
4493
4494 codec->power_filter = snd_hda_codec_eapd_power_filter;
4495
4496 snd_hda_add_verbs(codec, stac9200_eapd_init);
4497
4498 snd_hda_pick_fixup(codec, stac9200_models, stac9200_fixup_tbl,
4499 stac9200_fixups);
4500 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
4501
4502 err = stac_parse_auto_config(codec);
4503 if (err < 0) {
4504 stac_free(codec);
4505 return err;
4506 }
4507
4508 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
4509
4510 return 0;
4511}
4512
4513static int patch_stac925x(struct hda_codec *codec)
4514{
4515 struct sigmatel_spec *spec;
4516 int err;
4517
4518 err = alloc_stac_spec(codec);
4519 if (err < 0)
4520 return err;
4521
4522 spec = codec->spec;
4523 spec->linear_tone_beep = 1;
4524 spec->gen.own_eapd_ctl = 1;
4525
4526 snd_hda_add_verbs(codec, stac925x_core_init);
4527
4528 snd_hda_pick_fixup(codec, stac925x_models, stac925x_fixup_tbl,
4529 stac925x_fixups);
4530 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
4531
4532 err = stac_parse_auto_config(codec);
4533 if (err < 0) {
4534 stac_free(codec);
4535 return err;
4536 }
4537
4538 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
4539
4540 return 0;
4541}
4542
4543static int patch_stac92hd73xx(struct hda_codec *codec)
4544{
4545 struct sigmatel_spec *spec;
4546 int err;
4547 int num_dacs;
4548
4549 err = alloc_stac_spec(codec);
4550 if (err < 0)
4551 return err;
4552
4553 spec = codec->spec;
4554 /* enable power_save_node only for new 92HD89xx chips, as it causes
4555 * click noises on old 92HD73xx chips.
4556 */
4557 if ((codec->core.vendor_id & 0xfffffff0) != 0x111d7670)
4558 codec->power_save_node = 1;
4559 spec->linear_tone_beep = 0;
4560 spec->gen.mixer_nid = 0x1d;
4561 spec->have_spdif_mux = 1;
4562
4563 num_dacs = snd_hda_get_num_conns(codec, 0x0a) - 1;
4564 if (num_dacs < 3 || num_dacs > 5) {
4565 codec_warn(codec,
4566 "Could not determine number of channels defaulting to DAC count\n");
4567 num_dacs = 5;
4568 }
4569
4570 switch (num_dacs) {
4571 case 0x3: /* 6 Channel */
4572 spec->aloopback_ctl = &stac92hd73xx_6ch_loopback;
4573 break;
4574 case 0x4: /* 8 Channel */
4575 spec->aloopback_ctl = &stac92hd73xx_8ch_loopback;
4576 break;
4577 case 0x5: /* 10 Channel */
4578 spec->aloopback_ctl = &stac92hd73xx_10ch_loopback;
4579 break;
4580 }
4581
4582 spec->aloopback_mask = 0x01;
4583 spec->aloopback_shift = 8;
4584
4585 spec->gen.beep_nid = 0x1c; /* digital beep */
4586
4587 /* GPIO0 High = Enable EAPD */
4588 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
4589 spec->gpio_data = 0x01;
4590
4591 spec->eapd_switch = 1;
4592
4593 spec->num_pwrs = ARRAY_SIZE(stac92hd73xx_pwr_nids);
4594 spec->pwr_nids = stac92hd73xx_pwr_nids;
4595
4596 spec->gen.own_eapd_ctl = 1;
4597 spec->gen.power_down_unused = 1;
4598
4599 snd_hda_pick_fixup(codec, stac92hd73xx_models, stac92hd73xx_fixup_tbl,
4600 stac92hd73xx_fixups);
4601 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
4602
4603 if (!spec->volknob_init)
4604 snd_hda_add_verbs(codec, stac92hd73xx_core_init);
4605
4606 err = stac_parse_auto_config(codec);
4607 if (err < 0) {
4608 stac_free(codec);
4609 return err;
4610 }
4611
4612 /* Don't GPIO-mute speakers if there are no internal speakers, because
4613 * the GPIO might be necessary for Headphone
4614 */
4615 if (spec->eapd_switch && !has_builtin_speaker(codec))
4616 spec->eapd_switch = 0;
4617
4618 codec->proc_widget_hook = stac92hd7x_proc_hook;
4619
4620 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
4621
4622 return 0;
4623}
4624
4625static void stac_setup_gpio(struct hda_codec *codec)
4626{
4627 struct sigmatel_spec *spec = codec->spec;
4628
4629 spec->gpio_mask |= spec->eapd_mask;
4630 if (spec->gpio_led) {
4631 if (!spec->vref_mute_led_nid) {
4632 spec->gpio_mask |= spec->gpio_led;
4633 spec->gpio_dir |= spec->gpio_led;
4634 spec->gpio_data |= spec->gpio_led;
4635 } else {
4636 codec->power_filter = stac_vref_led_power_filter;
4637 }
4638 }
4639
4640 if (spec->mic_mute_led_gpio) {
4641 spec->gpio_mask |= spec->mic_mute_led_gpio;
4642 spec->gpio_dir |= spec->mic_mute_led_gpio;
4643 spec->mic_enabled = 0;
4644 spec->gpio_data |= spec->mic_mute_led_gpio;
4645 snd_hda_gen_add_micmute_led_cdev(codec, stac_capture_led_update);
4646 }
4647}
4648
4649static int patch_stac92hd83xxx(struct hda_codec *codec)
4650{
4651 struct sigmatel_spec *spec;
4652 int err;
4653
4654 err = alloc_stac_spec(codec);
4655 if (err < 0)
4656 return err;
4657
4658 /* longer delay needed for D3 */
4659 codec->core.power_caps &= ~AC_PWRST_EPSS;
4660
4661 spec = codec->spec;
4662 codec->power_save_node = 1;
4663 spec->linear_tone_beep = 0;
4664 spec->gen.own_eapd_ctl = 1;
4665 spec->gen.power_down_unused = 1;
4666 spec->gen.mixer_nid = 0x1b;
4667
4668 spec->gen.beep_nid = 0x21; /* digital beep */
4669 spec->pwr_nids = stac92hd83xxx_pwr_nids;
4670 spec->num_pwrs = ARRAY_SIZE(stac92hd83xxx_pwr_nids);
4671 spec->default_polarity = -1; /* no default cfg */
4672
4673 snd_hda_add_verbs(codec, stac92hd83xxx_core_init);
4674
4675 snd_hda_pick_fixup(codec, stac92hd83xxx_models, stac92hd83xxx_fixup_tbl,
4676 stac92hd83xxx_fixups);
4677 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
4678
4679 stac_setup_gpio(codec);
4680
4681 err = stac_parse_auto_config(codec);
4682 if (err < 0) {
4683 stac_free(codec);
4684 return err;
4685 }
4686
4687 codec->proc_widget_hook = stac92hd_proc_hook;
4688
4689 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
4690
4691 return 0;
4692}
4693
4694static const hda_nid_t stac92hd95_pwr_nids[] = {
4695 0x0a, 0x0b, 0x0c, 0x0d
4696};
4697
4698static int patch_stac92hd95(struct hda_codec *codec)
4699{
4700 struct sigmatel_spec *spec;
4701 int err;
4702
4703 err = alloc_stac_spec(codec);
4704 if (err < 0)
4705 return err;
4706
4707 /* longer delay needed for D3 */
4708 codec->core.power_caps &= ~AC_PWRST_EPSS;
4709
4710 spec = codec->spec;
4711 codec->power_save_node = 1;
4712 spec->linear_tone_beep = 0;
4713 spec->gen.own_eapd_ctl = 1;
4714 spec->gen.power_down_unused = 1;
4715
4716 spec->gen.beep_nid = 0x19; /* digital beep */
4717 spec->pwr_nids = stac92hd95_pwr_nids;
4718 spec->num_pwrs = ARRAY_SIZE(stac92hd95_pwr_nids);
4719 spec->default_polarity = 0;
4720
4721 snd_hda_pick_fixup(codec, stac92hd95_models, stac92hd95_fixup_tbl,
4722 stac92hd95_fixups);
4723 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
4724
4725 stac_setup_gpio(codec);
4726
4727 err = stac_parse_auto_config(codec);
4728 if (err < 0) {
4729 stac_free(codec);
4730 return err;
4731 }
4732
4733 codec->proc_widget_hook = stac92hd_proc_hook;
4734
4735 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
4736
4737 return 0;
4738}
4739
4740static int patch_stac92hd71bxx(struct hda_codec *codec)
4741{
4742 struct sigmatel_spec *spec;
4743 const hda_nid_t *unmute_nids = stac92hd71bxx_unmute_nids;
4744 int err;
4745
4746 err = alloc_stac_spec(codec);
4747 if (err < 0)
4748 return err;
4749
4750 spec = codec->spec;
4751 /* disabled power_save_node since it causes noises on a Dell machine */
4752 /* codec->power_save_node = 1; */
4753 spec->linear_tone_beep = 0;
4754 spec->gen.own_eapd_ctl = 1;
4755 spec->gen.power_down_unused = 1;
4756 spec->gen.mixer_nid = 0x17;
4757 spec->have_spdif_mux = 1;
4758
4759 /* GPIO0 = EAPD */
4760 spec->gpio_mask = 0x01;
4761 spec->gpio_dir = 0x01;
4762 spec->gpio_data = 0x01;
4763
4764 switch (codec->core.vendor_id) {
4765 case 0x111d76b6: /* 4 Port without Analog Mixer */
4766 case 0x111d76b7:
4767 unmute_nids++;
4768 break;
4769 case 0x111d7608: /* 5 Port with Analog Mixer */
4770 if ((codec->core.revision_id & 0xf) == 0 ||
4771 (codec->core.revision_id & 0xf) == 1)
4772 spec->stream_delay = 40; /* 40 milliseconds */
4773
4774 /* disable VSW */
4775 unmute_nids++;
4776 snd_hda_codec_set_pincfg(codec, 0x0f, 0x40f000f0);
4777 snd_hda_codec_set_pincfg(codec, 0x19, 0x40f000f3);
4778 break;
4779 case 0x111d7603: /* 6 Port with Analog Mixer */
4780 if ((codec->core.revision_id & 0xf) == 1)
4781 spec->stream_delay = 40; /* 40 milliseconds */
4782
4783 break;
4784 }
4785
4786 if (get_wcaps_type(get_wcaps(codec, 0x28)) == AC_WID_VOL_KNB)
4787 snd_hda_add_verbs(codec, stac92hd71bxx_core_init);
4788
4789 if (get_wcaps(codec, 0xa) & AC_WCAP_IN_AMP) {
4790 const hda_nid_t *p;
4791 for (p = unmute_nids; *p; p++)
4792 snd_hda_codec_amp_init_stereo(codec, *p, HDA_INPUT, 0,
4793 0xff, 0x00);
4794 }
4795
4796 spec->aloopback_ctl = &stac92hd71bxx_loopback;
4797 spec->aloopback_mask = 0x50;
4798 spec->aloopback_shift = 0;
4799
4800 spec->powerdown_adcs = 1;
4801 spec->gen.beep_nid = 0x26; /* digital beep */
4802 spec->num_pwrs = ARRAY_SIZE(stac92hd71bxx_pwr_nids);
4803 spec->pwr_nids = stac92hd71bxx_pwr_nids;
4804
4805 snd_hda_pick_fixup(codec, stac92hd71bxx_models, stac92hd71bxx_fixup_tbl,
4806 stac92hd71bxx_fixups);
4807 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
4808
4809 stac_setup_gpio(codec);
4810
4811 err = stac_parse_auto_config(codec);
4812 if (err < 0) {
4813 stac_free(codec);
4814 return err;
4815 }
4816
4817 codec->proc_widget_hook = stac92hd7x_proc_hook;
4818
4819 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
4820
4821 return 0;
4822}
4823
4824static int patch_stac922x(struct hda_codec *codec)
4825{
4826 struct sigmatel_spec *spec;
4827 int err;
4828
4829 err = alloc_stac_spec(codec);
4830 if (err < 0)
4831 return err;
4832
4833 spec = codec->spec;
4834 spec->linear_tone_beep = 1;
4835 spec->gen.own_eapd_ctl = 1;
4836
4837 snd_hda_add_verbs(codec, stac922x_core_init);
4838
4839 /* Fix Mux capture level; max to 2 */
4840 snd_hda_override_amp_caps(codec, 0x12, HDA_OUTPUT,
4841 (0 << AC_AMPCAP_OFFSET_SHIFT) |
4842 (2 << AC_AMPCAP_NUM_STEPS_SHIFT) |
4843 (0x27 << AC_AMPCAP_STEP_SIZE_SHIFT) |
4844 (0 << AC_AMPCAP_MUTE_SHIFT));
4845
4846 snd_hda_pick_fixup(codec, stac922x_models, stac922x_fixup_tbl,
4847 stac922x_fixups);
4848 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
4849
4850 err = stac_parse_auto_config(codec);
4851 if (err < 0) {
4852 stac_free(codec);
4853 return err;
4854 }
4855
4856 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
4857
4858 return 0;
4859}
4860
4861static const char * const stac927x_spdif_labels[] = {
4862 "Digital Playback", "ADAT", "Analog Mux 1",
4863 "Analog Mux 2", "Analog Mux 3", NULL
4864};
4865
4866static int patch_stac927x(struct hda_codec *codec)
4867{
4868 struct sigmatel_spec *spec;
4869 int err;
4870
4871 err = alloc_stac_spec(codec);
4872 if (err < 0)
4873 return err;
4874
4875 spec = codec->spec;
4876 spec->linear_tone_beep = 1;
4877 spec->gen.own_eapd_ctl = 1;
4878 spec->have_spdif_mux = 1;
4879 spec->spdif_labels = stac927x_spdif_labels;
4880
4881 spec->gen.beep_nid = 0x23; /* digital beep */
4882
4883 /* GPIO0 High = Enable EAPD */
4884 spec->eapd_mask = spec->gpio_mask = 0x01;
4885 spec->gpio_dir = spec->gpio_data = 0x01;
4886
4887 spec->aloopback_ctl = &stac927x_loopback;
4888 spec->aloopback_mask = 0x40;
4889 spec->aloopback_shift = 0;
4890 spec->eapd_switch = 1;
4891
4892 snd_hda_pick_fixup(codec, stac927x_models, stac927x_fixup_tbl,
4893 stac927x_fixups);
4894 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
4895
4896 if (!spec->volknob_init)
4897 snd_hda_add_verbs(codec, stac927x_core_init);
4898
4899 err = stac_parse_auto_config(codec);
4900 if (err < 0) {
4901 stac_free(codec);
4902 return err;
4903 }
4904
4905 codec->proc_widget_hook = stac927x_proc_hook;
4906
4907 /*
4908 * !!FIXME!!
4909 * The STAC927x seem to require fairly long delays for certain
4910 * command sequences. With too short delays (even if the answer
4911 * is set to RIRB properly), it results in the silence output
4912 * on some hardwares like Dell.
4913 *
4914 * The below flag enables the longer delay (see get_response
4915 * in hda_intel.c).
4916 */
4917 codec->bus->core.needs_damn_long_delay = 1;
4918
4919 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
4920
4921 return 0;
4922}
4923
4924static int patch_stac9205(struct hda_codec *codec)
4925{
4926 struct sigmatel_spec *spec;
4927 int err;
4928
4929 err = alloc_stac_spec(codec);
4930 if (err < 0)
4931 return err;
4932
4933 spec = codec->spec;
4934 spec->linear_tone_beep = 1;
4935 spec->gen.own_eapd_ctl = 1;
4936 spec->have_spdif_mux = 1;
4937
4938 spec->gen.beep_nid = 0x23; /* digital beep */
4939
4940 snd_hda_add_verbs(codec, stac9205_core_init);
4941 spec->aloopback_ctl = &stac9205_loopback;
4942
4943 spec->aloopback_mask = 0x40;
4944 spec->aloopback_shift = 0;
4945
4946 /* GPIO0 High = EAPD */
4947 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
4948 spec->gpio_data = 0x01;
4949
4950 /* Turn on/off EAPD per HP plugging */
4951 spec->eapd_switch = 1;
4952
4953 snd_hda_pick_fixup(codec, stac9205_models, stac9205_fixup_tbl,
4954 stac9205_fixups);
4955 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
4956
4957 err = stac_parse_auto_config(codec);
4958 if (err < 0) {
4959 stac_free(codec);
4960 return err;
4961 }
4962
4963 codec->proc_widget_hook = stac9205_proc_hook;
4964
4965 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
4966
4967 return 0;
4968}
4969
4970/*
4971 * STAC9872 hack
4972 */
4973
4974static const struct hda_verb stac9872_core_init[] = {
4975 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
4976 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
4977 {}
4978};
4979
4980static const struct hda_pintbl stac9872_vaio_pin_configs[] = {
4981 { 0x0a, 0x03211020 },
4982 { 0x0b, 0x411111f0 },
4983 { 0x0c, 0x411111f0 },
4984 { 0x0d, 0x03a15030 },
4985 { 0x0e, 0x411111f0 },
4986 { 0x0f, 0x90170110 },
4987 { 0x11, 0x411111f0 },
4988 { 0x13, 0x411111f0 },
4989 { 0x14, 0x90a7013e },
4990 {}
4991};
4992
4993static const struct hda_model_fixup stac9872_models[] = {
4994 { .id = STAC_9872_VAIO, .name = "vaio" },
4995 {}
4996};
4997
4998static const struct hda_fixup stac9872_fixups[] = {
4999 [STAC_9872_VAIO] = {
5000 .type = HDA_FIXUP_PINS,
5001 .v.pins = stac9872_vaio_pin_configs,
5002 },
5003};
5004
5005static const struct hda_quirk stac9872_fixup_tbl[] = {
5006 SND_PCI_QUIRK_MASK(0x104d, 0xfff0, 0x81e0,
5007 "Sony VAIO F/S", STAC_9872_VAIO),
5008 {} /* terminator */
5009};
5010
5011static int patch_stac9872(struct hda_codec *codec)
5012{
5013 struct sigmatel_spec *spec;
5014 int err;
5015
5016 err = alloc_stac_spec(codec);
5017 if (err < 0)
5018 return err;
5019
5020 spec = codec->spec;
5021 spec->linear_tone_beep = 1;
5022 spec->gen.own_eapd_ctl = 1;
5023
5024 snd_hda_add_verbs(codec, stac9872_core_init);
5025
5026 snd_hda_pick_fixup(codec, stac9872_models, stac9872_fixup_tbl,
5027 stac9872_fixups);
5028 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
5029
5030 err = stac_parse_auto_config(codec);
5031 if (err < 0) {
5032 stac_free(codec);
5033 return -EINVAL;
5034 }
5035
5036 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
5037
5038 return 0;
5039}
5040
5041
5042/*
5043 * patch entries
5044 */
5045static const struct hda_device_id snd_hda_id_sigmatel[] = {
5046 HDA_CODEC_ENTRY(0x83847690, "STAC9200", patch_stac9200),
5047 HDA_CODEC_ENTRY(0x83847882, "STAC9220 A1", patch_stac922x),
5048 HDA_CODEC_ENTRY(0x83847680, "STAC9221 A1", patch_stac922x),
5049 HDA_CODEC_ENTRY(0x83847880, "STAC9220 A2", patch_stac922x),
5050 HDA_CODEC_ENTRY(0x83847681, "STAC9220D/9223D A2", patch_stac922x),
5051 HDA_CODEC_ENTRY(0x83847682, "STAC9221 A2", patch_stac922x),
5052 HDA_CODEC_ENTRY(0x83847683, "STAC9221D A2", patch_stac922x),
5053 HDA_CODEC_ENTRY(0x83847618, "STAC9227", patch_stac927x),
5054 HDA_CODEC_ENTRY(0x83847619, "STAC9227", patch_stac927x),
5055 HDA_CODEC_ENTRY(0x83847638, "STAC92HD700", patch_stac927x),
5056 HDA_CODEC_ENTRY(0x83847616, "STAC9228", patch_stac927x),
5057 HDA_CODEC_ENTRY(0x83847617, "STAC9228", patch_stac927x),
5058 HDA_CODEC_ENTRY(0x83847614, "STAC9229", patch_stac927x),
5059 HDA_CODEC_ENTRY(0x83847615, "STAC9229", patch_stac927x),
5060 HDA_CODEC_ENTRY(0x83847620, "STAC9274", patch_stac927x),
5061 HDA_CODEC_ENTRY(0x83847621, "STAC9274D", patch_stac927x),
5062 HDA_CODEC_ENTRY(0x83847622, "STAC9273X", patch_stac927x),
5063 HDA_CODEC_ENTRY(0x83847623, "STAC9273D", patch_stac927x),
5064 HDA_CODEC_ENTRY(0x83847624, "STAC9272X", patch_stac927x),
5065 HDA_CODEC_ENTRY(0x83847625, "STAC9272D", patch_stac927x),
5066 HDA_CODEC_ENTRY(0x83847626, "STAC9271X", patch_stac927x),
5067 HDA_CODEC_ENTRY(0x83847627, "STAC9271D", patch_stac927x),
5068 HDA_CODEC_ENTRY(0x83847628, "STAC9274X5NH", patch_stac927x),
5069 HDA_CODEC_ENTRY(0x83847629, "STAC9274D5NH", patch_stac927x),
5070 HDA_CODEC_ENTRY(0x83847632, "STAC9202", patch_stac925x),
5071 HDA_CODEC_ENTRY(0x83847633, "STAC9202D", patch_stac925x),
5072 HDA_CODEC_ENTRY(0x83847634, "STAC9250", patch_stac925x),
5073 HDA_CODEC_ENTRY(0x83847635, "STAC9250D", patch_stac925x),
5074 HDA_CODEC_ENTRY(0x83847636, "STAC9251", patch_stac925x),
5075 HDA_CODEC_ENTRY(0x83847637, "STAC9250D", patch_stac925x),
5076 HDA_CODEC_ENTRY(0x83847645, "92HD206X", patch_stac927x),
5077 HDA_CODEC_ENTRY(0x83847646, "92HD206D", patch_stac927x),
5078 /* The following does not take into account .id=0x83847661 when subsys =
5079 * 104D0C00 which is STAC9225s. Because of this, some SZ Notebooks are
5080 * currently not fully supported.
5081 */
5082 HDA_CODEC_ENTRY(0x83847661, "CXD9872RD/K", patch_stac9872),
5083 HDA_CODEC_ENTRY(0x83847662, "STAC9872AK", patch_stac9872),
5084 HDA_CODEC_ENTRY(0x83847664, "CXD9872AKD", patch_stac9872),
5085 HDA_CODEC_ENTRY(0x83847698, "STAC9205", patch_stac9205),
5086 HDA_CODEC_ENTRY(0x838476a0, "STAC9205", patch_stac9205),
5087 HDA_CODEC_ENTRY(0x838476a1, "STAC9205D", patch_stac9205),
5088 HDA_CODEC_ENTRY(0x838476a2, "STAC9204", patch_stac9205),
5089 HDA_CODEC_ENTRY(0x838476a3, "STAC9204D", patch_stac9205),
5090 HDA_CODEC_ENTRY(0x838476a4, "STAC9255", patch_stac9205),
5091 HDA_CODEC_ENTRY(0x838476a5, "STAC9255D", patch_stac9205),
5092 HDA_CODEC_ENTRY(0x838476a6, "STAC9254", patch_stac9205),
5093 HDA_CODEC_ENTRY(0x838476a7, "STAC9254D", patch_stac9205),
5094 HDA_CODEC_ENTRY(0x111d7603, "92HD75B3X5", patch_stac92hd71bxx),
5095 HDA_CODEC_ENTRY(0x111d7604, "92HD83C1X5", patch_stac92hd83xxx),
5096 HDA_CODEC_ENTRY(0x111d76d4, "92HD83C1C5", patch_stac92hd83xxx),
5097 HDA_CODEC_ENTRY(0x111d7605, "92HD81B1X5", patch_stac92hd83xxx),
5098 HDA_CODEC_ENTRY(0x111d76d5, "92HD81B1C5", patch_stac92hd83xxx),
5099 HDA_CODEC_ENTRY(0x111d76d1, "92HD87B1/3", patch_stac92hd83xxx),
5100 HDA_CODEC_ENTRY(0x111d76d9, "92HD87B2/4", patch_stac92hd83xxx),
5101 HDA_CODEC_ENTRY(0x111d7666, "92HD88B3", patch_stac92hd83xxx),
5102 HDA_CODEC_ENTRY(0x111d7667, "92HD88B1", patch_stac92hd83xxx),
5103 HDA_CODEC_ENTRY(0x111d7668, "92HD88B2", patch_stac92hd83xxx),
5104 HDA_CODEC_ENTRY(0x111d7669, "92HD88B4", patch_stac92hd83xxx),
5105 HDA_CODEC_ENTRY(0x111d7608, "92HD75B2X5", patch_stac92hd71bxx),
5106 HDA_CODEC_ENTRY(0x111d7674, "92HD73D1X5", patch_stac92hd73xx),
5107 HDA_CODEC_ENTRY(0x111d7675, "92HD73C1X5", patch_stac92hd73xx),
5108 HDA_CODEC_ENTRY(0x111d7676, "92HD73E1X5", patch_stac92hd73xx),
5109 HDA_CODEC_ENTRY(0x111d7695, "92HD95", patch_stac92hd95),
5110 HDA_CODEC_ENTRY(0x111d76b0, "92HD71B8X", patch_stac92hd71bxx),
5111 HDA_CODEC_ENTRY(0x111d76b1, "92HD71B8X", patch_stac92hd71bxx),
5112 HDA_CODEC_ENTRY(0x111d76b2, "92HD71B7X", patch_stac92hd71bxx),
5113 HDA_CODEC_ENTRY(0x111d76b3, "92HD71B7X", patch_stac92hd71bxx),
5114 HDA_CODEC_ENTRY(0x111d76b4, "92HD71B6X", patch_stac92hd71bxx),
5115 HDA_CODEC_ENTRY(0x111d76b5, "92HD71B6X", patch_stac92hd71bxx),
5116 HDA_CODEC_ENTRY(0x111d76b6, "92HD71B5X", patch_stac92hd71bxx),
5117 HDA_CODEC_ENTRY(0x111d76b7, "92HD71B5X", patch_stac92hd71bxx),
5118 HDA_CODEC_ENTRY(0x111d76c0, "92HD89C3", patch_stac92hd73xx),
5119 HDA_CODEC_ENTRY(0x111d76c1, "92HD89C2", patch_stac92hd73xx),
5120 HDA_CODEC_ENTRY(0x111d76c2, "92HD89C1", patch_stac92hd73xx),
5121 HDA_CODEC_ENTRY(0x111d76c3, "92HD89B3", patch_stac92hd73xx),
5122 HDA_CODEC_ENTRY(0x111d76c4, "92HD89B2", patch_stac92hd73xx),
5123 HDA_CODEC_ENTRY(0x111d76c5, "92HD89B1", patch_stac92hd73xx),
5124 HDA_CODEC_ENTRY(0x111d76c6, "92HD89E3", patch_stac92hd73xx),
5125 HDA_CODEC_ENTRY(0x111d76c7, "92HD89E2", patch_stac92hd73xx),
5126 HDA_CODEC_ENTRY(0x111d76c8, "92HD89E1", patch_stac92hd73xx),
5127 HDA_CODEC_ENTRY(0x111d76c9, "92HD89D3", patch_stac92hd73xx),
5128 HDA_CODEC_ENTRY(0x111d76ca, "92HD89D2", patch_stac92hd73xx),
5129 HDA_CODEC_ENTRY(0x111d76cb, "92HD89D1", patch_stac92hd73xx),
5130 HDA_CODEC_ENTRY(0x111d76cc, "92HD89F3", patch_stac92hd73xx),
5131 HDA_CODEC_ENTRY(0x111d76cd, "92HD89F2", patch_stac92hd73xx),
5132 HDA_CODEC_ENTRY(0x111d76ce, "92HD89F1", patch_stac92hd73xx),
5133 HDA_CODEC_ENTRY(0x111d76df, "92HD93BXX", patch_stac92hd83xxx),
5134 HDA_CODEC_ENTRY(0x111d76e0, "92HD91BXX", patch_stac92hd83xxx),
5135 HDA_CODEC_ENTRY(0x111d76e3, "92HD98BXX", patch_stac92hd83xxx),
5136 HDA_CODEC_ENTRY(0x111d76e5, "92HD99BXX", patch_stac92hd83xxx),
5137 HDA_CODEC_ENTRY(0x111d76e7, "92HD90BXX", patch_stac92hd83xxx),
5138 HDA_CODEC_ENTRY(0x111d76e8, "92HD66B1X5", patch_stac92hd83xxx),
5139 HDA_CODEC_ENTRY(0x111d76e9, "92HD66B2X5", patch_stac92hd83xxx),
5140 HDA_CODEC_ENTRY(0x111d76ea, "92HD66B3X5", patch_stac92hd83xxx),
5141 HDA_CODEC_ENTRY(0x111d76eb, "92HD66C1X5", patch_stac92hd83xxx),
5142 HDA_CODEC_ENTRY(0x111d76ec, "92HD66C2X5", patch_stac92hd83xxx),
5143 HDA_CODEC_ENTRY(0x111d76ed, "92HD66C3X5", patch_stac92hd83xxx),
5144 HDA_CODEC_ENTRY(0x111d76ee, "92HD66B1X3", patch_stac92hd83xxx),
5145 HDA_CODEC_ENTRY(0x111d76ef, "92HD66B2X3", patch_stac92hd83xxx),
5146 HDA_CODEC_ENTRY(0x111d76f0, "92HD66B3X3", patch_stac92hd83xxx),
5147 HDA_CODEC_ENTRY(0x111d76f1, "92HD66C1X3", patch_stac92hd83xxx),
5148 HDA_CODEC_ENTRY(0x111d76f2, "92HD66C2X3", patch_stac92hd83xxx),
5149 HDA_CODEC_ENTRY(0x111d76f3, "92HD66C3/65", patch_stac92hd83xxx),
5150 {} /* terminator */
5151};
5152MODULE_DEVICE_TABLE(hdaudio, snd_hda_id_sigmatel);
5153
5154MODULE_LICENSE("GPL");
5155MODULE_DESCRIPTION("IDT/Sigmatel HD-audio codec");
5156
5157static struct hda_codec_driver sigmatel_driver = {
5158 .id = snd_hda_id_sigmatel,
5159};
5160
5161module_hda_codec_driver(sigmatel_driver);