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1/*
2 * Broadcom specific Advanced Microcontroller Bus
3 * Broadcom USB-core driver (BCMA bus glue)
4 *
5 * Copyright 2011-2012 Hauke Mehrtens <hauke@hauke-m.de>
6 *
7 * Based on ssb-ohci driver
8 * Copyright 2007 Michael Buesch <m@bues.ch>
9 *
10 * Derived from the OHCI-PCI driver
11 * Copyright 1999 Roman Weissgaerber
12 * Copyright 2000-2002 David Brownell
13 * Copyright 1999 Linus Torvalds
14 * Copyright 1999 Gregory P. Smith
15 *
16 * Derived from the USBcore related parts of Broadcom-SB
17 * Copyright 2005-2011 Broadcom Corporation
18 *
19 * Licensed under the GNU/GPL. See COPYING for details.
20 */
21#include <linux/bcma/bcma.h>
22#include <linux/delay.h>
23#include <linux/platform_device.h>
24#include <linux/module.h>
25#include <linux/slab.h>
26#include <linux/usb/ehci_pdriver.h>
27#include <linux/usb/ohci_pdriver.h>
28
29MODULE_AUTHOR("Hauke Mehrtens");
30MODULE_DESCRIPTION("Common USB driver for BCMA Bus");
31MODULE_LICENSE("GPL");
32
33struct bcma_hcd_device {
34 struct platform_device *ehci_dev;
35 struct platform_device *ohci_dev;
36};
37
38/* Wait for bitmask in a register to get set or cleared.
39 * timeout is in units of ten-microseconds.
40 */
41static int bcma_wait_bits(struct bcma_device *dev, u16 reg, u32 bitmask,
42 int timeout)
43{
44 int i;
45 u32 val;
46
47 for (i = 0; i < timeout; i++) {
48 val = bcma_read32(dev, reg);
49 if ((val & bitmask) == bitmask)
50 return 0;
51 udelay(10);
52 }
53
54 return -ETIMEDOUT;
55}
56
57static void bcma_hcd_4716wa(struct bcma_device *dev)
58{
59#ifdef CONFIG_BCMA_DRIVER_MIPS
60 /* Work around for 4716 failures. */
61 if (dev->bus->chipinfo.id == 0x4716) {
62 u32 tmp;
63
64 tmp = bcma_cpu_clock(&dev->bus->drv_mips);
65 if (tmp >= 480000000)
66 tmp = 0x1846b; /* set CDR to 0x11(fast) */
67 else if (tmp == 453000000)
68 tmp = 0x1046b; /* set CDR to 0x10(slow) */
69 else
70 tmp = 0;
71
72 /* Change Shim mdio control reg to fix host not acking at
73 * high frequencies
74 */
75 if (tmp) {
76 bcma_write32(dev, 0x524, 0x1); /* write sel to enable */
77 udelay(500);
78
79 bcma_write32(dev, 0x524, tmp);
80 udelay(500);
81 bcma_write32(dev, 0x524, 0x4ab);
82 udelay(500);
83 bcma_read32(dev, 0x528);
84 bcma_write32(dev, 0x528, 0x80000000);
85 }
86 }
87#endif /* CONFIG_BCMA_DRIVER_MIPS */
88}
89
90/* based on arch/mips/brcm-boards/bcm947xx/pcibios.c */
91static void bcma_hcd_init_chip(struct bcma_device *dev)
92{
93 u32 tmp;
94
95 /*
96 * USB 2.0 special considerations:
97 *
98 * 1. Since the core supports both OHCI and EHCI functions, it must
99 * only be reset once.
100 *
101 * 2. In addition to the standard SI reset sequence, the Host Control
102 * Register must be programmed to bring the USB core and various
103 * phy components out of reset.
104 */
105 if (!bcma_core_is_enabled(dev)) {
106 bcma_core_enable(dev, 0);
107 mdelay(10);
108 if (dev->id.rev >= 5) {
109 /* Enable Misc PLL */
110 tmp = bcma_read32(dev, 0x1e0);
111 tmp |= 0x100;
112 bcma_write32(dev, 0x1e0, tmp);
113 if (bcma_wait_bits(dev, 0x1e0, 1 << 24, 100))
114 printk(KERN_EMERG "Failed to enable misc PPL!\n");
115
116 /* Take out of resets */
117 bcma_write32(dev, 0x200, 0x4ff);
118 udelay(25);
119 bcma_write32(dev, 0x200, 0x6ff);
120 udelay(25);
121
122 /* Make sure digital and AFE are locked in USB PHY */
123 bcma_write32(dev, 0x524, 0x6b);
124 udelay(50);
125 tmp = bcma_read32(dev, 0x524);
126 udelay(50);
127 bcma_write32(dev, 0x524, 0xab);
128 udelay(50);
129 tmp = bcma_read32(dev, 0x524);
130 udelay(50);
131 bcma_write32(dev, 0x524, 0x2b);
132 udelay(50);
133 tmp = bcma_read32(dev, 0x524);
134 udelay(50);
135 bcma_write32(dev, 0x524, 0x10ab);
136 udelay(50);
137 tmp = bcma_read32(dev, 0x524);
138
139 if (bcma_wait_bits(dev, 0x528, 0xc000, 10000)) {
140 tmp = bcma_read32(dev, 0x528);
141 printk(KERN_EMERG
142 "USB20H mdio_rddata 0x%08x\n", tmp);
143 }
144 bcma_write32(dev, 0x528, 0x80000000);
145 tmp = bcma_read32(dev, 0x314);
146 udelay(265);
147 bcma_write32(dev, 0x200, 0x7ff);
148 udelay(10);
149
150 /* Take USB and HSIC out of non-driving modes */
151 bcma_write32(dev, 0x510, 0);
152 } else {
153 bcma_write32(dev, 0x200, 0x7ff);
154
155 udelay(1);
156 }
157
158 bcma_hcd_4716wa(dev);
159 }
160}
161
162static const struct usb_ehci_pdata ehci_pdata = {
163};
164
165static const struct usb_ohci_pdata ohci_pdata = {
166};
167
168static struct platform_device *bcma_hcd_create_pdev(struct bcma_device *dev, bool ohci, u32 addr)
169{
170 struct platform_device *hci_dev;
171 struct resource hci_res[2];
172 int ret = -ENOMEM;
173
174 memset(hci_res, 0, sizeof(hci_res));
175
176 hci_res[0].start = addr;
177 hci_res[0].end = hci_res[0].start + 0x1000 - 1;
178 hci_res[0].flags = IORESOURCE_MEM;
179
180 hci_res[1].start = dev->irq;
181 hci_res[1].flags = IORESOURCE_IRQ;
182
183 hci_dev = platform_device_alloc(ohci ? "ohci-platform" :
184 "ehci-platform" , 0);
185 if (!hci_dev)
186 return NULL;
187
188 hci_dev->dev.parent = &dev->dev;
189 hci_dev->dev.dma_mask = &hci_dev->dev.coherent_dma_mask;
190
191 ret = platform_device_add_resources(hci_dev, hci_res,
192 ARRAY_SIZE(hci_res));
193 if (ret)
194 goto err_alloc;
195 if (ohci)
196 ret = platform_device_add_data(hci_dev, &ohci_pdata,
197 sizeof(ohci_pdata));
198 else
199 ret = platform_device_add_data(hci_dev, &ehci_pdata,
200 sizeof(ehci_pdata));
201 if (ret)
202 goto err_alloc;
203 ret = platform_device_add(hci_dev);
204 if (ret)
205 goto err_alloc;
206
207 return hci_dev;
208
209err_alloc:
210 platform_device_put(hci_dev);
211 return ERR_PTR(ret);
212}
213
214static int bcma_hcd_probe(struct bcma_device *dev)
215{
216 int err;
217 u16 chipid_top;
218 u32 ohci_addr;
219 struct bcma_hcd_device *usb_dev;
220 struct bcma_chipinfo *chipinfo;
221
222 chipinfo = &dev->bus->chipinfo;
223 /* USBcores are only connected on embedded devices. */
224 chipid_top = (chipinfo->id & 0xFF00);
225 if (chipid_top != 0x4700 && chipid_top != 0x5300)
226 return -ENODEV;
227
228 /* TODO: Probably need checks here; is the core connected? */
229
230 if (dma_set_mask_and_coherent(dev->dma_dev, DMA_BIT_MASK(32)))
231 return -EOPNOTSUPP;
232
233 usb_dev = kzalloc(sizeof(struct bcma_hcd_device), GFP_KERNEL);
234 if (!usb_dev)
235 return -ENOMEM;
236
237 bcma_hcd_init_chip(dev);
238
239 /* In AI chips EHCI is addrspace 0, OHCI is 1 */
240 ohci_addr = dev->addr1;
241 if ((chipinfo->id == 0x5357 || chipinfo->id == 0x4749)
242 && chipinfo->rev == 0)
243 ohci_addr = 0x18009000;
244
245 usb_dev->ohci_dev = bcma_hcd_create_pdev(dev, true, ohci_addr);
246 if (IS_ERR(usb_dev->ohci_dev)) {
247 err = PTR_ERR(usb_dev->ohci_dev);
248 goto err_free_usb_dev;
249 }
250
251 usb_dev->ehci_dev = bcma_hcd_create_pdev(dev, false, dev->addr);
252 if (IS_ERR(usb_dev->ehci_dev)) {
253 err = PTR_ERR(usb_dev->ehci_dev);
254 goto err_unregister_ohci_dev;
255 }
256
257 bcma_set_drvdata(dev, usb_dev);
258 return 0;
259
260err_unregister_ohci_dev:
261 platform_device_unregister(usb_dev->ohci_dev);
262err_free_usb_dev:
263 kfree(usb_dev);
264 return err;
265}
266
267static void bcma_hcd_remove(struct bcma_device *dev)
268{
269 struct bcma_hcd_device *usb_dev = bcma_get_drvdata(dev);
270 struct platform_device *ohci_dev = usb_dev->ohci_dev;
271 struct platform_device *ehci_dev = usb_dev->ehci_dev;
272
273 if (ohci_dev)
274 platform_device_unregister(ohci_dev);
275 if (ehci_dev)
276 platform_device_unregister(ehci_dev);
277
278 bcma_core_disable(dev, 0);
279}
280
281static void bcma_hcd_shutdown(struct bcma_device *dev)
282{
283 bcma_core_disable(dev, 0);
284}
285
286#ifdef CONFIG_PM
287
288static int bcma_hcd_suspend(struct bcma_device *dev)
289{
290 bcma_core_disable(dev, 0);
291
292 return 0;
293}
294
295static int bcma_hcd_resume(struct bcma_device *dev)
296{
297 bcma_core_enable(dev, 0);
298
299 return 0;
300}
301
302#else /* !CONFIG_PM */
303#define bcma_hcd_suspend NULL
304#define bcma_hcd_resume NULL
305#endif /* CONFIG_PM */
306
307static const struct bcma_device_id bcma_hcd_table[] = {
308 BCMA_CORE(BCMA_MANUF_BCM, BCMA_CORE_USB20_HOST, BCMA_ANY_REV, BCMA_ANY_CLASS),
309 BCMA_CORETABLE_END
310};
311MODULE_DEVICE_TABLE(bcma, bcma_hcd_table);
312
313static struct bcma_driver bcma_hcd_driver = {
314 .name = KBUILD_MODNAME,
315 .id_table = bcma_hcd_table,
316 .probe = bcma_hcd_probe,
317 .remove = bcma_hcd_remove,
318 .shutdown = bcma_hcd_shutdown,
319 .suspend = bcma_hcd_suspend,
320 .resume = bcma_hcd_resume,
321};
322
323static int __init bcma_hcd_init(void)
324{
325 return bcma_driver_register(&bcma_hcd_driver);
326}
327module_init(bcma_hcd_init);
328
329static void __exit bcma_hcd_exit(void)
330{
331 bcma_driver_unregister(&bcma_hcd_driver);
332}
333module_exit(bcma_hcd_exit);
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Broadcom specific Advanced Microcontroller Bus
4 * Broadcom USB-core driver (BCMA bus glue)
5 *
6 * Copyright 2011-2015 Hauke Mehrtens <hauke@hauke-m.de>
7 * Copyright 2015 Felix Fietkau <nbd@openwrt.org>
8 *
9 * Based on ssb-ohci driver
10 * Copyright 2007 Michael Buesch <m@bues.ch>
11 *
12 * Derived from the OHCI-PCI driver
13 * Copyright 1999 Roman Weissgaerber
14 * Copyright 2000-2002 David Brownell
15 * Copyright 1999 Linus Torvalds
16 * Copyright 1999 Gregory P. Smith
17 *
18 * Derived from the USBcore related parts of Broadcom-SB
19 * Copyright 2005-2011 Broadcom Corporation
20 */
21#include <linux/bcma/bcma.h>
22#include <linux/delay.h>
23#include <linux/gpio/consumer.h>
24#include <linux/platform_device.h>
25#include <linux/module.h>
26#include <linux/slab.h>
27#include <linux/of.h>
28#include <linux/of_platform.h>
29#include <linux/usb/ehci_pdriver.h>
30#include <linux/usb/ohci_pdriver.h>
31
32MODULE_AUTHOR("Hauke Mehrtens");
33MODULE_DESCRIPTION("Common USB driver for BCMA Bus");
34MODULE_LICENSE("GPL");
35
36/* See BCMA_CLKCTLST_EXTRESREQ and BCMA_CLKCTLST_EXTRESST */
37#define USB_BCMA_CLKCTLST_USB_CLK_REQ 0x00000100
38
39struct bcma_hcd_device {
40 struct bcma_device *core;
41 struct platform_device *ehci_dev;
42 struct platform_device *ohci_dev;
43 struct gpio_desc *gpio_desc;
44};
45
46/* Wait for bitmask in a register to get set or cleared.
47 * timeout is in units of ten-microseconds.
48 */
49static int bcma_wait_bits(struct bcma_device *dev, u16 reg, u32 bitmask,
50 int timeout)
51{
52 int i;
53 u32 val;
54
55 for (i = 0; i < timeout; i++) {
56 val = bcma_read32(dev, reg);
57 if ((val & bitmask) == bitmask)
58 return 0;
59 udelay(10);
60 }
61
62 return -ETIMEDOUT;
63}
64
65static void bcma_hcd_4716wa(struct bcma_device *dev)
66{
67#ifdef CONFIG_BCMA_DRIVER_MIPS
68 /* Work around for 4716 failures. */
69 if (dev->bus->chipinfo.id == 0x4716) {
70 u32 tmp;
71
72 tmp = bcma_cpu_clock(&dev->bus->drv_mips);
73 if (tmp >= 480000000)
74 tmp = 0x1846b; /* set CDR to 0x11(fast) */
75 else if (tmp == 453000000)
76 tmp = 0x1046b; /* set CDR to 0x10(slow) */
77 else
78 tmp = 0;
79
80 /* Change Shim mdio control reg to fix host not acking at
81 * high frequencies
82 */
83 if (tmp) {
84 bcma_write32(dev, 0x524, 0x1); /* write sel to enable */
85 udelay(500);
86
87 bcma_write32(dev, 0x524, tmp);
88 udelay(500);
89 bcma_write32(dev, 0x524, 0x4ab);
90 udelay(500);
91 bcma_read32(dev, 0x528);
92 bcma_write32(dev, 0x528, 0x80000000);
93 }
94 }
95#endif /* CONFIG_BCMA_DRIVER_MIPS */
96}
97
98/* based on arch/mips/brcm-boards/bcm947xx/pcibios.c */
99static void bcma_hcd_init_chip_mips(struct bcma_device *dev)
100{
101 u32 tmp;
102
103 /*
104 * USB 2.0 special considerations:
105 *
106 * 1. Since the core supports both OHCI and EHCI functions, it must
107 * only be reset once.
108 *
109 * 2. In addition to the standard SI reset sequence, the Host Control
110 * Register must be programmed to bring the USB core and various
111 * phy components out of reset.
112 */
113 if (!bcma_core_is_enabled(dev)) {
114 bcma_core_enable(dev, 0);
115 mdelay(10);
116 if (dev->id.rev >= 5) {
117 /* Enable Misc PLL */
118 tmp = bcma_read32(dev, 0x1e0);
119 tmp |= 0x100;
120 bcma_write32(dev, 0x1e0, tmp);
121 if (bcma_wait_bits(dev, 0x1e0, 1 << 24, 100))
122 printk(KERN_EMERG "Failed to enable misc PPL!\n");
123
124 /* Take out of resets */
125 bcma_write32(dev, 0x200, 0x4ff);
126 udelay(25);
127 bcma_write32(dev, 0x200, 0x6ff);
128 udelay(25);
129
130 /* Make sure digital and AFE are locked in USB PHY */
131 bcma_write32(dev, 0x524, 0x6b);
132 udelay(50);
133 tmp = bcma_read32(dev, 0x524);
134 udelay(50);
135 bcma_write32(dev, 0x524, 0xab);
136 udelay(50);
137 tmp = bcma_read32(dev, 0x524);
138 udelay(50);
139 bcma_write32(dev, 0x524, 0x2b);
140 udelay(50);
141 tmp = bcma_read32(dev, 0x524);
142 udelay(50);
143 bcma_write32(dev, 0x524, 0x10ab);
144 udelay(50);
145 tmp = bcma_read32(dev, 0x524);
146
147 if (bcma_wait_bits(dev, 0x528, 0xc000, 10000)) {
148 tmp = bcma_read32(dev, 0x528);
149 printk(KERN_EMERG
150 "USB20H mdio_rddata 0x%08x\n", tmp);
151 }
152 bcma_write32(dev, 0x528, 0x80000000);
153 tmp = bcma_read32(dev, 0x314);
154 udelay(265);
155 bcma_write32(dev, 0x200, 0x7ff);
156 udelay(10);
157
158 /* Take USB and HSIC out of non-driving modes */
159 bcma_write32(dev, 0x510, 0);
160 } else {
161 bcma_write32(dev, 0x200, 0x7ff);
162
163 udelay(1);
164 }
165
166 bcma_hcd_4716wa(dev);
167 }
168}
169
170/*
171 * bcma_hcd_usb20_old_arm_init - Initialize old USB 2.0 controller on ARM
172 *
173 * Old USB 2.0 core is identified as BCMA_CORE_USB20_HOST and was introduced
174 * long before Northstar devices. It seems some cheaper chipsets like BCM53573
175 * still use it.
176 * Initialization of this old core differs between MIPS and ARM.
177 */
178static int bcma_hcd_usb20_old_arm_init(struct bcma_hcd_device *usb_dev)
179{
180 struct bcma_device *core = usb_dev->core;
181 struct device *dev = &core->dev;
182 struct bcma_device *pmu_core;
183
184 usleep_range(10000, 20000);
185 if (core->id.rev < 5)
186 return 0;
187
188 pmu_core = bcma_find_core(core->bus, BCMA_CORE_PMU);
189 if (!pmu_core) {
190 dev_err(dev, "Could not find PMU core\n");
191 return -ENOENT;
192 }
193
194 /* Take USB core out of reset */
195 bcma_awrite32(core, BCMA_IOCTL, BCMA_IOCTL_CLK | BCMA_IOCTL_FGC);
196 usleep_range(100, 200);
197 bcma_awrite32(core, BCMA_RESET_CTL, BCMA_RESET_CTL_RESET);
198 usleep_range(100, 200);
199 bcma_awrite32(core, BCMA_RESET_CTL, 0);
200 usleep_range(100, 200);
201 bcma_awrite32(core, BCMA_IOCTL, BCMA_IOCTL_CLK);
202 usleep_range(100, 200);
203
204 /* Enable Misc PLL */
205 bcma_write32(core, BCMA_CLKCTLST, BCMA_CLKCTLST_FORCEHT |
206 BCMA_CLKCTLST_HQCLKREQ |
207 USB_BCMA_CLKCTLST_USB_CLK_REQ);
208 usleep_range(100, 200);
209
210 bcma_write32(core, 0x510, 0xc7f85000);
211 bcma_write32(core, 0x510, 0xc7f85003);
212 usleep_range(300, 600);
213
214 /* Program USB PHY PLL parameters */
215 bcma_write32(pmu_core, BCMA_CC_PMU_PLLCTL_ADDR, 0x6);
216 bcma_write32(pmu_core, BCMA_CC_PMU_PLLCTL_DATA, 0x005360c1);
217 usleep_range(100, 200);
218 bcma_write32(pmu_core, BCMA_CC_PMU_PLLCTL_ADDR, 0x7);
219 bcma_write32(pmu_core, BCMA_CC_PMU_PLLCTL_DATA, 0x0);
220 usleep_range(100, 200);
221 bcma_set32(pmu_core, BCMA_CC_PMU_CTL, BCMA_CC_PMU_CTL_PLL_UPD);
222 usleep_range(100, 200);
223
224 bcma_write32(core, 0x510, 0x7f8d007);
225 udelay(1000);
226
227 /* Take controller out of reset */
228 bcma_write32(core, 0x200, 0x4ff);
229 usleep_range(25, 50);
230 bcma_write32(core, 0x200, 0x6ff);
231 usleep_range(25, 50);
232 bcma_write32(core, 0x200, 0x7ff);
233 usleep_range(25, 50);
234
235 of_platform_default_populate(dev->of_node, NULL, dev);
236
237 return 0;
238}
239
240static void bcma_hcd_usb20_ns_init_hc(struct bcma_device *dev)
241{
242 u32 val;
243
244 /* Set packet buffer OUT threshold */
245 val = bcma_read32(dev, 0x94);
246 val &= 0xffff;
247 val |= 0x80 << 16;
248 bcma_write32(dev, 0x94, val);
249
250 /* Enable break memory transfer */
251 val = bcma_read32(dev, 0x9c);
252 val |= 1;
253 bcma_write32(dev, 0x9c, val);
254
255 /*
256 * Broadcom initializes PHY and then waits to ensure HC is ready to be
257 * configured. In our case the order is reversed. We just initialized
258 * controller and we let HCD initialize PHY, so let's wait (sleep) now.
259 */
260 usleep_range(1000, 2000);
261}
262
263/*
264 * bcma_hcd_usb20_ns_init - Initialize Northstar USB 2.0 controller
265 */
266static int bcma_hcd_usb20_ns_init(struct bcma_hcd_device *bcma_hcd)
267{
268 struct bcma_device *core = bcma_hcd->core;
269 struct bcma_chipinfo *ci = &core->bus->chipinfo;
270 struct device *dev = &core->dev;
271
272 bcma_core_enable(core, 0);
273
274 if (ci->id == BCMA_CHIP_ID_BCM4707 ||
275 ci->id == BCMA_CHIP_ID_BCM53018)
276 bcma_hcd_usb20_ns_init_hc(core);
277
278 of_platform_default_populate(dev->of_node, NULL, dev);
279
280 return 0;
281}
282
283static void bcma_hci_platform_power_gpio(struct bcma_device *dev, bool val)
284{
285 struct bcma_hcd_device *usb_dev = bcma_get_drvdata(dev);
286
287 if (!usb_dev->gpio_desc)
288 return;
289
290 gpiod_set_value(usb_dev->gpio_desc, val);
291}
292
293static const struct usb_ehci_pdata ehci_pdata = {
294};
295
296static const struct usb_ohci_pdata ohci_pdata = {
297};
298
299static struct platform_device *bcma_hcd_create_pdev(struct bcma_device *dev,
300 const char *name, u32 addr,
301 const void *data,
302 size_t size)
303{
304 struct platform_device *hci_dev;
305 struct resource hci_res[2];
306 int ret;
307
308 memset(hci_res, 0, sizeof(hci_res));
309
310 hci_res[0].start = addr;
311 hci_res[0].end = hci_res[0].start + 0x1000 - 1;
312 hci_res[0].flags = IORESOURCE_MEM;
313
314 hci_res[1].start = dev->irq;
315 hci_res[1].flags = IORESOURCE_IRQ;
316
317 hci_dev = platform_device_alloc(name, 0);
318 if (!hci_dev)
319 return ERR_PTR(-ENOMEM);
320
321 hci_dev->dev.parent = &dev->dev;
322 hci_dev->dev.dma_mask = &hci_dev->dev.coherent_dma_mask;
323
324 ret = platform_device_add_resources(hci_dev, hci_res,
325 ARRAY_SIZE(hci_res));
326 if (ret)
327 goto err_alloc;
328 if (data)
329 ret = platform_device_add_data(hci_dev, data, size);
330 if (ret)
331 goto err_alloc;
332 ret = platform_device_add(hci_dev);
333 if (ret)
334 goto err_alloc;
335
336 return hci_dev;
337
338err_alloc:
339 platform_device_put(hci_dev);
340 return ERR_PTR(ret);
341}
342
343static int bcma_hcd_usb20_init(struct bcma_hcd_device *usb_dev)
344{
345 struct bcma_device *dev = usb_dev->core;
346 struct bcma_chipinfo *chipinfo = &dev->bus->chipinfo;
347 u32 ohci_addr;
348 int err;
349
350 if (dma_set_mask_and_coherent(dev->dma_dev, DMA_BIT_MASK(32)))
351 return -EOPNOTSUPP;
352
353 bcma_hcd_init_chip_mips(dev);
354
355 /* In AI chips EHCI is addrspace 0, OHCI is 1 */
356 ohci_addr = dev->addr_s[0];
357 if ((chipinfo->id == BCMA_CHIP_ID_BCM5357 ||
358 chipinfo->id == BCMA_CHIP_ID_BCM4749)
359 && chipinfo->rev == 0)
360 ohci_addr = 0x18009000;
361
362 usb_dev->ohci_dev = bcma_hcd_create_pdev(dev, "ohci-platform",
363 ohci_addr, &ohci_pdata,
364 sizeof(ohci_pdata));
365 if (IS_ERR(usb_dev->ohci_dev))
366 return PTR_ERR(usb_dev->ohci_dev);
367
368 usb_dev->ehci_dev = bcma_hcd_create_pdev(dev, "ehci-platform",
369 dev->addr, &ehci_pdata,
370 sizeof(ehci_pdata));
371 if (IS_ERR(usb_dev->ehci_dev)) {
372 err = PTR_ERR(usb_dev->ehci_dev);
373 goto err_unregister_ohci_dev;
374 }
375
376 return 0;
377
378err_unregister_ohci_dev:
379 platform_device_unregister(usb_dev->ohci_dev);
380 return err;
381}
382
383static int bcma_hcd_usb30_init(struct bcma_hcd_device *bcma_hcd)
384{
385 struct bcma_device *core = bcma_hcd->core;
386 struct device *dev = &core->dev;
387
388 bcma_core_enable(core, 0);
389
390 of_platform_default_populate(dev->of_node, NULL, dev);
391
392 return 0;
393}
394
395static int bcma_hcd_probe(struct bcma_device *core)
396{
397 int err;
398 struct bcma_hcd_device *usb_dev;
399
400 /* TODO: Probably need checks here; is the core connected? */
401
402 usb_dev = devm_kzalloc(&core->dev, sizeof(struct bcma_hcd_device),
403 GFP_KERNEL);
404 if (!usb_dev)
405 return -ENOMEM;
406 usb_dev->core = core;
407
408 usb_dev->gpio_desc = devm_gpiod_get_optional(&core->dev, "vcc",
409 GPIOD_OUT_HIGH);
410 if (IS_ERR(usb_dev->gpio_desc))
411 return dev_err_probe(&core->dev, PTR_ERR(usb_dev->gpio_desc),
412 "error obtaining VCC GPIO");
413
414 switch (core->id.id) {
415 case BCMA_CORE_USB20_HOST:
416 if (IS_ENABLED(CONFIG_ARM))
417 err = bcma_hcd_usb20_old_arm_init(usb_dev);
418 else if (IS_ENABLED(CONFIG_MIPS))
419 err = bcma_hcd_usb20_init(usb_dev);
420 else
421 err = -ENOTSUPP;
422 break;
423 case BCMA_CORE_NS_USB20:
424 err = bcma_hcd_usb20_ns_init(usb_dev);
425 break;
426 case BCMA_CORE_NS_USB30:
427 err = bcma_hcd_usb30_init(usb_dev);
428 break;
429 default:
430 return -ENODEV;
431 }
432 if (err)
433 return err;
434
435 bcma_set_drvdata(core, usb_dev);
436 return 0;
437}
438
439static void bcma_hcd_remove(struct bcma_device *dev)
440{
441 struct bcma_hcd_device *usb_dev = bcma_get_drvdata(dev);
442 struct platform_device *ohci_dev = usb_dev->ohci_dev;
443 struct platform_device *ehci_dev = usb_dev->ehci_dev;
444
445 if (ohci_dev)
446 platform_device_unregister(ohci_dev);
447 if (ehci_dev)
448 platform_device_unregister(ehci_dev);
449
450 bcma_core_disable(dev, 0);
451}
452
453static void bcma_hcd_shutdown(struct bcma_device *dev)
454{
455 bcma_hci_platform_power_gpio(dev, false);
456 bcma_core_disable(dev, 0);
457}
458
459#ifdef CONFIG_PM
460
461static int bcma_hcd_suspend(struct bcma_device *dev)
462{
463 bcma_hci_platform_power_gpio(dev, false);
464 bcma_core_disable(dev, 0);
465
466 return 0;
467}
468
469static int bcma_hcd_resume(struct bcma_device *dev)
470{
471 bcma_hci_platform_power_gpio(dev, true);
472 bcma_core_enable(dev, 0);
473
474 return 0;
475}
476
477#else /* !CONFIG_PM */
478#define bcma_hcd_suspend NULL
479#define bcma_hcd_resume NULL
480#endif /* CONFIG_PM */
481
482static const struct bcma_device_id bcma_hcd_table[] = {
483 BCMA_CORE(BCMA_MANUF_BCM, BCMA_CORE_USB20_HOST, BCMA_ANY_REV, BCMA_ANY_CLASS),
484 BCMA_CORE(BCMA_MANUF_BCM, BCMA_CORE_NS_USB20, BCMA_ANY_REV, BCMA_ANY_CLASS),
485 BCMA_CORE(BCMA_MANUF_BCM, BCMA_CORE_NS_USB30, BCMA_ANY_REV, BCMA_ANY_CLASS),
486 {},
487};
488MODULE_DEVICE_TABLE(bcma, bcma_hcd_table);
489
490static struct bcma_driver bcma_hcd_driver = {
491 .name = KBUILD_MODNAME,
492 .id_table = bcma_hcd_table,
493 .probe = bcma_hcd_probe,
494 .remove = bcma_hcd_remove,
495 .shutdown = bcma_hcd_shutdown,
496 .suspend = bcma_hcd_suspend,
497 .resume = bcma_hcd_resume,
498};
499module_bcma_driver(bcma_hcd_driver);