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  1/*
  2 * DTC controller, taken from T128 driver by...
  3 * Copyright 1993, Drew Eckhardt
  4 *	Visionary Computing
  5 *	(Unix and Linux consulting and custom programming)
  6 *	drew@colorado.edu
  7 *      +1 (303) 440-4894
  8 *
  9 * DISTRIBUTION RELEASE 2. 
 10 *
 11 * For more information, please consult 
 12 *
 13 * 
 14 * 
 15 * and 
 16 *
 17 * NCR 5380 Family
 18 * SCSI Protocol Controller
 19 * Databook
 20 *
 21 * NCR Microelectronics
 22 * 1635 Aeroplaza Drive
 23 * Colorado Springs, CO 80916
 24 * 1+ (719) 578-3400
 25 * 1+ (800) 334-5454
 26 */
 27
 28#ifndef DTC3280_H
 29#define DTC3280_H
 30
 31#define DTCDEBUG 0
 32#define DTCDEBUG_INIT	0x1
 33#define DTCDEBUG_TRANSFER 0x2
 34
 35static int dtc_abort(Scsi_Cmnd *);
 36static int dtc_biosparam(struct scsi_device *, struct block_device *,
 37		         sector_t, int*);
 38static int dtc_detect(struct scsi_host_template *);
 39static int dtc_queue_command(struct Scsi_Host *, struct scsi_cmnd *);
 40static int dtc_bus_reset(Scsi_Cmnd *);
 41
 42#ifndef CMD_PER_LUN
 43#define CMD_PER_LUN 2
 44#endif
 45
 46#ifndef CAN_QUEUE
 47#define CAN_QUEUE 32 
 48#endif
 49
 50#define NCR5380_implementation_fields \
 51    void __iomem *base
 52
 53#define NCR5380_local_declare() \
 54    void __iomem *base
 55
 56#define NCR5380_setup(instance) \
 57    base = ((struct NCR5380_hostdata *)(instance)->hostdata)->base
 58
 59#define DTC_address(reg) (base + DTC_5380_OFFSET + reg)
 60
 61#define dbNCR5380_read(reg)                                              \
 62    (rval=readb(DTC_address(reg)), \
 63     (((unsigned char) printk("DTC : read register %d at addr %p is: %02x\n"\
 64    , (reg), DTC_address(reg), rval)), rval ) )
 65
 66#define dbNCR5380_write(reg, value) do {                                  \
 67    printk("DTC : write %02x to register %d at address %p\n",         \
 68            (value), (reg), DTC_address(reg));     \
 69    writeb(value, DTC_address(reg));} while(0)
 70
 71
 72#if !(DTCDEBUG & DTCDEBUG_TRANSFER) 
 73#define NCR5380_read(reg) (readb(DTC_address(reg)))
 74#define NCR5380_write(reg, value) (writeb(value, DTC_address(reg)))
 75#else
 76#define NCR5380_read(reg) (readb(DTC_address(reg)))
 77#define xNCR5380_read(reg)						\
 78    (((unsigned char) printk("DTC : read register %d at address %p\n"\
 79    , (reg), DTC_address(reg))), readb(DTC_address(reg)))
 80
 81#define NCR5380_write(reg, value) do {					\
 82    printk("DTC : write %02x to register %d at address %p\n", 	\
 83	    (value), (reg), DTC_address(reg));	\
 84    writeb(value, DTC_address(reg));} while(0)
 85#endif
 86
 87#define NCR5380_intr			dtc_intr
 88#define NCR5380_queue_command		dtc_queue_command
 89#define NCR5380_abort			dtc_abort
 90#define NCR5380_bus_reset		dtc_bus_reset
 91#define NCR5380_show_info		dtc_show_info 
 92#define NCR5380_write_info		dtc_write_info 
 93
 94/* 15 12 11 10
 95   1001 1100 0000 0000 */
 96
 97#define DTC_IRQS 0x9c00
 98
 99
100#endif /* DTC3280_H */