Loading...
1/*
2 * Routines for control of the CS8427 via i2c bus
3 * IEC958 (S/PDIF) receiver & transmitter by Cirrus Logic
4 * Copyright (c) by Jaroslav Kysela <perex@perex.cz>
5 *
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 *
21 */
22
23#include <linux/slab.h>
24#include <linux/delay.h>
25#include <linux/init.h>
26#include <linux/bitrev.h>
27#include <linux/module.h>
28#include <asm/unaligned.h>
29#include <sound/core.h>
30#include <sound/control.h>
31#include <sound/pcm.h>
32#include <sound/cs8427.h>
33#include <sound/asoundef.h>
34
35static void snd_cs8427_reset(struct snd_i2c_device *cs8427);
36
37MODULE_AUTHOR("Jaroslav Kysela <perex@perex.cz>");
38MODULE_DESCRIPTION("IEC958 (S/PDIF) receiver & transmitter by Cirrus Logic");
39MODULE_LICENSE("GPL");
40
41#define CS8427_ADDR (0x20>>1) /* fixed address */
42
43struct cs8427_stream {
44 struct snd_pcm_substream *substream;
45 char hw_status[24]; /* hardware status */
46 char def_status[24]; /* default status */
47 char pcm_status[24]; /* PCM private status */
48 char hw_udata[32];
49 struct snd_kcontrol *pcm_ctl;
50};
51
52struct cs8427 {
53 unsigned char regmap[0x14]; /* map of first 1 + 13 registers */
54 unsigned int rate;
55 unsigned int reset_timeout;
56 struct cs8427_stream playback;
57 struct cs8427_stream capture;
58};
59
60int snd_cs8427_reg_write(struct snd_i2c_device *device, unsigned char reg,
61 unsigned char val)
62{
63 int err;
64 unsigned char buf[2];
65
66 buf[0] = reg & 0x7f;
67 buf[1] = val;
68 if ((err = snd_i2c_sendbytes(device, buf, 2)) != 2) {
69 snd_printk(KERN_ERR "unable to send bytes 0x%02x:0x%02x "
70 "to CS8427 (%i)\n", buf[0], buf[1], err);
71 return err < 0 ? err : -EIO;
72 }
73 return 0;
74}
75
76EXPORT_SYMBOL(snd_cs8427_reg_write);
77
78static int snd_cs8427_reg_read(struct snd_i2c_device *device, unsigned char reg)
79{
80 int err;
81 unsigned char buf;
82
83 if ((err = snd_i2c_sendbytes(device, ®, 1)) != 1) {
84 snd_printk(KERN_ERR "unable to send register 0x%x byte "
85 "to CS8427\n", reg);
86 return err < 0 ? err : -EIO;
87 }
88 if ((err = snd_i2c_readbytes(device, &buf, 1)) != 1) {
89 snd_printk(KERN_ERR "unable to read register 0x%x byte "
90 "from CS8427\n", reg);
91 return err < 0 ? err : -EIO;
92 }
93 return buf;
94}
95
96static int snd_cs8427_select_corudata(struct snd_i2c_device *device, int udata)
97{
98 struct cs8427 *chip = device->private_data;
99 int err;
100
101 udata = udata ? CS8427_BSEL : 0;
102 if (udata != (chip->regmap[CS8427_REG_CSDATABUF] & udata)) {
103 chip->regmap[CS8427_REG_CSDATABUF] &= ~CS8427_BSEL;
104 chip->regmap[CS8427_REG_CSDATABUF] |= udata;
105 err = snd_cs8427_reg_write(device, CS8427_REG_CSDATABUF,
106 chip->regmap[CS8427_REG_CSDATABUF]);
107 if (err < 0)
108 return err;
109 }
110 return 0;
111}
112
113static int snd_cs8427_send_corudata(struct snd_i2c_device *device,
114 int udata,
115 unsigned char *ndata,
116 int count)
117{
118 struct cs8427 *chip = device->private_data;
119 char *hw_data = udata ?
120 chip->playback.hw_udata : chip->playback.hw_status;
121 char data[32];
122 int err, idx;
123
124 if (!memcmp(hw_data, ndata, count))
125 return 0;
126 if ((err = snd_cs8427_select_corudata(device, udata)) < 0)
127 return err;
128 memcpy(hw_data, ndata, count);
129 if (udata) {
130 memset(data, 0, sizeof(data));
131 if (memcmp(hw_data, data, count) == 0) {
132 chip->regmap[CS8427_REG_UDATABUF] &= ~CS8427_UBMMASK;
133 chip->regmap[CS8427_REG_UDATABUF] |= CS8427_UBMZEROS |
134 CS8427_EFTUI;
135 err = snd_cs8427_reg_write(device, CS8427_REG_UDATABUF,
136 chip->regmap[CS8427_REG_UDATABUF]);
137 return err < 0 ? err : 0;
138 }
139 }
140 data[0] = CS8427_REG_AUTOINC | CS8427_REG_CORU_DATABUF;
141 for (idx = 0; idx < count; idx++)
142 data[idx + 1] = bitrev8(ndata[idx]);
143 if (snd_i2c_sendbytes(device, data, count + 1) != count + 1)
144 return -EIO;
145 return 1;
146}
147
148static void snd_cs8427_free(struct snd_i2c_device *device)
149{
150 kfree(device->private_data);
151}
152
153int snd_cs8427_init(struct snd_i2c_bus *bus,
154 struct snd_i2c_device *device)
155{
156 static unsigned char initvals1[] = {
157 CS8427_REG_CONTROL1 | CS8427_REG_AUTOINC,
158 /* CS8427_REG_CONTROL1: RMCK to OMCK, valid PCM audio, disable mutes,
159 TCBL=output */
160 CS8427_SWCLK | CS8427_TCBLDIR,
161 /* CS8427_REG_CONTROL2: hold last valid audio sample, RMCK=256*Fs,
162 normal stereo operation */
163 0x00,
164 /* CS8427_REG_DATAFLOW: output drivers normal operation, Tx<=serial,
165 Rx=>serial */
166 CS8427_TXDSERIAL | CS8427_SPDAES3RECEIVER,
167 /* CS8427_REG_CLOCKSOURCE: Run off, CMCK=256*Fs,
168 output time base = OMCK, input time base = recovered input clock,
169 recovered input clock source is ILRCK changed to AES3INPUT
170 (workaround, see snd_cs8427_reset) */
171 CS8427_RXDILRCK,
172 /* CS8427_REG_SERIALINPUT: Serial audio input port data format = I2S,
173 24-bit, 64*Fsi */
174 CS8427_SIDEL | CS8427_SILRPOL,
175 /* CS8427_REG_SERIALOUTPUT: Serial audio output port data format
176 = I2S, 24-bit, 64*Fsi */
177 CS8427_SODEL | CS8427_SOLRPOL,
178 };
179 static unsigned char initvals2[] = {
180 CS8427_REG_RECVERRMASK | CS8427_REG_AUTOINC,
181 /* CS8427_REG_RECVERRMASK: unmask the input PLL clock, V, confidence,
182 biphase, parity status bits */
183 /* CS8427_UNLOCK | CS8427_V | CS8427_CONF | CS8427_BIP | CS8427_PAR,*/
184 0xff, /* set everything */
185 /* CS8427_REG_CSDATABUF:
186 Registers 32-55 window to CS buffer
187 Inhibit D->E transfers from overwriting first 5 bytes of CS data.
188 Inhibit D->E transfers (all) of CS data.
189 Allow E->F transfer of CS data.
190 One byte mode; both A/B channels get same written CB data.
191 A channel info is output to chip's EMPH* pin. */
192 CS8427_CBMR | CS8427_DETCI,
193 /* CS8427_REG_UDATABUF:
194 Use internal buffer to transmit User (U) data.
195 Chip's U pin is an output.
196 Transmit all O's for user data.
197 Inhibit D->E transfers.
198 Inhibit E->F transfers. */
199 CS8427_UD | CS8427_EFTUI | CS8427_DETUI,
200 };
201 struct cs8427 *chip = device->private_data;
202 int err;
203 unsigned char buf[24];
204
205 snd_i2c_lock(bus);
206 err = snd_cs8427_reg_read(device, CS8427_REG_ID_AND_VER);
207 if (err != CS8427_VER8427A) {
208 /* give second chance */
209 snd_printk(KERN_WARNING "invalid CS8427 signature 0x%x: "
210 "let me try again...\n", err);
211 err = snd_cs8427_reg_read(device, CS8427_REG_ID_AND_VER);
212 }
213 if (err != CS8427_VER8427A) {
214 snd_i2c_unlock(bus);
215 snd_printk(KERN_ERR "unable to find CS8427 signature "
216 "(expected 0x%x, read 0x%x),\n",
217 CS8427_VER8427A, err);
218 snd_printk(KERN_ERR " initialization is not completed\n");
219 return -EFAULT;
220 }
221 /* turn off run bit while making changes to configuration */
222 err = snd_cs8427_reg_write(device, CS8427_REG_CLOCKSOURCE, 0x00);
223 if (err < 0)
224 goto __fail;
225 /* send initial values */
226 memcpy(chip->regmap + (initvals1[0] & 0x7f), initvals1 + 1, 6);
227 if ((err = snd_i2c_sendbytes(device, initvals1, 7)) != 7) {
228 err = err < 0 ? err : -EIO;
229 goto __fail;
230 }
231 /* Turn off CS8427 interrupt stuff that is not used in hardware */
232 memset(buf, 0, 7);
233 /* from address 9 to 15 */
234 buf[0] = 9; /* register */
235 if ((err = snd_i2c_sendbytes(device, buf, 7)) != 7)
236 goto __fail;
237 /* send transfer initialization sequence */
238 memcpy(chip->regmap + (initvals2[0] & 0x7f), initvals2 + 1, 3);
239 if ((err = snd_i2c_sendbytes(device, initvals2, 4)) != 4) {
240 err = err < 0 ? err : -EIO;
241 goto __fail;
242 }
243 /* write default channel status bytes */
244 put_unaligned_le32(SNDRV_PCM_DEFAULT_CON_SPDIF, buf);
245 memset(buf + 4, 0, 24 - 4);
246 if (snd_cs8427_send_corudata(device, 0, buf, 24) < 0)
247 goto __fail;
248 memcpy(chip->playback.def_status, buf, 24);
249 memcpy(chip->playback.pcm_status, buf, 24);
250 snd_i2c_unlock(bus);
251
252 /* turn on run bit and rock'n'roll */
253 snd_cs8427_reset(device);
254
255 return 0;
256
257__fail:
258 snd_i2c_unlock(bus);
259
260 return err;
261}
262EXPORT_SYMBOL(snd_cs8427_init);
263
264int snd_cs8427_create(struct snd_i2c_bus *bus,
265 unsigned char addr,
266 unsigned int reset_timeout,
267 struct snd_i2c_device **r_cs8427)
268{
269 int err;
270 struct cs8427 *chip;
271 struct snd_i2c_device *device;
272
273 err = snd_i2c_device_create(bus, "CS8427", CS8427_ADDR | (addr & 7),
274 &device);
275 if (err < 0)
276 return err;
277 chip = device->private_data = kzalloc(sizeof(*chip), GFP_KERNEL);
278 if (chip == NULL) {
279 snd_i2c_device_free(device);
280 return -ENOMEM;
281 }
282 device->private_free = snd_cs8427_free;
283
284 if (reset_timeout < 1)
285 reset_timeout = 1;
286 chip->reset_timeout = reset_timeout;
287
288 err = snd_cs8427_init(bus, device);
289 if (err)
290 goto __fail;
291
292#if 0 // it's nice for read tests
293 {
294 char buf[128];
295 int xx;
296 buf[0] = 0x81;
297 snd_i2c_sendbytes(device, buf, 1);
298 snd_i2c_readbytes(device, buf, 127);
299 for (xx = 0; xx < 127; xx++)
300 printk(KERN_DEBUG "reg[0x%x] = 0x%x\n", xx+1, buf[xx]);
301 }
302#endif
303
304 if (r_cs8427)
305 *r_cs8427 = device;
306 return 0;
307
308 __fail:
309 snd_i2c_device_free(device);
310 return err < 0 ? err : -EIO;
311}
312
313EXPORT_SYMBOL(snd_cs8427_create);
314
315/*
316 * Reset the chip using run bit, also lock PLL using ILRCK and
317 * put back AES3INPUT. This workaround is described in latest
318 * CS8427 datasheet, otherwise TXDSERIAL will not work.
319 */
320static void snd_cs8427_reset(struct snd_i2c_device *cs8427)
321{
322 struct cs8427 *chip;
323 unsigned long end_time;
324 int data, aes3input = 0;
325
326 if (snd_BUG_ON(!cs8427))
327 return;
328 chip = cs8427->private_data;
329 snd_i2c_lock(cs8427->bus);
330 if ((chip->regmap[CS8427_REG_CLOCKSOURCE] & CS8427_RXDAES3INPUT) ==
331 CS8427_RXDAES3INPUT) /* AES3 bit is set */
332 aes3input = 1;
333 chip->regmap[CS8427_REG_CLOCKSOURCE] &= ~(CS8427_RUN | CS8427_RXDMASK);
334 snd_cs8427_reg_write(cs8427, CS8427_REG_CLOCKSOURCE,
335 chip->regmap[CS8427_REG_CLOCKSOURCE]);
336 udelay(200);
337 chip->regmap[CS8427_REG_CLOCKSOURCE] |= CS8427_RUN | CS8427_RXDILRCK;
338 snd_cs8427_reg_write(cs8427, CS8427_REG_CLOCKSOURCE,
339 chip->regmap[CS8427_REG_CLOCKSOURCE]);
340 udelay(200);
341 snd_i2c_unlock(cs8427->bus);
342 end_time = jiffies + chip->reset_timeout;
343 while (time_after_eq(end_time, jiffies)) {
344 snd_i2c_lock(cs8427->bus);
345 data = snd_cs8427_reg_read(cs8427, CS8427_REG_RECVERRORS);
346 snd_i2c_unlock(cs8427->bus);
347 if (!(data & CS8427_UNLOCK))
348 break;
349 schedule_timeout_uninterruptible(1);
350 }
351 snd_i2c_lock(cs8427->bus);
352 chip->regmap[CS8427_REG_CLOCKSOURCE] &= ~CS8427_RXDMASK;
353 if (aes3input)
354 chip->regmap[CS8427_REG_CLOCKSOURCE] |= CS8427_RXDAES3INPUT;
355 snd_cs8427_reg_write(cs8427, CS8427_REG_CLOCKSOURCE,
356 chip->regmap[CS8427_REG_CLOCKSOURCE]);
357 snd_i2c_unlock(cs8427->bus);
358}
359
360static int snd_cs8427_in_status_info(struct snd_kcontrol *kcontrol,
361 struct snd_ctl_elem_info *uinfo)
362{
363 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
364 uinfo->count = 1;
365 uinfo->value.integer.min = 0;
366 uinfo->value.integer.max = 255;
367 return 0;
368}
369
370static int snd_cs8427_in_status_get(struct snd_kcontrol *kcontrol,
371 struct snd_ctl_elem_value *ucontrol)
372{
373 struct snd_i2c_device *device = snd_kcontrol_chip(kcontrol);
374 int data;
375
376 snd_i2c_lock(device->bus);
377 data = snd_cs8427_reg_read(device, kcontrol->private_value);
378 snd_i2c_unlock(device->bus);
379 if (data < 0)
380 return data;
381 ucontrol->value.integer.value[0] = data;
382 return 0;
383}
384
385static int snd_cs8427_qsubcode_info(struct snd_kcontrol *kcontrol,
386 struct snd_ctl_elem_info *uinfo)
387{
388 uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
389 uinfo->count = 10;
390 return 0;
391}
392
393static int snd_cs8427_qsubcode_get(struct snd_kcontrol *kcontrol,
394 struct snd_ctl_elem_value *ucontrol)
395{
396 struct snd_i2c_device *device = snd_kcontrol_chip(kcontrol);
397 unsigned char reg = CS8427_REG_QSUBCODE;
398 int err;
399
400 snd_i2c_lock(device->bus);
401 if ((err = snd_i2c_sendbytes(device, ®, 1)) != 1) {
402 snd_printk(KERN_ERR "unable to send register 0x%x byte "
403 "to CS8427\n", reg);
404 snd_i2c_unlock(device->bus);
405 return err < 0 ? err : -EIO;
406 }
407 err = snd_i2c_readbytes(device, ucontrol->value.bytes.data, 10);
408 if (err != 10) {
409 snd_printk(KERN_ERR "unable to read Q-subcode bytes "
410 "from CS8427\n");
411 snd_i2c_unlock(device->bus);
412 return err < 0 ? err : -EIO;
413 }
414 snd_i2c_unlock(device->bus);
415 return 0;
416}
417
418static int snd_cs8427_spdif_info(struct snd_kcontrol *kcontrol,
419 struct snd_ctl_elem_info *uinfo)
420{
421 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
422 uinfo->count = 1;
423 return 0;
424}
425
426static int snd_cs8427_spdif_get(struct snd_kcontrol *kcontrol,
427 struct snd_ctl_elem_value *ucontrol)
428{
429 struct snd_i2c_device *device = snd_kcontrol_chip(kcontrol);
430 struct cs8427 *chip = device->private_data;
431
432 snd_i2c_lock(device->bus);
433 memcpy(ucontrol->value.iec958.status, chip->playback.def_status, 24);
434 snd_i2c_unlock(device->bus);
435 return 0;
436}
437
438static int snd_cs8427_spdif_put(struct snd_kcontrol *kcontrol,
439 struct snd_ctl_elem_value *ucontrol)
440{
441 struct snd_i2c_device *device = snd_kcontrol_chip(kcontrol);
442 struct cs8427 *chip = device->private_data;
443 unsigned char *status = kcontrol->private_value ?
444 chip->playback.pcm_status : chip->playback.def_status;
445 struct snd_pcm_runtime *runtime = chip->playback.substream ?
446 chip->playback.substream->runtime : NULL;
447 int err, change;
448
449 snd_i2c_lock(device->bus);
450 change = memcmp(ucontrol->value.iec958.status, status, 24) != 0;
451 memcpy(status, ucontrol->value.iec958.status, 24);
452 if (change && (kcontrol->private_value ?
453 runtime != NULL : runtime == NULL)) {
454 err = snd_cs8427_send_corudata(device, 0, status, 24);
455 if (err < 0)
456 change = err;
457 }
458 snd_i2c_unlock(device->bus);
459 return change;
460}
461
462static int snd_cs8427_spdif_mask_info(struct snd_kcontrol *kcontrol,
463 struct snd_ctl_elem_info *uinfo)
464{
465 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
466 uinfo->count = 1;
467 return 0;
468}
469
470static int snd_cs8427_spdif_mask_get(struct snd_kcontrol *kcontrol,
471 struct snd_ctl_elem_value *ucontrol)
472{
473 memset(ucontrol->value.iec958.status, 0xff, 24);
474 return 0;
475}
476
477static struct snd_kcontrol_new snd_cs8427_iec958_controls[] = {
478{
479 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
480 .info = snd_cs8427_in_status_info,
481 .name = "IEC958 CS8427 Input Status",
482 .access = (SNDRV_CTL_ELEM_ACCESS_READ |
483 SNDRV_CTL_ELEM_ACCESS_VOLATILE),
484 .get = snd_cs8427_in_status_get,
485 .private_value = 15,
486},
487{
488 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
489 .info = snd_cs8427_in_status_info,
490 .name = "IEC958 CS8427 Error Status",
491 .access = (SNDRV_CTL_ELEM_ACCESS_READ |
492 SNDRV_CTL_ELEM_ACCESS_VOLATILE),
493 .get = snd_cs8427_in_status_get,
494 .private_value = 16,
495},
496{
497 .access = SNDRV_CTL_ELEM_ACCESS_READ,
498 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
499 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,MASK),
500 .info = snd_cs8427_spdif_mask_info,
501 .get = snd_cs8427_spdif_mask_get,
502},
503{
504 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
505 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT),
506 .info = snd_cs8427_spdif_info,
507 .get = snd_cs8427_spdif_get,
508 .put = snd_cs8427_spdif_put,
509 .private_value = 0
510},
511{
512 .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
513 SNDRV_CTL_ELEM_ACCESS_INACTIVE),
514 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
515 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PCM_STREAM),
516 .info = snd_cs8427_spdif_info,
517 .get = snd_cs8427_spdif_get,
518 .put = snd_cs8427_spdif_put,
519 .private_value = 1
520},
521{
522 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
523 .info = snd_cs8427_qsubcode_info,
524 .name = "IEC958 Q-subcode Capture Default",
525 .access = (SNDRV_CTL_ELEM_ACCESS_READ |
526 SNDRV_CTL_ELEM_ACCESS_VOLATILE),
527 .get = snd_cs8427_qsubcode_get
528}};
529
530int snd_cs8427_iec958_build(struct snd_i2c_device *cs8427,
531 struct snd_pcm_substream *play_substream,
532 struct snd_pcm_substream *cap_substream)
533{
534 struct cs8427 *chip = cs8427->private_data;
535 struct snd_kcontrol *kctl;
536 unsigned int idx;
537 int err;
538
539 if (snd_BUG_ON(!play_substream || !cap_substream))
540 return -EINVAL;
541 for (idx = 0; idx < ARRAY_SIZE(snd_cs8427_iec958_controls); idx++) {
542 kctl = snd_ctl_new1(&snd_cs8427_iec958_controls[idx], cs8427);
543 if (kctl == NULL)
544 return -ENOMEM;
545 kctl->id.device = play_substream->pcm->device;
546 kctl->id.subdevice = play_substream->number;
547 err = snd_ctl_add(cs8427->bus->card, kctl);
548 if (err < 0)
549 return err;
550 if (! strcmp(kctl->id.name,
551 SNDRV_CTL_NAME_IEC958("",PLAYBACK,PCM_STREAM)))
552 chip->playback.pcm_ctl = kctl;
553 }
554
555 chip->playback.substream = play_substream;
556 chip->capture.substream = cap_substream;
557 if (snd_BUG_ON(!chip->playback.pcm_ctl))
558 return -EIO;
559 return 0;
560}
561
562EXPORT_SYMBOL(snd_cs8427_iec958_build);
563
564int snd_cs8427_iec958_active(struct snd_i2c_device *cs8427, int active)
565{
566 struct cs8427 *chip;
567
568 if (snd_BUG_ON(!cs8427))
569 return -ENXIO;
570 chip = cs8427->private_data;
571 if (active)
572 memcpy(chip->playback.pcm_status,
573 chip->playback.def_status, 24);
574 chip->playback.pcm_ctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE;
575 snd_ctl_notify(cs8427->bus->card,
576 SNDRV_CTL_EVENT_MASK_VALUE | SNDRV_CTL_EVENT_MASK_INFO,
577 &chip->playback.pcm_ctl->id);
578 return 0;
579}
580
581EXPORT_SYMBOL(snd_cs8427_iec958_active);
582
583int snd_cs8427_iec958_pcm(struct snd_i2c_device *cs8427, unsigned int rate)
584{
585 struct cs8427 *chip;
586 char *status;
587 int err, reset;
588
589 if (snd_BUG_ON(!cs8427))
590 return -ENXIO;
591 chip = cs8427->private_data;
592 status = chip->playback.pcm_status;
593 snd_i2c_lock(cs8427->bus);
594 if (status[0] & IEC958_AES0_PROFESSIONAL) {
595 status[0] &= ~IEC958_AES0_PRO_FS;
596 switch (rate) {
597 case 32000: status[0] |= IEC958_AES0_PRO_FS_32000; break;
598 case 44100: status[0] |= IEC958_AES0_PRO_FS_44100; break;
599 case 48000: status[0] |= IEC958_AES0_PRO_FS_48000; break;
600 default: status[0] |= IEC958_AES0_PRO_FS_NOTID; break;
601 }
602 } else {
603 status[3] &= ~IEC958_AES3_CON_FS;
604 switch (rate) {
605 case 32000: status[3] |= IEC958_AES3_CON_FS_32000; break;
606 case 44100: status[3] |= IEC958_AES3_CON_FS_44100; break;
607 case 48000: status[3] |= IEC958_AES3_CON_FS_48000; break;
608 }
609 }
610 err = snd_cs8427_send_corudata(cs8427, 0, status, 24);
611 if (err > 0)
612 snd_ctl_notify(cs8427->bus->card,
613 SNDRV_CTL_EVENT_MASK_VALUE,
614 &chip->playback.pcm_ctl->id);
615 reset = chip->rate != rate;
616 chip->rate = rate;
617 snd_i2c_unlock(cs8427->bus);
618 if (reset)
619 snd_cs8427_reset(cs8427);
620 return err < 0 ? err : 0;
621}
622
623EXPORT_SYMBOL(snd_cs8427_iec958_pcm);
624
625static int __init alsa_cs8427_module_init(void)
626{
627 return 0;
628}
629
630static void __exit alsa_cs8427_module_exit(void)
631{
632}
633
634module_init(alsa_cs8427_module_init)
635module_exit(alsa_cs8427_module_exit)
1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * Routines for control of the CS8427 via i2c bus
4 * IEC958 (S/PDIF) receiver & transmitter by Cirrus Logic
5 * Copyright (c) by Jaroslav Kysela <perex@perex.cz>
6 */
7
8#include <linux/slab.h>
9#include <linux/delay.h>
10#include <linux/init.h>
11#include <linux/bitrev.h>
12#include <linux/module.h>
13#include <linux/unaligned.h>
14#include <sound/core.h>
15#include <sound/control.h>
16#include <sound/pcm.h>
17#include <sound/cs8427.h>
18#include <sound/asoundef.h>
19
20static void snd_cs8427_reset(struct snd_i2c_device *cs8427);
21
22MODULE_AUTHOR("Jaroslav Kysela <perex@perex.cz>");
23MODULE_DESCRIPTION("IEC958 (S/PDIF) receiver & transmitter by Cirrus Logic");
24MODULE_LICENSE("GPL");
25
26#define CS8427_ADDR (0x20>>1) /* fixed address */
27
28struct cs8427_stream {
29 struct snd_pcm_substream *substream;
30 char hw_status[24]; /* hardware status */
31 char def_status[24]; /* default status */
32 char pcm_status[24]; /* PCM private status */
33 char hw_udata[32];
34 struct snd_kcontrol *pcm_ctl;
35};
36
37struct cs8427 {
38 unsigned char regmap[0x14]; /* map of first 1 + 13 registers */
39 unsigned int rate;
40 unsigned int reset_timeout;
41 struct cs8427_stream playback;
42 struct cs8427_stream capture;
43};
44
45int snd_cs8427_reg_write(struct snd_i2c_device *device, unsigned char reg,
46 unsigned char val)
47{
48 int err;
49 unsigned char buf[2];
50
51 buf[0] = reg & 0x7f;
52 buf[1] = val;
53 err = snd_i2c_sendbytes(device, buf, 2);
54 if (err != 2) {
55 dev_err(device->bus->card->dev,
56 "unable to send bytes 0x%02x:0x%02x to CS8427 (%i)\n",
57 buf[0], buf[1], err);
58 return err < 0 ? err : -EIO;
59 }
60 return 0;
61}
62
63EXPORT_SYMBOL(snd_cs8427_reg_write);
64
65static int snd_cs8427_reg_read(struct snd_i2c_device *device, unsigned char reg)
66{
67 int err;
68 unsigned char buf;
69
70 err = snd_i2c_sendbytes(device, ®, 1);
71 if (err != 1) {
72 dev_err(device->bus->card->dev,
73 "unable to send register 0x%x byte to CS8427\n", reg);
74 return err < 0 ? err : -EIO;
75 }
76 err = snd_i2c_readbytes(device, &buf, 1);
77 if (err != 1) {
78 dev_err(device->bus->card->dev,
79 "unable to read register 0x%x byte from CS8427\n", reg);
80 return err < 0 ? err : -EIO;
81 }
82 return buf;
83}
84
85static int snd_cs8427_select_corudata(struct snd_i2c_device *device, int udata)
86{
87 struct cs8427 *chip = device->private_data;
88 int err;
89
90 udata = udata ? CS8427_BSEL : 0;
91 if (udata != (chip->regmap[CS8427_REG_CSDATABUF] & udata)) {
92 chip->regmap[CS8427_REG_CSDATABUF] &= ~CS8427_BSEL;
93 chip->regmap[CS8427_REG_CSDATABUF] |= udata;
94 err = snd_cs8427_reg_write(device, CS8427_REG_CSDATABUF,
95 chip->regmap[CS8427_REG_CSDATABUF]);
96 if (err < 0)
97 return err;
98 }
99 return 0;
100}
101
102static int snd_cs8427_send_corudata(struct snd_i2c_device *device,
103 int udata,
104 unsigned char *ndata,
105 int count)
106{
107 struct cs8427 *chip = device->private_data;
108 char *hw_data = udata ?
109 chip->playback.hw_udata : chip->playback.hw_status;
110 unsigned char data[32];
111 int err, idx;
112
113 if (!memcmp(hw_data, ndata, count))
114 return 0;
115 err = snd_cs8427_select_corudata(device, udata);
116 if (err < 0)
117 return err;
118 memcpy(hw_data, ndata, count);
119 if (udata) {
120 memset(data, 0, sizeof(data));
121 if (memcmp(hw_data, data, count) == 0) {
122 chip->regmap[CS8427_REG_UDATABUF] &= ~CS8427_UBMMASK;
123 chip->regmap[CS8427_REG_UDATABUF] |= CS8427_UBMZEROS |
124 CS8427_EFTUI;
125 err = snd_cs8427_reg_write(device, CS8427_REG_UDATABUF,
126 chip->regmap[CS8427_REG_UDATABUF]);
127 return err < 0 ? err : 0;
128 }
129 }
130 data[0] = CS8427_REG_AUTOINC | CS8427_REG_CORU_DATABUF;
131 for (idx = 0; idx < count; idx++)
132 data[idx + 1] = bitrev8(ndata[idx]);
133 if (snd_i2c_sendbytes(device, data, count + 1) != count + 1)
134 return -EIO;
135 return 1;
136}
137
138static void snd_cs8427_free(struct snd_i2c_device *device)
139{
140 kfree(device->private_data);
141}
142
143int snd_cs8427_init(struct snd_i2c_bus *bus,
144 struct snd_i2c_device *device)
145{
146 static unsigned char initvals1[] = {
147 CS8427_REG_CONTROL1 | CS8427_REG_AUTOINC,
148 /* CS8427_REG_CONTROL1: RMCK to OMCK, valid PCM audio, disable mutes,
149 TCBL=output */
150 CS8427_SWCLK | CS8427_TCBLDIR,
151 /* CS8427_REG_CONTROL2: hold last valid audio sample, RMCK=256*Fs,
152 normal stereo operation */
153 0x00,
154 /* CS8427_REG_DATAFLOW: output drivers normal operation, Tx<=serial,
155 Rx=>serial */
156 CS8427_TXDSERIAL | CS8427_SPDAES3RECEIVER,
157 /* CS8427_REG_CLOCKSOURCE: Run off, CMCK=256*Fs,
158 output time base = OMCK, input time base = recovered input clock,
159 recovered input clock source is ILRCK changed to AES3INPUT
160 (workaround, see snd_cs8427_reset) */
161 CS8427_RXDILRCK,
162 /* CS8427_REG_SERIALINPUT: Serial audio input port data format = I2S,
163 24-bit, 64*Fsi */
164 CS8427_SIDEL | CS8427_SILRPOL,
165 /* CS8427_REG_SERIALOUTPUT: Serial audio output port data format
166 = I2S, 24-bit, 64*Fsi */
167 CS8427_SODEL | CS8427_SOLRPOL,
168 };
169 static unsigned char initvals2[] = {
170 CS8427_REG_RECVERRMASK | CS8427_REG_AUTOINC,
171 /* CS8427_REG_RECVERRMASK: unmask the input PLL clock, V, confidence,
172 biphase, parity status bits */
173 /* CS8427_UNLOCK | CS8427_V | CS8427_CONF | CS8427_BIP | CS8427_PAR,*/
174 0xff, /* set everything */
175 /* CS8427_REG_CSDATABUF:
176 Registers 32-55 window to CS buffer
177 Inhibit D->E transfers from overwriting first 5 bytes of CS data.
178 Inhibit D->E transfers (all) of CS data.
179 Allow E->F transfer of CS data.
180 One byte mode; both A/B channels get same written CB data.
181 A channel info is output to chip's EMPH* pin. */
182 CS8427_CBMR | CS8427_DETCI,
183 /* CS8427_REG_UDATABUF:
184 Use internal buffer to transmit User (U) data.
185 Chip's U pin is an output.
186 Transmit all O's for user data.
187 Inhibit D->E transfers.
188 Inhibit E->F transfers. */
189 CS8427_UD | CS8427_EFTUI | CS8427_DETUI,
190 };
191 struct cs8427 *chip = device->private_data;
192 int err;
193 unsigned char buf[24];
194
195 snd_i2c_lock(bus);
196 err = snd_cs8427_reg_read(device, CS8427_REG_ID_AND_VER);
197 if (err != CS8427_VER8427A) {
198 /* give second chance */
199 dev_warn(device->bus->card->dev,
200 "invalid CS8427 signature 0x%x: let me try again...\n",
201 err);
202 err = snd_cs8427_reg_read(device, CS8427_REG_ID_AND_VER);
203 }
204 if (err != CS8427_VER8427A) {
205 snd_i2c_unlock(bus);
206 dev_err(device->bus->card->dev,
207 "unable to find CS8427 signature (expected 0x%x, read 0x%x),\n",
208 CS8427_VER8427A, err);
209 dev_err(device->bus->card->dev,
210 " initialization is not completed\n");
211 return -EFAULT;
212 }
213 /* turn off run bit while making changes to configuration */
214 err = snd_cs8427_reg_write(device, CS8427_REG_CLOCKSOURCE, 0x00);
215 if (err < 0)
216 goto __fail;
217 /* send initial values */
218 memcpy(chip->regmap + (initvals1[0] & 0x7f), initvals1 + 1, 6);
219 err = snd_i2c_sendbytes(device, initvals1, 7);
220 if (err != 7) {
221 err = err < 0 ? err : -EIO;
222 goto __fail;
223 }
224 /* Turn off CS8427 interrupt stuff that is not used in hardware */
225 memset(buf, 0, 7);
226 /* from address 9 to 15 */
227 buf[0] = 9; /* register */
228 err = snd_i2c_sendbytes(device, buf, 7);
229 if (err != 7)
230 goto __fail;
231 /* send transfer initialization sequence */
232 memcpy(chip->regmap + (initvals2[0] & 0x7f), initvals2 + 1, 3);
233 err = snd_i2c_sendbytes(device, initvals2, 4);
234 if (err != 4) {
235 err = err < 0 ? err : -EIO;
236 goto __fail;
237 }
238 /* write default channel status bytes */
239 put_unaligned_le32(SNDRV_PCM_DEFAULT_CON_SPDIF, buf);
240 memset(buf + 4, 0, 24 - 4);
241 if (snd_cs8427_send_corudata(device, 0, buf, 24) < 0)
242 goto __fail;
243 memcpy(chip->playback.def_status, buf, 24);
244 memcpy(chip->playback.pcm_status, buf, 24);
245 snd_i2c_unlock(bus);
246
247 /* turn on run bit and rock'n'roll */
248 snd_cs8427_reset(device);
249
250 return 0;
251
252__fail:
253 snd_i2c_unlock(bus);
254
255 return err;
256}
257EXPORT_SYMBOL(snd_cs8427_init);
258
259int snd_cs8427_create(struct snd_i2c_bus *bus,
260 unsigned char addr,
261 unsigned int reset_timeout,
262 struct snd_i2c_device **r_cs8427)
263{
264 int err;
265 struct cs8427 *chip;
266 struct snd_i2c_device *device;
267
268 err = snd_i2c_device_create(bus, "CS8427", CS8427_ADDR | (addr & 7),
269 &device);
270 if (err < 0)
271 return err;
272 chip = device->private_data = kzalloc(sizeof(*chip), GFP_KERNEL);
273 if (chip == NULL) {
274 snd_i2c_device_free(device);
275 return -ENOMEM;
276 }
277 device->private_free = snd_cs8427_free;
278
279 if (reset_timeout < 1)
280 reset_timeout = 1;
281 chip->reset_timeout = reset_timeout;
282
283 err = snd_cs8427_init(bus, device);
284 if (err)
285 goto __fail;
286
287#if 0 // it's nice for read tests
288 {
289 char buf[128];
290 int xx;
291 buf[0] = 0x81;
292 snd_i2c_sendbytes(device, buf, 1);
293 snd_i2c_readbytes(device, buf, 127);
294 for (xx = 0; xx < 127; xx++)
295 dev_dbg(device->bus->card->dev, "reg[0x%x] = 0x%x\n", xx+1, buf[xx]);
296 }
297#endif
298
299 if (r_cs8427)
300 *r_cs8427 = device;
301 return 0;
302
303 __fail:
304 snd_i2c_device_free(device);
305 return err < 0 ? err : -EIO;
306}
307
308EXPORT_SYMBOL(snd_cs8427_create);
309
310/*
311 * Reset the chip using run bit, also lock PLL using ILRCK and
312 * put back AES3INPUT. This workaround is described in latest
313 * CS8427 datasheet, otherwise TXDSERIAL will not work.
314 */
315static void snd_cs8427_reset(struct snd_i2c_device *cs8427)
316{
317 struct cs8427 *chip;
318 unsigned long end_time;
319 int data, aes3input = 0;
320
321 if (snd_BUG_ON(!cs8427))
322 return;
323 chip = cs8427->private_data;
324 snd_i2c_lock(cs8427->bus);
325 if ((chip->regmap[CS8427_REG_CLOCKSOURCE] & CS8427_RXDAES3INPUT) ==
326 CS8427_RXDAES3INPUT) /* AES3 bit is set */
327 aes3input = 1;
328 chip->regmap[CS8427_REG_CLOCKSOURCE] &= ~(CS8427_RUN | CS8427_RXDMASK);
329 snd_cs8427_reg_write(cs8427, CS8427_REG_CLOCKSOURCE,
330 chip->regmap[CS8427_REG_CLOCKSOURCE]);
331 udelay(200);
332 chip->regmap[CS8427_REG_CLOCKSOURCE] |= CS8427_RUN | CS8427_RXDILRCK;
333 snd_cs8427_reg_write(cs8427, CS8427_REG_CLOCKSOURCE,
334 chip->regmap[CS8427_REG_CLOCKSOURCE]);
335 udelay(200);
336 snd_i2c_unlock(cs8427->bus);
337 end_time = jiffies + chip->reset_timeout;
338 while (time_after_eq(end_time, jiffies)) {
339 snd_i2c_lock(cs8427->bus);
340 data = snd_cs8427_reg_read(cs8427, CS8427_REG_RECVERRORS);
341 snd_i2c_unlock(cs8427->bus);
342 if (!(data & CS8427_UNLOCK))
343 break;
344 schedule_timeout_uninterruptible(1);
345 }
346 snd_i2c_lock(cs8427->bus);
347 chip->regmap[CS8427_REG_CLOCKSOURCE] &= ~CS8427_RXDMASK;
348 if (aes3input)
349 chip->regmap[CS8427_REG_CLOCKSOURCE] |= CS8427_RXDAES3INPUT;
350 snd_cs8427_reg_write(cs8427, CS8427_REG_CLOCKSOURCE,
351 chip->regmap[CS8427_REG_CLOCKSOURCE]);
352 snd_i2c_unlock(cs8427->bus);
353}
354
355static int snd_cs8427_in_status_info(struct snd_kcontrol *kcontrol,
356 struct snd_ctl_elem_info *uinfo)
357{
358 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
359 uinfo->count = 1;
360 uinfo->value.integer.min = 0;
361 uinfo->value.integer.max = 255;
362 return 0;
363}
364
365static int snd_cs8427_in_status_get(struct snd_kcontrol *kcontrol,
366 struct snd_ctl_elem_value *ucontrol)
367{
368 struct snd_i2c_device *device = snd_kcontrol_chip(kcontrol);
369 int data;
370
371 snd_i2c_lock(device->bus);
372 data = snd_cs8427_reg_read(device, kcontrol->private_value);
373 snd_i2c_unlock(device->bus);
374 if (data < 0)
375 return data;
376 ucontrol->value.integer.value[0] = data;
377 return 0;
378}
379
380static int snd_cs8427_qsubcode_info(struct snd_kcontrol *kcontrol,
381 struct snd_ctl_elem_info *uinfo)
382{
383 uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
384 uinfo->count = 10;
385 return 0;
386}
387
388static int snd_cs8427_qsubcode_get(struct snd_kcontrol *kcontrol,
389 struct snd_ctl_elem_value *ucontrol)
390{
391 struct snd_i2c_device *device = snd_kcontrol_chip(kcontrol);
392 unsigned char reg = CS8427_REG_QSUBCODE;
393 int err;
394
395 snd_i2c_lock(device->bus);
396 err = snd_i2c_sendbytes(device, ®, 1);
397 if (err != 1) {
398 dev_err(device->bus->card->dev,
399 "unable to send register 0x%x byte to CS8427\n", reg);
400 snd_i2c_unlock(device->bus);
401 return err < 0 ? err : -EIO;
402 }
403 err = snd_i2c_readbytes(device, ucontrol->value.bytes.data, 10);
404 if (err != 10) {
405 dev_err(device->bus->card->dev,
406 "unable to read Q-subcode bytes from CS8427\n");
407 snd_i2c_unlock(device->bus);
408 return err < 0 ? err : -EIO;
409 }
410 snd_i2c_unlock(device->bus);
411 return 0;
412}
413
414static int snd_cs8427_spdif_info(struct snd_kcontrol *kcontrol,
415 struct snd_ctl_elem_info *uinfo)
416{
417 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
418 uinfo->count = 1;
419 return 0;
420}
421
422static int snd_cs8427_spdif_get(struct snd_kcontrol *kcontrol,
423 struct snd_ctl_elem_value *ucontrol)
424{
425 struct snd_i2c_device *device = snd_kcontrol_chip(kcontrol);
426 struct cs8427 *chip = device->private_data;
427
428 snd_i2c_lock(device->bus);
429 memcpy(ucontrol->value.iec958.status, chip->playback.def_status, 24);
430 snd_i2c_unlock(device->bus);
431 return 0;
432}
433
434static int snd_cs8427_spdif_put(struct snd_kcontrol *kcontrol,
435 struct snd_ctl_elem_value *ucontrol)
436{
437 struct snd_i2c_device *device = snd_kcontrol_chip(kcontrol);
438 struct cs8427 *chip = device->private_data;
439 unsigned char *status = kcontrol->private_value ?
440 chip->playback.pcm_status : chip->playback.def_status;
441 struct snd_pcm_runtime *runtime = chip->playback.substream ?
442 chip->playback.substream->runtime : NULL;
443 int err, change;
444
445 snd_i2c_lock(device->bus);
446 change = memcmp(ucontrol->value.iec958.status, status, 24) != 0;
447 memcpy(status, ucontrol->value.iec958.status, 24);
448 if (change && (kcontrol->private_value ?
449 runtime != NULL : runtime == NULL)) {
450 err = snd_cs8427_send_corudata(device, 0, status, 24);
451 if (err < 0)
452 change = err;
453 }
454 snd_i2c_unlock(device->bus);
455 return change;
456}
457
458static int snd_cs8427_spdif_mask_info(struct snd_kcontrol *kcontrol,
459 struct snd_ctl_elem_info *uinfo)
460{
461 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
462 uinfo->count = 1;
463 return 0;
464}
465
466static int snd_cs8427_spdif_mask_get(struct snd_kcontrol *kcontrol,
467 struct snd_ctl_elem_value *ucontrol)
468{
469 memset(ucontrol->value.iec958.status, 0xff, 24);
470 return 0;
471}
472
473static const struct snd_kcontrol_new snd_cs8427_iec958_controls[] = {
474{
475 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
476 .info = snd_cs8427_in_status_info,
477 .name = "IEC958 CS8427 Input Status",
478 .access = (SNDRV_CTL_ELEM_ACCESS_READ |
479 SNDRV_CTL_ELEM_ACCESS_VOLATILE),
480 .get = snd_cs8427_in_status_get,
481 .private_value = 15,
482},
483{
484 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
485 .info = snd_cs8427_in_status_info,
486 .name = "IEC958 CS8427 Error Status",
487 .access = (SNDRV_CTL_ELEM_ACCESS_READ |
488 SNDRV_CTL_ELEM_ACCESS_VOLATILE),
489 .get = snd_cs8427_in_status_get,
490 .private_value = 16,
491},
492{
493 .access = SNDRV_CTL_ELEM_ACCESS_READ,
494 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
495 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,MASK),
496 .info = snd_cs8427_spdif_mask_info,
497 .get = snd_cs8427_spdif_mask_get,
498},
499{
500 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
501 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT),
502 .info = snd_cs8427_spdif_info,
503 .get = snd_cs8427_spdif_get,
504 .put = snd_cs8427_spdif_put,
505 .private_value = 0
506},
507{
508 .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
509 SNDRV_CTL_ELEM_ACCESS_INACTIVE),
510 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
511 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PCM_STREAM),
512 .info = snd_cs8427_spdif_info,
513 .get = snd_cs8427_spdif_get,
514 .put = snd_cs8427_spdif_put,
515 .private_value = 1
516},
517{
518 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
519 .info = snd_cs8427_qsubcode_info,
520 .name = "IEC958 Q-subcode Capture Default",
521 .access = (SNDRV_CTL_ELEM_ACCESS_READ |
522 SNDRV_CTL_ELEM_ACCESS_VOLATILE),
523 .get = snd_cs8427_qsubcode_get
524}};
525
526int snd_cs8427_iec958_build(struct snd_i2c_device *cs8427,
527 struct snd_pcm_substream *play_substream,
528 struct snd_pcm_substream *cap_substream)
529{
530 struct cs8427 *chip = cs8427->private_data;
531 struct snd_kcontrol *kctl;
532 unsigned int idx;
533 int err;
534
535 if (snd_BUG_ON(!play_substream || !cap_substream))
536 return -EINVAL;
537 for (idx = 0; idx < ARRAY_SIZE(snd_cs8427_iec958_controls); idx++) {
538 kctl = snd_ctl_new1(&snd_cs8427_iec958_controls[idx], cs8427);
539 if (kctl == NULL)
540 return -ENOMEM;
541 kctl->id.device = play_substream->pcm->device;
542 kctl->id.subdevice = play_substream->number;
543 err = snd_ctl_add(cs8427->bus->card, kctl);
544 if (err < 0)
545 return err;
546 if (! strcmp(kctl->id.name,
547 SNDRV_CTL_NAME_IEC958("",PLAYBACK,PCM_STREAM)))
548 chip->playback.pcm_ctl = kctl;
549 }
550
551 chip->playback.substream = play_substream;
552 chip->capture.substream = cap_substream;
553 if (snd_BUG_ON(!chip->playback.pcm_ctl))
554 return -EIO;
555 return 0;
556}
557
558EXPORT_SYMBOL(snd_cs8427_iec958_build);
559
560int snd_cs8427_iec958_active(struct snd_i2c_device *cs8427, int active)
561{
562 struct cs8427 *chip;
563
564 if (snd_BUG_ON(!cs8427))
565 return -ENXIO;
566 chip = cs8427->private_data;
567 if (active) {
568 memcpy(chip->playback.pcm_status,
569 chip->playback.def_status, 24);
570 chip->playback.pcm_ctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE;
571 } else {
572 chip->playback.pcm_ctl->vd[0].access |= SNDRV_CTL_ELEM_ACCESS_INACTIVE;
573 }
574 snd_ctl_notify(cs8427->bus->card,
575 SNDRV_CTL_EVENT_MASK_VALUE | SNDRV_CTL_EVENT_MASK_INFO,
576 &chip->playback.pcm_ctl->id);
577 return 0;
578}
579
580EXPORT_SYMBOL(snd_cs8427_iec958_active);
581
582int snd_cs8427_iec958_pcm(struct snd_i2c_device *cs8427, unsigned int rate)
583{
584 struct cs8427 *chip;
585 char *status;
586 int err, reset;
587
588 if (snd_BUG_ON(!cs8427))
589 return -ENXIO;
590 chip = cs8427->private_data;
591 status = chip->playback.pcm_status;
592 snd_i2c_lock(cs8427->bus);
593 if (status[0] & IEC958_AES0_PROFESSIONAL) {
594 status[0] &= ~IEC958_AES0_PRO_FS;
595 switch (rate) {
596 case 32000: status[0] |= IEC958_AES0_PRO_FS_32000; break;
597 case 44100: status[0] |= IEC958_AES0_PRO_FS_44100; break;
598 case 48000: status[0] |= IEC958_AES0_PRO_FS_48000; break;
599 default: status[0] |= IEC958_AES0_PRO_FS_NOTID; break;
600 }
601 } else {
602 status[3] &= ~IEC958_AES3_CON_FS;
603 switch (rate) {
604 case 32000: status[3] |= IEC958_AES3_CON_FS_32000; break;
605 case 44100: status[3] |= IEC958_AES3_CON_FS_44100; break;
606 case 48000: status[3] |= IEC958_AES3_CON_FS_48000; break;
607 }
608 }
609 err = snd_cs8427_send_corudata(cs8427, 0, status, 24);
610 if (err > 0)
611 snd_ctl_notify(cs8427->bus->card,
612 SNDRV_CTL_EVENT_MASK_VALUE,
613 &chip->playback.pcm_ctl->id);
614 reset = chip->rate != rate;
615 chip->rate = rate;
616 snd_i2c_unlock(cs8427->bus);
617 if (reset)
618 snd_cs8427_reset(cs8427);
619 return err < 0 ? err : 0;
620}
621
622EXPORT_SYMBOL(snd_cs8427_iec958_pcm);