1/* SPDX-License-Identifier: GPL-2.0 */
  2/*
  3 * Renesas Mobile SDHI
  4 *
  5 * Copyright (C) 2017 Horms Solutions Ltd., Simon Horman
  6 * Copyright (C) 2017-19 Renesas Electronics Corporation
  7 */
  8
  9#ifndef RENESAS_SDHI_H
 10#define RENESAS_SDHI_H
 11
 12#include <linux/dmaengine.h>
 13#include <linux/platform_device.h>
 14#include <linux/workqueue.h>
 15#include "tmio_mmc.h"
 16
 17struct renesas_sdhi_scc {
 18	unsigned long clk_rate;	/* clock rate for SDR104 */
 19	u32 tap;		/* sampling clock position for SDR104/HS400 (8 TAP) */
 20	u32 tap_hs400_4tap;	/* sampling clock position for HS400 (4 TAP) */
 21};
 22
 23#define SDHI_FLAG_NEED_CLKH_FALLBACK	BIT(0)
 24
 25struct renesas_sdhi_of_data {
 26	unsigned long tmio_flags;
 27	u32	      tmio_ocr_mask;
 28	unsigned long capabilities;
 29	unsigned long capabilities2;
 30	enum dma_slave_buswidth dma_buswidth;
 31	dma_addr_t dma_rx_offset;
 32	unsigned int bus_shift;
 33	int scc_offset;
 34	struct renesas_sdhi_scc *taps;
 35	int taps_num;
 36	unsigned int max_blk_count;
 37	unsigned short max_segs;
 38	unsigned long sdhi_flags;
 39};
 40
 41#define SDHI_CALIB_TABLE_MAX 32
 42
 43#define sdhi_has_quirk(p, q) ((p)->quirks && (p)->quirks->q)
 44
 45struct renesas_sdhi_quirks {
 46	bool hs400_disabled;
 47	bool hs400_4taps;
 48	bool fixed_addr_mode;
 49	bool dma_one_rx_only;
 50	bool manual_tap_correction;
 51	bool old_info1_layout;
 52	u32 hs400_bad_taps;
 53	const u8 (*hs400_calib_table)[SDHI_CALIB_TABLE_MAX];
 54};
 55
 56struct renesas_sdhi_of_data_with_quirks {
 57	const struct renesas_sdhi_of_data *of_data;
 58	const struct renesas_sdhi_quirks *quirks;
 59};
 60
 61/* We want both end_flags to be set before we mark DMA as finished */
 62#define SDHI_DMA_END_FLAG_DMA		0
 63#define SDHI_DMA_END_FLAG_ACCESS	1
 64
 65struct renesas_sdhi_dma {
 66	unsigned long end_flags;
 67	enum dma_slave_buswidth dma_buswidth;
 68	dma_filter_fn filter;
 69	void (*enable)(struct tmio_mmc_host *host, bool enable);
 70	struct completion dma_dataend;
 71	struct work_struct dma_complete;
 72};
 73
 74struct renesas_sdhi {
 75	struct clk *clk;
 76	struct clk *clkh;
 77	struct clk *clk_cd;
 78	struct tmio_mmc_data mmc_data;
 79	struct renesas_sdhi_dma dma_priv;
 80	const struct renesas_sdhi_quirks *quirks;
 81	struct pinctrl *pinctrl;
 82	struct pinctrl_state *pins_default, *pins_uhs;
 83	void __iomem *scc_ctl;
 84	u32 scc_tappos;
 85	u32 scc_tappos_hs400;
 86	const u8 *adjust_hs400_calib_table;
 87	bool needs_adjust_hs400;
 88
 89	/* Tuning values: 1 for success, 0 for failure */
 90	DECLARE_BITMAP(taps, BITS_PER_LONG);
 91	/* Sampling data comparison: 1 for match, 0 for mismatch */
 92	DECLARE_BITMAP(smpcmp, BITS_PER_LONG);
 93	unsigned int tap_num;
 94	unsigned int tap_set;
 95
 96	struct reset_control *rstc;
 97	struct tmio_mmc_host *host;
 98};
 99
100#define host_to_priv(host) \
101	container_of((host)->pdata, struct renesas_sdhi, mmc_data)
102
103int renesas_sdhi_probe(struct platform_device *pdev,
104		       const struct tmio_mmc_dma_ops *dma_ops,
105		       const struct renesas_sdhi_of_data *of_data,
106		       const struct renesas_sdhi_quirks *quirks);
107void renesas_sdhi_remove(struct platform_device *pdev);
108#endif