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1/*
2 * linux/arch/arm/plat-omap/ocpi.c
3 *
4 * Minimal OCP bus support for omap16xx
5 *
6 * Copyright (C) 2003 - 2005 Nokia Corporation
7 * Copyright (C) 2012 Texas Instruments, Inc.
8 * Written by Tony Lindgren <tony@atomide.com>
9 *
10 * Modified for clock framework by Paul Mundt <paul.mundt@nokia.com>.
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 */
26
27#include <linux/module.h>
28#include <linux/types.h>
29#include <linux/errno.h>
30#include <linux/kernel.h>
31#include <linux/init.h>
32#include <linux/spinlock.h>
33#include <linux/err.h>
34#include <linux/clk.h>
35#include <linux/io.h>
36
37#include <mach/hardware.h>
38
39#include "common.h"
40
41#define OCPI_BASE 0xfffec320
42#define OCPI_FAULT (OCPI_BASE + 0x00)
43#define OCPI_CMD_FAULT (OCPI_BASE + 0x04)
44#define OCPI_SINT0 (OCPI_BASE + 0x08)
45#define OCPI_TABORT (OCPI_BASE + 0x0c)
46#define OCPI_SINT1 (OCPI_BASE + 0x10)
47#define OCPI_PROT (OCPI_BASE + 0x14)
48#define OCPI_SEC (OCPI_BASE + 0x18)
49
50/* USB OHCI OCPI access error registers */
51#define HOSTUEADDR 0xfffba0e0
52#define HOSTUESTATUS 0xfffba0e4
53
54static struct clk *ocpi_ck;
55
56/*
57 * Enables device access to OMAP buses via the OCPI bridge
58 * FIXME: Add locking
59 */
60int ocpi_enable(void)
61{
62 unsigned int val;
63
64 if (!cpu_is_omap16xx())
65 return -ENODEV;
66
67 /* Enable access for OHCI in OCPI */
68 val = omap_readl(OCPI_PROT);
69 val &= ~0xff;
70 /* val &= (1 << 0); Allow access only to EMIFS */
71 omap_writel(val, OCPI_PROT);
72
73 val = omap_readl(OCPI_SEC);
74 val &= ~0xff;
75 omap_writel(val, OCPI_SEC);
76
77 return 0;
78}
79EXPORT_SYMBOL(ocpi_enable);
80
81static int __init omap_ocpi_init(void)
82{
83 if (!cpu_is_omap16xx())
84 return -ENODEV;
85
86 ocpi_ck = clk_get(NULL, "l3_ocpi_ck");
87 if (IS_ERR(ocpi_ck))
88 return PTR_ERR(ocpi_ck);
89
90 clk_enable(ocpi_ck);
91 ocpi_enable();
92 pr_info("OMAP OCPI interconnect driver loaded\n");
93
94 return 0;
95}
96
97static void __exit omap_ocpi_exit(void)
98{
99 /* REVISIT: Disable OCPI */
100
101 if (!cpu_is_omap16xx())
102 return;
103
104 clk_disable(ocpi_ck);
105 clk_put(ocpi_ck);
106}
107
108MODULE_AUTHOR("Tony Lindgren <tony@atomide.com>");
109MODULE_DESCRIPTION("OMAP OCPI bus controller module");
110MODULE_LICENSE("GPL");
111module_init(omap_ocpi_init);
112module_exit(omap_ocpi_exit);
1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * linux/arch/arm/plat-omap/ocpi.c
4 *
5 * Minimal OCP bus support for omap16xx
6 *
7 * Copyright (C) 2003 - 2005 Nokia Corporation
8 * Copyright (C) 2012 Texas Instruments, Inc.
9 * Written by Tony Lindgren <tony@atomide.com>
10 *
11 * Modified for clock framework by Paul Mundt <paul.mundt@nokia.com>.
12 */
13
14#include <linux/module.h>
15#include <linux/types.h>
16#include <linux/errno.h>
17#include <linux/kernel.h>
18#include <linux/init.h>
19#include <linux/spinlock.h>
20#include <linux/err.h>
21#include <linux/clk.h>
22#include <linux/io.h>
23#include <linux/soc/ti/omap1-io.h>
24
25#include "hardware.h"
26#include "common.h"
27
28#define OCPI_BASE 0xfffec320
29#define OCPI_FAULT (OCPI_BASE + 0x00)
30#define OCPI_CMD_FAULT (OCPI_BASE + 0x04)
31#define OCPI_SINT0 (OCPI_BASE + 0x08)
32#define OCPI_TABORT (OCPI_BASE + 0x0c)
33#define OCPI_SINT1 (OCPI_BASE + 0x10)
34#define OCPI_PROT (OCPI_BASE + 0x14)
35#define OCPI_SEC (OCPI_BASE + 0x18)
36
37/* USB OHCI OCPI access error registers */
38#define HOSTUEADDR 0xfffba0e0
39#define HOSTUESTATUS 0xfffba0e4
40
41static struct clk *ocpi_ck;
42
43/*
44 * Enables device access to OMAP buses via the OCPI bridge
45 */
46int ocpi_enable(void)
47{
48 unsigned int val;
49
50 if (!cpu_is_omap16xx())
51 return -ENODEV;
52
53 /* Enable access for OHCI in OCPI */
54 val = omap_readl(OCPI_PROT);
55 val &= ~0xff;
56 /* val &= (1 << 0); Allow access only to EMIFS */
57 omap_writel(val, OCPI_PROT);
58
59 val = omap_readl(OCPI_SEC);
60 val &= ~0xff;
61 omap_writel(val, OCPI_SEC);
62
63 return 0;
64}
65EXPORT_SYMBOL(ocpi_enable);
66
67static int __init omap_ocpi_init(void)
68{
69 if (!cpu_is_omap16xx())
70 return -ENODEV;
71
72 ocpi_ck = clk_get(NULL, "l3_ocpi_ck");
73 if (IS_ERR(ocpi_ck))
74 return PTR_ERR(ocpi_ck);
75
76 clk_prepare_enable(ocpi_ck);
77 ocpi_enable();
78 pr_info("OMAP OCPI interconnect driver loaded\n");
79
80 return 0;
81}
82
83static void __exit omap_ocpi_exit(void)
84{
85 /* REVISIT: Disable OCPI */
86
87 if (!cpu_is_omap16xx())
88 return;
89
90 clk_disable_unprepare(ocpi_ck);
91 clk_put(ocpi_ck);
92}
93
94MODULE_AUTHOR("Tony Lindgren <tony@atomide.com>");
95MODULE_DESCRIPTION("OMAP OCPI bus controller module");
96MODULE_LICENSE("GPL");
97module_init(omap_ocpi_init);
98module_exit(omap_ocpi_exit);