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1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright (C) 2015 Microchip Technology
4 */
5#include <linux/version.h>
6#include <linux/module.h>
7#include <linux/netdevice.h>
8#include <linux/etherdevice.h>
9#include <linux/ethtool.h>
10#include <linux/usb.h>
11#include <linux/crc32.h>
12#include <linux/signal.h>
13#include <linux/slab.h>
14#include <linux/if_vlan.h>
15#include <linux/uaccess.h>
16#include <linux/linkmode.h>
17#include <linux/list.h>
18#include <linux/ip.h>
19#include <linux/ipv6.h>
20#include <linux/mdio.h>
21#include <linux/phy.h>
22#include <net/ip6_checksum.h>
23#include <net/vxlan.h>
24#include <linux/interrupt.h>
25#include <linux/irqdomain.h>
26#include <linux/irq.h>
27#include <linux/irqchip/chained_irq.h>
28#include <linux/microchipphy.h>
29#include <linux/phy_fixed.h>
30#include <linux/of_mdio.h>
31#include <linux/of_net.h>
32#include "lan78xx.h"
33
34#define DRIVER_AUTHOR "WOOJUNG HUH <woojung.huh@microchip.com>"
35#define DRIVER_DESC "LAN78XX USB 3.0 Gigabit Ethernet Devices"
36#define DRIVER_NAME "lan78xx"
37
38#define TX_TIMEOUT_JIFFIES (5 * HZ)
39#define THROTTLE_JIFFIES (HZ / 8)
40#define UNLINK_TIMEOUT_MS 3
41
42#define RX_MAX_QUEUE_MEMORY (60 * 1518)
43
44#define SS_USB_PKT_SIZE (1024)
45#define HS_USB_PKT_SIZE (512)
46#define FS_USB_PKT_SIZE (64)
47
48#define MAX_RX_FIFO_SIZE (12 * 1024)
49#define MAX_TX_FIFO_SIZE (12 * 1024)
50#define DEFAULT_BURST_CAP_SIZE (MAX_TX_FIFO_SIZE)
51#define DEFAULT_BULK_IN_DELAY (0x0800)
52#define MAX_SINGLE_PACKET_SIZE (9000)
53#define DEFAULT_TX_CSUM_ENABLE (true)
54#define DEFAULT_RX_CSUM_ENABLE (true)
55#define DEFAULT_TSO_CSUM_ENABLE (true)
56#define DEFAULT_VLAN_FILTER_ENABLE (true)
57#define DEFAULT_VLAN_RX_OFFLOAD (true)
58#define TX_OVERHEAD (8)
59#define RXW_PADDING 2
60
61#define LAN78XX_USB_VENDOR_ID (0x0424)
62#define LAN7800_USB_PRODUCT_ID (0x7800)
63#define LAN7850_USB_PRODUCT_ID (0x7850)
64#define LAN7801_USB_PRODUCT_ID (0x7801)
65#define LAN78XX_EEPROM_MAGIC (0x78A5)
66#define LAN78XX_OTP_MAGIC (0x78F3)
67
68#define MII_READ 1
69#define MII_WRITE 0
70
71#define EEPROM_INDICATOR (0xA5)
72#define EEPROM_MAC_OFFSET (0x01)
73#define MAX_EEPROM_SIZE 512
74#define OTP_INDICATOR_1 (0xF3)
75#define OTP_INDICATOR_2 (0xF7)
76
77#define WAKE_ALL (WAKE_PHY | WAKE_UCAST | \
78 WAKE_MCAST | WAKE_BCAST | \
79 WAKE_ARP | WAKE_MAGIC)
80
81/* USB related defines */
82#define BULK_IN_PIPE 1
83#define BULK_OUT_PIPE 2
84
85/* default autosuspend delay (mSec)*/
86#define DEFAULT_AUTOSUSPEND_DELAY (10 * 1000)
87
88/* statistic update interval (mSec) */
89#define STAT_UPDATE_TIMER (1 * 1000)
90
91/* defines interrupts from interrupt EP */
92#define MAX_INT_EP (32)
93#define INT_EP_INTEP (31)
94#define INT_EP_OTP_WR_DONE (28)
95#define INT_EP_EEE_TX_LPI_START (26)
96#define INT_EP_EEE_TX_LPI_STOP (25)
97#define INT_EP_EEE_RX_LPI (24)
98#define INT_EP_MAC_RESET_TIMEOUT (23)
99#define INT_EP_RDFO (22)
100#define INT_EP_TXE (21)
101#define INT_EP_USB_STATUS (20)
102#define INT_EP_TX_DIS (19)
103#define INT_EP_RX_DIS (18)
104#define INT_EP_PHY (17)
105#define INT_EP_DP (16)
106#define INT_EP_MAC_ERR (15)
107#define INT_EP_TDFU (14)
108#define INT_EP_TDFO (13)
109#define INT_EP_UTX (12)
110#define INT_EP_GPIO_11 (11)
111#define INT_EP_GPIO_10 (10)
112#define INT_EP_GPIO_9 (9)
113#define INT_EP_GPIO_8 (8)
114#define INT_EP_GPIO_7 (7)
115#define INT_EP_GPIO_6 (6)
116#define INT_EP_GPIO_5 (5)
117#define INT_EP_GPIO_4 (4)
118#define INT_EP_GPIO_3 (3)
119#define INT_EP_GPIO_2 (2)
120#define INT_EP_GPIO_1 (1)
121#define INT_EP_GPIO_0 (0)
122
123static const char lan78xx_gstrings[][ETH_GSTRING_LEN] = {
124 "RX FCS Errors",
125 "RX Alignment Errors",
126 "Rx Fragment Errors",
127 "RX Jabber Errors",
128 "RX Undersize Frame Errors",
129 "RX Oversize Frame Errors",
130 "RX Dropped Frames",
131 "RX Unicast Byte Count",
132 "RX Broadcast Byte Count",
133 "RX Multicast Byte Count",
134 "RX Unicast Frames",
135 "RX Broadcast Frames",
136 "RX Multicast Frames",
137 "RX Pause Frames",
138 "RX 64 Byte Frames",
139 "RX 65 - 127 Byte Frames",
140 "RX 128 - 255 Byte Frames",
141 "RX 256 - 511 Bytes Frames",
142 "RX 512 - 1023 Byte Frames",
143 "RX 1024 - 1518 Byte Frames",
144 "RX Greater 1518 Byte Frames",
145 "EEE RX LPI Transitions",
146 "EEE RX LPI Time",
147 "TX FCS Errors",
148 "TX Excess Deferral Errors",
149 "TX Carrier Errors",
150 "TX Bad Byte Count",
151 "TX Single Collisions",
152 "TX Multiple Collisions",
153 "TX Excessive Collision",
154 "TX Late Collisions",
155 "TX Unicast Byte Count",
156 "TX Broadcast Byte Count",
157 "TX Multicast Byte Count",
158 "TX Unicast Frames",
159 "TX Broadcast Frames",
160 "TX Multicast Frames",
161 "TX Pause Frames",
162 "TX 64 Byte Frames",
163 "TX 65 - 127 Byte Frames",
164 "TX 128 - 255 Byte Frames",
165 "TX 256 - 511 Bytes Frames",
166 "TX 512 - 1023 Byte Frames",
167 "TX 1024 - 1518 Byte Frames",
168 "TX Greater 1518 Byte Frames",
169 "EEE TX LPI Transitions",
170 "EEE TX LPI Time",
171};
172
173struct lan78xx_statstage {
174 u32 rx_fcs_errors;
175 u32 rx_alignment_errors;
176 u32 rx_fragment_errors;
177 u32 rx_jabber_errors;
178 u32 rx_undersize_frame_errors;
179 u32 rx_oversize_frame_errors;
180 u32 rx_dropped_frames;
181 u32 rx_unicast_byte_count;
182 u32 rx_broadcast_byte_count;
183 u32 rx_multicast_byte_count;
184 u32 rx_unicast_frames;
185 u32 rx_broadcast_frames;
186 u32 rx_multicast_frames;
187 u32 rx_pause_frames;
188 u32 rx_64_byte_frames;
189 u32 rx_65_127_byte_frames;
190 u32 rx_128_255_byte_frames;
191 u32 rx_256_511_bytes_frames;
192 u32 rx_512_1023_byte_frames;
193 u32 rx_1024_1518_byte_frames;
194 u32 rx_greater_1518_byte_frames;
195 u32 eee_rx_lpi_transitions;
196 u32 eee_rx_lpi_time;
197 u32 tx_fcs_errors;
198 u32 tx_excess_deferral_errors;
199 u32 tx_carrier_errors;
200 u32 tx_bad_byte_count;
201 u32 tx_single_collisions;
202 u32 tx_multiple_collisions;
203 u32 tx_excessive_collision;
204 u32 tx_late_collisions;
205 u32 tx_unicast_byte_count;
206 u32 tx_broadcast_byte_count;
207 u32 tx_multicast_byte_count;
208 u32 tx_unicast_frames;
209 u32 tx_broadcast_frames;
210 u32 tx_multicast_frames;
211 u32 tx_pause_frames;
212 u32 tx_64_byte_frames;
213 u32 tx_65_127_byte_frames;
214 u32 tx_128_255_byte_frames;
215 u32 tx_256_511_bytes_frames;
216 u32 tx_512_1023_byte_frames;
217 u32 tx_1024_1518_byte_frames;
218 u32 tx_greater_1518_byte_frames;
219 u32 eee_tx_lpi_transitions;
220 u32 eee_tx_lpi_time;
221};
222
223struct lan78xx_statstage64 {
224 u64 rx_fcs_errors;
225 u64 rx_alignment_errors;
226 u64 rx_fragment_errors;
227 u64 rx_jabber_errors;
228 u64 rx_undersize_frame_errors;
229 u64 rx_oversize_frame_errors;
230 u64 rx_dropped_frames;
231 u64 rx_unicast_byte_count;
232 u64 rx_broadcast_byte_count;
233 u64 rx_multicast_byte_count;
234 u64 rx_unicast_frames;
235 u64 rx_broadcast_frames;
236 u64 rx_multicast_frames;
237 u64 rx_pause_frames;
238 u64 rx_64_byte_frames;
239 u64 rx_65_127_byte_frames;
240 u64 rx_128_255_byte_frames;
241 u64 rx_256_511_bytes_frames;
242 u64 rx_512_1023_byte_frames;
243 u64 rx_1024_1518_byte_frames;
244 u64 rx_greater_1518_byte_frames;
245 u64 eee_rx_lpi_transitions;
246 u64 eee_rx_lpi_time;
247 u64 tx_fcs_errors;
248 u64 tx_excess_deferral_errors;
249 u64 tx_carrier_errors;
250 u64 tx_bad_byte_count;
251 u64 tx_single_collisions;
252 u64 tx_multiple_collisions;
253 u64 tx_excessive_collision;
254 u64 tx_late_collisions;
255 u64 tx_unicast_byte_count;
256 u64 tx_broadcast_byte_count;
257 u64 tx_multicast_byte_count;
258 u64 tx_unicast_frames;
259 u64 tx_broadcast_frames;
260 u64 tx_multicast_frames;
261 u64 tx_pause_frames;
262 u64 tx_64_byte_frames;
263 u64 tx_65_127_byte_frames;
264 u64 tx_128_255_byte_frames;
265 u64 tx_256_511_bytes_frames;
266 u64 tx_512_1023_byte_frames;
267 u64 tx_1024_1518_byte_frames;
268 u64 tx_greater_1518_byte_frames;
269 u64 eee_tx_lpi_transitions;
270 u64 eee_tx_lpi_time;
271};
272
273static u32 lan78xx_regs[] = {
274 ID_REV,
275 INT_STS,
276 HW_CFG,
277 PMT_CTL,
278 E2P_CMD,
279 E2P_DATA,
280 USB_STATUS,
281 VLAN_TYPE,
282 MAC_CR,
283 MAC_RX,
284 MAC_TX,
285 FLOW,
286 ERR_STS,
287 MII_ACC,
288 MII_DATA,
289 EEE_TX_LPI_REQ_DLY,
290 EEE_TW_TX_SYS,
291 EEE_TX_LPI_REM_DLY,
292 WUCSR
293};
294
295#define PHY_REG_SIZE (32 * sizeof(u32))
296
297struct lan78xx_net;
298
299struct lan78xx_priv {
300 struct lan78xx_net *dev;
301 u32 rfe_ctl;
302 u32 mchash_table[DP_SEL_VHF_HASH_LEN]; /* multicat hash table */
303 u32 pfilter_table[NUM_OF_MAF][2]; /* perfect filter table */
304 u32 vlan_table[DP_SEL_VHF_VLAN_LEN];
305 struct mutex dataport_mutex; /* for dataport access */
306 spinlock_t rfe_ctl_lock; /* for rfe register access */
307 struct work_struct set_multicast;
308 struct work_struct set_vlan;
309 u32 wol;
310};
311
312enum skb_state {
313 illegal = 0,
314 tx_start,
315 tx_done,
316 rx_start,
317 rx_done,
318 rx_cleanup,
319 unlink_start
320};
321
322struct skb_data { /* skb->cb is one of these */
323 struct urb *urb;
324 struct lan78xx_net *dev;
325 enum skb_state state;
326 size_t length;
327 int num_of_packet;
328};
329
330struct usb_context {
331 struct usb_ctrlrequest req;
332 struct lan78xx_net *dev;
333};
334
335#define EVENT_TX_HALT 0
336#define EVENT_RX_HALT 1
337#define EVENT_RX_MEMORY 2
338#define EVENT_STS_SPLIT 3
339#define EVENT_LINK_RESET 4
340#define EVENT_RX_PAUSED 5
341#define EVENT_DEV_WAKING 6
342#define EVENT_DEV_ASLEEP 7
343#define EVENT_DEV_OPEN 8
344#define EVENT_STAT_UPDATE 9
345
346struct statstage {
347 struct mutex access_lock; /* for stats access */
348 struct lan78xx_statstage saved;
349 struct lan78xx_statstage rollover_count;
350 struct lan78xx_statstage rollover_max;
351 struct lan78xx_statstage64 curr_stat;
352};
353
354struct irq_domain_data {
355 struct irq_domain *irqdomain;
356 unsigned int phyirq;
357 struct irq_chip *irqchip;
358 irq_flow_handler_t irq_handler;
359 u32 irqenable;
360 struct mutex irq_lock; /* for irq bus access */
361};
362
363struct lan78xx_net {
364 struct net_device *net;
365 struct usb_device *udev;
366 struct usb_interface *intf;
367 void *driver_priv;
368
369 int rx_qlen;
370 int tx_qlen;
371 struct sk_buff_head rxq;
372 struct sk_buff_head txq;
373 struct sk_buff_head done;
374 struct sk_buff_head rxq_pause;
375 struct sk_buff_head txq_pend;
376
377 struct tasklet_struct bh;
378 struct delayed_work wq;
379
380 int msg_enable;
381
382 struct urb *urb_intr;
383 struct usb_anchor deferred;
384
385 struct mutex phy_mutex; /* for phy access */
386 unsigned pipe_in, pipe_out, pipe_intr;
387
388 u32 hard_mtu; /* count any extra framing */
389 size_t rx_urb_size; /* size for rx urbs */
390
391 unsigned long flags;
392
393 wait_queue_head_t *wait;
394 unsigned char suspend_count;
395
396 unsigned maxpacket;
397 struct timer_list delay;
398 struct timer_list stat_monitor;
399
400 unsigned long data[5];
401
402 int link_on;
403 u8 mdix_ctrl;
404
405 u32 chipid;
406 u32 chiprev;
407 struct mii_bus *mdiobus;
408 phy_interface_t interface;
409
410 int fc_autoneg;
411 u8 fc_request_control;
412
413 int delta;
414 struct statstage stats;
415
416 struct irq_domain_data domain_data;
417};
418
419/* define external phy id */
420#define PHY_LAN8835 (0x0007C130)
421#define PHY_KSZ9031RNX (0x00221620)
422
423/* use ethtool to change the level for any given device */
424static int msg_level = -1;
425module_param(msg_level, int, 0);
426MODULE_PARM_DESC(msg_level, "Override default message level");
427
428static int lan78xx_read_reg(struct lan78xx_net *dev, u32 index, u32 *data)
429{
430 u32 *buf = kmalloc(sizeof(u32), GFP_KERNEL);
431 int ret;
432
433 if (!buf)
434 return -ENOMEM;
435
436 ret = usb_control_msg(dev->udev, usb_rcvctrlpipe(dev->udev, 0),
437 USB_VENDOR_REQUEST_READ_REGISTER,
438 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
439 0, index, buf, 4, USB_CTRL_GET_TIMEOUT);
440 if (likely(ret >= 0)) {
441 le32_to_cpus(buf);
442 *data = *buf;
443 } else {
444 netdev_warn(dev->net,
445 "Failed to read register index 0x%08x. ret = %d",
446 index, ret);
447 }
448
449 kfree(buf);
450
451 return ret;
452}
453
454static int lan78xx_write_reg(struct lan78xx_net *dev, u32 index, u32 data)
455{
456 u32 *buf = kmalloc(sizeof(u32), GFP_KERNEL);
457 int ret;
458
459 if (!buf)
460 return -ENOMEM;
461
462 *buf = data;
463 cpu_to_le32s(buf);
464
465 ret = usb_control_msg(dev->udev, usb_sndctrlpipe(dev->udev, 0),
466 USB_VENDOR_REQUEST_WRITE_REGISTER,
467 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
468 0, index, buf, 4, USB_CTRL_SET_TIMEOUT);
469 if (unlikely(ret < 0)) {
470 netdev_warn(dev->net,
471 "Failed to write register index 0x%08x. ret = %d",
472 index, ret);
473 }
474
475 kfree(buf);
476
477 return ret;
478}
479
480static int lan78xx_read_stats(struct lan78xx_net *dev,
481 struct lan78xx_statstage *data)
482{
483 int ret = 0;
484 int i;
485 struct lan78xx_statstage *stats;
486 u32 *src;
487 u32 *dst;
488
489 stats = kmalloc(sizeof(*stats), GFP_KERNEL);
490 if (!stats)
491 return -ENOMEM;
492
493 ret = usb_control_msg(dev->udev,
494 usb_rcvctrlpipe(dev->udev, 0),
495 USB_VENDOR_REQUEST_GET_STATS,
496 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
497 0,
498 0,
499 (void *)stats,
500 sizeof(*stats),
501 USB_CTRL_SET_TIMEOUT);
502 if (likely(ret >= 0)) {
503 src = (u32 *)stats;
504 dst = (u32 *)data;
505 for (i = 0; i < sizeof(*stats)/sizeof(u32); i++) {
506 le32_to_cpus(&src[i]);
507 dst[i] = src[i];
508 }
509 } else {
510 netdev_warn(dev->net,
511 "Failed to read stat ret = %d", ret);
512 }
513
514 kfree(stats);
515
516 return ret;
517}
518
519#define check_counter_rollover(struct1, dev_stats, member) { \
520 if (struct1->member < dev_stats.saved.member) \
521 dev_stats.rollover_count.member++; \
522 }
523
524static void lan78xx_check_stat_rollover(struct lan78xx_net *dev,
525 struct lan78xx_statstage *stats)
526{
527 check_counter_rollover(stats, dev->stats, rx_fcs_errors);
528 check_counter_rollover(stats, dev->stats, rx_alignment_errors);
529 check_counter_rollover(stats, dev->stats, rx_fragment_errors);
530 check_counter_rollover(stats, dev->stats, rx_jabber_errors);
531 check_counter_rollover(stats, dev->stats, rx_undersize_frame_errors);
532 check_counter_rollover(stats, dev->stats, rx_oversize_frame_errors);
533 check_counter_rollover(stats, dev->stats, rx_dropped_frames);
534 check_counter_rollover(stats, dev->stats, rx_unicast_byte_count);
535 check_counter_rollover(stats, dev->stats, rx_broadcast_byte_count);
536 check_counter_rollover(stats, dev->stats, rx_multicast_byte_count);
537 check_counter_rollover(stats, dev->stats, rx_unicast_frames);
538 check_counter_rollover(stats, dev->stats, rx_broadcast_frames);
539 check_counter_rollover(stats, dev->stats, rx_multicast_frames);
540 check_counter_rollover(stats, dev->stats, rx_pause_frames);
541 check_counter_rollover(stats, dev->stats, rx_64_byte_frames);
542 check_counter_rollover(stats, dev->stats, rx_65_127_byte_frames);
543 check_counter_rollover(stats, dev->stats, rx_128_255_byte_frames);
544 check_counter_rollover(stats, dev->stats, rx_256_511_bytes_frames);
545 check_counter_rollover(stats, dev->stats, rx_512_1023_byte_frames);
546 check_counter_rollover(stats, dev->stats, rx_1024_1518_byte_frames);
547 check_counter_rollover(stats, dev->stats, rx_greater_1518_byte_frames);
548 check_counter_rollover(stats, dev->stats, eee_rx_lpi_transitions);
549 check_counter_rollover(stats, dev->stats, eee_rx_lpi_time);
550 check_counter_rollover(stats, dev->stats, tx_fcs_errors);
551 check_counter_rollover(stats, dev->stats, tx_excess_deferral_errors);
552 check_counter_rollover(stats, dev->stats, tx_carrier_errors);
553 check_counter_rollover(stats, dev->stats, tx_bad_byte_count);
554 check_counter_rollover(stats, dev->stats, tx_single_collisions);
555 check_counter_rollover(stats, dev->stats, tx_multiple_collisions);
556 check_counter_rollover(stats, dev->stats, tx_excessive_collision);
557 check_counter_rollover(stats, dev->stats, tx_late_collisions);
558 check_counter_rollover(stats, dev->stats, tx_unicast_byte_count);
559 check_counter_rollover(stats, dev->stats, tx_broadcast_byte_count);
560 check_counter_rollover(stats, dev->stats, tx_multicast_byte_count);
561 check_counter_rollover(stats, dev->stats, tx_unicast_frames);
562 check_counter_rollover(stats, dev->stats, tx_broadcast_frames);
563 check_counter_rollover(stats, dev->stats, tx_multicast_frames);
564 check_counter_rollover(stats, dev->stats, tx_pause_frames);
565 check_counter_rollover(stats, dev->stats, tx_64_byte_frames);
566 check_counter_rollover(stats, dev->stats, tx_65_127_byte_frames);
567 check_counter_rollover(stats, dev->stats, tx_128_255_byte_frames);
568 check_counter_rollover(stats, dev->stats, tx_256_511_bytes_frames);
569 check_counter_rollover(stats, dev->stats, tx_512_1023_byte_frames);
570 check_counter_rollover(stats, dev->stats, tx_1024_1518_byte_frames);
571 check_counter_rollover(stats, dev->stats, tx_greater_1518_byte_frames);
572 check_counter_rollover(stats, dev->stats, eee_tx_lpi_transitions);
573 check_counter_rollover(stats, dev->stats, eee_tx_lpi_time);
574
575 memcpy(&dev->stats.saved, stats, sizeof(struct lan78xx_statstage));
576}
577
578static void lan78xx_update_stats(struct lan78xx_net *dev)
579{
580 u32 *p, *count, *max;
581 u64 *data;
582 int i;
583 struct lan78xx_statstage lan78xx_stats;
584
585 if (usb_autopm_get_interface(dev->intf) < 0)
586 return;
587
588 p = (u32 *)&lan78xx_stats;
589 count = (u32 *)&dev->stats.rollover_count;
590 max = (u32 *)&dev->stats.rollover_max;
591 data = (u64 *)&dev->stats.curr_stat;
592
593 mutex_lock(&dev->stats.access_lock);
594
595 if (lan78xx_read_stats(dev, &lan78xx_stats) > 0)
596 lan78xx_check_stat_rollover(dev, &lan78xx_stats);
597
598 for (i = 0; i < (sizeof(lan78xx_stats) / (sizeof(u32))); i++)
599 data[i] = (u64)p[i] + ((u64)count[i] * ((u64)max[i] + 1));
600
601 mutex_unlock(&dev->stats.access_lock);
602
603 usb_autopm_put_interface(dev->intf);
604}
605
606/* Loop until the read is completed with timeout called with phy_mutex held */
607static int lan78xx_phy_wait_not_busy(struct lan78xx_net *dev)
608{
609 unsigned long start_time = jiffies;
610 u32 val;
611 int ret;
612
613 do {
614 ret = lan78xx_read_reg(dev, MII_ACC, &val);
615 if (unlikely(ret < 0))
616 return -EIO;
617
618 if (!(val & MII_ACC_MII_BUSY_))
619 return 0;
620 } while (!time_after(jiffies, start_time + HZ));
621
622 return -EIO;
623}
624
625static inline u32 mii_access(int id, int index, int read)
626{
627 u32 ret;
628
629 ret = ((u32)id << MII_ACC_PHY_ADDR_SHIFT_) & MII_ACC_PHY_ADDR_MASK_;
630 ret |= ((u32)index << MII_ACC_MIIRINDA_SHIFT_) & MII_ACC_MIIRINDA_MASK_;
631 if (read)
632 ret |= MII_ACC_MII_READ_;
633 else
634 ret |= MII_ACC_MII_WRITE_;
635 ret |= MII_ACC_MII_BUSY_;
636
637 return ret;
638}
639
640static int lan78xx_wait_eeprom(struct lan78xx_net *dev)
641{
642 unsigned long start_time = jiffies;
643 u32 val;
644 int ret;
645
646 do {
647 ret = lan78xx_read_reg(dev, E2P_CMD, &val);
648 if (unlikely(ret < 0))
649 return -EIO;
650
651 if (!(val & E2P_CMD_EPC_BUSY_) ||
652 (val & E2P_CMD_EPC_TIMEOUT_))
653 break;
654 usleep_range(40, 100);
655 } while (!time_after(jiffies, start_time + HZ));
656
657 if (val & (E2P_CMD_EPC_TIMEOUT_ | E2P_CMD_EPC_BUSY_)) {
658 netdev_warn(dev->net, "EEPROM read operation timeout");
659 return -EIO;
660 }
661
662 return 0;
663}
664
665static int lan78xx_eeprom_confirm_not_busy(struct lan78xx_net *dev)
666{
667 unsigned long start_time = jiffies;
668 u32 val;
669 int ret;
670
671 do {
672 ret = lan78xx_read_reg(dev, E2P_CMD, &val);
673 if (unlikely(ret < 0))
674 return -EIO;
675
676 if (!(val & E2P_CMD_EPC_BUSY_))
677 return 0;
678
679 usleep_range(40, 100);
680 } while (!time_after(jiffies, start_time + HZ));
681
682 netdev_warn(dev->net, "EEPROM is busy");
683 return -EIO;
684}
685
686static int lan78xx_read_raw_eeprom(struct lan78xx_net *dev, u32 offset,
687 u32 length, u8 *data)
688{
689 u32 val;
690 u32 saved;
691 int i, ret;
692 int retval;
693
694 /* depends on chip, some EEPROM pins are muxed with LED function.
695 * disable & restore LED function to access EEPROM.
696 */
697 ret = lan78xx_read_reg(dev, HW_CFG, &val);
698 saved = val;
699 if (dev->chipid == ID_REV_CHIP_ID_7800_) {
700 val &= ~(HW_CFG_LED1_EN_ | HW_CFG_LED0_EN_);
701 ret = lan78xx_write_reg(dev, HW_CFG, val);
702 }
703
704 retval = lan78xx_eeprom_confirm_not_busy(dev);
705 if (retval)
706 return retval;
707
708 for (i = 0; i < length; i++) {
709 val = E2P_CMD_EPC_BUSY_ | E2P_CMD_EPC_CMD_READ_;
710 val |= (offset & E2P_CMD_EPC_ADDR_MASK_);
711 ret = lan78xx_write_reg(dev, E2P_CMD, val);
712 if (unlikely(ret < 0)) {
713 retval = -EIO;
714 goto exit;
715 }
716
717 retval = lan78xx_wait_eeprom(dev);
718 if (retval < 0)
719 goto exit;
720
721 ret = lan78xx_read_reg(dev, E2P_DATA, &val);
722 if (unlikely(ret < 0)) {
723 retval = -EIO;
724 goto exit;
725 }
726
727 data[i] = val & 0xFF;
728 offset++;
729 }
730
731 retval = 0;
732exit:
733 if (dev->chipid == ID_REV_CHIP_ID_7800_)
734 ret = lan78xx_write_reg(dev, HW_CFG, saved);
735
736 return retval;
737}
738
739static int lan78xx_read_eeprom(struct lan78xx_net *dev, u32 offset,
740 u32 length, u8 *data)
741{
742 u8 sig;
743 int ret;
744
745 ret = lan78xx_read_raw_eeprom(dev, 0, 1, &sig);
746 if ((ret == 0) && (sig == EEPROM_INDICATOR))
747 ret = lan78xx_read_raw_eeprom(dev, offset, length, data);
748 else
749 ret = -EINVAL;
750
751 return ret;
752}
753
754static int lan78xx_write_raw_eeprom(struct lan78xx_net *dev, u32 offset,
755 u32 length, u8 *data)
756{
757 u32 val;
758 u32 saved;
759 int i, ret;
760 int retval;
761
762 /* depends on chip, some EEPROM pins are muxed with LED function.
763 * disable & restore LED function to access EEPROM.
764 */
765 ret = lan78xx_read_reg(dev, HW_CFG, &val);
766 saved = val;
767 if (dev->chipid == ID_REV_CHIP_ID_7800_) {
768 val &= ~(HW_CFG_LED1_EN_ | HW_CFG_LED0_EN_);
769 ret = lan78xx_write_reg(dev, HW_CFG, val);
770 }
771
772 retval = lan78xx_eeprom_confirm_not_busy(dev);
773 if (retval)
774 goto exit;
775
776 /* Issue write/erase enable command */
777 val = E2P_CMD_EPC_BUSY_ | E2P_CMD_EPC_CMD_EWEN_;
778 ret = lan78xx_write_reg(dev, E2P_CMD, val);
779 if (unlikely(ret < 0)) {
780 retval = -EIO;
781 goto exit;
782 }
783
784 retval = lan78xx_wait_eeprom(dev);
785 if (retval < 0)
786 goto exit;
787
788 for (i = 0; i < length; i++) {
789 /* Fill data register */
790 val = data[i];
791 ret = lan78xx_write_reg(dev, E2P_DATA, val);
792 if (ret < 0) {
793 retval = -EIO;
794 goto exit;
795 }
796
797 /* Send "write" command */
798 val = E2P_CMD_EPC_BUSY_ | E2P_CMD_EPC_CMD_WRITE_;
799 val |= (offset & E2P_CMD_EPC_ADDR_MASK_);
800 ret = lan78xx_write_reg(dev, E2P_CMD, val);
801 if (ret < 0) {
802 retval = -EIO;
803 goto exit;
804 }
805
806 retval = lan78xx_wait_eeprom(dev);
807 if (retval < 0)
808 goto exit;
809
810 offset++;
811 }
812
813 retval = 0;
814exit:
815 if (dev->chipid == ID_REV_CHIP_ID_7800_)
816 ret = lan78xx_write_reg(dev, HW_CFG, saved);
817
818 return retval;
819}
820
821static int lan78xx_read_raw_otp(struct lan78xx_net *dev, u32 offset,
822 u32 length, u8 *data)
823{
824 int i;
825 int ret;
826 u32 buf;
827 unsigned long timeout;
828
829 ret = lan78xx_read_reg(dev, OTP_PWR_DN, &buf);
830
831 if (buf & OTP_PWR_DN_PWRDN_N_) {
832 /* clear it and wait to be cleared */
833 ret = lan78xx_write_reg(dev, OTP_PWR_DN, 0);
834
835 timeout = jiffies + HZ;
836 do {
837 usleep_range(1, 10);
838 ret = lan78xx_read_reg(dev, OTP_PWR_DN, &buf);
839 if (time_after(jiffies, timeout)) {
840 netdev_warn(dev->net,
841 "timeout on OTP_PWR_DN");
842 return -EIO;
843 }
844 } while (buf & OTP_PWR_DN_PWRDN_N_);
845 }
846
847 for (i = 0; i < length; i++) {
848 ret = lan78xx_write_reg(dev, OTP_ADDR1,
849 ((offset + i) >> 8) & OTP_ADDR1_15_11);
850 ret = lan78xx_write_reg(dev, OTP_ADDR2,
851 ((offset + i) & OTP_ADDR2_10_3));
852
853 ret = lan78xx_write_reg(dev, OTP_FUNC_CMD, OTP_FUNC_CMD_READ_);
854 ret = lan78xx_write_reg(dev, OTP_CMD_GO, OTP_CMD_GO_GO_);
855
856 timeout = jiffies + HZ;
857 do {
858 udelay(1);
859 ret = lan78xx_read_reg(dev, OTP_STATUS, &buf);
860 if (time_after(jiffies, timeout)) {
861 netdev_warn(dev->net,
862 "timeout on OTP_STATUS");
863 return -EIO;
864 }
865 } while (buf & OTP_STATUS_BUSY_);
866
867 ret = lan78xx_read_reg(dev, OTP_RD_DATA, &buf);
868
869 data[i] = (u8)(buf & 0xFF);
870 }
871
872 return 0;
873}
874
875static int lan78xx_write_raw_otp(struct lan78xx_net *dev, u32 offset,
876 u32 length, u8 *data)
877{
878 int i;
879 int ret;
880 u32 buf;
881 unsigned long timeout;
882
883 ret = lan78xx_read_reg(dev, OTP_PWR_DN, &buf);
884
885 if (buf & OTP_PWR_DN_PWRDN_N_) {
886 /* clear it and wait to be cleared */
887 ret = lan78xx_write_reg(dev, OTP_PWR_DN, 0);
888
889 timeout = jiffies + HZ;
890 do {
891 udelay(1);
892 ret = lan78xx_read_reg(dev, OTP_PWR_DN, &buf);
893 if (time_after(jiffies, timeout)) {
894 netdev_warn(dev->net,
895 "timeout on OTP_PWR_DN completion");
896 return -EIO;
897 }
898 } while (buf & OTP_PWR_DN_PWRDN_N_);
899 }
900
901 /* set to BYTE program mode */
902 ret = lan78xx_write_reg(dev, OTP_PRGM_MODE, OTP_PRGM_MODE_BYTE_);
903
904 for (i = 0; i < length; i++) {
905 ret = lan78xx_write_reg(dev, OTP_ADDR1,
906 ((offset + i) >> 8) & OTP_ADDR1_15_11);
907 ret = lan78xx_write_reg(dev, OTP_ADDR2,
908 ((offset + i) & OTP_ADDR2_10_3));
909 ret = lan78xx_write_reg(dev, OTP_PRGM_DATA, data[i]);
910 ret = lan78xx_write_reg(dev, OTP_TST_CMD, OTP_TST_CMD_PRGVRFY_);
911 ret = lan78xx_write_reg(dev, OTP_CMD_GO, OTP_CMD_GO_GO_);
912
913 timeout = jiffies + HZ;
914 do {
915 udelay(1);
916 ret = lan78xx_read_reg(dev, OTP_STATUS, &buf);
917 if (time_after(jiffies, timeout)) {
918 netdev_warn(dev->net,
919 "Timeout on OTP_STATUS completion");
920 return -EIO;
921 }
922 } while (buf & OTP_STATUS_BUSY_);
923 }
924
925 return 0;
926}
927
928static int lan78xx_read_otp(struct lan78xx_net *dev, u32 offset,
929 u32 length, u8 *data)
930{
931 u8 sig;
932 int ret;
933
934 ret = lan78xx_read_raw_otp(dev, 0, 1, &sig);
935
936 if (ret == 0) {
937 if (sig == OTP_INDICATOR_2)
938 offset += 0x100;
939 else if (sig != OTP_INDICATOR_1)
940 ret = -EINVAL;
941 if (!ret)
942 ret = lan78xx_read_raw_otp(dev, offset, length, data);
943 }
944
945 return ret;
946}
947
948static int lan78xx_dataport_wait_not_busy(struct lan78xx_net *dev)
949{
950 int i, ret;
951
952 for (i = 0; i < 100; i++) {
953 u32 dp_sel;
954
955 ret = lan78xx_read_reg(dev, DP_SEL, &dp_sel);
956 if (unlikely(ret < 0))
957 return -EIO;
958
959 if (dp_sel & DP_SEL_DPRDY_)
960 return 0;
961
962 usleep_range(40, 100);
963 }
964
965 netdev_warn(dev->net, "lan78xx_dataport_wait_not_busy timed out");
966
967 return -EIO;
968}
969
970static int lan78xx_dataport_write(struct lan78xx_net *dev, u32 ram_select,
971 u32 addr, u32 length, u32 *buf)
972{
973 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]);
974 u32 dp_sel;
975 int i, ret;
976
977 if (usb_autopm_get_interface(dev->intf) < 0)
978 return 0;
979
980 mutex_lock(&pdata->dataport_mutex);
981
982 ret = lan78xx_dataport_wait_not_busy(dev);
983 if (ret < 0)
984 goto done;
985
986 ret = lan78xx_read_reg(dev, DP_SEL, &dp_sel);
987
988 dp_sel &= ~DP_SEL_RSEL_MASK_;
989 dp_sel |= ram_select;
990 ret = lan78xx_write_reg(dev, DP_SEL, dp_sel);
991
992 for (i = 0; i < length; i++) {
993 ret = lan78xx_write_reg(dev, DP_ADDR, addr + i);
994
995 ret = lan78xx_write_reg(dev, DP_DATA, buf[i]);
996
997 ret = lan78xx_write_reg(dev, DP_CMD, DP_CMD_WRITE_);
998
999 ret = lan78xx_dataport_wait_not_busy(dev);
1000 if (ret < 0)
1001 goto done;
1002 }
1003
1004done:
1005 mutex_unlock(&pdata->dataport_mutex);
1006 usb_autopm_put_interface(dev->intf);
1007
1008 return ret;
1009}
1010
1011static void lan78xx_set_addr_filter(struct lan78xx_priv *pdata,
1012 int index, u8 addr[ETH_ALEN])
1013{
1014 u32 temp;
1015
1016 if ((pdata) && (index > 0) && (index < NUM_OF_MAF)) {
1017 temp = addr[3];
1018 temp = addr[2] | (temp << 8);
1019 temp = addr[1] | (temp << 8);
1020 temp = addr[0] | (temp << 8);
1021 pdata->pfilter_table[index][1] = temp;
1022 temp = addr[5];
1023 temp = addr[4] | (temp << 8);
1024 temp |= MAF_HI_VALID_ | MAF_HI_TYPE_DST_;
1025 pdata->pfilter_table[index][0] = temp;
1026 }
1027}
1028
1029/* returns hash bit number for given MAC address */
1030static inline u32 lan78xx_hash(char addr[ETH_ALEN])
1031{
1032 return (ether_crc(ETH_ALEN, addr) >> 23) & 0x1ff;
1033}
1034
1035static void lan78xx_deferred_multicast_write(struct work_struct *param)
1036{
1037 struct lan78xx_priv *pdata =
1038 container_of(param, struct lan78xx_priv, set_multicast);
1039 struct lan78xx_net *dev = pdata->dev;
1040 int i;
1041 int ret;
1042
1043 netif_dbg(dev, drv, dev->net, "deferred multicast write 0x%08x\n",
1044 pdata->rfe_ctl);
1045
1046 lan78xx_dataport_write(dev, DP_SEL_RSEL_VLAN_DA_, DP_SEL_VHF_VLAN_LEN,
1047 DP_SEL_VHF_HASH_LEN, pdata->mchash_table);
1048
1049 for (i = 1; i < NUM_OF_MAF; i++) {
1050 ret = lan78xx_write_reg(dev, MAF_HI(i), 0);
1051 ret = lan78xx_write_reg(dev, MAF_LO(i),
1052 pdata->pfilter_table[i][1]);
1053 ret = lan78xx_write_reg(dev, MAF_HI(i),
1054 pdata->pfilter_table[i][0]);
1055 }
1056
1057 ret = lan78xx_write_reg(dev, RFE_CTL, pdata->rfe_ctl);
1058}
1059
1060static void lan78xx_set_multicast(struct net_device *netdev)
1061{
1062 struct lan78xx_net *dev = netdev_priv(netdev);
1063 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]);
1064 unsigned long flags;
1065 int i;
1066
1067 spin_lock_irqsave(&pdata->rfe_ctl_lock, flags);
1068
1069 pdata->rfe_ctl &= ~(RFE_CTL_UCAST_EN_ | RFE_CTL_MCAST_EN_ |
1070 RFE_CTL_DA_PERFECT_ | RFE_CTL_MCAST_HASH_);
1071
1072 for (i = 0; i < DP_SEL_VHF_HASH_LEN; i++)
1073 pdata->mchash_table[i] = 0;
1074 /* pfilter_table[0] has own HW address */
1075 for (i = 1; i < NUM_OF_MAF; i++) {
1076 pdata->pfilter_table[i][0] =
1077 pdata->pfilter_table[i][1] = 0;
1078 }
1079
1080 pdata->rfe_ctl |= RFE_CTL_BCAST_EN_;
1081
1082 if (dev->net->flags & IFF_PROMISC) {
1083 netif_dbg(dev, drv, dev->net, "promiscuous mode enabled");
1084 pdata->rfe_ctl |= RFE_CTL_MCAST_EN_ | RFE_CTL_UCAST_EN_;
1085 } else {
1086 if (dev->net->flags & IFF_ALLMULTI) {
1087 netif_dbg(dev, drv, dev->net,
1088 "receive all multicast enabled");
1089 pdata->rfe_ctl |= RFE_CTL_MCAST_EN_;
1090 }
1091 }
1092
1093 if (netdev_mc_count(dev->net)) {
1094 struct netdev_hw_addr *ha;
1095 int i;
1096
1097 netif_dbg(dev, drv, dev->net, "receive multicast hash filter");
1098
1099 pdata->rfe_ctl |= RFE_CTL_DA_PERFECT_;
1100
1101 i = 1;
1102 netdev_for_each_mc_addr(ha, netdev) {
1103 /* set first 32 into Perfect Filter */
1104 if (i < 33) {
1105 lan78xx_set_addr_filter(pdata, i, ha->addr);
1106 } else {
1107 u32 bitnum = lan78xx_hash(ha->addr);
1108
1109 pdata->mchash_table[bitnum / 32] |=
1110 (1 << (bitnum % 32));
1111 pdata->rfe_ctl |= RFE_CTL_MCAST_HASH_;
1112 }
1113 i++;
1114 }
1115 }
1116
1117 spin_unlock_irqrestore(&pdata->rfe_ctl_lock, flags);
1118
1119 /* defer register writes to a sleepable context */
1120 schedule_work(&pdata->set_multicast);
1121}
1122
1123static int lan78xx_update_flowcontrol(struct lan78xx_net *dev, u8 duplex,
1124 u16 lcladv, u16 rmtadv)
1125{
1126 u32 flow = 0, fct_flow = 0;
1127 int ret;
1128 u8 cap;
1129
1130 if (dev->fc_autoneg)
1131 cap = mii_resolve_flowctrl_fdx(lcladv, rmtadv);
1132 else
1133 cap = dev->fc_request_control;
1134
1135 if (cap & FLOW_CTRL_TX)
1136 flow |= (FLOW_CR_TX_FCEN_ | 0xFFFF);
1137
1138 if (cap & FLOW_CTRL_RX)
1139 flow |= FLOW_CR_RX_FCEN_;
1140
1141 if (dev->udev->speed == USB_SPEED_SUPER)
1142 fct_flow = 0x817;
1143 else if (dev->udev->speed == USB_SPEED_HIGH)
1144 fct_flow = 0x211;
1145
1146 netif_dbg(dev, link, dev->net, "rx pause %s, tx pause %s",
1147 (cap & FLOW_CTRL_RX ? "enabled" : "disabled"),
1148 (cap & FLOW_CTRL_TX ? "enabled" : "disabled"));
1149
1150 ret = lan78xx_write_reg(dev, FCT_FLOW, fct_flow);
1151
1152 /* threshold value should be set before enabling flow */
1153 ret = lan78xx_write_reg(dev, FLOW, flow);
1154
1155 return 0;
1156}
1157
1158static int lan78xx_link_reset(struct lan78xx_net *dev)
1159{
1160 struct phy_device *phydev = dev->net->phydev;
1161 struct ethtool_link_ksettings ecmd;
1162 int ladv, radv, ret;
1163 u32 buf;
1164
1165 /* clear LAN78xx interrupt status */
1166 ret = lan78xx_write_reg(dev, INT_STS, INT_STS_PHY_INT_);
1167 if (unlikely(ret < 0))
1168 return -EIO;
1169
1170 phy_read_status(phydev);
1171
1172 if (!phydev->link && dev->link_on) {
1173 dev->link_on = false;
1174
1175 /* reset MAC */
1176 ret = lan78xx_read_reg(dev, MAC_CR, &buf);
1177 if (unlikely(ret < 0))
1178 return -EIO;
1179 buf |= MAC_CR_RST_;
1180 ret = lan78xx_write_reg(dev, MAC_CR, buf);
1181 if (unlikely(ret < 0))
1182 return -EIO;
1183
1184 del_timer(&dev->stat_monitor);
1185 } else if (phydev->link && !dev->link_on) {
1186 dev->link_on = true;
1187
1188 phy_ethtool_ksettings_get(phydev, &ecmd);
1189
1190 if (dev->udev->speed == USB_SPEED_SUPER) {
1191 if (ecmd.base.speed == 1000) {
1192 /* disable U2 */
1193 ret = lan78xx_read_reg(dev, USB_CFG1, &buf);
1194 buf &= ~USB_CFG1_DEV_U2_INIT_EN_;
1195 ret = lan78xx_write_reg(dev, USB_CFG1, buf);
1196 /* enable U1 */
1197 ret = lan78xx_read_reg(dev, USB_CFG1, &buf);
1198 buf |= USB_CFG1_DEV_U1_INIT_EN_;
1199 ret = lan78xx_write_reg(dev, USB_CFG1, buf);
1200 } else {
1201 /* enable U1 & U2 */
1202 ret = lan78xx_read_reg(dev, USB_CFG1, &buf);
1203 buf |= USB_CFG1_DEV_U2_INIT_EN_;
1204 buf |= USB_CFG1_DEV_U1_INIT_EN_;
1205 ret = lan78xx_write_reg(dev, USB_CFG1, buf);
1206 }
1207 }
1208
1209 ladv = phy_read(phydev, MII_ADVERTISE);
1210 if (ladv < 0)
1211 return ladv;
1212
1213 radv = phy_read(phydev, MII_LPA);
1214 if (radv < 0)
1215 return radv;
1216
1217 netif_dbg(dev, link, dev->net,
1218 "speed: %u duplex: %d anadv: 0x%04x anlpa: 0x%04x",
1219 ecmd.base.speed, ecmd.base.duplex, ladv, radv);
1220
1221 ret = lan78xx_update_flowcontrol(dev, ecmd.base.duplex, ladv,
1222 radv);
1223
1224 if (!timer_pending(&dev->stat_monitor)) {
1225 dev->delta = 1;
1226 mod_timer(&dev->stat_monitor,
1227 jiffies + STAT_UPDATE_TIMER);
1228 }
1229
1230 tasklet_schedule(&dev->bh);
1231 }
1232
1233 return ret;
1234}
1235
1236/* some work can't be done in tasklets, so we use keventd
1237 *
1238 * NOTE: annoying asymmetry: if it's active, schedule_work() fails,
1239 * but tasklet_schedule() doesn't. hope the failure is rare.
1240 */
1241static void lan78xx_defer_kevent(struct lan78xx_net *dev, int work)
1242{
1243 set_bit(work, &dev->flags);
1244 if (!schedule_delayed_work(&dev->wq, 0))
1245 netdev_err(dev->net, "kevent %d may have been dropped\n", work);
1246}
1247
1248static void lan78xx_status(struct lan78xx_net *dev, struct urb *urb)
1249{
1250 u32 intdata;
1251
1252 if (urb->actual_length != 4) {
1253 netdev_warn(dev->net,
1254 "unexpected urb length %d", urb->actual_length);
1255 return;
1256 }
1257
1258 intdata = get_unaligned_le32(urb->transfer_buffer);
1259
1260 if (intdata & INT_ENP_PHY_INT) {
1261 netif_dbg(dev, link, dev->net, "PHY INTR: 0x%08x\n", intdata);
1262 lan78xx_defer_kevent(dev, EVENT_LINK_RESET);
1263
1264 if (dev->domain_data.phyirq > 0) {
1265 local_irq_disable();
1266 generic_handle_irq(dev->domain_data.phyirq);
1267 local_irq_enable();
1268 }
1269 } else
1270 netdev_warn(dev->net,
1271 "unexpected interrupt: 0x%08x\n", intdata);
1272}
1273
1274static int lan78xx_ethtool_get_eeprom_len(struct net_device *netdev)
1275{
1276 return MAX_EEPROM_SIZE;
1277}
1278
1279static int lan78xx_ethtool_get_eeprom(struct net_device *netdev,
1280 struct ethtool_eeprom *ee, u8 *data)
1281{
1282 struct lan78xx_net *dev = netdev_priv(netdev);
1283 int ret;
1284
1285 ret = usb_autopm_get_interface(dev->intf);
1286 if (ret)
1287 return ret;
1288
1289 ee->magic = LAN78XX_EEPROM_MAGIC;
1290
1291 ret = lan78xx_read_raw_eeprom(dev, ee->offset, ee->len, data);
1292
1293 usb_autopm_put_interface(dev->intf);
1294
1295 return ret;
1296}
1297
1298static int lan78xx_ethtool_set_eeprom(struct net_device *netdev,
1299 struct ethtool_eeprom *ee, u8 *data)
1300{
1301 struct lan78xx_net *dev = netdev_priv(netdev);
1302 int ret;
1303
1304 ret = usb_autopm_get_interface(dev->intf);
1305 if (ret)
1306 return ret;
1307
1308 /* Invalid EEPROM_INDICATOR at offset zero will result in a failure
1309 * to load data from EEPROM
1310 */
1311 if (ee->magic == LAN78XX_EEPROM_MAGIC)
1312 ret = lan78xx_write_raw_eeprom(dev, ee->offset, ee->len, data);
1313 else if ((ee->magic == LAN78XX_OTP_MAGIC) &&
1314 (ee->offset == 0) &&
1315 (ee->len == 512) &&
1316 (data[0] == OTP_INDICATOR_1))
1317 ret = lan78xx_write_raw_otp(dev, ee->offset, ee->len, data);
1318
1319 usb_autopm_put_interface(dev->intf);
1320
1321 return ret;
1322}
1323
1324static void lan78xx_get_strings(struct net_device *netdev, u32 stringset,
1325 u8 *data)
1326{
1327 if (stringset == ETH_SS_STATS)
1328 memcpy(data, lan78xx_gstrings, sizeof(lan78xx_gstrings));
1329}
1330
1331static int lan78xx_get_sset_count(struct net_device *netdev, int sset)
1332{
1333 if (sset == ETH_SS_STATS)
1334 return ARRAY_SIZE(lan78xx_gstrings);
1335 else
1336 return -EOPNOTSUPP;
1337}
1338
1339static void lan78xx_get_stats(struct net_device *netdev,
1340 struct ethtool_stats *stats, u64 *data)
1341{
1342 struct lan78xx_net *dev = netdev_priv(netdev);
1343
1344 lan78xx_update_stats(dev);
1345
1346 mutex_lock(&dev->stats.access_lock);
1347 memcpy(data, &dev->stats.curr_stat, sizeof(dev->stats.curr_stat));
1348 mutex_unlock(&dev->stats.access_lock);
1349}
1350
1351static void lan78xx_get_wol(struct net_device *netdev,
1352 struct ethtool_wolinfo *wol)
1353{
1354 struct lan78xx_net *dev = netdev_priv(netdev);
1355 int ret;
1356 u32 buf;
1357 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]);
1358
1359 if (usb_autopm_get_interface(dev->intf) < 0)
1360 return;
1361
1362 ret = lan78xx_read_reg(dev, USB_CFG0, &buf);
1363 if (unlikely(ret < 0)) {
1364 wol->supported = 0;
1365 wol->wolopts = 0;
1366 } else {
1367 if (buf & USB_CFG_RMT_WKP_) {
1368 wol->supported = WAKE_ALL;
1369 wol->wolopts = pdata->wol;
1370 } else {
1371 wol->supported = 0;
1372 wol->wolopts = 0;
1373 }
1374 }
1375
1376 usb_autopm_put_interface(dev->intf);
1377}
1378
1379static int lan78xx_set_wol(struct net_device *netdev,
1380 struct ethtool_wolinfo *wol)
1381{
1382 struct lan78xx_net *dev = netdev_priv(netdev);
1383 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]);
1384 int ret;
1385
1386 ret = usb_autopm_get_interface(dev->intf);
1387 if (ret < 0)
1388 return ret;
1389
1390 if (wol->wolopts & ~WAKE_ALL)
1391 return -EINVAL;
1392
1393 pdata->wol = wol->wolopts;
1394
1395 device_set_wakeup_enable(&dev->udev->dev, (bool)wol->wolopts);
1396
1397 phy_ethtool_set_wol(netdev->phydev, wol);
1398
1399 usb_autopm_put_interface(dev->intf);
1400
1401 return ret;
1402}
1403
1404static int lan78xx_get_eee(struct net_device *net, struct ethtool_eee *edata)
1405{
1406 struct lan78xx_net *dev = netdev_priv(net);
1407 struct phy_device *phydev = net->phydev;
1408 int ret;
1409 u32 buf;
1410
1411 ret = usb_autopm_get_interface(dev->intf);
1412 if (ret < 0)
1413 return ret;
1414
1415 ret = phy_ethtool_get_eee(phydev, edata);
1416 if (ret < 0)
1417 goto exit;
1418
1419 ret = lan78xx_read_reg(dev, MAC_CR, &buf);
1420 if (buf & MAC_CR_EEE_EN_) {
1421 edata->eee_enabled = true;
1422 edata->eee_active = !!(edata->advertised &
1423 edata->lp_advertised);
1424 edata->tx_lpi_enabled = true;
1425 /* EEE_TX_LPI_REQ_DLY & tx_lpi_timer are same uSec unit */
1426 ret = lan78xx_read_reg(dev, EEE_TX_LPI_REQ_DLY, &buf);
1427 edata->tx_lpi_timer = buf;
1428 } else {
1429 edata->eee_enabled = false;
1430 edata->eee_active = false;
1431 edata->tx_lpi_enabled = false;
1432 edata->tx_lpi_timer = 0;
1433 }
1434
1435 ret = 0;
1436exit:
1437 usb_autopm_put_interface(dev->intf);
1438
1439 return ret;
1440}
1441
1442static int lan78xx_set_eee(struct net_device *net, struct ethtool_eee *edata)
1443{
1444 struct lan78xx_net *dev = netdev_priv(net);
1445 int ret;
1446 u32 buf;
1447
1448 ret = usb_autopm_get_interface(dev->intf);
1449 if (ret < 0)
1450 return ret;
1451
1452 if (edata->eee_enabled) {
1453 ret = lan78xx_read_reg(dev, MAC_CR, &buf);
1454 buf |= MAC_CR_EEE_EN_;
1455 ret = lan78xx_write_reg(dev, MAC_CR, buf);
1456
1457 phy_ethtool_set_eee(net->phydev, edata);
1458
1459 buf = (u32)edata->tx_lpi_timer;
1460 ret = lan78xx_write_reg(dev, EEE_TX_LPI_REQ_DLY, buf);
1461 } else {
1462 ret = lan78xx_read_reg(dev, MAC_CR, &buf);
1463 buf &= ~MAC_CR_EEE_EN_;
1464 ret = lan78xx_write_reg(dev, MAC_CR, buf);
1465 }
1466
1467 usb_autopm_put_interface(dev->intf);
1468
1469 return 0;
1470}
1471
1472static u32 lan78xx_get_link(struct net_device *net)
1473{
1474 phy_read_status(net->phydev);
1475
1476 return net->phydev->link;
1477}
1478
1479static void lan78xx_get_drvinfo(struct net_device *net,
1480 struct ethtool_drvinfo *info)
1481{
1482 struct lan78xx_net *dev = netdev_priv(net);
1483
1484 strncpy(info->driver, DRIVER_NAME, sizeof(info->driver));
1485 usb_make_path(dev->udev, info->bus_info, sizeof(info->bus_info));
1486}
1487
1488static u32 lan78xx_get_msglevel(struct net_device *net)
1489{
1490 struct lan78xx_net *dev = netdev_priv(net);
1491
1492 return dev->msg_enable;
1493}
1494
1495static void lan78xx_set_msglevel(struct net_device *net, u32 level)
1496{
1497 struct lan78xx_net *dev = netdev_priv(net);
1498
1499 dev->msg_enable = level;
1500}
1501
1502static int lan78xx_get_link_ksettings(struct net_device *net,
1503 struct ethtool_link_ksettings *cmd)
1504{
1505 struct lan78xx_net *dev = netdev_priv(net);
1506 struct phy_device *phydev = net->phydev;
1507 int ret;
1508
1509 ret = usb_autopm_get_interface(dev->intf);
1510 if (ret < 0)
1511 return ret;
1512
1513 phy_ethtool_ksettings_get(phydev, cmd);
1514
1515 usb_autopm_put_interface(dev->intf);
1516
1517 return ret;
1518}
1519
1520static int lan78xx_set_link_ksettings(struct net_device *net,
1521 const struct ethtool_link_ksettings *cmd)
1522{
1523 struct lan78xx_net *dev = netdev_priv(net);
1524 struct phy_device *phydev = net->phydev;
1525 int ret = 0;
1526 int temp;
1527
1528 ret = usb_autopm_get_interface(dev->intf);
1529 if (ret < 0)
1530 return ret;
1531
1532 /* change speed & duplex */
1533 ret = phy_ethtool_ksettings_set(phydev, cmd);
1534
1535 if (!cmd->base.autoneg) {
1536 /* force link down */
1537 temp = phy_read(phydev, MII_BMCR);
1538 phy_write(phydev, MII_BMCR, temp | BMCR_LOOPBACK);
1539 mdelay(1);
1540 phy_write(phydev, MII_BMCR, temp);
1541 }
1542
1543 usb_autopm_put_interface(dev->intf);
1544
1545 return ret;
1546}
1547
1548static void lan78xx_get_pause(struct net_device *net,
1549 struct ethtool_pauseparam *pause)
1550{
1551 struct lan78xx_net *dev = netdev_priv(net);
1552 struct phy_device *phydev = net->phydev;
1553 struct ethtool_link_ksettings ecmd;
1554
1555 phy_ethtool_ksettings_get(phydev, &ecmd);
1556
1557 pause->autoneg = dev->fc_autoneg;
1558
1559 if (dev->fc_request_control & FLOW_CTRL_TX)
1560 pause->tx_pause = 1;
1561
1562 if (dev->fc_request_control & FLOW_CTRL_RX)
1563 pause->rx_pause = 1;
1564}
1565
1566static int lan78xx_set_pause(struct net_device *net,
1567 struct ethtool_pauseparam *pause)
1568{
1569 struct lan78xx_net *dev = netdev_priv(net);
1570 struct phy_device *phydev = net->phydev;
1571 struct ethtool_link_ksettings ecmd;
1572 int ret;
1573
1574 phy_ethtool_ksettings_get(phydev, &ecmd);
1575
1576 if (pause->autoneg && !ecmd.base.autoneg) {
1577 ret = -EINVAL;
1578 goto exit;
1579 }
1580
1581 dev->fc_request_control = 0;
1582 if (pause->rx_pause)
1583 dev->fc_request_control |= FLOW_CTRL_RX;
1584
1585 if (pause->tx_pause)
1586 dev->fc_request_control |= FLOW_CTRL_TX;
1587
1588 if (ecmd.base.autoneg) {
1589 __ETHTOOL_DECLARE_LINK_MODE_MASK(fc) = { 0, };
1590 u32 mii_adv;
1591
1592 linkmode_clear_bit(ETHTOOL_LINK_MODE_Pause_BIT,
1593 ecmd.link_modes.advertising);
1594 linkmode_clear_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT,
1595 ecmd.link_modes.advertising);
1596 mii_adv = (u32)mii_advertise_flowctrl(dev->fc_request_control);
1597 mii_adv_to_linkmode_adv_t(fc, mii_adv);
1598 linkmode_or(ecmd.link_modes.advertising, fc,
1599 ecmd.link_modes.advertising);
1600
1601 phy_ethtool_ksettings_set(phydev, &ecmd);
1602 }
1603
1604 dev->fc_autoneg = pause->autoneg;
1605
1606 ret = 0;
1607exit:
1608 return ret;
1609}
1610
1611static int lan78xx_get_regs_len(struct net_device *netdev)
1612{
1613 if (!netdev->phydev)
1614 return (sizeof(lan78xx_regs));
1615 else
1616 return (sizeof(lan78xx_regs) + PHY_REG_SIZE);
1617}
1618
1619static void
1620lan78xx_get_regs(struct net_device *netdev, struct ethtool_regs *regs,
1621 void *buf)
1622{
1623 u32 *data = buf;
1624 int i, j;
1625 struct lan78xx_net *dev = netdev_priv(netdev);
1626
1627 /* Read Device/MAC registers */
1628 for (i = 0; i < ARRAY_SIZE(lan78xx_regs); i++)
1629 lan78xx_read_reg(dev, lan78xx_regs[i], &data[i]);
1630
1631 if (!netdev->phydev)
1632 return;
1633
1634 /* Read PHY registers */
1635 for (j = 0; j < 32; i++, j++)
1636 data[i] = phy_read(netdev->phydev, j);
1637}
1638
1639static const struct ethtool_ops lan78xx_ethtool_ops = {
1640 .get_link = lan78xx_get_link,
1641 .nway_reset = phy_ethtool_nway_reset,
1642 .get_drvinfo = lan78xx_get_drvinfo,
1643 .get_msglevel = lan78xx_get_msglevel,
1644 .set_msglevel = lan78xx_set_msglevel,
1645 .get_eeprom_len = lan78xx_ethtool_get_eeprom_len,
1646 .get_eeprom = lan78xx_ethtool_get_eeprom,
1647 .set_eeprom = lan78xx_ethtool_set_eeprom,
1648 .get_ethtool_stats = lan78xx_get_stats,
1649 .get_sset_count = lan78xx_get_sset_count,
1650 .get_strings = lan78xx_get_strings,
1651 .get_wol = lan78xx_get_wol,
1652 .set_wol = lan78xx_set_wol,
1653 .get_eee = lan78xx_get_eee,
1654 .set_eee = lan78xx_set_eee,
1655 .get_pauseparam = lan78xx_get_pause,
1656 .set_pauseparam = lan78xx_set_pause,
1657 .get_link_ksettings = lan78xx_get_link_ksettings,
1658 .set_link_ksettings = lan78xx_set_link_ksettings,
1659 .get_regs_len = lan78xx_get_regs_len,
1660 .get_regs = lan78xx_get_regs,
1661};
1662
1663static void lan78xx_init_mac_address(struct lan78xx_net *dev)
1664{
1665 u32 addr_lo, addr_hi;
1666 int ret;
1667 u8 addr[6];
1668
1669 ret = lan78xx_read_reg(dev, RX_ADDRL, &addr_lo);
1670 ret = lan78xx_read_reg(dev, RX_ADDRH, &addr_hi);
1671
1672 addr[0] = addr_lo & 0xFF;
1673 addr[1] = (addr_lo >> 8) & 0xFF;
1674 addr[2] = (addr_lo >> 16) & 0xFF;
1675 addr[3] = (addr_lo >> 24) & 0xFF;
1676 addr[4] = addr_hi & 0xFF;
1677 addr[5] = (addr_hi >> 8) & 0xFF;
1678
1679 if (!is_valid_ether_addr(addr)) {
1680 if (!eth_platform_get_mac_address(&dev->udev->dev, addr)) {
1681 /* valid address present in Device Tree */
1682 netif_dbg(dev, ifup, dev->net,
1683 "MAC address read from Device Tree");
1684 } else if (((lan78xx_read_eeprom(dev, EEPROM_MAC_OFFSET,
1685 ETH_ALEN, addr) == 0) ||
1686 (lan78xx_read_otp(dev, EEPROM_MAC_OFFSET,
1687 ETH_ALEN, addr) == 0)) &&
1688 is_valid_ether_addr(addr)) {
1689 /* eeprom values are valid so use them */
1690 netif_dbg(dev, ifup, dev->net,
1691 "MAC address read from EEPROM");
1692 } else {
1693 /* generate random MAC */
1694 eth_random_addr(addr);
1695 netif_dbg(dev, ifup, dev->net,
1696 "MAC address set to random addr");
1697 }
1698
1699 addr_lo = addr[0] | (addr[1] << 8) |
1700 (addr[2] << 16) | (addr[3] << 24);
1701 addr_hi = addr[4] | (addr[5] << 8);
1702
1703 ret = lan78xx_write_reg(dev, RX_ADDRL, addr_lo);
1704 ret = lan78xx_write_reg(dev, RX_ADDRH, addr_hi);
1705 }
1706
1707 ret = lan78xx_write_reg(dev, MAF_LO(0), addr_lo);
1708 ret = lan78xx_write_reg(dev, MAF_HI(0), addr_hi | MAF_HI_VALID_);
1709
1710 ether_addr_copy(dev->net->dev_addr, addr);
1711}
1712
1713/* MDIO read and write wrappers for phylib */
1714static int lan78xx_mdiobus_read(struct mii_bus *bus, int phy_id, int idx)
1715{
1716 struct lan78xx_net *dev = bus->priv;
1717 u32 val, addr;
1718 int ret;
1719
1720 ret = usb_autopm_get_interface(dev->intf);
1721 if (ret < 0)
1722 return ret;
1723
1724 mutex_lock(&dev->phy_mutex);
1725
1726 /* confirm MII not busy */
1727 ret = lan78xx_phy_wait_not_busy(dev);
1728 if (ret < 0)
1729 goto done;
1730
1731 /* set the address, index & direction (read from PHY) */
1732 addr = mii_access(phy_id, idx, MII_READ);
1733 ret = lan78xx_write_reg(dev, MII_ACC, addr);
1734
1735 ret = lan78xx_phy_wait_not_busy(dev);
1736 if (ret < 0)
1737 goto done;
1738
1739 ret = lan78xx_read_reg(dev, MII_DATA, &val);
1740
1741 ret = (int)(val & 0xFFFF);
1742
1743done:
1744 mutex_unlock(&dev->phy_mutex);
1745 usb_autopm_put_interface(dev->intf);
1746
1747 return ret;
1748}
1749
1750static int lan78xx_mdiobus_write(struct mii_bus *bus, int phy_id, int idx,
1751 u16 regval)
1752{
1753 struct lan78xx_net *dev = bus->priv;
1754 u32 val, addr;
1755 int ret;
1756
1757 ret = usb_autopm_get_interface(dev->intf);
1758 if (ret < 0)
1759 return ret;
1760
1761 mutex_lock(&dev->phy_mutex);
1762
1763 /* confirm MII not busy */
1764 ret = lan78xx_phy_wait_not_busy(dev);
1765 if (ret < 0)
1766 goto done;
1767
1768 val = (u32)regval;
1769 ret = lan78xx_write_reg(dev, MII_DATA, val);
1770
1771 /* set the address, index & direction (write to PHY) */
1772 addr = mii_access(phy_id, idx, MII_WRITE);
1773 ret = lan78xx_write_reg(dev, MII_ACC, addr);
1774
1775 ret = lan78xx_phy_wait_not_busy(dev);
1776 if (ret < 0)
1777 goto done;
1778
1779done:
1780 mutex_unlock(&dev->phy_mutex);
1781 usb_autopm_put_interface(dev->intf);
1782 return 0;
1783}
1784
1785static int lan78xx_mdio_init(struct lan78xx_net *dev)
1786{
1787 struct device_node *node;
1788 int ret;
1789
1790 dev->mdiobus = mdiobus_alloc();
1791 if (!dev->mdiobus) {
1792 netdev_err(dev->net, "can't allocate MDIO bus\n");
1793 return -ENOMEM;
1794 }
1795
1796 dev->mdiobus->priv = (void *)dev;
1797 dev->mdiobus->read = lan78xx_mdiobus_read;
1798 dev->mdiobus->write = lan78xx_mdiobus_write;
1799 dev->mdiobus->name = "lan78xx-mdiobus";
1800 dev->mdiobus->parent = &dev->udev->dev;
1801
1802 snprintf(dev->mdiobus->id, MII_BUS_ID_SIZE, "usb-%03d:%03d",
1803 dev->udev->bus->busnum, dev->udev->devnum);
1804
1805 switch (dev->chipid) {
1806 case ID_REV_CHIP_ID_7800_:
1807 case ID_REV_CHIP_ID_7850_:
1808 /* set to internal PHY id */
1809 dev->mdiobus->phy_mask = ~(1 << 1);
1810 break;
1811 case ID_REV_CHIP_ID_7801_:
1812 /* scan thru PHYAD[2..0] */
1813 dev->mdiobus->phy_mask = ~(0xFF);
1814 break;
1815 }
1816
1817 node = of_get_child_by_name(dev->udev->dev.of_node, "mdio");
1818 ret = of_mdiobus_register(dev->mdiobus, node);
1819 of_node_put(node);
1820 if (ret) {
1821 netdev_err(dev->net, "can't register MDIO bus\n");
1822 goto exit1;
1823 }
1824
1825 netdev_dbg(dev->net, "registered mdiobus bus %s\n", dev->mdiobus->id);
1826 return 0;
1827exit1:
1828 mdiobus_free(dev->mdiobus);
1829 return ret;
1830}
1831
1832static void lan78xx_remove_mdio(struct lan78xx_net *dev)
1833{
1834 mdiobus_unregister(dev->mdiobus);
1835 mdiobus_free(dev->mdiobus);
1836}
1837
1838static void lan78xx_link_status_change(struct net_device *net)
1839{
1840 struct phy_device *phydev = net->phydev;
1841 int ret, temp;
1842
1843 /* At forced 100 F/H mode, chip may fail to set mode correctly
1844 * when cable is switched between long(~50+m) and short one.
1845 * As workaround, set to 10 before setting to 100
1846 * at forced 100 F/H mode.
1847 */
1848 if (!phydev->autoneg && (phydev->speed == 100)) {
1849 /* disable phy interrupt */
1850 temp = phy_read(phydev, LAN88XX_INT_MASK);
1851 temp &= ~LAN88XX_INT_MASK_MDINTPIN_EN_;
1852 ret = phy_write(phydev, LAN88XX_INT_MASK, temp);
1853
1854 temp = phy_read(phydev, MII_BMCR);
1855 temp &= ~(BMCR_SPEED100 | BMCR_SPEED1000);
1856 phy_write(phydev, MII_BMCR, temp); /* set to 10 first */
1857 temp |= BMCR_SPEED100;
1858 phy_write(phydev, MII_BMCR, temp); /* set to 100 later */
1859
1860 /* clear pending interrupt generated while workaround */
1861 temp = phy_read(phydev, LAN88XX_INT_STS);
1862
1863 /* enable phy interrupt back */
1864 temp = phy_read(phydev, LAN88XX_INT_MASK);
1865 temp |= LAN88XX_INT_MASK_MDINTPIN_EN_;
1866 ret = phy_write(phydev, LAN88XX_INT_MASK, temp);
1867 }
1868}
1869
1870static int irq_map(struct irq_domain *d, unsigned int irq,
1871 irq_hw_number_t hwirq)
1872{
1873 struct irq_domain_data *data = d->host_data;
1874
1875 irq_set_chip_data(irq, data);
1876 irq_set_chip_and_handler(irq, data->irqchip, data->irq_handler);
1877 irq_set_noprobe(irq);
1878
1879 return 0;
1880}
1881
1882static void irq_unmap(struct irq_domain *d, unsigned int irq)
1883{
1884 irq_set_chip_and_handler(irq, NULL, NULL);
1885 irq_set_chip_data(irq, NULL);
1886}
1887
1888static const struct irq_domain_ops chip_domain_ops = {
1889 .map = irq_map,
1890 .unmap = irq_unmap,
1891};
1892
1893static void lan78xx_irq_mask(struct irq_data *irqd)
1894{
1895 struct irq_domain_data *data = irq_data_get_irq_chip_data(irqd);
1896
1897 data->irqenable &= ~BIT(irqd_to_hwirq(irqd));
1898}
1899
1900static void lan78xx_irq_unmask(struct irq_data *irqd)
1901{
1902 struct irq_domain_data *data = irq_data_get_irq_chip_data(irqd);
1903
1904 data->irqenable |= BIT(irqd_to_hwirq(irqd));
1905}
1906
1907static void lan78xx_irq_bus_lock(struct irq_data *irqd)
1908{
1909 struct irq_domain_data *data = irq_data_get_irq_chip_data(irqd);
1910
1911 mutex_lock(&data->irq_lock);
1912}
1913
1914static void lan78xx_irq_bus_sync_unlock(struct irq_data *irqd)
1915{
1916 struct irq_domain_data *data = irq_data_get_irq_chip_data(irqd);
1917 struct lan78xx_net *dev =
1918 container_of(data, struct lan78xx_net, domain_data);
1919 u32 buf;
1920 int ret;
1921
1922 /* call register access here because irq_bus_lock & irq_bus_sync_unlock
1923 * are only two callbacks executed in non-atomic contex.
1924 */
1925 ret = lan78xx_read_reg(dev, INT_EP_CTL, &buf);
1926 if (buf != data->irqenable)
1927 ret = lan78xx_write_reg(dev, INT_EP_CTL, data->irqenable);
1928
1929 mutex_unlock(&data->irq_lock);
1930}
1931
1932static struct irq_chip lan78xx_irqchip = {
1933 .name = "lan78xx-irqs",
1934 .irq_mask = lan78xx_irq_mask,
1935 .irq_unmask = lan78xx_irq_unmask,
1936 .irq_bus_lock = lan78xx_irq_bus_lock,
1937 .irq_bus_sync_unlock = lan78xx_irq_bus_sync_unlock,
1938};
1939
1940static int lan78xx_setup_irq_domain(struct lan78xx_net *dev)
1941{
1942 struct device_node *of_node;
1943 struct irq_domain *irqdomain;
1944 unsigned int irqmap = 0;
1945 u32 buf;
1946 int ret = 0;
1947
1948 of_node = dev->udev->dev.parent->of_node;
1949
1950 mutex_init(&dev->domain_data.irq_lock);
1951
1952 lan78xx_read_reg(dev, INT_EP_CTL, &buf);
1953 dev->domain_data.irqenable = buf;
1954
1955 dev->domain_data.irqchip = &lan78xx_irqchip;
1956 dev->domain_data.irq_handler = handle_simple_irq;
1957
1958 irqdomain = irq_domain_add_simple(of_node, MAX_INT_EP, 0,
1959 &chip_domain_ops, &dev->domain_data);
1960 if (irqdomain) {
1961 /* create mapping for PHY interrupt */
1962 irqmap = irq_create_mapping(irqdomain, INT_EP_PHY);
1963 if (!irqmap) {
1964 irq_domain_remove(irqdomain);
1965
1966 irqdomain = NULL;
1967 ret = -EINVAL;
1968 }
1969 } else {
1970 ret = -EINVAL;
1971 }
1972
1973 dev->domain_data.irqdomain = irqdomain;
1974 dev->domain_data.phyirq = irqmap;
1975
1976 return ret;
1977}
1978
1979static void lan78xx_remove_irq_domain(struct lan78xx_net *dev)
1980{
1981 if (dev->domain_data.phyirq > 0) {
1982 irq_dispose_mapping(dev->domain_data.phyirq);
1983
1984 if (dev->domain_data.irqdomain)
1985 irq_domain_remove(dev->domain_data.irqdomain);
1986 }
1987 dev->domain_data.phyirq = 0;
1988 dev->domain_data.irqdomain = NULL;
1989}
1990
1991static int lan8835_fixup(struct phy_device *phydev)
1992{
1993 int buf;
1994 int ret;
1995 struct lan78xx_net *dev = netdev_priv(phydev->attached_dev);
1996
1997 /* LED2/PME_N/IRQ_N/RGMII_ID pin to IRQ_N mode */
1998 buf = phy_read_mmd(phydev, MDIO_MMD_PCS, 0x8010);
1999 buf &= ~0x1800;
2000 buf |= 0x0800;
2001 phy_write_mmd(phydev, MDIO_MMD_PCS, 0x8010, buf);
2002
2003 /* RGMII MAC TXC Delay Enable */
2004 ret = lan78xx_write_reg(dev, MAC_RGMII_ID,
2005 MAC_RGMII_ID_TXC_DELAY_EN_);
2006
2007 /* RGMII TX DLL Tune Adjust */
2008 ret = lan78xx_write_reg(dev, RGMII_TX_BYP_DLL, 0x3D00);
2009
2010 dev->interface = PHY_INTERFACE_MODE_RGMII_TXID;
2011
2012 return 1;
2013}
2014
2015static int ksz9031rnx_fixup(struct phy_device *phydev)
2016{
2017 struct lan78xx_net *dev = netdev_priv(phydev->attached_dev);
2018
2019 /* Micrel9301RNX PHY configuration */
2020 /* RGMII Control Signal Pad Skew */
2021 phy_write_mmd(phydev, MDIO_MMD_WIS, 4, 0x0077);
2022 /* RGMII RX Data Pad Skew */
2023 phy_write_mmd(phydev, MDIO_MMD_WIS, 5, 0x7777);
2024 /* RGMII RX Clock Pad Skew */
2025 phy_write_mmd(phydev, MDIO_MMD_WIS, 8, 0x1FF);
2026
2027 dev->interface = PHY_INTERFACE_MODE_RGMII_RXID;
2028
2029 return 1;
2030}
2031
2032static struct phy_device *lan7801_phy_init(struct lan78xx_net *dev)
2033{
2034 u32 buf;
2035 int ret;
2036 struct fixed_phy_status fphy_status = {
2037 .link = 1,
2038 .speed = SPEED_1000,
2039 .duplex = DUPLEX_FULL,
2040 };
2041 struct phy_device *phydev;
2042
2043 phydev = phy_find_first(dev->mdiobus);
2044 if (!phydev) {
2045 netdev_dbg(dev->net, "PHY Not Found!! Registering Fixed PHY\n");
2046 phydev = fixed_phy_register(PHY_POLL, &fphy_status, NULL);
2047 if (IS_ERR(phydev)) {
2048 netdev_err(dev->net, "No PHY/fixed_PHY found\n");
2049 return NULL;
2050 }
2051 netdev_dbg(dev->net, "Registered FIXED PHY\n");
2052 dev->interface = PHY_INTERFACE_MODE_RGMII;
2053 ret = lan78xx_write_reg(dev, MAC_RGMII_ID,
2054 MAC_RGMII_ID_TXC_DELAY_EN_);
2055 ret = lan78xx_write_reg(dev, RGMII_TX_BYP_DLL, 0x3D00);
2056 ret = lan78xx_read_reg(dev, HW_CFG, &buf);
2057 buf |= HW_CFG_CLK125_EN_;
2058 buf |= HW_CFG_REFCLK25_EN_;
2059 ret = lan78xx_write_reg(dev, HW_CFG, buf);
2060 } else {
2061 if (!phydev->drv) {
2062 netdev_err(dev->net, "no PHY driver found\n");
2063 return NULL;
2064 }
2065 dev->interface = PHY_INTERFACE_MODE_RGMII;
2066 /* external PHY fixup for KSZ9031RNX */
2067 ret = phy_register_fixup_for_uid(PHY_KSZ9031RNX, 0xfffffff0,
2068 ksz9031rnx_fixup);
2069 if (ret < 0) {
2070 netdev_err(dev->net, "Failed to register fixup for PHY_KSZ9031RNX\n");
2071 return NULL;
2072 }
2073 /* external PHY fixup for LAN8835 */
2074 ret = phy_register_fixup_for_uid(PHY_LAN8835, 0xfffffff0,
2075 lan8835_fixup);
2076 if (ret < 0) {
2077 netdev_err(dev->net, "Failed to register fixup for PHY_LAN8835\n");
2078 return NULL;
2079 }
2080 /* add more external PHY fixup here if needed */
2081
2082 phydev->is_internal = false;
2083 }
2084 return phydev;
2085}
2086
2087static int lan78xx_phy_init(struct lan78xx_net *dev)
2088{
2089 __ETHTOOL_DECLARE_LINK_MODE_MASK(fc) = { 0, };
2090 int ret;
2091 u32 mii_adv;
2092 struct phy_device *phydev;
2093
2094 switch (dev->chipid) {
2095 case ID_REV_CHIP_ID_7801_:
2096 phydev = lan7801_phy_init(dev);
2097 if (!phydev) {
2098 netdev_err(dev->net, "lan7801: PHY Init Failed");
2099 return -EIO;
2100 }
2101 break;
2102
2103 case ID_REV_CHIP_ID_7800_:
2104 case ID_REV_CHIP_ID_7850_:
2105 phydev = phy_find_first(dev->mdiobus);
2106 if (!phydev) {
2107 netdev_err(dev->net, "no PHY found\n");
2108 return -EIO;
2109 }
2110 phydev->is_internal = true;
2111 dev->interface = PHY_INTERFACE_MODE_GMII;
2112 break;
2113
2114 default:
2115 netdev_err(dev->net, "Unknown CHIP ID found\n");
2116 return -EIO;
2117 }
2118
2119 /* if phyirq is not set, use polling mode in phylib */
2120 if (dev->domain_data.phyirq > 0)
2121 phydev->irq = dev->domain_data.phyirq;
2122 else
2123 phydev->irq = 0;
2124 netdev_dbg(dev->net, "phydev->irq = %d\n", phydev->irq);
2125
2126 /* set to AUTOMDIX */
2127 phydev->mdix = ETH_TP_MDI_AUTO;
2128
2129 ret = phy_connect_direct(dev->net, phydev,
2130 lan78xx_link_status_change,
2131 dev->interface);
2132 if (ret) {
2133 netdev_err(dev->net, "can't attach PHY to %s\n",
2134 dev->mdiobus->id);
2135 if (dev->chipid == ID_REV_CHIP_ID_7801_) {
2136 if (phy_is_pseudo_fixed_link(phydev)) {
2137 fixed_phy_unregister(phydev);
2138 } else {
2139 phy_unregister_fixup_for_uid(PHY_KSZ9031RNX,
2140 0xfffffff0);
2141 phy_unregister_fixup_for_uid(PHY_LAN8835,
2142 0xfffffff0);
2143 }
2144 }
2145 return -EIO;
2146 }
2147
2148 /* MAC doesn't support 1000T Half */
2149 phy_remove_link_mode(phydev, ETHTOOL_LINK_MODE_1000baseT_Half_BIT);
2150
2151 /* support both flow controls */
2152 dev->fc_request_control = (FLOW_CTRL_RX | FLOW_CTRL_TX);
2153 linkmode_clear_bit(ETHTOOL_LINK_MODE_Pause_BIT,
2154 phydev->advertising);
2155 linkmode_clear_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT,
2156 phydev->advertising);
2157 mii_adv = (u32)mii_advertise_flowctrl(dev->fc_request_control);
2158 mii_adv_to_linkmode_adv_t(fc, mii_adv);
2159 linkmode_or(phydev->advertising, fc, phydev->advertising);
2160
2161 if (phydev->mdio.dev.of_node) {
2162 u32 reg;
2163 int len;
2164
2165 len = of_property_count_elems_of_size(phydev->mdio.dev.of_node,
2166 "microchip,led-modes",
2167 sizeof(u32));
2168 if (len >= 0) {
2169 /* Ensure the appropriate LEDs are enabled */
2170 lan78xx_read_reg(dev, HW_CFG, ®);
2171 reg &= ~(HW_CFG_LED0_EN_ |
2172 HW_CFG_LED1_EN_ |
2173 HW_CFG_LED2_EN_ |
2174 HW_CFG_LED3_EN_);
2175 reg |= (len > 0) * HW_CFG_LED0_EN_ |
2176 (len > 1) * HW_CFG_LED1_EN_ |
2177 (len > 2) * HW_CFG_LED2_EN_ |
2178 (len > 3) * HW_CFG_LED3_EN_;
2179 lan78xx_write_reg(dev, HW_CFG, reg);
2180 }
2181 }
2182
2183 genphy_config_aneg(phydev);
2184
2185 dev->fc_autoneg = phydev->autoneg;
2186
2187 return 0;
2188}
2189
2190static int lan78xx_set_rx_max_frame_length(struct lan78xx_net *dev, int size)
2191{
2192 int ret = 0;
2193 u32 buf;
2194 bool rxenabled;
2195
2196 ret = lan78xx_read_reg(dev, MAC_RX, &buf);
2197
2198 rxenabled = ((buf & MAC_RX_RXEN_) != 0);
2199
2200 if (rxenabled) {
2201 buf &= ~MAC_RX_RXEN_;
2202 ret = lan78xx_write_reg(dev, MAC_RX, buf);
2203 }
2204
2205 /* add 4 to size for FCS */
2206 buf &= ~MAC_RX_MAX_SIZE_MASK_;
2207 buf |= (((size + 4) << MAC_RX_MAX_SIZE_SHIFT_) & MAC_RX_MAX_SIZE_MASK_);
2208
2209 ret = lan78xx_write_reg(dev, MAC_RX, buf);
2210
2211 if (rxenabled) {
2212 buf |= MAC_RX_RXEN_;
2213 ret = lan78xx_write_reg(dev, MAC_RX, buf);
2214 }
2215
2216 return 0;
2217}
2218
2219static int unlink_urbs(struct lan78xx_net *dev, struct sk_buff_head *q)
2220{
2221 struct sk_buff *skb;
2222 unsigned long flags;
2223 int count = 0;
2224
2225 spin_lock_irqsave(&q->lock, flags);
2226 while (!skb_queue_empty(q)) {
2227 struct skb_data *entry;
2228 struct urb *urb;
2229 int ret;
2230
2231 skb_queue_walk(q, skb) {
2232 entry = (struct skb_data *)skb->cb;
2233 if (entry->state != unlink_start)
2234 goto found;
2235 }
2236 break;
2237found:
2238 entry->state = unlink_start;
2239 urb = entry->urb;
2240
2241 /* Get reference count of the URB to avoid it to be
2242 * freed during usb_unlink_urb, which may trigger
2243 * use-after-free problem inside usb_unlink_urb since
2244 * usb_unlink_urb is always racing with .complete
2245 * handler(include defer_bh).
2246 */
2247 usb_get_urb(urb);
2248 spin_unlock_irqrestore(&q->lock, flags);
2249 /* during some PM-driven resume scenarios,
2250 * these (async) unlinks complete immediately
2251 */
2252 ret = usb_unlink_urb(urb);
2253 if (ret != -EINPROGRESS && ret != 0)
2254 netdev_dbg(dev->net, "unlink urb err, %d\n", ret);
2255 else
2256 count++;
2257 usb_put_urb(urb);
2258 spin_lock_irqsave(&q->lock, flags);
2259 }
2260 spin_unlock_irqrestore(&q->lock, flags);
2261 return count;
2262}
2263
2264static int lan78xx_change_mtu(struct net_device *netdev, int new_mtu)
2265{
2266 struct lan78xx_net *dev = netdev_priv(netdev);
2267 int ll_mtu = new_mtu + netdev->hard_header_len;
2268 int old_hard_mtu = dev->hard_mtu;
2269 int old_rx_urb_size = dev->rx_urb_size;
2270 int ret;
2271
2272 /* no second zero-length packet read wanted after mtu-sized packets */
2273 if ((ll_mtu % dev->maxpacket) == 0)
2274 return -EDOM;
2275
2276 ret = lan78xx_set_rx_max_frame_length(dev, new_mtu + VLAN_ETH_HLEN);
2277
2278 netdev->mtu = new_mtu;
2279
2280 dev->hard_mtu = netdev->mtu + netdev->hard_header_len;
2281 if (dev->rx_urb_size == old_hard_mtu) {
2282 dev->rx_urb_size = dev->hard_mtu;
2283 if (dev->rx_urb_size > old_rx_urb_size) {
2284 if (netif_running(dev->net)) {
2285 unlink_urbs(dev, &dev->rxq);
2286 tasklet_schedule(&dev->bh);
2287 }
2288 }
2289 }
2290
2291 return 0;
2292}
2293
2294static int lan78xx_set_mac_addr(struct net_device *netdev, void *p)
2295{
2296 struct lan78xx_net *dev = netdev_priv(netdev);
2297 struct sockaddr *addr = p;
2298 u32 addr_lo, addr_hi;
2299 int ret;
2300
2301 if (netif_running(netdev))
2302 return -EBUSY;
2303
2304 if (!is_valid_ether_addr(addr->sa_data))
2305 return -EADDRNOTAVAIL;
2306
2307 ether_addr_copy(netdev->dev_addr, addr->sa_data);
2308
2309 addr_lo = netdev->dev_addr[0] |
2310 netdev->dev_addr[1] << 8 |
2311 netdev->dev_addr[2] << 16 |
2312 netdev->dev_addr[3] << 24;
2313 addr_hi = netdev->dev_addr[4] |
2314 netdev->dev_addr[5] << 8;
2315
2316 ret = lan78xx_write_reg(dev, RX_ADDRL, addr_lo);
2317 ret = lan78xx_write_reg(dev, RX_ADDRH, addr_hi);
2318
2319 /* Added to support MAC address changes */
2320 ret = lan78xx_write_reg(dev, MAF_LO(0), addr_lo);
2321 ret = lan78xx_write_reg(dev, MAF_HI(0), addr_hi | MAF_HI_VALID_);
2322
2323 return 0;
2324}
2325
2326/* Enable or disable Rx checksum offload engine */
2327static int lan78xx_set_features(struct net_device *netdev,
2328 netdev_features_t features)
2329{
2330 struct lan78xx_net *dev = netdev_priv(netdev);
2331 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]);
2332 unsigned long flags;
2333 int ret;
2334
2335 spin_lock_irqsave(&pdata->rfe_ctl_lock, flags);
2336
2337 if (features & NETIF_F_RXCSUM) {
2338 pdata->rfe_ctl |= RFE_CTL_TCPUDP_COE_ | RFE_CTL_IP_COE_;
2339 pdata->rfe_ctl |= RFE_CTL_ICMP_COE_ | RFE_CTL_IGMP_COE_;
2340 } else {
2341 pdata->rfe_ctl &= ~(RFE_CTL_TCPUDP_COE_ | RFE_CTL_IP_COE_);
2342 pdata->rfe_ctl &= ~(RFE_CTL_ICMP_COE_ | RFE_CTL_IGMP_COE_);
2343 }
2344
2345 if (features & NETIF_F_HW_VLAN_CTAG_RX)
2346 pdata->rfe_ctl |= RFE_CTL_VLAN_STRIP_;
2347 else
2348 pdata->rfe_ctl &= ~RFE_CTL_VLAN_STRIP_;
2349
2350 if (features & NETIF_F_HW_VLAN_CTAG_FILTER)
2351 pdata->rfe_ctl |= RFE_CTL_VLAN_FILTER_;
2352 else
2353 pdata->rfe_ctl &= ~RFE_CTL_VLAN_FILTER_;
2354
2355 spin_unlock_irqrestore(&pdata->rfe_ctl_lock, flags);
2356
2357 ret = lan78xx_write_reg(dev, RFE_CTL, pdata->rfe_ctl);
2358
2359 return 0;
2360}
2361
2362static void lan78xx_deferred_vlan_write(struct work_struct *param)
2363{
2364 struct lan78xx_priv *pdata =
2365 container_of(param, struct lan78xx_priv, set_vlan);
2366 struct lan78xx_net *dev = pdata->dev;
2367
2368 lan78xx_dataport_write(dev, DP_SEL_RSEL_VLAN_DA_, 0,
2369 DP_SEL_VHF_VLAN_LEN, pdata->vlan_table);
2370}
2371
2372static int lan78xx_vlan_rx_add_vid(struct net_device *netdev,
2373 __be16 proto, u16 vid)
2374{
2375 struct lan78xx_net *dev = netdev_priv(netdev);
2376 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]);
2377 u16 vid_bit_index;
2378 u16 vid_dword_index;
2379
2380 vid_dword_index = (vid >> 5) & 0x7F;
2381 vid_bit_index = vid & 0x1F;
2382
2383 pdata->vlan_table[vid_dword_index] |= (1 << vid_bit_index);
2384
2385 /* defer register writes to a sleepable context */
2386 schedule_work(&pdata->set_vlan);
2387
2388 return 0;
2389}
2390
2391static int lan78xx_vlan_rx_kill_vid(struct net_device *netdev,
2392 __be16 proto, u16 vid)
2393{
2394 struct lan78xx_net *dev = netdev_priv(netdev);
2395 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]);
2396 u16 vid_bit_index;
2397 u16 vid_dword_index;
2398
2399 vid_dword_index = (vid >> 5) & 0x7F;
2400 vid_bit_index = vid & 0x1F;
2401
2402 pdata->vlan_table[vid_dword_index] &= ~(1 << vid_bit_index);
2403
2404 /* defer register writes to a sleepable context */
2405 schedule_work(&pdata->set_vlan);
2406
2407 return 0;
2408}
2409
2410static void lan78xx_init_ltm(struct lan78xx_net *dev)
2411{
2412 int ret;
2413 u32 buf;
2414 u32 regs[6] = { 0 };
2415
2416 ret = lan78xx_read_reg(dev, USB_CFG1, &buf);
2417 if (buf & USB_CFG1_LTM_ENABLE_) {
2418 u8 temp[2];
2419 /* Get values from EEPROM first */
2420 if (lan78xx_read_eeprom(dev, 0x3F, 2, temp) == 0) {
2421 if (temp[0] == 24) {
2422 ret = lan78xx_read_raw_eeprom(dev,
2423 temp[1] * 2,
2424 24,
2425 (u8 *)regs);
2426 if (ret < 0)
2427 return;
2428 }
2429 } else if (lan78xx_read_otp(dev, 0x3F, 2, temp) == 0) {
2430 if (temp[0] == 24) {
2431 ret = lan78xx_read_raw_otp(dev,
2432 temp[1] * 2,
2433 24,
2434 (u8 *)regs);
2435 if (ret < 0)
2436 return;
2437 }
2438 }
2439 }
2440
2441 lan78xx_write_reg(dev, LTM_BELT_IDLE0, regs[0]);
2442 lan78xx_write_reg(dev, LTM_BELT_IDLE1, regs[1]);
2443 lan78xx_write_reg(dev, LTM_BELT_ACT0, regs[2]);
2444 lan78xx_write_reg(dev, LTM_BELT_ACT1, regs[3]);
2445 lan78xx_write_reg(dev, LTM_INACTIVE0, regs[4]);
2446 lan78xx_write_reg(dev, LTM_INACTIVE1, regs[5]);
2447}
2448
2449static int lan78xx_reset(struct lan78xx_net *dev)
2450{
2451 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]);
2452 u32 buf;
2453 int ret = 0;
2454 unsigned long timeout;
2455 u8 sig;
2456
2457 ret = lan78xx_read_reg(dev, HW_CFG, &buf);
2458 buf |= HW_CFG_LRST_;
2459 ret = lan78xx_write_reg(dev, HW_CFG, buf);
2460
2461 timeout = jiffies + HZ;
2462 do {
2463 mdelay(1);
2464 ret = lan78xx_read_reg(dev, HW_CFG, &buf);
2465 if (time_after(jiffies, timeout)) {
2466 netdev_warn(dev->net,
2467 "timeout on completion of LiteReset");
2468 return -EIO;
2469 }
2470 } while (buf & HW_CFG_LRST_);
2471
2472 lan78xx_init_mac_address(dev);
2473
2474 /* save DEVID for later usage */
2475 ret = lan78xx_read_reg(dev, ID_REV, &buf);
2476 dev->chipid = (buf & ID_REV_CHIP_ID_MASK_) >> 16;
2477 dev->chiprev = buf & ID_REV_CHIP_REV_MASK_;
2478
2479 /* Respond to the IN token with a NAK */
2480 ret = lan78xx_read_reg(dev, USB_CFG0, &buf);
2481 buf |= USB_CFG_BIR_;
2482 ret = lan78xx_write_reg(dev, USB_CFG0, buf);
2483
2484 /* Init LTM */
2485 lan78xx_init_ltm(dev);
2486
2487 if (dev->udev->speed == USB_SPEED_SUPER) {
2488 buf = DEFAULT_BURST_CAP_SIZE / SS_USB_PKT_SIZE;
2489 dev->rx_urb_size = DEFAULT_BURST_CAP_SIZE;
2490 dev->rx_qlen = 4;
2491 dev->tx_qlen = 4;
2492 } else if (dev->udev->speed == USB_SPEED_HIGH) {
2493 buf = DEFAULT_BURST_CAP_SIZE / HS_USB_PKT_SIZE;
2494 dev->rx_urb_size = DEFAULT_BURST_CAP_SIZE;
2495 dev->rx_qlen = RX_MAX_QUEUE_MEMORY / dev->rx_urb_size;
2496 dev->tx_qlen = RX_MAX_QUEUE_MEMORY / dev->hard_mtu;
2497 } else {
2498 buf = DEFAULT_BURST_CAP_SIZE / FS_USB_PKT_SIZE;
2499 dev->rx_urb_size = DEFAULT_BURST_CAP_SIZE;
2500 dev->rx_qlen = 4;
2501 dev->tx_qlen = 4;
2502 }
2503
2504 ret = lan78xx_write_reg(dev, BURST_CAP, buf);
2505 ret = lan78xx_write_reg(dev, BULK_IN_DLY, DEFAULT_BULK_IN_DELAY);
2506
2507 ret = lan78xx_read_reg(dev, HW_CFG, &buf);
2508 buf |= HW_CFG_MEF_;
2509 ret = lan78xx_write_reg(dev, HW_CFG, buf);
2510
2511 ret = lan78xx_read_reg(dev, USB_CFG0, &buf);
2512 buf |= USB_CFG_BCE_;
2513 ret = lan78xx_write_reg(dev, USB_CFG0, buf);
2514
2515 /* set FIFO sizes */
2516 buf = (MAX_RX_FIFO_SIZE - 512) / 512;
2517 ret = lan78xx_write_reg(dev, FCT_RX_FIFO_END, buf);
2518
2519 buf = (MAX_TX_FIFO_SIZE - 512) / 512;
2520 ret = lan78xx_write_reg(dev, FCT_TX_FIFO_END, buf);
2521
2522 ret = lan78xx_write_reg(dev, INT_STS, INT_STS_CLEAR_ALL_);
2523 ret = lan78xx_write_reg(dev, FLOW, 0);
2524 ret = lan78xx_write_reg(dev, FCT_FLOW, 0);
2525
2526 /* Don't need rfe_ctl_lock during initialisation */
2527 ret = lan78xx_read_reg(dev, RFE_CTL, &pdata->rfe_ctl);
2528 pdata->rfe_ctl |= RFE_CTL_BCAST_EN_ | RFE_CTL_DA_PERFECT_;
2529 ret = lan78xx_write_reg(dev, RFE_CTL, pdata->rfe_ctl);
2530
2531 /* Enable or disable checksum offload engines */
2532 lan78xx_set_features(dev->net, dev->net->features);
2533
2534 lan78xx_set_multicast(dev->net);
2535
2536 /* reset PHY */
2537 ret = lan78xx_read_reg(dev, PMT_CTL, &buf);
2538 buf |= PMT_CTL_PHY_RST_;
2539 ret = lan78xx_write_reg(dev, PMT_CTL, buf);
2540
2541 timeout = jiffies + HZ;
2542 do {
2543 mdelay(1);
2544 ret = lan78xx_read_reg(dev, PMT_CTL, &buf);
2545 if (time_after(jiffies, timeout)) {
2546 netdev_warn(dev->net, "timeout waiting for PHY Reset");
2547 return -EIO;
2548 }
2549 } while ((buf & PMT_CTL_PHY_RST_) || !(buf & PMT_CTL_READY_));
2550
2551 ret = lan78xx_read_reg(dev, MAC_CR, &buf);
2552 /* LAN7801 only has RGMII mode */
2553 if (dev->chipid == ID_REV_CHIP_ID_7801_)
2554 buf &= ~MAC_CR_GMII_EN_;
2555
2556 if (dev->chipid == ID_REV_CHIP_ID_7800_) {
2557 ret = lan78xx_read_raw_eeprom(dev, 0, 1, &sig);
2558 if (!ret && sig != EEPROM_INDICATOR) {
2559 /* Implies there is no external eeprom. Set mac speed */
2560 netdev_info(dev->net, "No External EEPROM. Setting MAC Speed\n");
2561 buf |= MAC_CR_AUTO_DUPLEX_ | MAC_CR_AUTO_SPEED_;
2562 }
2563 }
2564 ret = lan78xx_write_reg(dev, MAC_CR, buf);
2565
2566 ret = lan78xx_read_reg(dev, MAC_TX, &buf);
2567 buf |= MAC_TX_TXEN_;
2568 ret = lan78xx_write_reg(dev, MAC_TX, buf);
2569
2570 ret = lan78xx_read_reg(dev, FCT_TX_CTL, &buf);
2571 buf |= FCT_TX_CTL_EN_;
2572 ret = lan78xx_write_reg(dev, FCT_TX_CTL, buf);
2573
2574 ret = lan78xx_set_rx_max_frame_length(dev,
2575 dev->net->mtu + VLAN_ETH_HLEN);
2576
2577 ret = lan78xx_read_reg(dev, MAC_RX, &buf);
2578 buf |= MAC_RX_RXEN_;
2579 ret = lan78xx_write_reg(dev, MAC_RX, buf);
2580
2581 ret = lan78xx_read_reg(dev, FCT_RX_CTL, &buf);
2582 buf |= FCT_RX_CTL_EN_;
2583 ret = lan78xx_write_reg(dev, FCT_RX_CTL, buf);
2584
2585 return 0;
2586}
2587
2588static void lan78xx_init_stats(struct lan78xx_net *dev)
2589{
2590 u32 *p;
2591 int i;
2592
2593 /* initialize for stats update
2594 * some counters are 20bits and some are 32bits
2595 */
2596 p = (u32 *)&dev->stats.rollover_max;
2597 for (i = 0; i < (sizeof(dev->stats.rollover_max) / (sizeof(u32))); i++)
2598 p[i] = 0xFFFFF;
2599
2600 dev->stats.rollover_max.rx_unicast_byte_count = 0xFFFFFFFF;
2601 dev->stats.rollover_max.rx_broadcast_byte_count = 0xFFFFFFFF;
2602 dev->stats.rollover_max.rx_multicast_byte_count = 0xFFFFFFFF;
2603 dev->stats.rollover_max.eee_rx_lpi_transitions = 0xFFFFFFFF;
2604 dev->stats.rollover_max.eee_rx_lpi_time = 0xFFFFFFFF;
2605 dev->stats.rollover_max.tx_unicast_byte_count = 0xFFFFFFFF;
2606 dev->stats.rollover_max.tx_broadcast_byte_count = 0xFFFFFFFF;
2607 dev->stats.rollover_max.tx_multicast_byte_count = 0xFFFFFFFF;
2608 dev->stats.rollover_max.eee_tx_lpi_transitions = 0xFFFFFFFF;
2609 dev->stats.rollover_max.eee_tx_lpi_time = 0xFFFFFFFF;
2610
2611 set_bit(EVENT_STAT_UPDATE, &dev->flags);
2612}
2613
2614static int lan78xx_open(struct net_device *net)
2615{
2616 struct lan78xx_net *dev = netdev_priv(net);
2617 int ret;
2618
2619 ret = usb_autopm_get_interface(dev->intf);
2620 if (ret < 0)
2621 goto out;
2622
2623 phy_start(net->phydev);
2624
2625 netif_dbg(dev, ifup, dev->net, "phy initialised successfully");
2626
2627 /* for Link Check */
2628 if (dev->urb_intr) {
2629 ret = usb_submit_urb(dev->urb_intr, GFP_KERNEL);
2630 if (ret < 0) {
2631 netif_err(dev, ifup, dev->net,
2632 "intr submit %d\n", ret);
2633 goto done;
2634 }
2635 }
2636
2637 lan78xx_init_stats(dev);
2638
2639 set_bit(EVENT_DEV_OPEN, &dev->flags);
2640
2641 netif_start_queue(net);
2642
2643 dev->link_on = false;
2644
2645 lan78xx_defer_kevent(dev, EVENT_LINK_RESET);
2646done:
2647 usb_autopm_put_interface(dev->intf);
2648
2649out:
2650 return ret;
2651}
2652
2653static void lan78xx_terminate_urbs(struct lan78xx_net *dev)
2654{
2655 DECLARE_WAIT_QUEUE_HEAD_ONSTACK(unlink_wakeup);
2656 DECLARE_WAITQUEUE(wait, current);
2657 int temp;
2658
2659 /* ensure there are no more active urbs */
2660 add_wait_queue(&unlink_wakeup, &wait);
2661 set_current_state(TASK_UNINTERRUPTIBLE);
2662 dev->wait = &unlink_wakeup;
2663 temp = unlink_urbs(dev, &dev->txq) + unlink_urbs(dev, &dev->rxq);
2664
2665 /* maybe wait for deletions to finish. */
2666 while (!skb_queue_empty(&dev->rxq) &&
2667 !skb_queue_empty(&dev->txq) &&
2668 !skb_queue_empty(&dev->done)) {
2669 schedule_timeout(msecs_to_jiffies(UNLINK_TIMEOUT_MS));
2670 set_current_state(TASK_UNINTERRUPTIBLE);
2671 netif_dbg(dev, ifdown, dev->net,
2672 "waited for %d urb completions\n", temp);
2673 }
2674 set_current_state(TASK_RUNNING);
2675 dev->wait = NULL;
2676 remove_wait_queue(&unlink_wakeup, &wait);
2677}
2678
2679static int lan78xx_stop(struct net_device *net)
2680{
2681 struct lan78xx_net *dev = netdev_priv(net);
2682
2683 if (timer_pending(&dev->stat_monitor))
2684 del_timer_sync(&dev->stat_monitor);
2685
2686 if (net->phydev)
2687 phy_stop(net->phydev);
2688
2689 clear_bit(EVENT_DEV_OPEN, &dev->flags);
2690 netif_stop_queue(net);
2691
2692 netif_info(dev, ifdown, dev->net,
2693 "stop stats: rx/tx %lu/%lu, errs %lu/%lu\n",
2694 net->stats.rx_packets, net->stats.tx_packets,
2695 net->stats.rx_errors, net->stats.tx_errors);
2696
2697 lan78xx_terminate_urbs(dev);
2698
2699 usb_kill_urb(dev->urb_intr);
2700
2701 skb_queue_purge(&dev->rxq_pause);
2702
2703 /* deferred work (task, timer, softirq) must also stop.
2704 * can't flush_scheduled_work() until we drop rtnl (later),
2705 * else workers could deadlock; so make workers a NOP.
2706 */
2707 dev->flags = 0;
2708 cancel_delayed_work_sync(&dev->wq);
2709 tasklet_kill(&dev->bh);
2710
2711 usb_autopm_put_interface(dev->intf);
2712
2713 return 0;
2714}
2715
2716static struct sk_buff *lan78xx_tx_prep(struct lan78xx_net *dev,
2717 struct sk_buff *skb, gfp_t flags)
2718{
2719 u32 tx_cmd_a, tx_cmd_b;
2720 void *ptr;
2721
2722 if (skb_cow_head(skb, TX_OVERHEAD)) {
2723 dev_kfree_skb_any(skb);
2724 return NULL;
2725 }
2726
2727 if (skb_linearize(skb)) {
2728 dev_kfree_skb_any(skb);
2729 return NULL;
2730 }
2731
2732 tx_cmd_a = (u32)(skb->len & TX_CMD_A_LEN_MASK_) | TX_CMD_A_FCS_;
2733
2734 if (skb->ip_summed == CHECKSUM_PARTIAL)
2735 tx_cmd_a |= TX_CMD_A_IPE_ | TX_CMD_A_TPE_;
2736
2737 tx_cmd_b = 0;
2738 if (skb_is_gso(skb)) {
2739 u16 mss = max(skb_shinfo(skb)->gso_size, TX_CMD_B_MSS_MIN_);
2740
2741 tx_cmd_b = (mss << TX_CMD_B_MSS_SHIFT_) & TX_CMD_B_MSS_MASK_;
2742
2743 tx_cmd_a |= TX_CMD_A_LSO_;
2744 }
2745
2746 if (skb_vlan_tag_present(skb)) {
2747 tx_cmd_a |= TX_CMD_A_IVTG_;
2748 tx_cmd_b |= skb_vlan_tag_get(skb) & TX_CMD_B_VTAG_MASK_;
2749 }
2750
2751 ptr = skb_push(skb, 8);
2752 put_unaligned_le32(tx_cmd_a, ptr);
2753 put_unaligned_le32(tx_cmd_b, ptr + 4);
2754
2755 return skb;
2756}
2757
2758static enum skb_state defer_bh(struct lan78xx_net *dev, struct sk_buff *skb,
2759 struct sk_buff_head *list, enum skb_state state)
2760{
2761 unsigned long flags;
2762 enum skb_state old_state;
2763 struct skb_data *entry = (struct skb_data *)skb->cb;
2764
2765 spin_lock_irqsave(&list->lock, flags);
2766 old_state = entry->state;
2767 entry->state = state;
2768
2769 __skb_unlink(skb, list);
2770 spin_unlock(&list->lock);
2771 spin_lock(&dev->done.lock);
2772
2773 __skb_queue_tail(&dev->done, skb);
2774 if (skb_queue_len(&dev->done) == 1)
2775 tasklet_schedule(&dev->bh);
2776 spin_unlock_irqrestore(&dev->done.lock, flags);
2777
2778 return old_state;
2779}
2780
2781static void tx_complete(struct urb *urb)
2782{
2783 struct sk_buff *skb = (struct sk_buff *)urb->context;
2784 struct skb_data *entry = (struct skb_data *)skb->cb;
2785 struct lan78xx_net *dev = entry->dev;
2786
2787 if (urb->status == 0) {
2788 dev->net->stats.tx_packets += entry->num_of_packet;
2789 dev->net->stats.tx_bytes += entry->length;
2790 } else {
2791 dev->net->stats.tx_errors++;
2792
2793 switch (urb->status) {
2794 case -EPIPE:
2795 lan78xx_defer_kevent(dev, EVENT_TX_HALT);
2796 break;
2797
2798 /* software-driven interface shutdown */
2799 case -ECONNRESET:
2800 case -ESHUTDOWN:
2801 break;
2802
2803 case -EPROTO:
2804 case -ETIME:
2805 case -EILSEQ:
2806 netif_stop_queue(dev->net);
2807 break;
2808 default:
2809 netif_dbg(dev, tx_err, dev->net,
2810 "tx err %d\n", entry->urb->status);
2811 break;
2812 }
2813 }
2814
2815 usb_autopm_put_interface_async(dev->intf);
2816
2817 defer_bh(dev, skb, &dev->txq, tx_done);
2818}
2819
2820static void lan78xx_queue_skb(struct sk_buff_head *list,
2821 struct sk_buff *newsk, enum skb_state state)
2822{
2823 struct skb_data *entry = (struct skb_data *)newsk->cb;
2824
2825 __skb_queue_tail(list, newsk);
2826 entry->state = state;
2827}
2828
2829static netdev_tx_t
2830lan78xx_start_xmit(struct sk_buff *skb, struct net_device *net)
2831{
2832 struct lan78xx_net *dev = netdev_priv(net);
2833 struct sk_buff *skb2 = NULL;
2834
2835 if (skb) {
2836 skb_tx_timestamp(skb);
2837 skb2 = lan78xx_tx_prep(dev, skb, GFP_ATOMIC);
2838 }
2839
2840 if (skb2) {
2841 skb_queue_tail(&dev->txq_pend, skb2);
2842
2843 /* throttle TX patch at slower than SUPER SPEED USB */
2844 if ((dev->udev->speed < USB_SPEED_SUPER) &&
2845 (skb_queue_len(&dev->txq_pend) > 10))
2846 netif_stop_queue(net);
2847 } else {
2848 netif_dbg(dev, tx_err, dev->net,
2849 "lan78xx_tx_prep return NULL\n");
2850 dev->net->stats.tx_errors++;
2851 dev->net->stats.tx_dropped++;
2852 }
2853
2854 tasklet_schedule(&dev->bh);
2855
2856 return NETDEV_TX_OK;
2857}
2858
2859static int lan78xx_bind(struct lan78xx_net *dev, struct usb_interface *intf)
2860{
2861 struct lan78xx_priv *pdata = NULL;
2862 int ret;
2863 int i;
2864
2865 dev->data[0] = (unsigned long)kzalloc(sizeof(*pdata), GFP_KERNEL);
2866
2867 pdata = (struct lan78xx_priv *)(dev->data[0]);
2868 if (!pdata) {
2869 netdev_warn(dev->net, "Unable to allocate lan78xx_priv");
2870 return -ENOMEM;
2871 }
2872
2873 pdata->dev = dev;
2874
2875 spin_lock_init(&pdata->rfe_ctl_lock);
2876 mutex_init(&pdata->dataport_mutex);
2877
2878 INIT_WORK(&pdata->set_multicast, lan78xx_deferred_multicast_write);
2879
2880 for (i = 0; i < DP_SEL_VHF_VLAN_LEN; i++)
2881 pdata->vlan_table[i] = 0;
2882
2883 INIT_WORK(&pdata->set_vlan, lan78xx_deferred_vlan_write);
2884
2885 dev->net->features = 0;
2886
2887 if (DEFAULT_TX_CSUM_ENABLE)
2888 dev->net->features |= NETIF_F_HW_CSUM;
2889
2890 if (DEFAULT_RX_CSUM_ENABLE)
2891 dev->net->features |= NETIF_F_RXCSUM;
2892
2893 if (DEFAULT_TSO_CSUM_ENABLE)
2894 dev->net->features |= NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_SG;
2895
2896 if (DEFAULT_VLAN_RX_OFFLOAD)
2897 dev->net->features |= NETIF_F_HW_VLAN_CTAG_RX;
2898
2899 if (DEFAULT_VLAN_FILTER_ENABLE)
2900 dev->net->features |= NETIF_F_HW_VLAN_CTAG_FILTER;
2901
2902 dev->net->hw_features = dev->net->features;
2903
2904 ret = lan78xx_setup_irq_domain(dev);
2905 if (ret < 0) {
2906 netdev_warn(dev->net,
2907 "lan78xx_setup_irq_domain() failed : %d", ret);
2908 goto out1;
2909 }
2910
2911 dev->net->hard_header_len += TX_OVERHEAD;
2912 dev->hard_mtu = dev->net->mtu + dev->net->hard_header_len;
2913
2914 /* Init all registers */
2915 ret = lan78xx_reset(dev);
2916 if (ret) {
2917 netdev_warn(dev->net, "Registers INIT FAILED....");
2918 goto out2;
2919 }
2920
2921 ret = lan78xx_mdio_init(dev);
2922 if (ret) {
2923 netdev_warn(dev->net, "MDIO INIT FAILED.....");
2924 goto out2;
2925 }
2926
2927 dev->net->flags |= IFF_MULTICAST;
2928
2929 pdata->wol = WAKE_MAGIC;
2930
2931 return ret;
2932
2933out2:
2934 lan78xx_remove_irq_domain(dev);
2935
2936out1:
2937 netdev_warn(dev->net, "Bind routine FAILED");
2938 cancel_work_sync(&pdata->set_multicast);
2939 cancel_work_sync(&pdata->set_vlan);
2940 kfree(pdata);
2941 return ret;
2942}
2943
2944static void lan78xx_unbind(struct lan78xx_net *dev, struct usb_interface *intf)
2945{
2946 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]);
2947
2948 lan78xx_remove_irq_domain(dev);
2949
2950 lan78xx_remove_mdio(dev);
2951
2952 if (pdata) {
2953 cancel_work_sync(&pdata->set_multicast);
2954 cancel_work_sync(&pdata->set_vlan);
2955 netif_dbg(dev, ifdown, dev->net, "free pdata");
2956 kfree(pdata);
2957 pdata = NULL;
2958 dev->data[0] = 0;
2959 }
2960}
2961
2962static void lan78xx_rx_csum_offload(struct lan78xx_net *dev,
2963 struct sk_buff *skb,
2964 u32 rx_cmd_a, u32 rx_cmd_b)
2965{
2966 /* HW Checksum offload appears to be flawed if used when not stripping
2967 * VLAN headers. Drop back to S/W checksums under these conditions.
2968 */
2969 if (!(dev->net->features & NETIF_F_RXCSUM) ||
2970 unlikely(rx_cmd_a & RX_CMD_A_ICSM_) ||
2971 ((rx_cmd_a & RX_CMD_A_FVTG_) &&
2972 !(dev->net->features & NETIF_F_HW_VLAN_CTAG_RX))) {
2973 skb->ip_summed = CHECKSUM_NONE;
2974 } else {
2975 skb->csum = ntohs((u16)(rx_cmd_b >> RX_CMD_B_CSUM_SHIFT_));
2976 skb->ip_summed = CHECKSUM_COMPLETE;
2977 }
2978}
2979
2980static void lan78xx_rx_vlan_offload(struct lan78xx_net *dev,
2981 struct sk_buff *skb,
2982 u32 rx_cmd_a, u32 rx_cmd_b)
2983{
2984 if ((dev->net->features & NETIF_F_HW_VLAN_CTAG_RX) &&
2985 (rx_cmd_a & RX_CMD_A_FVTG_))
2986 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q),
2987 (rx_cmd_b & 0xffff));
2988}
2989
2990static void lan78xx_skb_return(struct lan78xx_net *dev, struct sk_buff *skb)
2991{
2992 int status;
2993
2994 if (test_bit(EVENT_RX_PAUSED, &dev->flags)) {
2995 skb_queue_tail(&dev->rxq_pause, skb);
2996 return;
2997 }
2998
2999 dev->net->stats.rx_packets++;
3000 dev->net->stats.rx_bytes += skb->len;
3001
3002 skb->protocol = eth_type_trans(skb, dev->net);
3003
3004 netif_dbg(dev, rx_status, dev->net, "< rx, len %zu, type 0x%x\n",
3005 skb->len + sizeof(struct ethhdr), skb->protocol);
3006 memset(skb->cb, 0, sizeof(struct skb_data));
3007
3008 if (skb_defer_rx_timestamp(skb))
3009 return;
3010
3011 status = netif_rx(skb);
3012 if (status != NET_RX_SUCCESS)
3013 netif_dbg(dev, rx_err, dev->net,
3014 "netif_rx status %d\n", status);
3015}
3016
3017static int lan78xx_rx(struct lan78xx_net *dev, struct sk_buff *skb)
3018{
3019 if (skb->len < dev->net->hard_header_len)
3020 return 0;
3021
3022 while (skb->len > 0) {
3023 u32 rx_cmd_a, rx_cmd_b, align_count, size;
3024 u16 rx_cmd_c;
3025 struct sk_buff *skb2;
3026 unsigned char *packet;
3027
3028 rx_cmd_a = get_unaligned_le32(skb->data);
3029 skb_pull(skb, sizeof(rx_cmd_a));
3030
3031 rx_cmd_b = get_unaligned_le32(skb->data);
3032 skb_pull(skb, sizeof(rx_cmd_b));
3033
3034 rx_cmd_c = get_unaligned_le16(skb->data);
3035 skb_pull(skb, sizeof(rx_cmd_c));
3036
3037 packet = skb->data;
3038
3039 /* get the packet length */
3040 size = (rx_cmd_a & RX_CMD_A_LEN_MASK_);
3041 align_count = (4 - ((size + RXW_PADDING) % 4)) % 4;
3042
3043 if (unlikely(rx_cmd_a & RX_CMD_A_RED_)) {
3044 netif_dbg(dev, rx_err, dev->net,
3045 "Error rx_cmd_a=0x%08x", rx_cmd_a);
3046 } else {
3047 /* last frame in this batch */
3048 if (skb->len == size) {
3049 lan78xx_rx_csum_offload(dev, skb,
3050 rx_cmd_a, rx_cmd_b);
3051 lan78xx_rx_vlan_offload(dev, skb,
3052 rx_cmd_a, rx_cmd_b);
3053
3054 skb_trim(skb, skb->len - 4); /* remove fcs */
3055 skb->truesize = size + sizeof(struct sk_buff);
3056
3057 return 1;
3058 }
3059
3060 skb2 = skb_clone(skb, GFP_ATOMIC);
3061 if (unlikely(!skb2)) {
3062 netdev_warn(dev->net, "Error allocating skb");
3063 return 0;
3064 }
3065
3066 skb2->len = size;
3067 skb2->data = packet;
3068 skb_set_tail_pointer(skb2, size);
3069
3070 lan78xx_rx_csum_offload(dev, skb2, rx_cmd_a, rx_cmd_b);
3071 lan78xx_rx_vlan_offload(dev, skb2, rx_cmd_a, rx_cmd_b);
3072
3073 skb_trim(skb2, skb2->len - 4); /* remove fcs */
3074 skb2->truesize = size + sizeof(struct sk_buff);
3075
3076 lan78xx_skb_return(dev, skb2);
3077 }
3078
3079 skb_pull(skb, size);
3080
3081 /* padding bytes before the next frame starts */
3082 if (skb->len)
3083 skb_pull(skb, align_count);
3084 }
3085
3086 return 1;
3087}
3088
3089static inline void rx_process(struct lan78xx_net *dev, struct sk_buff *skb)
3090{
3091 if (!lan78xx_rx(dev, skb)) {
3092 dev->net->stats.rx_errors++;
3093 goto done;
3094 }
3095
3096 if (skb->len) {
3097 lan78xx_skb_return(dev, skb);
3098 return;
3099 }
3100
3101 netif_dbg(dev, rx_err, dev->net, "drop\n");
3102 dev->net->stats.rx_errors++;
3103done:
3104 skb_queue_tail(&dev->done, skb);
3105}
3106
3107static void rx_complete(struct urb *urb);
3108
3109static int rx_submit(struct lan78xx_net *dev, struct urb *urb, gfp_t flags)
3110{
3111 struct sk_buff *skb;
3112 struct skb_data *entry;
3113 unsigned long lockflags;
3114 size_t size = dev->rx_urb_size;
3115 int ret = 0;
3116
3117 skb = netdev_alloc_skb_ip_align(dev->net, size);
3118 if (!skb) {
3119 usb_free_urb(urb);
3120 return -ENOMEM;
3121 }
3122
3123 entry = (struct skb_data *)skb->cb;
3124 entry->urb = urb;
3125 entry->dev = dev;
3126 entry->length = 0;
3127
3128 usb_fill_bulk_urb(urb, dev->udev, dev->pipe_in,
3129 skb->data, size, rx_complete, skb);
3130
3131 spin_lock_irqsave(&dev->rxq.lock, lockflags);
3132
3133 if (netif_device_present(dev->net) &&
3134 netif_running(dev->net) &&
3135 !test_bit(EVENT_RX_HALT, &dev->flags) &&
3136 !test_bit(EVENT_DEV_ASLEEP, &dev->flags)) {
3137 ret = usb_submit_urb(urb, GFP_ATOMIC);
3138 switch (ret) {
3139 case 0:
3140 lan78xx_queue_skb(&dev->rxq, skb, rx_start);
3141 break;
3142 case -EPIPE:
3143 lan78xx_defer_kevent(dev, EVENT_RX_HALT);
3144 break;
3145 case -ENODEV:
3146 netif_dbg(dev, ifdown, dev->net, "device gone\n");
3147 netif_device_detach(dev->net);
3148 break;
3149 case -EHOSTUNREACH:
3150 ret = -ENOLINK;
3151 break;
3152 default:
3153 netif_dbg(dev, rx_err, dev->net,
3154 "rx submit, %d\n", ret);
3155 tasklet_schedule(&dev->bh);
3156 }
3157 } else {
3158 netif_dbg(dev, ifdown, dev->net, "rx: stopped\n");
3159 ret = -ENOLINK;
3160 }
3161 spin_unlock_irqrestore(&dev->rxq.lock, lockflags);
3162 if (ret) {
3163 dev_kfree_skb_any(skb);
3164 usb_free_urb(urb);
3165 }
3166 return ret;
3167}
3168
3169static void rx_complete(struct urb *urb)
3170{
3171 struct sk_buff *skb = (struct sk_buff *)urb->context;
3172 struct skb_data *entry = (struct skb_data *)skb->cb;
3173 struct lan78xx_net *dev = entry->dev;
3174 int urb_status = urb->status;
3175 enum skb_state state;
3176
3177 skb_put(skb, urb->actual_length);
3178 state = rx_done;
3179 entry->urb = NULL;
3180
3181 switch (urb_status) {
3182 case 0:
3183 if (skb->len < dev->net->hard_header_len) {
3184 state = rx_cleanup;
3185 dev->net->stats.rx_errors++;
3186 dev->net->stats.rx_length_errors++;
3187 netif_dbg(dev, rx_err, dev->net,
3188 "rx length %d\n", skb->len);
3189 }
3190 usb_mark_last_busy(dev->udev);
3191 break;
3192 case -EPIPE:
3193 dev->net->stats.rx_errors++;
3194 lan78xx_defer_kevent(dev, EVENT_RX_HALT);
3195 fallthrough;
3196 case -ECONNRESET: /* async unlink */
3197 case -ESHUTDOWN: /* hardware gone */
3198 netif_dbg(dev, ifdown, dev->net,
3199 "rx shutdown, code %d\n", urb_status);
3200 state = rx_cleanup;
3201 entry->urb = urb;
3202 urb = NULL;
3203 break;
3204 case -EPROTO:
3205 case -ETIME:
3206 case -EILSEQ:
3207 dev->net->stats.rx_errors++;
3208 state = rx_cleanup;
3209 entry->urb = urb;
3210 urb = NULL;
3211 break;
3212
3213 /* data overrun ... flush fifo? */
3214 case -EOVERFLOW:
3215 dev->net->stats.rx_over_errors++;
3216 fallthrough;
3217
3218 default:
3219 state = rx_cleanup;
3220 dev->net->stats.rx_errors++;
3221 netif_dbg(dev, rx_err, dev->net, "rx status %d\n", urb_status);
3222 break;
3223 }
3224
3225 state = defer_bh(dev, skb, &dev->rxq, state);
3226
3227 if (urb) {
3228 if (netif_running(dev->net) &&
3229 !test_bit(EVENT_RX_HALT, &dev->flags) &&
3230 state != unlink_start) {
3231 rx_submit(dev, urb, GFP_ATOMIC);
3232 return;
3233 }
3234 usb_free_urb(urb);
3235 }
3236 netif_dbg(dev, rx_err, dev->net, "no read resubmitted\n");
3237}
3238
3239static void lan78xx_tx_bh(struct lan78xx_net *dev)
3240{
3241 int length;
3242 struct urb *urb = NULL;
3243 struct skb_data *entry;
3244 unsigned long flags;
3245 struct sk_buff_head *tqp = &dev->txq_pend;
3246 struct sk_buff *skb, *skb2;
3247 int ret;
3248 int count, pos;
3249 int skb_totallen, pkt_cnt;
3250
3251 skb_totallen = 0;
3252 pkt_cnt = 0;
3253 count = 0;
3254 length = 0;
3255 spin_lock_irqsave(&tqp->lock, flags);
3256 skb_queue_walk(tqp, skb) {
3257 if (skb_is_gso(skb)) {
3258 if (!skb_queue_is_first(tqp, skb)) {
3259 /* handle previous packets first */
3260 break;
3261 }
3262 count = 1;
3263 length = skb->len - TX_OVERHEAD;
3264 __skb_unlink(skb, tqp);
3265 spin_unlock_irqrestore(&tqp->lock, flags);
3266 goto gso_skb;
3267 }
3268
3269 if ((skb_totallen + skb->len) > MAX_SINGLE_PACKET_SIZE)
3270 break;
3271 skb_totallen = skb->len + roundup(skb_totallen, sizeof(u32));
3272 pkt_cnt++;
3273 }
3274 spin_unlock_irqrestore(&tqp->lock, flags);
3275
3276 /* copy to a single skb */
3277 skb = alloc_skb(skb_totallen, GFP_ATOMIC);
3278 if (!skb)
3279 goto drop;
3280
3281 skb_put(skb, skb_totallen);
3282
3283 for (count = pos = 0; count < pkt_cnt; count++) {
3284 skb2 = skb_dequeue(tqp);
3285 if (skb2) {
3286 length += (skb2->len - TX_OVERHEAD);
3287 memcpy(skb->data + pos, skb2->data, skb2->len);
3288 pos += roundup(skb2->len, sizeof(u32));
3289 dev_kfree_skb(skb2);
3290 }
3291 }
3292
3293gso_skb:
3294 urb = usb_alloc_urb(0, GFP_ATOMIC);
3295 if (!urb)
3296 goto drop;
3297
3298 entry = (struct skb_data *)skb->cb;
3299 entry->urb = urb;
3300 entry->dev = dev;
3301 entry->length = length;
3302 entry->num_of_packet = count;
3303
3304 spin_lock_irqsave(&dev->txq.lock, flags);
3305 ret = usb_autopm_get_interface_async(dev->intf);
3306 if (ret < 0) {
3307 spin_unlock_irqrestore(&dev->txq.lock, flags);
3308 goto drop;
3309 }
3310
3311 usb_fill_bulk_urb(urb, dev->udev, dev->pipe_out,
3312 skb->data, skb->len, tx_complete, skb);
3313
3314 if (length % dev->maxpacket == 0) {
3315 /* send USB_ZERO_PACKET */
3316 urb->transfer_flags |= URB_ZERO_PACKET;
3317 }
3318
3319#ifdef CONFIG_PM
3320 /* if this triggers the device is still a sleep */
3321 if (test_bit(EVENT_DEV_ASLEEP, &dev->flags)) {
3322 /* transmission will be done in resume */
3323 usb_anchor_urb(urb, &dev->deferred);
3324 /* no use to process more packets */
3325 netif_stop_queue(dev->net);
3326 usb_put_urb(urb);
3327 spin_unlock_irqrestore(&dev->txq.lock, flags);
3328 netdev_dbg(dev->net, "Delaying transmission for resumption\n");
3329 return;
3330 }
3331#endif
3332
3333 ret = usb_submit_urb(urb, GFP_ATOMIC);
3334 switch (ret) {
3335 case 0:
3336 netif_trans_update(dev->net);
3337 lan78xx_queue_skb(&dev->txq, skb, tx_start);
3338 if (skb_queue_len(&dev->txq) >= dev->tx_qlen)
3339 netif_stop_queue(dev->net);
3340 break;
3341 case -EPIPE:
3342 netif_stop_queue(dev->net);
3343 lan78xx_defer_kevent(dev, EVENT_TX_HALT);
3344 usb_autopm_put_interface_async(dev->intf);
3345 break;
3346 default:
3347 usb_autopm_put_interface_async(dev->intf);
3348 netif_dbg(dev, tx_err, dev->net,
3349 "tx: submit urb err %d\n", ret);
3350 break;
3351 }
3352
3353 spin_unlock_irqrestore(&dev->txq.lock, flags);
3354
3355 if (ret) {
3356 netif_dbg(dev, tx_err, dev->net, "drop, code %d\n", ret);
3357drop:
3358 dev->net->stats.tx_dropped++;
3359 if (skb)
3360 dev_kfree_skb_any(skb);
3361 usb_free_urb(urb);
3362 } else
3363 netif_dbg(dev, tx_queued, dev->net,
3364 "> tx, len %d, type 0x%x\n", length, skb->protocol);
3365}
3366
3367static void lan78xx_rx_bh(struct lan78xx_net *dev)
3368{
3369 struct urb *urb;
3370 int i;
3371
3372 if (skb_queue_len(&dev->rxq) < dev->rx_qlen) {
3373 for (i = 0; i < 10; i++) {
3374 if (skb_queue_len(&dev->rxq) >= dev->rx_qlen)
3375 break;
3376 urb = usb_alloc_urb(0, GFP_ATOMIC);
3377 if (urb)
3378 if (rx_submit(dev, urb, GFP_ATOMIC) == -ENOLINK)
3379 return;
3380 }
3381
3382 if (skb_queue_len(&dev->rxq) < dev->rx_qlen)
3383 tasklet_schedule(&dev->bh);
3384 }
3385 if (skb_queue_len(&dev->txq) < dev->tx_qlen)
3386 netif_wake_queue(dev->net);
3387}
3388
3389static void lan78xx_bh(unsigned long param)
3390{
3391 struct lan78xx_net *dev = (struct lan78xx_net *)param;
3392 struct sk_buff *skb;
3393 struct skb_data *entry;
3394
3395 while ((skb = skb_dequeue(&dev->done))) {
3396 entry = (struct skb_data *)(skb->cb);
3397 switch (entry->state) {
3398 case rx_done:
3399 entry->state = rx_cleanup;
3400 rx_process(dev, skb);
3401 continue;
3402 case tx_done:
3403 usb_free_urb(entry->urb);
3404 dev_kfree_skb(skb);
3405 continue;
3406 case rx_cleanup:
3407 usb_free_urb(entry->urb);
3408 dev_kfree_skb(skb);
3409 continue;
3410 default:
3411 netdev_dbg(dev->net, "skb state %d\n", entry->state);
3412 return;
3413 }
3414 }
3415
3416 if (netif_device_present(dev->net) && netif_running(dev->net)) {
3417 /* reset update timer delta */
3418 if (timer_pending(&dev->stat_monitor) && (dev->delta != 1)) {
3419 dev->delta = 1;
3420 mod_timer(&dev->stat_monitor,
3421 jiffies + STAT_UPDATE_TIMER);
3422 }
3423
3424 if (!skb_queue_empty(&dev->txq_pend))
3425 lan78xx_tx_bh(dev);
3426
3427 if (!timer_pending(&dev->delay) &&
3428 !test_bit(EVENT_RX_HALT, &dev->flags))
3429 lan78xx_rx_bh(dev);
3430 }
3431}
3432
3433static void lan78xx_delayedwork(struct work_struct *work)
3434{
3435 int status;
3436 struct lan78xx_net *dev;
3437
3438 dev = container_of(work, struct lan78xx_net, wq.work);
3439
3440 if (test_bit(EVENT_TX_HALT, &dev->flags)) {
3441 unlink_urbs(dev, &dev->txq);
3442 status = usb_autopm_get_interface(dev->intf);
3443 if (status < 0)
3444 goto fail_pipe;
3445 status = usb_clear_halt(dev->udev, dev->pipe_out);
3446 usb_autopm_put_interface(dev->intf);
3447 if (status < 0 &&
3448 status != -EPIPE &&
3449 status != -ESHUTDOWN) {
3450 if (netif_msg_tx_err(dev))
3451fail_pipe:
3452 netdev_err(dev->net,
3453 "can't clear tx halt, status %d\n",
3454 status);
3455 } else {
3456 clear_bit(EVENT_TX_HALT, &dev->flags);
3457 if (status != -ESHUTDOWN)
3458 netif_wake_queue(dev->net);
3459 }
3460 }
3461 if (test_bit(EVENT_RX_HALT, &dev->flags)) {
3462 unlink_urbs(dev, &dev->rxq);
3463 status = usb_autopm_get_interface(dev->intf);
3464 if (status < 0)
3465 goto fail_halt;
3466 status = usb_clear_halt(dev->udev, dev->pipe_in);
3467 usb_autopm_put_interface(dev->intf);
3468 if (status < 0 &&
3469 status != -EPIPE &&
3470 status != -ESHUTDOWN) {
3471 if (netif_msg_rx_err(dev))
3472fail_halt:
3473 netdev_err(dev->net,
3474 "can't clear rx halt, status %d\n",
3475 status);
3476 } else {
3477 clear_bit(EVENT_RX_HALT, &dev->flags);
3478 tasklet_schedule(&dev->bh);
3479 }
3480 }
3481
3482 if (test_bit(EVENT_LINK_RESET, &dev->flags)) {
3483 int ret = 0;
3484
3485 clear_bit(EVENT_LINK_RESET, &dev->flags);
3486 status = usb_autopm_get_interface(dev->intf);
3487 if (status < 0)
3488 goto skip_reset;
3489 if (lan78xx_link_reset(dev) < 0) {
3490 usb_autopm_put_interface(dev->intf);
3491skip_reset:
3492 netdev_info(dev->net, "link reset failed (%d)\n",
3493 ret);
3494 } else {
3495 usb_autopm_put_interface(dev->intf);
3496 }
3497 }
3498
3499 if (test_bit(EVENT_STAT_UPDATE, &dev->flags)) {
3500 lan78xx_update_stats(dev);
3501
3502 clear_bit(EVENT_STAT_UPDATE, &dev->flags);
3503
3504 mod_timer(&dev->stat_monitor,
3505 jiffies + (STAT_UPDATE_TIMER * dev->delta));
3506
3507 dev->delta = min((dev->delta * 2), 50);
3508 }
3509}
3510
3511static void intr_complete(struct urb *urb)
3512{
3513 struct lan78xx_net *dev = urb->context;
3514 int status = urb->status;
3515
3516 switch (status) {
3517 /* success */
3518 case 0:
3519 lan78xx_status(dev, urb);
3520 break;
3521
3522 /* software-driven interface shutdown */
3523 case -ENOENT: /* urb killed */
3524 case -ESHUTDOWN: /* hardware gone */
3525 netif_dbg(dev, ifdown, dev->net,
3526 "intr shutdown, code %d\n", status);
3527 return;
3528
3529 /* NOTE: not throttling like RX/TX, since this endpoint
3530 * already polls infrequently
3531 */
3532 default:
3533 netdev_dbg(dev->net, "intr status %d\n", status);
3534 break;
3535 }
3536
3537 if (!netif_running(dev->net))
3538 return;
3539
3540 memset(urb->transfer_buffer, 0, urb->transfer_buffer_length);
3541 status = usb_submit_urb(urb, GFP_ATOMIC);
3542 if (status != 0)
3543 netif_err(dev, timer, dev->net,
3544 "intr resubmit --> %d\n", status);
3545}
3546
3547static void lan78xx_disconnect(struct usb_interface *intf)
3548{
3549 struct lan78xx_net *dev;
3550 struct usb_device *udev;
3551 struct net_device *net;
3552 struct phy_device *phydev;
3553
3554 dev = usb_get_intfdata(intf);
3555 usb_set_intfdata(intf, NULL);
3556 if (!dev)
3557 return;
3558
3559 udev = interface_to_usbdev(intf);
3560 net = dev->net;
3561 phydev = net->phydev;
3562
3563 phy_unregister_fixup_for_uid(PHY_KSZ9031RNX, 0xfffffff0);
3564 phy_unregister_fixup_for_uid(PHY_LAN8835, 0xfffffff0);
3565
3566 phy_disconnect(net->phydev);
3567
3568 if (phy_is_pseudo_fixed_link(phydev))
3569 fixed_phy_unregister(phydev);
3570
3571 unregister_netdev(net);
3572
3573 cancel_delayed_work_sync(&dev->wq);
3574
3575 usb_scuttle_anchored_urbs(&dev->deferred);
3576
3577 lan78xx_unbind(dev, intf);
3578
3579 usb_kill_urb(dev->urb_intr);
3580 usb_free_urb(dev->urb_intr);
3581
3582 free_netdev(net);
3583 usb_put_dev(udev);
3584}
3585
3586static void lan78xx_tx_timeout(struct net_device *net, unsigned int txqueue)
3587{
3588 struct lan78xx_net *dev = netdev_priv(net);
3589
3590 unlink_urbs(dev, &dev->txq);
3591 tasklet_schedule(&dev->bh);
3592}
3593
3594static netdev_features_t lan78xx_features_check(struct sk_buff *skb,
3595 struct net_device *netdev,
3596 netdev_features_t features)
3597{
3598 if (skb->len + TX_OVERHEAD > MAX_SINGLE_PACKET_SIZE)
3599 features &= ~NETIF_F_GSO_MASK;
3600
3601 features = vlan_features_check(skb, features);
3602 features = vxlan_features_check(skb, features);
3603
3604 return features;
3605}
3606
3607static const struct net_device_ops lan78xx_netdev_ops = {
3608 .ndo_open = lan78xx_open,
3609 .ndo_stop = lan78xx_stop,
3610 .ndo_start_xmit = lan78xx_start_xmit,
3611 .ndo_tx_timeout = lan78xx_tx_timeout,
3612 .ndo_change_mtu = lan78xx_change_mtu,
3613 .ndo_set_mac_address = lan78xx_set_mac_addr,
3614 .ndo_validate_addr = eth_validate_addr,
3615 .ndo_do_ioctl = phy_do_ioctl_running,
3616 .ndo_set_rx_mode = lan78xx_set_multicast,
3617 .ndo_set_features = lan78xx_set_features,
3618 .ndo_vlan_rx_add_vid = lan78xx_vlan_rx_add_vid,
3619 .ndo_vlan_rx_kill_vid = lan78xx_vlan_rx_kill_vid,
3620 .ndo_features_check = lan78xx_features_check,
3621};
3622
3623static void lan78xx_stat_monitor(struct timer_list *t)
3624{
3625 struct lan78xx_net *dev = from_timer(dev, t, stat_monitor);
3626
3627 lan78xx_defer_kevent(dev, EVENT_STAT_UPDATE);
3628}
3629
3630static int lan78xx_probe(struct usb_interface *intf,
3631 const struct usb_device_id *id)
3632{
3633 struct usb_host_endpoint *ep_blkin, *ep_blkout, *ep_intr;
3634 struct lan78xx_net *dev;
3635 struct net_device *netdev;
3636 struct usb_device *udev;
3637 int ret;
3638 unsigned maxp;
3639 unsigned period;
3640 u8 *buf = NULL;
3641
3642 udev = interface_to_usbdev(intf);
3643 udev = usb_get_dev(udev);
3644
3645 netdev = alloc_etherdev(sizeof(struct lan78xx_net));
3646 if (!netdev) {
3647 dev_err(&intf->dev, "Error: OOM\n");
3648 ret = -ENOMEM;
3649 goto out1;
3650 }
3651
3652 /* netdev_printk() needs this */
3653 SET_NETDEV_DEV(netdev, &intf->dev);
3654
3655 dev = netdev_priv(netdev);
3656 dev->udev = udev;
3657 dev->intf = intf;
3658 dev->net = netdev;
3659 dev->msg_enable = netif_msg_init(msg_level, NETIF_MSG_DRV
3660 | NETIF_MSG_PROBE | NETIF_MSG_LINK);
3661
3662 skb_queue_head_init(&dev->rxq);
3663 skb_queue_head_init(&dev->txq);
3664 skb_queue_head_init(&dev->done);
3665 skb_queue_head_init(&dev->rxq_pause);
3666 skb_queue_head_init(&dev->txq_pend);
3667 mutex_init(&dev->phy_mutex);
3668
3669 tasklet_init(&dev->bh, lan78xx_bh, (unsigned long)dev);
3670 INIT_DELAYED_WORK(&dev->wq, lan78xx_delayedwork);
3671 init_usb_anchor(&dev->deferred);
3672
3673 netdev->netdev_ops = &lan78xx_netdev_ops;
3674 netdev->watchdog_timeo = TX_TIMEOUT_JIFFIES;
3675 netdev->ethtool_ops = &lan78xx_ethtool_ops;
3676
3677 dev->delta = 1;
3678 timer_setup(&dev->stat_monitor, lan78xx_stat_monitor, 0);
3679
3680 mutex_init(&dev->stats.access_lock);
3681
3682 if (intf->cur_altsetting->desc.bNumEndpoints < 3) {
3683 ret = -ENODEV;
3684 goto out2;
3685 }
3686
3687 dev->pipe_in = usb_rcvbulkpipe(udev, BULK_IN_PIPE);
3688 ep_blkin = usb_pipe_endpoint(udev, dev->pipe_in);
3689 if (!ep_blkin || !usb_endpoint_is_bulk_in(&ep_blkin->desc)) {
3690 ret = -ENODEV;
3691 goto out2;
3692 }
3693
3694 dev->pipe_out = usb_sndbulkpipe(udev, BULK_OUT_PIPE);
3695 ep_blkout = usb_pipe_endpoint(udev, dev->pipe_out);
3696 if (!ep_blkout || !usb_endpoint_is_bulk_out(&ep_blkout->desc)) {
3697 ret = -ENODEV;
3698 goto out2;
3699 }
3700
3701 ep_intr = &intf->cur_altsetting->endpoint[2];
3702 if (!usb_endpoint_is_int_in(&ep_intr->desc)) {
3703 ret = -ENODEV;
3704 goto out2;
3705 }
3706
3707 dev->pipe_intr = usb_rcvintpipe(dev->udev,
3708 usb_endpoint_num(&ep_intr->desc));
3709
3710 ret = lan78xx_bind(dev, intf);
3711 if (ret < 0)
3712 goto out2;
3713
3714 if (netdev->mtu > (dev->hard_mtu - netdev->hard_header_len))
3715 netdev->mtu = dev->hard_mtu - netdev->hard_header_len;
3716
3717 /* MTU range: 68 - 9000 */
3718 netdev->max_mtu = MAX_SINGLE_PACKET_SIZE;
3719 netif_set_gso_max_size(netdev, MAX_SINGLE_PACKET_SIZE - MAX_HEADER);
3720
3721 period = ep_intr->desc.bInterval;
3722 maxp = usb_maxpacket(dev->udev, dev->pipe_intr, 0);
3723 buf = kmalloc(maxp, GFP_KERNEL);
3724 if (buf) {
3725 dev->urb_intr = usb_alloc_urb(0, GFP_KERNEL);
3726 if (!dev->urb_intr) {
3727 ret = -ENOMEM;
3728 kfree(buf);
3729 goto out3;
3730 } else {
3731 usb_fill_int_urb(dev->urb_intr, dev->udev,
3732 dev->pipe_intr, buf, maxp,
3733 intr_complete, dev, period);
3734 dev->urb_intr->transfer_flags |= URB_FREE_BUFFER;
3735 }
3736 }
3737
3738 dev->maxpacket = usb_maxpacket(dev->udev, dev->pipe_out, 1);
3739
3740 /* driver requires remote-wakeup capability during autosuspend. */
3741 intf->needs_remote_wakeup = 1;
3742
3743 ret = lan78xx_phy_init(dev);
3744 if (ret < 0)
3745 goto out4;
3746
3747 ret = register_netdev(netdev);
3748 if (ret != 0) {
3749 netif_err(dev, probe, netdev, "couldn't register the device\n");
3750 goto out5;
3751 }
3752
3753 usb_set_intfdata(intf, dev);
3754
3755 ret = device_set_wakeup_enable(&udev->dev, true);
3756
3757 /* Default delay of 2sec has more overhead than advantage.
3758 * Set to 10sec as default.
3759 */
3760 pm_runtime_set_autosuspend_delay(&udev->dev,
3761 DEFAULT_AUTOSUSPEND_DELAY);
3762
3763 return 0;
3764
3765out5:
3766 phy_disconnect(netdev->phydev);
3767out4:
3768 usb_free_urb(dev->urb_intr);
3769out3:
3770 lan78xx_unbind(dev, intf);
3771out2:
3772 free_netdev(netdev);
3773out1:
3774 usb_put_dev(udev);
3775
3776 return ret;
3777}
3778
3779static u16 lan78xx_wakeframe_crc16(const u8 *buf, int len)
3780{
3781 const u16 crc16poly = 0x8005;
3782 int i;
3783 u16 bit, crc, msb;
3784 u8 data;
3785
3786 crc = 0xFFFF;
3787 for (i = 0; i < len; i++) {
3788 data = *buf++;
3789 for (bit = 0; bit < 8; bit++) {
3790 msb = crc >> 15;
3791 crc <<= 1;
3792
3793 if (msb ^ (u16)(data & 1)) {
3794 crc ^= crc16poly;
3795 crc |= (u16)0x0001U;
3796 }
3797 data >>= 1;
3798 }
3799 }
3800
3801 return crc;
3802}
3803
3804static int lan78xx_set_suspend(struct lan78xx_net *dev, u32 wol)
3805{
3806 u32 buf;
3807 int ret;
3808 int mask_index;
3809 u16 crc;
3810 u32 temp_wucsr;
3811 u32 temp_pmt_ctl;
3812 const u8 ipv4_multicast[3] = { 0x01, 0x00, 0x5E };
3813 const u8 ipv6_multicast[3] = { 0x33, 0x33 };
3814 const u8 arp_type[2] = { 0x08, 0x06 };
3815
3816 ret = lan78xx_read_reg(dev, MAC_TX, &buf);
3817 buf &= ~MAC_TX_TXEN_;
3818 ret = lan78xx_write_reg(dev, MAC_TX, buf);
3819 ret = lan78xx_read_reg(dev, MAC_RX, &buf);
3820 buf &= ~MAC_RX_RXEN_;
3821 ret = lan78xx_write_reg(dev, MAC_RX, buf);
3822
3823 ret = lan78xx_write_reg(dev, WUCSR, 0);
3824 ret = lan78xx_write_reg(dev, WUCSR2, 0);
3825 ret = lan78xx_write_reg(dev, WK_SRC, 0xFFF1FF1FUL);
3826
3827 temp_wucsr = 0;
3828
3829 temp_pmt_ctl = 0;
3830 ret = lan78xx_read_reg(dev, PMT_CTL, &temp_pmt_ctl);
3831 temp_pmt_ctl &= ~PMT_CTL_RES_CLR_WKP_EN_;
3832 temp_pmt_ctl |= PMT_CTL_RES_CLR_WKP_STS_;
3833
3834 for (mask_index = 0; mask_index < NUM_OF_WUF_CFG; mask_index++)
3835 ret = lan78xx_write_reg(dev, WUF_CFG(mask_index), 0);
3836
3837 mask_index = 0;
3838 if (wol & WAKE_PHY) {
3839 temp_pmt_ctl |= PMT_CTL_PHY_WAKE_EN_;
3840
3841 temp_pmt_ctl |= PMT_CTL_WOL_EN_;
3842 temp_pmt_ctl &= ~PMT_CTL_SUS_MODE_MASK_;
3843 temp_pmt_ctl |= PMT_CTL_SUS_MODE_0_;
3844 }
3845 if (wol & WAKE_MAGIC) {
3846 temp_wucsr |= WUCSR_MPEN_;
3847
3848 temp_pmt_ctl |= PMT_CTL_WOL_EN_;
3849 temp_pmt_ctl &= ~PMT_CTL_SUS_MODE_MASK_;
3850 temp_pmt_ctl |= PMT_CTL_SUS_MODE_3_;
3851 }
3852 if (wol & WAKE_BCAST) {
3853 temp_wucsr |= WUCSR_BCST_EN_;
3854
3855 temp_pmt_ctl |= PMT_CTL_WOL_EN_;
3856 temp_pmt_ctl &= ~PMT_CTL_SUS_MODE_MASK_;
3857 temp_pmt_ctl |= PMT_CTL_SUS_MODE_0_;
3858 }
3859 if (wol & WAKE_MCAST) {
3860 temp_wucsr |= WUCSR_WAKE_EN_;
3861
3862 /* set WUF_CFG & WUF_MASK for IPv4 Multicast */
3863 crc = lan78xx_wakeframe_crc16(ipv4_multicast, 3);
3864 ret = lan78xx_write_reg(dev, WUF_CFG(mask_index),
3865 WUF_CFGX_EN_ |
3866 WUF_CFGX_TYPE_MCAST_ |
3867 (0 << WUF_CFGX_OFFSET_SHIFT_) |
3868 (crc & WUF_CFGX_CRC16_MASK_));
3869
3870 ret = lan78xx_write_reg(dev, WUF_MASK0(mask_index), 7);
3871 ret = lan78xx_write_reg(dev, WUF_MASK1(mask_index), 0);
3872 ret = lan78xx_write_reg(dev, WUF_MASK2(mask_index), 0);
3873 ret = lan78xx_write_reg(dev, WUF_MASK3(mask_index), 0);
3874 mask_index++;
3875
3876 /* for IPv6 Multicast */
3877 crc = lan78xx_wakeframe_crc16(ipv6_multicast, 2);
3878 ret = lan78xx_write_reg(dev, WUF_CFG(mask_index),
3879 WUF_CFGX_EN_ |
3880 WUF_CFGX_TYPE_MCAST_ |
3881 (0 << WUF_CFGX_OFFSET_SHIFT_) |
3882 (crc & WUF_CFGX_CRC16_MASK_));
3883
3884 ret = lan78xx_write_reg(dev, WUF_MASK0(mask_index), 3);
3885 ret = lan78xx_write_reg(dev, WUF_MASK1(mask_index), 0);
3886 ret = lan78xx_write_reg(dev, WUF_MASK2(mask_index), 0);
3887 ret = lan78xx_write_reg(dev, WUF_MASK3(mask_index), 0);
3888 mask_index++;
3889
3890 temp_pmt_ctl |= PMT_CTL_WOL_EN_;
3891 temp_pmt_ctl &= ~PMT_CTL_SUS_MODE_MASK_;
3892 temp_pmt_ctl |= PMT_CTL_SUS_MODE_0_;
3893 }
3894 if (wol & WAKE_UCAST) {
3895 temp_wucsr |= WUCSR_PFDA_EN_;
3896
3897 temp_pmt_ctl |= PMT_CTL_WOL_EN_;
3898 temp_pmt_ctl &= ~PMT_CTL_SUS_MODE_MASK_;
3899 temp_pmt_ctl |= PMT_CTL_SUS_MODE_0_;
3900 }
3901 if (wol & WAKE_ARP) {
3902 temp_wucsr |= WUCSR_WAKE_EN_;
3903
3904 /* set WUF_CFG & WUF_MASK
3905 * for packettype (offset 12,13) = ARP (0x0806)
3906 */
3907 crc = lan78xx_wakeframe_crc16(arp_type, 2);
3908 ret = lan78xx_write_reg(dev, WUF_CFG(mask_index),
3909 WUF_CFGX_EN_ |
3910 WUF_CFGX_TYPE_ALL_ |
3911 (0 << WUF_CFGX_OFFSET_SHIFT_) |
3912 (crc & WUF_CFGX_CRC16_MASK_));
3913
3914 ret = lan78xx_write_reg(dev, WUF_MASK0(mask_index), 0x3000);
3915 ret = lan78xx_write_reg(dev, WUF_MASK1(mask_index), 0);
3916 ret = lan78xx_write_reg(dev, WUF_MASK2(mask_index), 0);
3917 ret = lan78xx_write_reg(dev, WUF_MASK3(mask_index), 0);
3918 mask_index++;
3919
3920 temp_pmt_ctl |= PMT_CTL_WOL_EN_;
3921 temp_pmt_ctl &= ~PMT_CTL_SUS_MODE_MASK_;
3922 temp_pmt_ctl |= PMT_CTL_SUS_MODE_0_;
3923 }
3924
3925 ret = lan78xx_write_reg(dev, WUCSR, temp_wucsr);
3926
3927 /* when multiple WOL bits are set */
3928 if (hweight_long((unsigned long)wol) > 1) {
3929 temp_pmt_ctl |= PMT_CTL_WOL_EN_;
3930 temp_pmt_ctl &= ~PMT_CTL_SUS_MODE_MASK_;
3931 temp_pmt_ctl |= PMT_CTL_SUS_MODE_0_;
3932 }
3933 ret = lan78xx_write_reg(dev, PMT_CTL, temp_pmt_ctl);
3934
3935 /* clear WUPS */
3936 ret = lan78xx_read_reg(dev, PMT_CTL, &buf);
3937 buf |= PMT_CTL_WUPS_MASK_;
3938 ret = lan78xx_write_reg(dev, PMT_CTL, buf);
3939
3940 ret = lan78xx_read_reg(dev, MAC_RX, &buf);
3941 buf |= MAC_RX_RXEN_;
3942 ret = lan78xx_write_reg(dev, MAC_RX, buf);
3943
3944 return 0;
3945}
3946
3947static int lan78xx_suspend(struct usb_interface *intf, pm_message_t message)
3948{
3949 struct lan78xx_net *dev = usb_get_intfdata(intf);
3950 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]);
3951 u32 buf;
3952 int ret;
3953
3954 if (!dev->suspend_count++) {
3955 spin_lock_irq(&dev->txq.lock);
3956 /* don't autosuspend while transmitting */
3957 if ((skb_queue_len(&dev->txq) ||
3958 skb_queue_len(&dev->txq_pend)) &&
3959 PMSG_IS_AUTO(message)) {
3960 spin_unlock_irq(&dev->txq.lock);
3961 ret = -EBUSY;
3962 goto out;
3963 } else {
3964 set_bit(EVENT_DEV_ASLEEP, &dev->flags);
3965 spin_unlock_irq(&dev->txq.lock);
3966 }
3967
3968 /* stop TX & RX */
3969 ret = lan78xx_read_reg(dev, MAC_TX, &buf);
3970 buf &= ~MAC_TX_TXEN_;
3971 ret = lan78xx_write_reg(dev, MAC_TX, buf);
3972 ret = lan78xx_read_reg(dev, MAC_RX, &buf);
3973 buf &= ~MAC_RX_RXEN_;
3974 ret = lan78xx_write_reg(dev, MAC_RX, buf);
3975
3976 /* empty out the rx and queues */
3977 netif_device_detach(dev->net);
3978 lan78xx_terminate_urbs(dev);
3979 usb_kill_urb(dev->urb_intr);
3980
3981 /* reattach */
3982 netif_device_attach(dev->net);
3983 }
3984
3985 if (test_bit(EVENT_DEV_ASLEEP, &dev->flags)) {
3986 del_timer(&dev->stat_monitor);
3987
3988 if (PMSG_IS_AUTO(message)) {
3989 /* auto suspend (selective suspend) */
3990 ret = lan78xx_read_reg(dev, MAC_TX, &buf);
3991 buf &= ~MAC_TX_TXEN_;
3992 ret = lan78xx_write_reg(dev, MAC_TX, buf);
3993 ret = lan78xx_read_reg(dev, MAC_RX, &buf);
3994 buf &= ~MAC_RX_RXEN_;
3995 ret = lan78xx_write_reg(dev, MAC_RX, buf);
3996
3997 ret = lan78xx_write_reg(dev, WUCSR, 0);
3998 ret = lan78xx_write_reg(dev, WUCSR2, 0);
3999 ret = lan78xx_write_reg(dev, WK_SRC, 0xFFF1FF1FUL);
4000
4001 /* set goodframe wakeup */
4002 ret = lan78xx_read_reg(dev, WUCSR, &buf);
4003
4004 buf |= WUCSR_RFE_WAKE_EN_;
4005 buf |= WUCSR_STORE_WAKE_;
4006
4007 ret = lan78xx_write_reg(dev, WUCSR, buf);
4008
4009 ret = lan78xx_read_reg(dev, PMT_CTL, &buf);
4010
4011 buf &= ~PMT_CTL_RES_CLR_WKP_EN_;
4012 buf |= PMT_CTL_RES_CLR_WKP_STS_;
4013
4014 buf |= PMT_CTL_PHY_WAKE_EN_;
4015 buf |= PMT_CTL_WOL_EN_;
4016 buf &= ~PMT_CTL_SUS_MODE_MASK_;
4017 buf |= PMT_CTL_SUS_MODE_3_;
4018
4019 ret = lan78xx_write_reg(dev, PMT_CTL, buf);
4020
4021 ret = lan78xx_read_reg(dev, PMT_CTL, &buf);
4022
4023 buf |= PMT_CTL_WUPS_MASK_;
4024
4025 ret = lan78xx_write_reg(dev, PMT_CTL, buf);
4026
4027 ret = lan78xx_read_reg(dev, MAC_RX, &buf);
4028 buf |= MAC_RX_RXEN_;
4029 ret = lan78xx_write_reg(dev, MAC_RX, buf);
4030 } else {
4031 lan78xx_set_suspend(dev, pdata->wol);
4032 }
4033 }
4034
4035 ret = 0;
4036out:
4037 return ret;
4038}
4039
4040static int lan78xx_resume(struct usb_interface *intf)
4041{
4042 struct lan78xx_net *dev = usb_get_intfdata(intf);
4043 struct sk_buff *skb;
4044 struct urb *res;
4045 int ret;
4046 u32 buf;
4047
4048 if (!timer_pending(&dev->stat_monitor)) {
4049 dev->delta = 1;
4050 mod_timer(&dev->stat_monitor,
4051 jiffies + STAT_UPDATE_TIMER);
4052 }
4053
4054 if (!--dev->suspend_count) {
4055 /* resume interrupt URBs */
4056 if (dev->urb_intr && test_bit(EVENT_DEV_OPEN, &dev->flags))
4057 usb_submit_urb(dev->urb_intr, GFP_NOIO);
4058
4059 spin_lock_irq(&dev->txq.lock);
4060 while ((res = usb_get_from_anchor(&dev->deferred))) {
4061 skb = (struct sk_buff *)res->context;
4062 ret = usb_submit_urb(res, GFP_ATOMIC);
4063 if (ret < 0) {
4064 dev_kfree_skb_any(skb);
4065 usb_free_urb(res);
4066 usb_autopm_put_interface_async(dev->intf);
4067 } else {
4068 netif_trans_update(dev->net);
4069 lan78xx_queue_skb(&dev->txq, skb, tx_start);
4070 }
4071 }
4072
4073 clear_bit(EVENT_DEV_ASLEEP, &dev->flags);
4074 spin_unlock_irq(&dev->txq.lock);
4075
4076 if (test_bit(EVENT_DEV_OPEN, &dev->flags)) {
4077 if (!(skb_queue_len(&dev->txq) >= dev->tx_qlen))
4078 netif_start_queue(dev->net);
4079 tasklet_schedule(&dev->bh);
4080 }
4081 }
4082
4083 ret = lan78xx_write_reg(dev, WUCSR2, 0);
4084 ret = lan78xx_write_reg(dev, WUCSR, 0);
4085 ret = lan78xx_write_reg(dev, WK_SRC, 0xFFF1FF1FUL);
4086
4087 ret = lan78xx_write_reg(dev, WUCSR2, WUCSR2_NS_RCD_ |
4088 WUCSR2_ARP_RCD_ |
4089 WUCSR2_IPV6_TCPSYN_RCD_ |
4090 WUCSR2_IPV4_TCPSYN_RCD_);
4091
4092 ret = lan78xx_write_reg(dev, WUCSR, WUCSR_EEE_TX_WAKE_ |
4093 WUCSR_EEE_RX_WAKE_ |
4094 WUCSR_PFDA_FR_ |
4095 WUCSR_RFE_WAKE_FR_ |
4096 WUCSR_WUFR_ |
4097 WUCSR_MPR_ |
4098 WUCSR_BCST_FR_);
4099
4100 ret = lan78xx_read_reg(dev, MAC_TX, &buf);
4101 buf |= MAC_TX_TXEN_;
4102 ret = lan78xx_write_reg(dev, MAC_TX, buf);
4103
4104 return 0;
4105}
4106
4107static int lan78xx_reset_resume(struct usb_interface *intf)
4108{
4109 struct lan78xx_net *dev = usb_get_intfdata(intf);
4110
4111 lan78xx_reset(dev);
4112
4113 phy_start(dev->net->phydev);
4114
4115 return lan78xx_resume(intf);
4116}
4117
4118static const struct usb_device_id products[] = {
4119 {
4120 /* LAN7800 USB Gigabit Ethernet Device */
4121 USB_DEVICE(LAN78XX_USB_VENDOR_ID, LAN7800_USB_PRODUCT_ID),
4122 },
4123 {
4124 /* LAN7850 USB Gigabit Ethernet Device */
4125 USB_DEVICE(LAN78XX_USB_VENDOR_ID, LAN7850_USB_PRODUCT_ID),
4126 },
4127 {
4128 /* LAN7801 USB Gigabit Ethernet Device */
4129 USB_DEVICE(LAN78XX_USB_VENDOR_ID, LAN7801_USB_PRODUCT_ID),
4130 },
4131 {},
4132};
4133MODULE_DEVICE_TABLE(usb, products);
4134
4135static struct usb_driver lan78xx_driver = {
4136 .name = DRIVER_NAME,
4137 .id_table = products,
4138 .probe = lan78xx_probe,
4139 .disconnect = lan78xx_disconnect,
4140 .suspend = lan78xx_suspend,
4141 .resume = lan78xx_resume,
4142 .reset_resume = lan78xx_reset_resume,
4143 .supports_autosuspend = 1,
4144 .disable_hub_initiated_lpm = 1,
4145};
4146
4147module_usb_driver(lan78xx_driver);
4148
4149MODULE_AUTHOR(DRIVER_AUTHOR);
4150MODULE_DESCRIPTION(DRIVER_DESC);
4151MODULE_LICENSE("GPL");