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1/*
2 * SDHCI support for SiRF primaII and marco SoCs
3 *
4 * Copyright (c) 2011 Cambridge Silicon Radio Limited, a CSR plc group company.
5 *
6 * Licensed under GPLv2 or later.
7 */
8
9#include <linux/delay.h>
10#include <linux/device.h>
11#include <linux/mmc/host.h>
12#include <linux/module.h>
13#include <linux/of.h>
14#include <linux/of_gpio.h>
15#include <linux/mmc/slot-gpio.h>
16#include "sdhci-pltfm.h"
17
18struct sdhci_sirf_priv {
19 struct clk *clk;
20 int gpio_cd;
21};
22
23static unsigned int sdhci_sirf_get_max_clk(struct sdhci_host *host)
24{
25 struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
26 struct sdhci_sirf_priv *priv = sdhci_pltfm_priv(pltfm_host);
27 return clk_get_rate(priv->clk);
28}
29
30static struct sdhci_ops sdhci_sirf_ops = {
31 .get_max_clock = sdhci_sirf_get_max_clk,
32};
33
34static struct sdhci_pltfm_data sdhci_sirf_pdata = {
35 .ops = &sdhci_sirf_ops,
36 .quirks = SDHCI_QUIRK_BROKEN_TIMEOUT_VAL |
37 SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK |
38 SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN |
39 SDHCI_QUIRK_INVERTED_WRITE_PROTECT |
40 SDHCI_QUIRK_DELAY_AFTER_POWER,
41};
42
43static int sdhci_sirf_probe(struct platform_device *pdev)
44{
45 struct sdhci_host *host;
46 struct sdhci_pltfm_host *pltfm_host;
47 struct sdhci_sirf_priv *priv;
48 struct clk *clk;
49 int gpio_cd;
50 int ret;
51
52 clk = devm_clk_get(&pdev->dev, NULL);
53 if (IS_ERR(clk)) {
54 dev_err(&pdev->dev, "unable to get clock");
55 return PTR_ERR(clk);
56 }
57
58 if (pdev->dev.of_node)
59 gpio_cd = of_get_named_gpio(pdev->dev.of_node, "cd-gpios", 0);
60 else
61 gpio_cd = -EINVAL;
62
63 host = sdhci_pltfm_init(pdev, &sdhci_sirf_pdata, sizeof(struct sdhci_sirf_priv));
64 if (IS_ERR(host))
65 return PTR_ERR(host);
66
67 pltfm_host = sdhci_priv(host);
68 priv = sdhci_pltfm_priv(pltfm_host);
69 priv->clk = clk;
70 priv->gpio_cd = gpio_cd;
71
72 sdhci_get_of_property(pdev);
73
74 ret = clk_prepare_enable(priv->clk);
75 if (ret)
76 goto err_clk_prepare;
77
78 ret = sdhci_add_host(host);
79 if (ret)
80 goto err_sdhci_add;
81
82 /*
83 * We must request the IRQ after sdhci_add_host(), as the tasklet only
84 * gets setup in sdhci_add_host() and we oops.
85 */
86 if (gpio_is_valid(priv->gpio_cd)) {
87 ret = mmc_gpio_request_cd(host->mmc, priv->gpio_cd, 0);
88 if (ret) {
89 dev_err(&pdev->dev, "card detect irq request failed: %d\n",
90 ret);
91 goto err_request_cd;
92 }
93 }
94
95 return 0;
96
97err_request_cd:
98 sdhci_remove_host(host, 0);
99err_sdhci_add:
100 clk_disable_unprepare(priv->clk);
101err_clk_prepare:
102 sdhci_pltfm_free(pdev);
103 return ret;
104}
105
106static int sdhci_sirf_remove(struct platform_device *pdev)
107{
108 struct sdhci_host *host = platform_get_drvdata(pdev);
109 struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
110 struct sdhci_sirf_priv *priv = sdhci_pltfm_priv(pltfm_host);
111
112 sdhci_pltfm_unregister(pdev);
113
114 if (gpio_is_valid(priv->gpio_cd))
115 mmc_gpio_free_cd(host->mmc);
116
117 clk_disable_unprepare(priv->clk);
118 return 0;
119}
120
121#ifdef CONFIG_PM_SLEEP
122static int sdhci_sirf_suspend(struct device *dev)
123{
124 struct sdhci_host *host = dev_get_drvdata(dev);
125 struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
126 struct sdhci_sirf_priv *priv = sdhci_pltfm_priv(pltfm_host);
127 int ret;
128
129 ret = sdhci_suspend_host(host);
130 if (ret)
131 return ret;
132
133 clk_disable(priv->clk);
134
135 return 0;
136}
137
138static int sdhci_sirf_resume(struct device *dev)
139{
140 struct sdhci_host *host = dev_get_drvdata(dev);
141 struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
142 struct sdhci_sirf_priv *priv = sdhci_pltfm_priv(pltfm_host);
143 int ret;
144
145 ret = clk_enable(priv->clk);
146 if (ret) {
147 dev_dbg(dev, "Resume: Error enabling clock\n");
148 return ret;
149 }
150
151 return sdhci_resume_host(host);
152}
153
154static SIMPLE_DEV_PM_OPS(sdhci_sirf_pm_ops, sdhci_sirf_suspend, sdhci_sirf_resume);
155#endif
156
157static const struct of_device_id sdhci_sirf_of_match[] = {
158 { .compatible = "sirf,prima2-sdhc" },
159 { }
160};
161MODULE_DEVICE_TABLE(of, sdhci_sirf_of_match);
162
163static struct platform_driver sdhci_sirf_driver = {
164 .driver = {
165 .name = "sdhci-sirf",
166 .owner = THIS_MODULE,
167 .of_match_table = sdhci_sirf_of_match,
168#ifdef CONFIG_PM_SLEEP
169 .pm = &sdhci_sirf_pm_ops,
170#endif
171 },
172 .probe = sdhci_sirf_probe,
173 .remove = sdhci_sirf_remove,
174};
175
176module_platform_driver(sdhci_sirf_driver);
177
178MODULE_DESCRIPTION("SDHCI driver for SiRFprimaII/SiRFmarco");
179MODULE_AUTHOR("Barry Song <21cnbao@gmail.com>");
180MODULE_LICENSE("GPL v2");
1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * SDHCI support for SiRF primaII and marco SoCs
4 *
5 * Copyright (c) 2011 Cambridge Silicon Radio Limited, a CSR plc group company.
6 */
7
8#include <linux/delay.h>
9#include <linux/device.h>
10#include <linux/mmc/host.h>
11#include <linux/module.h>
12#include <linux/of.h>
13#include <linux/mmc/slot-gpio.h>
14#include "sdhci-pltfm.h"
15
16#define SDHCI_CLK_DELAY_SETTING 0x4C
17#define SDHCI_SIRF_8BITBUS BIT(3)
18#define SIRF_TUNING_COUNT 16384
19
20static void sdhci_sirf_set_bus_width(struct sdhci_host *host, int width)
21{
22 u8 ctrl;
23
24 ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL);
25 ctrl &= ~(SDHCI_CTRL_4BITBUS | SDHCI_SIRF_8BITBUS);
26
27 /*
28 * CSR atlas7 and prima2 SD host version is not 3.0
29 * 8bit-width enable bit of CSR SD hosts is 3,
30 * while stardard hosts use bit 5
31 */
32 if (width == MMC_BUS_WIDTH_8)
33 ctrl |= SDHCI_SIRF_8BITBUS;
34 else if (width == MMC_BUS_WIDTH_4)
35 ctrl |= SDHCI_CTRL_4BITBUS;
36
37 sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL);
38}
39
40static u32 sdhci_sirf_readl_le(struct sdhci_host *host, int reg)
41{
42 u32 val = readl(host->ioaddr + reg);
43
44 if (unlikely((reg == SDHCI_CAPABILITIES_1) &&
45 (host->mmc->caps & MMC_CAP_UHS_SDR50))) {
46 /* fake CAP_1 register */
47 val = SDHCI_SUPPORT_DDR50 |
48 SDHCI_SUPPORT_SDR50 | SDHCI_USE_SDR50_TUNING;
49 }
50
51 if (unlikely(reg == SDHCI_SLOT_INT_STATUS)) {
52 u32 prss = val;
53 /* fake chips as V3.0 host conreoller */
54 prss &= ~(0xFF << 16);
55 val = prss | (SDHCI_SPEC_300 << 16);
56 }
57 return val;
58}
59
60static u16 sdhci_sirf_readw_le(struct sdhci_host *host, int reg)
61{
62 u16 ret = 0;
63
64 ret = readw(host->ioaddr + reg);
65
66 if (unlikely(reg == SDHCI_HOST_VERSION)) {
67 ret = readw(host->ioaddr + SDHCI_HOST_VERSION);
68 ret |= SDHCI_SPEC_300;
69 }
70
71 return ret;
72}
73
74static int sdhci_sirf_execute_tuning(struct sdhci_host *host, u32 opcode)
75{
76 int tuning_seq_cnt = 3;
77 int phase;
78 u8 tuned_phase_cnt = 0;
79 int rc = 0, longest_range = 0;
80 int start = -1, end = 0, tuning_value = -1, range = 0;
81 u16 clock_setting;
82 struct mmc_host *mmc = host->mmc;
83
84 clock_setting = sdhci_readw(host, SDHCI_CLK_DELAY_SETTING);
85 clock_setting &= ~0x3fff;
86
87retry:
88 phase = 0;
89 tuned_phase_cnt = 0;
90 do {
91 sdhci_writel(host,
92 clock_setting | phase,
93 SDHCI_CLK_DELAY_SETTING);
94
95 if (!mmc_send_tuning(mmc, opcode, NULL)) {
96 /* Tuning is successful at this tuning point */
97 tuned_phase_cnt++;
98 dev_dbg(mmc_dev(mmc), "%s: Found good phase = %d\n",
99 mmc_hostname(mmc), phase);
100 if (start == -1)
101 start = phase;
102 end = phase;
103 range++;
104 if (phase == (SIRF_TUNING_COUNT - 1)
105 && range > longest_range)
106 tuning_value = (start + end) / 2;
107 } else {
108 dev_dbg(mmc_dev(mmc), "%s: Found bad phase = %d\n",
109 mmc_hostname(mmc), phase);
110 if (range > longest_range) {
111 tuning_value = (start + end) / 2;
112 longest_range = range;
113 }
114 start = -1;
115 end = range = 0;
116 }
117 } while (++phase < SIRF_TUNING_COUNT);
118
119 if (tuned_phase_cnt && tuning_value > 0) {
120 /*
121 * Finally set the selected phase in delay
122 * line hw block.
123 */
124 phase = tuning_value;
125 sdhci_writel(host,
126 clock_setting | phase,
127 SDHCI_CLK_DELAY_SETTING);
128
129 dev_dbg(mmc_dev(mmc), "%s: Setting the tuning phase to %d\n",
130 mmc_hostname(mmc), phase);
131 } else {
132 if (--tuning_seq_cnt)
133 goto retry;
134 /* Tuning failed */
135 dev_dbg(mmc_dev(mmc), "%s: No tuning point found\n",
136 mmc_hostname(mmc));
137 rc = -EIO;
138 }
139
140 return rc;
141}
142
143static const struct sdhci_ops sdhci_sirf_ops = {
144 .read_l = sdhci_sirf_readl_le,
145 .read_w = sdhci_sirf_readw_le,
146 .platform_execute_tuning = sdhci_sirf_execute_tuning,
147 .set_clock = sdhci_set_clock,
148 .get_max_clock = sdhci_pltfm_clk_get_max_clock,
149 .set_bus_width = sdhci_sirf_set_bus_width,
150 .reset = sdhci_reset,
151 .set_uhs_signaling = sdhci_set_uhs_signaling,
152};
153
154static const struct sdhci_pltfm_data sdhci_sirf_pdata = {
155 .ops = &sdhci_sirf_ops,
156 .quirks = SDHCI_QUIRK_BROKEN_TIMEOUT_VAL |
157 SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK |
158 SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN |
159 SDHCI_QUIRK_RESET_CMD_DATA_ON_IOS,
160 .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN,
161};
162
163static int sdhci_sirf_probe(struct platform_device *pdev)
164{
165 struct sdhci_host *host;
166 struct sdhci_pltfm_host *pltfm_host;
167 struct clk *clk;
168 int ret;
169
170 clk = devm_clk_get(&pdev->dev, NULL);
171 if (IS_ERR(clk)) {
172 dev_err(&pdev->dev, "unable to get clock");
173 return PTR_ERR(clk);
174 }
175
176 host = sdhci_pltfm_init(pdev, &sdhci_sirf_pdata, 0);
177 if (IS_ERR(host))
178 return PTR_ERR(host);
179
180 pltfm_host = sdhci_priv(host);
181 pltfm_host->clk = clk;
182
183 sdhci_get_of_property(pdev);
184
185 ret = clk_prepare_enable(pltfm_host->clk);
186 if (ret)
187 goto err_clk_prepare;
188
189 ret = sdhci_add_host(host);
190 if (ret)
191 goto err_sdhci_add;
192
193 /*
194 * We must request the IRQ after sdhci_add_host(), as the tasklet only
195 * gets setup in sdhci_add_host() and we oops.
196 */
197 ret = mmc_gpiod_request_cd(host->mmc, "cd", 0, false, 0);
198 if (ret == -EPROBE_DEFER)
199 goto err_request_cd;
200 if (!ret)
201 mmc_gpiod_request_cd_irq(host->mmc);
202
203 return 0;
204
205err_request_cd:
206 sdhci_remove_host(host, 0);
207err_sdhci_add:
208 clk_disable_unprepare(pltfm_host->clk);
209err_clk_prepare:
210 sdhci_pltfm_free(pdev);
211 return ret;
212}
213
214static const struct of_device_id sdhci_sirf_of_match[] = {
215 { .compatible = "sirf,prima2-sdhc" },
216 { }
217};
218MODULE_DEVICE_TABLE(of, sdhci_sirf_of_match);
219
220static struct platform_driver sdhci_sirf_driver = {
221 .driver = {
222 .name = "sdhci-sirf",
223 .of_match_table = sdhci_sirf_of_match,
224 .pm = &sdhci_pltfm_pmops,
225 },
226 .probe = sdhci_sirf_probe,
227 .remove = sdhci_pltfm_unregister,
228};
229
230module_platform_driver(sdhci_sirf_driver);
231
232MODULE_DESCRIPTION("SDHCI driver for SiRFprimaII/SiRFmarco");
233MODULE_AUTHOR("Barry Song <21cnbao@gmail.com>");
234MODULE_LICENSE("GPL v2");