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1/*
2 * udc.c - ChipIdea UDC driver
3 *
4 * Copyright (C) 2008 Chipidea - MIPS Technologies, Inc. All rights reserved.
5 *
6 * Author: David Lopo
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#include <linux/delay.h>
14#include <linux/device.h>
15#include <linux/dmapool.h>
16#include <linux/err.h>
17#include <linux/irqreturn.h>
18#include <linux/kernel.h>
19#include <linux/slab.h>
20#include <linux/pm_runtime.h>
21#include <linux/usb/ch9.h>
22#include <linux/usb/gadget.h>
23#include <linux/usb/chipidea.h>
24
25#include "ci.h"
26#include "udc.h"
27#include "bits.h"
28#include "debug.h"
29#include "otg.h"
30
31/* control endpoint description */
32static const struct usb_endpoint_descriptor
33ctrl_endpt_out_desc = {
34 .bLength = USB_DT_ENDPOINT_SIZE,
35 .bDescriptorType = USB_DT_ENDPOINT,
36
37 .bEndpointAddress = USB_DIR_OUT,
38 .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
39 .wMaxPacketSize = cpu_to_le16(CTRL_PAYLOAD_MAX),
40};
41
42static const struct usb_endpoint_descriptor
43ctrl_endpt_in_desc = {
44 .bLength = USB_DT_ENDPOINT_SIZE,
45 .bDescriptorType = USB_DT_ENDPOINT,
46
47 .bEndpointAddress = USB_DIR_IN,
48 .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
49 .wMaxPacketSize = cpu_to_le16(CTRL_PAYLOAD_MAX),
50};
51
52/**
53 * hw_ep_bit: calculates the bit number
54 * @num: endpoint number
55 * @dir: endpoint direction
56 *
57 * This function returns bit number
58 */
59static inline int hw_ep_bit(int num, int dir)
60{
61 return num + (dir ? 16 : 0);
62}
63
64static inline int ep_to_bit(struct ci_hdrc *ci, int n)
65{
66 int fill = 16 - ci->hw_ep_max / 2;
67
68 if (n >= ci->hw_ep_max / 2)
69 n += fill;
70
71 return n;
72}
73
74/**
75 * hw_device_state: enables/disables interrupts (execute without interruption)
76 * @dma: 0 => disable, !0 => enable and set dma engine
77 *
78 * This function returns an error code
79 */
80static int hw_device_state(struct ci_hdrc *ci, u32 dma)
81{
82 if (dma) {
83 hw_write(ci, OP_ENDPTLISTADDR, ~0, dma);
84 /* interrupt, error, port change, reset, sleep/suspend */
85 hw_write(ci, OP_USBINTR, ~0,
86 USBi_UI|USBi_UEI|USBi_PCI|USBi_URI|USBi_SLI);
87 hw_write(ci, OP_USBCMD, USBCMD_RS, USBCMD_RS);
88 } else {
89 hw_write(ci, OP_USBINTR, ~0, 0);
90 hw_write(ci, OP_USBCMD, USBCMD_RS, 0);
91 }
92 return 0;
93}
94
95/**
96 * hw_ep_flush: flush endpoint fifo (execute without interruption)
97 * @num: endpoint number
98 * @dir: endpoint direction
99 *
100 * This function returns an error code
101 */
102static int hw_ep_flush(struct ci_hdrc *ci, int num, int dir)
103{
104 int n = hw_ep_bit(num, dir);
105
106 do {
107 /* flush any pending transfer */
108 hw_write(ci, OP_ENDPTFLUSH, ~0, BIT(n));
109 while (hw_read(ci, OP_ENDPTFLUSH, BIT(n)))
110 cpu_relax();
111 } while (hw_read(ci, OP_ENDPTSTAT, BIT(n)));
112
113 return 0;
114}
115
116/**
117 * hw_ep_disable: disables endpoint (execute without interruption)
118 * @num: endpoint number
119 * @dir: endpoint direction
120 *
121 * This function returns an error code
122 */
123static int hw_ep_disable(struct ci_hdrc *ci, int num, int dir)
124{
125 hw_ep_flush(ci, num, dir);
126 hw_write(ci, OP_ENDPTCTRL + num,
127 dir ? ENDPTCTRL_TXE : ENDPTCTRL_RXE, 0);
128 return 0;
129}
130
131/**
132 * hw_ep_enable: enables endpoint (execute without interruption)
133 * @num: endpoint number
134 * @dir: endpoint direction
135 * @type: endpoint type
136 *
137 * This function returns an error code
138 */
139static int hw_ep_enable(struct ci_hdrc *ci, int num, int dir, int type)
140{
141 u32 mask, data;
142
143 if (dir) {
144 mask = ENDPTCTRL_TXT; /* type */
145 data = type << __ffs(mask);
146
147 mask |= ENDPTCTRL_TXS; /* unstall */
148 mask |= ENDPTCTRL_TXR; /* reset data toggle */
149 data |= ENDPTCTRL_TXR;
150 mask |= ENDPTCTRL_TXE; /* enable */
151 data |= ENDPTCTRL_TXE;
152 } else {
153 mask = ENDPTCTRL_RXT; /* type */
154 data = type << __ffs(mask);
155
156 mask |= ENDPTCTRL_RXS; /* unstall */
157 mask |= ENDPTCTRL_RXR; /* reset data toggle */
158 data |= ENDPTCTRL_RXR;
159 mask |= ENDPTCTRL_RXE; /* enable */
160 data |= ENDPTCTRL_RXE;
161 }
162 hw_write(ci, OP_ENDPTCTRL + num, mask, data);
163 return 0;
164}
165
166/**
167 * hw_ep_get_halt: return endpoint halt status
168 * @num: endpoint number
169 * @dir: endpoint direction
170 *
171 * This function returns 1 if endpoint halted
172 */
173static int hw_ep_get_halt(struct ci_hdrc *ci, int num, int dir)
174{
175 u32 mask = dir ? ENDPTCTRL_TXS : ENDPTCTRL_RXS;
176
177 return hw_read(ci, OP_ENDPTCTRL + num, mask) ? 1 : 0;
178}
179
180/**
181 * hw_ep_prime: primes endpoint (execute without interruption)
182 * @num: endpoint number
183 * @dir: endpoint direction
184 * @is_ctrl: true if control endpoint
185 *
186 * This function returns an error code
187 */
188static int hw_ep_prime(struct ci_hdrc *ci, int num, int dir, int is_ctrl)
189{
190 int n = hw_ep_bit(num, dir);
191
192 if (is_ctrl && dir == RX && hw_read(ci, OP_ENDPTSETUPSTAT, BIT(num)))
193 return -EAGAIN;
194
195 hw_write(ci, OP_ENDPTPRIME, ~0, BIT(n));
196
197 while (hw_read(ci, OP_ENDPTPRIME, BIT(n)))
198 cpu_relax();
199 if (is_ctrl && dir == RX && hw_read(ci, OP_ENDPTSETUPSTAT, BIT(num)))
200 return -EAGAIN;
201
202 /* status shoult be tested according with manual but it doesn't work */
203 return 0;
204}
205
206/**
207 * hw_ep_set_halt: configures ep halt & resets data toggle after clear (execute
208 * without interruption)
209 * @num: endpoint number
210 * @dir: endpoint direction
211 * @value: true => stall, false => unstall
212 *
213 * This function returns an error code
214 */
215static int hw_ep_set_halt(struct ci_hdrc *ci, int num, int dir, int value)
216{
217 if (value != 0 && value != 1)
218 return -EINVAL;
219
220 do {
221 enum ci_hw_regs reg = OP_ENDPTCTRL + num;
222 u32 mask_xs = dir ? ENDPTCTRL_TXS : ENDPTCTRL_RXS;
223 u32 mask_xr = dir ? ENDPTCTRL_TXR : ENDPTCTRL_RXR;
224
225 /* data toggle - reserved for EP0 but it's in ESS */
226 hw_write(ci, reg, mask_xs|mask_xr,
227 value ? mask_xs : mask_xr);
228 } while (value != hw_ep_get_halt(ci, num, dir));
229
230 return 0;
231}
232
233/**
234 * hw_is_port_high_speed: test if port is high speed
235 *
236 * This function returns true if high speed port
237 */
238static int hw_port_is_high_speed(struct ci_hdrc *ci)
239{
240 return ci->hw_bank.lpm ? hw_read(ci, OP_DEVLC, DEVLC_PSPD) :
241 hw_read(ci, OP_PORTSC, PORTSC_HSP);
242}
243
244/**
245 * hw_read_intr_enable: returns interrupt enable register
246 *
247 * This function returns register data
248 */
249static u32 hw_read_intr_enable(struct ci_hdrc *ci)
250{
251 return hw_read(ci, OP_USBINTR, ~0);
252}
253
254/**
255 * hw_read_intr_status: returns interrupt status register
256 *
257 * This function returns register data
258 */
259static u32 hw_read_intr_status(struct ci_hdrc *ci)
260{
261 return hw_read(ci, OP_USBSTS, ~0);
262}
263
264/**
265 * hw_test_and_clear_complete: test & clear complete status (execute without
266 * interruption)
267 * @n: endpoint number
268 *
269 * This function returns complete status
270 */
271static int hw_test_and_clear_complete(struct ci_hdrc *ci, int n)
272{
273 n = ep_to_bit(ci, n);
274 return hw_test_and_clear(ci, OP_ENDPTCOMPLETE, BIT(n));
275}
276
277/**
278 * hw_test_and_clear_intr_active: test & clear active interrupts (execute
279 * without interruption)
280 *
281 * This function returns active interrutps
282 */
283static u32 hw_test_and_clear_intr_active(struct ci_hdrc *ci)
284{
285 u32 reg = hw_read_intr_status(ci) & hw_read_intr_enable(ci);
286
287 hw_write(ci, OP_USBSTS, ~0, reg);
288 return reg;
289}
290
291/**
292 * hw_test_and_clear_setup_guard: test & clear setup guard (execute without
293 * interruption)
294 *
295 * This function returns guard value
296 */
297static int hw_test_and_clear_setup_guard(struct ci_hdrc *ci)
298{
299 return hw_test_and_write(ci, OP_USBCMD, USBCMD_SUTW, 0);
300}
301
302/**
303 * hw_test_and_set_setup_guard: test & set setup guard (execute without
304 * interruption)
305 *
306 * This function returns guard value
307 */
308static int hw_test_and_set_setup_guard(struct ci_hdrc *ci)
309{
310 return hw_test_and_write(ci, OP_USBCMD, USBCMD_SUTW, USBCMD_SUTW);
311}
312
313/**
314 * hw_usb_set_address: configures USB address (execute without interruption)
315 * @value: new USB address
316 *
317 * This function explicitly sets the address, without the "USBADRA" (advance)
318 * feature, which is not supported by older versions of the controller.
319 */
320static void hw_usb_set_address(struct ci_hdrc *ci, u8 value)
321{
322 hw_write(ci, OP_DEVICEADDR, DEVICEADDR_USBADR,
323 value << __ffs(DEVICEADDR_USBADR));
324}
325
326/**
327 * hw_usb_reset: restart device after a bus reset (execute without
328 * interruption)
329 *
330 * This function returns an error code
331 */
332static int hw_usb_reset(struct ci_hdrc *ci)
333{
334 hw_usb_set_address(ci, 0);
335
336 /* ESS flushes only at end?!? */
337 hw_write(ci, OP_ENDPTFLUSH, ~0, ~0);
338
339 /* clear setup token semaphores */
340 hw_write(ci, OP_ENDPTSETUPSTAT, 0, 0);
341
342 /* clear complete status */
343 hw_write(ci, OP_ENDPTCOMPLETE, 0, 0);
344
345 /* wait until all bits cleared */
346 while (hw_read(ci, OP_ENDPTPRIME, ~0))
347 udelay(10); /* not RTOS friendly */
348
349 /* reset all endpoints ? */
350
351 /* reset internal status and wait for further instructions
352 no need to verify the port reset status (ESS does it) */
353
354 return 0;
355}
356
357/******************************************************************************
358 * UTIL block
359 *****************************************************************************/
360
361static int add_td_to_list(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq,
362 unsigned length)
363{
364 int i;
365 u32 temp;
366 struct td_node *lastnode, *node = kzalloc(sizeof(struct td_node),
367 GFP_ATOMIC);
368
369 if (node == NULL)
370 return -ENOMEM;
371
372 node->ptr = dma_pool_alloc(hwep->td_pool, GFP_ATOMIC,
373 &node->dma);
374 if (node->ptr == NULL) {
375 kfree(node);
376 return -ENOMEM;
377 }
378
379 memset(node->ptr, 0, sizeof(struct ci_hw_td));
380 node->ptr->token = cpu_to_le32(length << __ffs(TD_TOTAL_BYTES));
381 node->ptr->token &= cpu_to_le32(TD_TOTAL_BYTES);
382 node->ptr->token |= cpu_to_le32(TD_STATUS_ACTIVE);
383 if (hwep->type == USB_ENDPOINT_XFER_ISOC && hwep->dir == TX) {
384 u32 mul = hwreq->req.length / hwep->ep.maxpacket;
385
386 if (hwreq->req.length == 0
387 || hwreq->req.length % hwep->ep.maxpacket)
388 mul++;
389 node->ptr->token |= mul << __ffs(TD_MULTO);
390 }
391
392 temp = (u32) (hwreq->req.dma + hwreq->req.actual);
393 if (length) {
394 node->ptr->page[0] = cpu_to_le32(temp);
395 for (i = 1; i < TD_PAGE_COUNT; i++) {
396 u32 page = temp + i * CI_HDRC_PAGE_SIZE;
397 page &= ~TD_RESERVED_MASK;
398 node->ptr->page[i] = cpu_to_le32(page);
399 }
400 }
401
402 hwreq->req.actual += length;
403
404 if (!list_empty(&hwreq->tds)) {
405 /* get the last entry */
406 lastnode = list_entry(hwreq->tds.prev,
407 struct td_node, td);
408 lastnode->ptr->next = cpu_to_le32(node->dma);
409 }
410
411 INIT_LIST_HEAD(&node->td);
412 list_add_tail(&node->td, &hwreq->tds);
413
414 return 0;
415}
416
417/**
418 * _usb_addr: calculates endpoint address from direction & number
419 * @ep: endpoint
420 */
421static inline u8 _usb_addr(struct ci_hw_ep *ep)
422{
423 return ((ep->dir == TX) ? USB_ENDPOINT_DIR_MASK : 0) | ep->num;
424}
425
426/**
427 * _hardware_queue: configures a request at hardware level
428 * @gadget: gadget
429 * @hwep: endpoint
430 *
431 * This function returns an error code
432 */
433static int _hardware_enqueue(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq)
434{
435 struct ci_hdrc *ci = hwep->ci;
436 int ret = 0;
437 unsigned rest = hwreq->req.length;
438 int pages = TD_PAGE_COUNT;
439 struct td_node *firstnode, *lastnode;
440
441 /* don't queue twice */
442 if (hwreq->req.status == -EALREADY)
443 return -EALREADY;
444
445 hwreq->req.status = -EALREADY;
446
447 ret = usb_gadget_map_request(&ci->gadget, &hwreq->req, hwep->dir);
448 if (ret)
449 return ret;
450
451 /*
452 * The first buffer could be not page aligned.
453 * In that case we have to span into one extra td.
454 */
455 if (hwreq->req.dma % PAGE_SIZE)
456 pages--;
457
458 if (rest == 0)
459 add_td_to_list(hwep, hwreq, 0);
460
461 while (rest > 0) {
462 unsigned count = min(hwreq->req.length - hwreq->req.actual,
463 (unsigned)(pages * CI_HDRC_PAGE_SIZE));
464 add_td_to_list(hwep, hwreq, count);
465 rest -= count;
466 }
467
468 if (hwreq->req.zero && hwreq->req.length
469 && (hwreq->req.length % hwep->ep.maxpacket == 0))
470 add_td_to_list(hwep, hwreq, 0);
471
472 firstnode = list_first_entry(&hwreq->tds, struct td_node, td);
473
474 lastnode = list_entry(hwreq->tds.prev,
475 struct td_node, td);
476
477 lastnode->ptr->next = cpu_to_le32(TD_TERMINATE);
478 if (!hwreq->req.no_interrupt)
479 lastnode->ptr->token |= cpu_to_le32(TD_IOC);
480 wmb();
481
482 hwreq->req.actual = 0;
483 if (!list_empty(&hwep->qh.queue)) {
484 struct ci_hw_req *hwreqprev;
485 int n = hw_ep_bit(hwep->num, hwep->dir);
486 int tmp_stat;
487 struct td_node *prevlastnode;
488 u32 next = firstnode->dma & TD_ADDR_MASK;
489
490 hwreqprev = list_entry(hwep->qh.queue.prev,
491 struct ci_hw_req, queue);
492 prevlastnode = list_entry(hwreqprev->tds.prev,
493 struct td_node, td);
494
495 prevlastnode->ptr->next = cpu_to_le32(next);
496 wmb();
497 if (hw_read(ci, OP_ENDPTPRIME, BIT(n)))
498 goto done;
499 do {
500 hw_write(ci, OP_USBCMD, USBCMD_ATDTW, USBCMD_ATDTW);
501 tmp_stat = hw_read(ci, OP_ENDPTSTAT, BIT(n));
502 } while (!hw_read(ci, OP_USBCMD, USBCMD_ATDTW));
503 hw_write(ci, OP_USBCMD, USBCMD_ATDTW, 0);
504 if (tmp_stat)
505 goto done;
506 }
507
508 /* QH configuration */
509 hwep->qh.ptr->td.next = cpu_to_le32(firstnode->dma);
510 hwep->qh.ptr->td.token &=
511 cpu_to_le32(~(TD_STATUS_HALTED|TD_STATUS_ACTIVE));
512
513 if (hwep->type == USB_ENDPOINT_XFER_ISOC && hwep->dir == RX) {
514 u32 mul = hwreq->req.length / hwep->ep.maxpacket;
515
516 if (hwreq->req.length == 0
517 || hwreq->req.length % hwep->ep.maxpacket)
518 mul++;
519 hwep->qh.ptr->cap |= mul << __ffs(QH_MULT);
520 }
521
522 wmb(); /* synchronize before ep prime */
523
524 ret = hw_ep_prime(ci, hwep->num, hwep->dir,
525 hwep->type == USB_ENDPOINT_XFER_CONTROL);
526done:
527 return ret;
528}
529
530/*
531 * free_pending_td: remove a pending request for the endpoint
532 * @hwep: endpoint
533 */
534static void free_pending_td(struct ci_hw_ep *hwep)
535{
536 struct td_node *pending = hwep->pending_td;
537
538 dma_pool_free(hwep->td_pool, pending->ptr, pending->dma);
539 hwep->pending_td = NULL;
540 kfree(pending);
541}
542
543/**
544 * _hardware_dequeue: handles a request at hardware level
545 * @gadget: gadget
546 * @hwep: endpoint
547 *
548 * This function returns an error code
549 */
550static int _hardware_dequeue(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq)
551{
552 u32 tmptoken;
553 struct td_node *node, *tmpnode;
554 unsigned remaining_length;
555 unsigned actual = hwreq->req.length;
556
557 if (hwreq->req.status != -EALREADY)
558 return -EINVAL;
559
560 hwreq->req.status = 0;
561
562 list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
563 tmptoken = le32_to_cpu(node->ptr->token);
564 if ((TD_STATUS_ACTIVE & tmptoken) != 0) {
565 hwreq->req.status = -EALREADY;
566 return -EBUSY;
567 }
568
569 remaining_length = (tmptoken & TD_TOTAL_BYTES);
570 remaining_length >>= __ffs(TD_TOTAL_BYTES);
571 actual -= remaining_length;
572
573 hwreq->req.status = tmptoken & TD_STATUS;
574 if ((TD_STATUS_HALTED & hwreq->req.status)) {
575 hwreq->req.status = -EPIPE;
576 break;
577 } else if ((TD_STATUS_DT_ERR & hwreq->req.status)) {
578 hwreq->req.status = -EPROTO;
579 break;
580 } else if ((TD_STATUS_TR_ERR & hwreq->req.status)) {
581 hwreq->req.status = -EILSEQ;
582 break;
583 }
584
585 if (remaining_length) {
586 if (hwep->dir) {
587 hwreq->req.status = -EPROTO;
588 break;
589 }
590 }
591 /*
592 * As the hardware could still address the freed td
593 * which will run the udc unusable, the cleanup of the
594 * td has to be delayed by one.
595 */
596 if (hwep->pending_td)
597 free_pending_td(hwep);
598
599 hwep->pending_td = node;
600 list_del_init(&node->td);
601 }
602
603 usb_gadget_unmap_request(&hwep->ci->gadget, &hwreq->req, hwep->dir);
604
605 hwreq->req.actual += actual;
606
607 if (hwreq->req.status)
608 return hwreq->req.status;
609
610 return hwreq->req.actual;
611}
612
613/**
614 * _ep_nuke: dequeues all endpoint requests
615 * @hwep: endpoint
616 *
617 * This function returns an error code
618 * Caller must hold lock
619 */
620static int _ep_nuke(struct ci_hw_ep *hwep)
621__releases(hwep->lock)
622__acquires(hwep->lock)
623{
624 struct td_node *node, *tmpnode;
625 if (hwep == NULL)
626 return -EINVAL;
627
628 hw_ep_flush(hwep->ci, hwep->num, hwep->dir);
629
630 while (!list_empty(&hwep->qh.queue)) {
631
632 /* pop oldest request */
633 struct ci_hw_req *hwreq = list_entry(hwep->qh.queue.next,
634 struct ci_hw_req, queue);
635
636 list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
637 dma_pool_free(hwep->td_pool, node->ptr, node->dma);
638 list_del_init(&node->td);
639 node->ptr = NULL;
640 kfree(node);
641 }
642
643 list_del_init(&hwreq->queue);
644 hwreq->req.status = -ESHUTDOWN;
645
646 if (hwreq->req.complete != NULL) {
647 spin_unlock(hwep->lock);
648 hwreq->req.complete(&hwep->ep, &hwreq->req);
649 spin_lock(hwep->lock);
650 }
651 }
652
653 if (hwep->pending_td)
654 free_pending_td(hwep);
655
656 return 0;
657}
658
659/**
660 * _gadget_stop_activity: stops all USB activity, flushes & disables all endpts
661 * @gadget: gadget
662 *
663 * This function returns an error code
664 */
665static int _gadget_stop_activity(struct usb_gadget *gadget)
666{
667 struct usb_ep *ep;
668 struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget);
669 unsigned long flags;
670
671 spin_lock_irqsave(&ci->lock, flags);
672 ci->gadget.speed = USB_SPEED_UNKNOWN;
673 ci->remote_wakeup = 0;
674 ci->suspended = 0;
675 spin_unlock_irqrestore(&ci->lock, flags);
676
677 /* flush all endpoints */
678 gadget_for_each_ep(ep, gadget) {
679 usb_ep_fifo_flush(ep);
680 }
681 usb_ep_fifo_flush(&ci->ep0out->ep);
682 usb_ep_fifo_flush(&ci->ep0in->ep);
683
684 /* make sure to disable all endpoints */
685 gadget_for_each_ep(ep, gadget) {
686 usb_ep_disable(ep);
687 }
688
689 if (ci->status != NULL) {
690 usb_ep_free_request(&ci->ep0in->ep, ci->status);
691 ci->status = NULL;
692 }
693
694 return 0;
695}
696
697/******************************************************************************
698 * ISR block
699 *****************************************************************************/
700/**
701 * isr_reset_handler: USB reset interrupt handler
702 * @ci: UDC device
703 *
704 * This function resets USB engine after a bus reset occurred
705 */
706static void isr_reset_handler(struct ci_hdrc *ci)
707__releases(ci->lock)
708__acquires(ci->lock)
709{
710 int retval;
711
712 spin_unlock(&ci->lock);
713 if (ci->gadget.speed != USB_SPEED_UNKNOWN) {
714 if (ci->driver)
715 ci->driver->disconnect(&ci->gadget);
716 }
717
718 retval = _gadget_stop_activity(&ci->gadget);
719 if (retval)
720 goto done;
721
722 retval = hw_usb_reset(ci);
723 if (retval)
724 goto done;
725
726 ci->status = usb_ep_alloc_request(&ci->ep0in->ep, GFP_ATOMIC);
727 if (ci->status == NULL)
728 retval = -ENOMEM;
729
730done:
731 spin_lock(&ci->lock);
732
733 if (retval)
734 dev_err(ci->dev, "error: %i\n", retval);
735}
736
737/**
738 * isr_get_status_complete: get_status request complete function
739 * @ep: endpoint
740 * @req: request handled
741 *
742 * Caller must release lock
743 */
744static void isr_get_status_complete(struct usb_ep *ep, struct usb_request *req)
745{
746 if (ep == NULL || req == NULL)
747 return;
748
749 kfree(req->buf);
750 usb_ep_free_request(ep, req);
751}
752
753/**
754 * _ep_queue: queues (submits) an I/O request to an endpoint
755 *
756 * Caller must hold lock
757 */
758static int _ep_queue(struct usb_ep *ep, struct usb_request *req,
759 gfp_t __maybe_unused gfp_flags)
760{
761 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
762 struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req);
763 struct ci_hdrc *ci = hwep->ci;
764 int retval = 0;
765
766 if (ep == NULL || req == NULL || hwep->ep.desc == NULL)
767 return -EINVAL;
768
769 if (hwep->type == USB_ENDPOINT_XFER_CONTROL) {
770 if (req->length)
771 hwep = (ci->ep0_dir == RX) ?
772 ci->ep0out : ci->ep0in;
773 if (!list_empty(&hwep->qh.queue)) {
774 _ep_nuke(hwep);
775 retval = -EOVERFLOW;
776 dev_warn(hwep->ci->dev, "endpoint ctrl %X nuked\n",
777 _usb_addr(hwep));
778 }
779 }
780
781 if (usb_endpoint_xfer_isoc(hwep->ep.desc) &&
782 hwreq->req.length > (1 + hwep->ep.mult) * hwep->ep.maxpacket) {
783 dev_err(hwep->ci->dev, "request length too big for isochronous\n");
784 return -EMSGSIZE;
785 }
786
787 /* first nuke then test link, e.g. previous status has not sent */
788 if (!list_empty(&hwreq->queue)) {
789 dev_err(hwep->ci->dev, "request already in queue\n");
790 return -EBUSY;
791 }
792
793 /* push request */
794 hwreq->req.status = -EINPROGRESS;
795 hwreq->req.actual = 0;
796
797 retval = _hardware_enqueue(hwep, hwreq);
798
799 if (retval == -EALREADY)
800 retval = 0;
801 if (!retval)
802 list_add_tail(&hwreq->queue, &hwep->qh.queue);
803
804 return retval;
805}
806
807/**
808 * isr_get_status_response: get_status request response
809 * @ci: ci struct
810 * @setup: setup request packet
811 *
812 * This function returns an error code
813 */
814static int isr_get_status_response(struct ci_hdrc *ci,
815 struct usb_ctrlrequest *setup)
816__releases(hwep->lock)
817__acquires(hwep->lock)
818{
819 struct ci_hw_ep *hwep = ci->ep0in;
820 struct usb_request *req = NULL;
821 gfp_t gfp_flags = GFP_ATOMIC;
822 int dir, num, retval;
823
824 if (hwep == NULL || setup == NULL)
825 return -EINVAL;
826
827 spin_unlock(hwep->lock);
828 req = usb_ep_alloc_request(&hwep->ep, gfp_flags);
829 spin_lock(hwep->lock);
830 if (req == NULL)
831 return -ENOMEM;
832
833 req->complete = isr_get_status_complete;
834 req->length = 2;
835 req->buf = kzalloc(req->length, gfp_flags);
836 if (req->buf == NULL) {
837 retval = -ENOMEM;
838 goto err_free_req;
839 }
840
841 if ((setup->bRequestType & USB_RECIP_MASK) == USB_RECIP_DEVICE) {
842 /* Assume that device is bus powered for now. */
843 *(u16 *)req->buf = ci->remote_wakeup << 1;
844 retval = 0;
845 } else if ((setup->bRequestType & USB_RECIP_MASK) \
846 == USB_RECIP_ENDPOINT) {
847 dir = (le16_to_cpu(setup->wIndex) & USB_ENDPOINT_DIR_MASK) ?
848 TX : RX;
849 num = le16_to_cpu(setup->wIndex) & USB_ENDPOINT_NUMBER_MASK;
850 *(u16 *)req->buf = hw_ep_get_halt(ci, num, dir);
851 }
852 /* else do nothing; reserved for future use */
853
854 retval = _ep_queue(&hwep->ep, req, gfp_flags);
855 if (retval)
856 goto err_free_buf;
857
858 return 0;
859
860 err_free_buf:
861 kfree(req->buf);
862 err_free_req:
863 spin_unlock(hwep->lock);
864 usb_ep_free_request(&hwep->ep, req);
865 spin_lock(hwep->lock);
866 return retval;
867}
868
869/**
870 * isr_setup_status_complete: setup_status request complete function
871 * @ep: endpoint
872 * @req: request handled
873 *
874 * Caller must release lock. Put the port in test mode if test mode
875 * feature is selected.
876 */
877static void
878isr_setup_status_complete(struct usb_ep *ep, struct usb_request *req)
879{
880 struct ci_hdrc *ci = req->context;
881 unsigned long flags;
882
883 if (ci->setaddr) {
884 hw_usb_set_address(ci, ci->address);
885 ci->setaddr = false;
886 }
887
888 spin_lock_irqsave(&ci->lock, flags);
889 if (ci->test_mode)
890 hw_port_test_set(ci, ci->test_mode);
891 spin_unlock_irqrestore(&ci->lock, flags);
892}
893
894/**
895 * isr_setup_status_phase: queues the status phase of a setup transation
896 * @ci: ci struct
897 *
898 * This function returns an error code
899 */
900static int isr_setup_status_phase(struct ci_hdrc *ci)
901{
902 int retval;
903 struct ci_hw_ep *hwep;
904
905 hwep = (ci->ep0_dir == TX) ? ci->ep0out : ci->ep0in;
906 ci->status->context = ci;
907 ci->status->complete = isr_setup_status_complete;
908
909 retval = _ep_queue(&hwep->ep, ci->status, GFP_ATOMIC);
910
911 return retval;
912}
913
914/**
915 * isr_tr_complete_low: transaction complete low level handler
916 * @hwep: endpoint
917 *
918 * This function returns an error code
919 * Caller must hold lock
920 */
921static int isr_tr_complete_low(struct ci_hw_ep *hwep)
922__releases(hwep->lock)
923__acquires(hwep->lock)
924{
925 struct ci_hw_req *hwreq, *hwreqtemp;
926 struct ci_hw_ep *hweptemp = hwep;
927 int retval = 0;
928
929 list_for_each_entry_safe(hwreq, hwreqtemp, &hwep->qh.queue,
930 queue) {
931 retval = _hardware_dequeue(hwep, hwreq);
932 if (retval < 0)
933 break;
934 list_del_init(&hwreq->queue);
935 if (hwreq->req.complete != NULL) {
936 spin_unlock(hwep->lock);
937 if ((hwep->type == USB_ENDPOINT_XFER_CONTROL) &&
938 hwreq->req.length)
939 hweptemp = hwep->ci->ep0in;
940 hwreq->req.complete(&hweptemp->ep, &hwreq->req);
941 spin_lock(hwep->lock);
942 }
943 }
944
945 if (retval == -EBUSY)
946 retval = 0;
947
948 return retval;
949}
950
951/**
952 * isr_setup_packet_handler: setup packet handler
953 * @ci: UDC descriptor
954 *
955 * This function handles setup packet
956 */
957static void isr_setup_packet_handler(struct ci_hdrc *ci)
958__releases(ci->lock)
959__acquires(ci->lock)
960{
961 struct ci_hw_ep *hwep = &ci->ci_hw_ep[0];
962 struct usb_ctrlrequest req;
963 int type, num, dir, err = -EINVAL;
964 u8 tmode = 0;
965
966 /*
967 * Flush data and handshake transactions of previous
968 * setup packet.
969 */
970 _ep_nuke(ci->ep0out);
971 _ep_nuke(ci->ep0in);
972
973 /* read_setup_packet */
974 do {
975 hw_test_and_set_setup_guard(ci);
976 memcpy(&req, &hwep->qh.ptr->setup, sizeof(req));
977 } while (!hw_test_and_clear_setup_guard(ci));
978
979 type = req.bRequestType;
980
981 ci->ep0_dir = (type & USB_DIR_IN) ? TX : RX;
982
983 switch (req.bRequest) {
984 case USB_REQ_CLEAR_FEATURE:
985 if (type == (USB_DIR_OUT|USB_RECIP_ENDPOINT) &&
986 le16_to_cpu(req.wValue) ==
987 USB_ENDPOINT_HALT) {
988 if (req.wLength != 0)
989 break;
990 num = le16_to_cpu(req.wIndex);
991 dir = num & USB_ENDPOINT_DIR_MASK;
992 num &= USB_ENDPOINT_NUMBER_MASK;
993 if (dir) /* TX */
994 num += ci->hw_ep_max / 2;
995 if (!ci->ci_hw_ep[num].wedge) {
996 spin_unlock(&ci->lock);
997 err = usb_ep_clear_halt(
998 &ci->ci_hw_ep[num].ep);
999 spin_lock(&ci->lock);
1000 if (err)
1001 break;
1002 }
1003 err = isr_setup_status_phase(ci);
1004 } else if (type == (USB_DIR_OUT|USB_RECIP_DEVICE) &&
1005 le16_to_cpu(req.wValue) ==
1006 USB_DEVICE_REMOTE_WAKEUP) {
1007 if (req.wLength != 0)
1008 break;
1009 ci->remote_wakeup = 0;
1010 err = isr_setup_status_phase(ci);
1011 } else {
1012 goto delegate;
1013 }
1014 break;
1015 case USB_REQ_GET_STATUS:
1016 if (type != (USB_DIR_IN|USB_RECIP_DEVICE) &&
1017 type != (USB_DIR_IN|USB_RECIP_ENDPOINT) &&
1018 type != (USB_DIR_IN|USB_RECIP_INTERFACE))
1019 goto delegate;
1020 if (le16_to_cpu(req.wLength) != 2 ||
1021 le16_to_cpu(req.wValue) != 0)
1022 break;
1023 err = isr_get_status_response(ci, &req);
1024 break;
1025 case USB_REQ_SET_ADDRESS:
1026 if (type != (USB_DIR_OUT|USB_RECIP_DEVICE))
1027 goto delegate;
1028 if (le16_to_cpu(req.wLength) != 0 ||
1029 le16_to_cpu(req.wIndex) != 0)
1030 break;
1031 ci->address = (u8)le16_to_cpu(req.wValue);
1032 ci->setaddr = true;
1033 err = isr_setup_status_phase(ci);
1034 break;
1035 case USB_REQ_SET_FEATURE:
1036 if (type == (USB_DIR_OUT|USB_RECIP_ENDPOINT) &&
1037 le16_to_cpu(req.wValue) ==
1038 USB_ENDPOINT_HALT) {
1039 if (req.wLength != 0)
1040 break;
1041 num = le16_to_cpu(req.wIndex);
1042 dir = num & USB_ENDPOINT_DIR_MASK;
1043 num &= USB_ENDPOINT_NUMBER_MASK;
1044 if (dir) /* TX */
1045 num += ci->hw_ep_max / 2;
1046
1047 spin_unlock(&ci->lock);
1048 err = usb_ep_set_halt(&ci->ci_hw_ep[num].ep);
1049 spin_lock(&ci->lock);
1050 if (!err)
1051 isr_setup_status_phase(ci);
1052 } else if (type == (USB_DIR_OUT|USB_RECIP_DEVICE)) {
1053 if (req.wLength != 0)
1054 break;
1055 switch (le16_to_cpu(req.wValue)) {
1056 case USB_DEVICE_REMOTE_WAKEUP:
1057 ci->remote_wakeup = 1;
1058 err = isr_setup_status_phase(ci);
1059 break;
1060 case USB_DEVICE_TEST_MODE:
1061 tmode = le16_to_cpu(req.wIndex) >> 8;
1062 switch (tmode) {
1063 case TEST_J:
1064 case TEST_K:
1065 case TEST_SE0_NAK:
1066 case TEST_PACKET:
1067 case TEST_FORCE_EN:
1068 ci->test_mode = tmode;
1069 err = isr_setup_status_phase(
1070 ci);
1071 break;
1072 default:
1073 break;
1074 }
1075 default:
1076 goto delegate;
1077 }
1078 } else {
1079 goto delegate;
1080 }
1081 break;
1082 default:
1083delegate:
1084 if (req.wLength == 0) /* no data phase */
1085 ci->ep0_dir = TX;
1086
1087 spin_unlock(&ci->lock);
1088 err = ci->driver->setup(&ci->gadget, &req);
1089 spin_lock(&ci->lock);
1090 break;
1091 }
1092
1093 if (err < 0) {
1094 spin_unlock(&ci->lock);
1095 if (usb_ep_set_halt(&hwep->ep))
1096 dev_err(ci->dev, "error: ep_set_halt\n");
1097 spin_lock(&ci->lock);
1098 }
1099}
1100
1101/**
1102 * isr_tr_complete_handler: transaction complete interrupt handler
1103 * @ci: UDC descriptor
1104 *
1105 * This function handles traffic events
1106 */
1107static void isr_tr_complete_handler(struct ci_hdrc *ci)
1108__releases(ci->lock)
1109__acquires(ci->lock)
1110{
1111 unsigned i;
1112 int err;
1113
1114 for (i = 0; i < ci->hw_ep_max; i++) {
1115 struct ci_hw_ep *hwep = &ci->ci_hw_ep[i];
1116
1117 if (hwep->ep.desc == NULL)
1118 continue; /* not configured */
1119
1120 if (hw_test_and_clear_complete(ci, i)) {
1121 err = isr_tr_complete_low(hwep);
1122 if (hwep->type == USB_ENDPOINT_XFER_CONTROL) {
1123 if (err > 0) /* needs status phase */
1124 err = isr_setup_status_phase(ci);
1125 if (err < 0) {
1126 spin_unlock(&ci->lock);
1127 if (usb_ep_set_halt(&hwep->ep))
1128 dev_err(ci->dev,
1129 "error: ep_set_halt\n");
1130 spin_lock(&ci->lock);
1131 }
1132 }
1133 }
1134
1135 /* Only handle setup packet below */
1136 if (i == 0 &&
1137 hw_test_and_clear(ci, OP_ENDPTSETUPSTAT, BIT(0)))
1138 isr_setup_packet_handler(ci);
1139 }
1140}
1141
1142/******************************************************************************
1143 * ENDPT block
1144 *****************************************************************************/
1145/**
1146 * ep_enable: configure endpoint, making it usable
1147 *
1148 * Check usb_ep_enable() at "usb_gadget.h" for details
1149 */
1150static int ep_enable(struct usb_ep *ep,
1151 const struct usb_endpoint_descriptor *desc)
1152{
1153 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1154 int retval = 0;
1155 unsigned long flags;
1156 u32 cap = 0;
1157
1158 if (ep == NULL || desc == NULL)
1159 return -EINVAL;
1160
1161 spin_lock_irqsave(hwep->lock, flags);
1162
1163 /* only internal SW should enable ctrl endpts */
1164
1165 hwep->ep.desc = desc;
1166
1167 if (!list_empty(&hwep->qh.queue))
1168 dev_warn(hwep->ci->dev, "enabling a non-empty endpoint!\n");
1169
1170 hwep->dir = usb_endpoint_dir_in(desc) ? TX : RX;
1171 hwep->num = usb_endpoint_num(desc);
1172 hwep->type = usb_endpoint_type(desc);
1173
1174 hwep->ep.maxpacket = usb_endpoint_maxp(desc) & 0x07ff;
1175 hwep->ep.mult = QH_ISO_MULT(usb_endpoint_maxp(desc));
1176
1177 if (hwep->type == USB_ENDPOINT_XFER_CONTROL)
1178 cap |= QH_IOS;
1179 if (hwep->num)
1180 cap |= QH_ZLT;
1181 cap |= (hwep->ep.maxpacket << __ffs(QH_MAX_PKT)) & QH_MAX_PKT;
1182 /*
1183 * For ISO-TX, we set mult at QH as the largest value, and use
1184 * MultO at TD as real mult value.
1185 */
1186 if (hwep->type == USB_ENDPOINT_XFER_ISOC && hwep->dir == TX)
1187 cap |= 3 << __ffs(QH_MULT);
1188
1189 hwep->qh.ptr->cap = cpu_to_le32(cap);
1190
1191 hwep->qh.ptr->td.next |= cpu_to_le32(TD_TERMINATE); /* needed? */
1192
1193 if (hwep->num != 0 && hwep->type == USB_ENDPOINT_XFER_CONTROL) {
1194 dev_err(hwep->ci->dev, "Set control xfer at non-ep0\n");
1195 retval = -EINVAL;
1196 }
1197
1198 /*
1199 * Enable endpoints in the HW other than ep0 as ep0
1200 * is always enabled
1201 */
1202 if (hwep->num)
1203 retval |= hw_ep_enable(hwep->ci, hwep->num, hwep->dir,
1204 hwep->type);
1205
1206 spin_unlock_irqrestore(hwep->lock, flags);
1207 return retval;
1208}
1209
1210/**
1211 * ep_disable: endpoint is no longer usable
1212 *
1213 * Check usb_ep_disable() at "usb_gadget.h" for details
1214 */
1215static int ep_disable(struct usb_ep *ep)
1216{
1217 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1218 int direction, retval = 0;
1219 unsigned long flags;
1220
1221 if (ep == NULL)
1222 return -EINVAL;
1223 else if (hwep->ep.desc == NULL)
1224 return -EBUSY;
1225
1226 spin_lock_irqsave(hwep->lock, flags);
1227
1228 /* only internal SW should disable ctrl endpts */
1229
1230 direction = hwep->dir;
1231 do {
1232 retval |= _ep_nuke(hwep);
1233 retval |= hw_ep_disable(hwep->ci, hwep->num, hwep->dir);
1234
1235 if (hwep->type == USB_ENDPOINT_XFER_CONTROL)
1236 hwep->dir = (hwep->dir == TX) ? RX : TX;
1237
1238 } while (hwep->dir != direction);
1239
1240 hwep->ep.desc = NULL;
1241
1242 spin_unlock_irqrestore(hwep->lock, flags);
1243 return retval;
1244}
1245
1246/**
1247 * ep_alloc_request: allocate a request object to use with this endpoint
1248 *
1249 * Check usb_ep_alloc_request() at "usb_gadget.h" for details
1250 */
1251static struct usb_request *ep_alloc_request(struct usb_ep *ep, gfp_t gfp_flags)
1252{
1253 struct ci_hw_req *hwreq = NULL;
1254
1255 if (ep == NULL)
1256 return NULL;
1257
1258 hwreq = kzalloc(sizeof(struct ci_hw_req), gfp_flags);
1259 if (hwreq != NULL) {
1260 INIT_LIST_HEAD(&hwreq->queue);
1261 INIT_LIST_HEAD(&hwreq->tds);
1262 }
1263
1264 return (hwreq == NULL) ? NULL : &hwreq->req;
1265}
1266
1267/**
1268 * ep_free_request: frees a request object
1269 *
1270 * Check usb_ep_free_request() at "usb_gadget.h" for details
1271 */
1272static void ep_free_request(struct usb_ep *ep, struct usb_request *req)
1273{
1274 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1275 struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req);
1276 struct td_node *node, *tmpnode;
1277 unsigned long flags;
1278
1279 if (ep == NULL || req == NULL) {
1280 return;
1281 } else if (!list_empty(&hwreq->queue)) {
1282 dev_err(hwep->ci->dev, "freeing queued request\n");
1283 return;
1284 }
1285
1286 spin_lock_irqsave(hwep->lock, flags);
1287
1288 list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
1289 dma_pool_free(hwep->td_pool, node->ptr, node->dma);
1290 list_del_init(&node->td);
1291 node->ptr = NULL;
1292 kfree(node);
1293 }
1294
1295 kfree(hwreq);
1296
1297 spin_unlock_irqrestore(hwep->lock, flags);
1298}
1299
1300/**
1301 * ep_queue: queues (submits) an I/O request to an endpoint
1302 *
1303 * Check usb_ep_queue()* at usb_gadget.h" for details
1304 */
1305static int ep_queue(struct usb_ep *ep, struct usb_request *req,
1306 gfp_t __maybe_unused gfp_flags)
1307{
1308 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1309 int retval = 0;
1310 unsigned long flags;
1311
1312 if (ep == NULL || req == NULL || hwep->ep.desc == NULL)
1313 return -EINVAL;
1314
1315 spin_lock_irqsave(hwep->lock, flags);
1316 retval = _ep_queue(ep, req, gfp_flags);
1317 spin_unlock_irqrestore(hwep->lock, flags);
1318 return retval;
1319}
1320
1321/**
1322 * ep_dequeue: dequeues (cancels, unlinks) an I/O request from an endpoint
1323 *
1324 * Check usb_ep_dequeue() at "usb_gadget.h" for details
1325 */
1326static int ep_dequeue(struct usb_ep *ep, struct usb_request *req)
1327{
1328 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1329 struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req);
1330 unsigned long flags;
1331
1332 if (ep == NULL || req == NULL || hwreq->req.status != -EALREADY ||
1333 hwep->ep.desc == NULL || list_empty(&hwreq->queue) ||
1334 list_empty(&hwep->qh.queue))
1335 return -EINVAL;
1336
1337 spin_lock_irqsave(hwep->lock, flags);
1338
1339 hw_ep_flush(hwep->ci, hwep->num, hwep->dir);
1340
1341 /* pop request */
1342 list_del_init(&hwreq->queue);
1343
1344 usb_gadget_unmap_request(&hwep->ci->gadget, req, hwep->dir);
1345
1346 req->status = -ECONNRESET;
1347
1348 if (hwreq->req.complete != NULL) {
1349 spin_unlock(hwep->lock);
1350 hwreq->req.complete(&hwep->ep, &hwreq->req);
1351 spin_lock(hwep->lock);
1352 }
1353
1354 spin_unlock_irqrestore(hwep->lock, flags);
1355 return 0;
1356}
1357
1358/**
1359 * ep_set_halt: sets the endpoint halt feature
1360 *
1361 * Check usb_ep_set_halt() at "usb_gadget.h" for details
1362 */
1363static int ep_set_halt(struct usb_ep *ep, int value)
1364{
1365 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1366 int direction, retval = 0;
1367 unsigned long flags;
1368
1369 if (ep == NULL || hwep->ep.desc == NULL)
1370 return -EINVAL;
1371
1372 if (usb_endpoint_xfer_isoc(hwep->ep.desc))
1373 return -EOPNOTSUPP;
1374
1375 spin_lock_irqsave(hwep->lock, flags);
1376
1377#ifndef STALL_IN
1378 /* g_file_storage MS compliant but g_zero fails chapter 9 compliance */
1379 if (value && hwep->type == USB_ENDPOINT_XFER_BULK && hwep->dir == TX &&
1380 !list_empty(&hwep->qh.queue)) {
1381 spin_unlock_irqrestore(hwep->lock, flags);
1382 return -EAGAIN;
1383 }
1384#endif
1385
1386 direction = hwep->dir;
1387 do {
1388 retval |= hw_ep_set_halt(hwep->ci, hwep->num, hwep->dir, value);
1389
1390 if (!value)
1391 hwep->wedge = 0;
1392
1393 if (hwep->type == USB_ENDPOINT_XFER_CONTROL)
1394 hwep->dir = (hwep->dir == TX) ? RX : TX;
1395
1396 } while (hwep->dir != direction);
1397
1398 spin_unlock_irqrestore(hwep->lock, flags);
1399 return retval;
1400}
1401
1402/**
1403 * ep_set_wedge: sets the halt feature and ignores clear requests
1404 *
1405 * Check usb_ep_set_wedge() at "usb_gadget.h" for details
1406 */
1407static int ep_set_wedge(struct usb_ep *ep)
1408{
1409 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1410 unsigned long flags;
1411
1412 if (ep == NULL || hwep->ep.desc == NULL)
1413 return -EINVAL;
1414
1415 spin_lock_irqsave(hwep->lock, flags);
1416 hwep->wedge = 1;
1417 spin_unlock_irqrestore(hwep->lock, flags);
1418
1419 return usb_ep_set_halt(ep);
1420}
1421
1422/**
1423 * ep_fifo_flush: flushes contents of a fifo
1424 *
1425 * Check usb_ep_fifo_flush() at "usb_gadget.h" for details
1426 */
1427static void ep_fifo_flush(struct usb_ep *ep)
1428{
1429 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1430 unsigned long flags;
1431
1432 if (ep == NULL) {
1433 dev_err(hwep->ci->dev, "%02X: -EINVAL\n", _usb_addr(hwep));
1434 return;
1435 }
1436
1437 spin_lock_irqsave(hwep->lock, flags);
1438
1439 hw_ep_flush(hwep->ci, hwep->num, hwep->dir);
1440
1441 spin_unlock_irqrestore(hwep->lock, flags);
1442}
1443
1444/**
1445 * Endpoint-specific part of the API to the USB controller hardware
1446 * Check "usb_gadget.h" for details
1447 */
1448static const struct usb_ep_ops usb_ep_ops = {
1449 .enable = ep_enable,
1450 .disable = ep_disable,
1451 .alloc_request = ep_alloc_request,
1452 .free_request = ep_free_request,
1453 .queue = ep_queue,
1454 .dequeue = ep_dequeue,
1455 .set_halt = ep_set_halt,
1456 .set_wedge = ep_set_wedge,
1457 .fifo_flush = ep_fifo_flush,
1458};
1459
1460/******************************************************************************
1461 * GADGET block
1462 *****************************************************************************/
1463static int ci_udc_vbus_session(struct usb_gadget *_gadget, int is_active)
1464{
1465 struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
1466 unsigned long flags;
1467 int gadget_ready = 0;
1468
1469 spin_lock_irqsave(&ci->lock, flags);
1470 ci->vbus_active = is_active;
1471 if (ci->driver)
1472 gadget_ready = 1;
1473 spin_unlock_irqrestore(&ci->lock, flags);
1474
1475 if (gadget_ready) {
1476 if (is_active) {
1477 pm_runtime_get_sync(&_gadget->dev);
1478 hw_device_reset(ci, USBMODE_CM_DC);
1479 hw_device_state(ci, ci->ep0out->qh.dma);
1480 dev_dbg(ci->dev, "Connected to host\n");
1481 } else {
1482 if (ci->driver)
1483 ci->driver->disconnect(&ci->gadget);
1484 hw_device_state(ci, 0);
1485 if (ci->platdata->notify_event)
1486 ci->platdata->notify_event(ci,
1487 CI_HDRC_CONTROLLER_STOPPED_EVENT);
1488 _gadget_stop_activity(&ci->gadget);
1489 pm_runtime_put_sync(&_gadget->dev);
1490 dev_dbg(ci->dev, "Disconnected from host\n");
1491 }
1492 }
1493
1494 return 0;
1495}
1496
1497static int ci_udc_wakeup(struct usb_gadget *_gadget)
1498{
1499 struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
1500 unsigned long flags;
1501 int ret = 0;
1502
1503 spin_lock_irqsave(&ci->lock, flags);
1504 if (!ci->remote_wakeup) {
1505 ret = -EOPNOTSUPP;
1506 goto out;
1507 }
1508 if (!hw_read(ci, OP_PORTSC, PORTSC_SUSP)) {
1509 ret = -EINVAL;
1510 goto out;
1511 }
1512 hw_write(ci, OP_PORTSC, PORTSC_FPR, PORTSC_FPR);
1513out:
1514 spin_unlock_irqrestore(&ci->lock, flags);
1515 return ret;
1516}
1517
1518static int ci_udc_vbus_draw(struct usb_gadget *_gadget, unsigned ma)
1519{
1520 struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
1521
1522 if (ci->transceiver)
1523 return usb_phy_set_power(ci->transceiver, ma);
1524 return -ENOTSUPP;
1525}
1526
1527/* Change Data+ pullup status
1528 * this func is used by usb_gadget_connect/disconnet
1529 */
1530static int ci_udc_pullup(struct usb_gadget *_gadget, int is_on)
1531{
1532 struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
1533
1534 if (!ci->vbus_active)
1535 return -EOPNOTSUPP;
1536
1537 if (is_on)
1538 hw_write(ci, OP_USBCMD, USBCMD_RS, USBCMD_RS);
1539 else
1540 hw_write(ci, OP_USBCMD, USBCMD_RS, 0);
1541
1542 return 0;
1543}
1544
1545static int ci_udc_start(struct usb_gadget *gadget,
1546 struct usb_gadget_driver *driver);
1547static int ci_udc_stop(struct usb_gadget *gadget,
1548 struct usb_gadget_driver *driver);
1549/**
1550 * Device operations part of the API to the USB controller hardware,
1551 * which don't involve endpoints (or i/o)
1552 * Check "usb_gadget.h" for details
1553 */
1554static const struct usb_gadget_ops usb_gadget_ops = {
1555 .vbus_session = ci_udc_vbus_session,
1556 .wakeup = ci_udc_wakeup,
1557 .pullup = ci_udc_pullup,
1558 .vbus_draw = ci_udc_vbus_draw,
1559 .udc_start = ci_udc_start,
1560 .udc_stop = ci_udc_stop,
1561};
1562
1563static int init_eps(struct ci_hdrc *ci)
1564{
1565 int retval = 0, i, j;
1566
1567 for (i = 0; i < ci->hw_ep_max/2; i++)
1568 for (j = RX; j <= TX; j++) {
1569 int k = i + j * ci->hw_ep_max/2;
1570 struct ci_hw_ep *hwep = &ci->ci_hw_ep[k];
1571
1572 scnprintf(hwep->name, sizeof(hwep->name), "ep%i%s", i,
1573 (j == TX) ? "in" : "out");
1574
1575 hwep->ci = ci;
1576 hwep->lock = &ci->lock;
1577 hwep->td_pool = ci->td_pool;
1578
1579 hwep->ep.name = hwep->name;
1580 hwep->ep.ops = &usb_ep_ops;
1581 /*
1582 * for ep0: maxP defined in desc, for other
1583 * eps, maxP is set by epautoconfig() called
1584 * by gadget layer
1585 */
1586 usb_ep_set_maxpacket_limit(&hwep->ep, (unsigned short)~0);
1587
1588 INIT_LIST_HEAD(&hwep->qh.queue);
1589 hwep->qh.ptr = dma_pool_alloc(ci->qh_pool, GFP_KERNEL,
1590 &hwep->qh.dma);
1591 if (hwep->qh.ptr == NULL)
1592 retval = -ENOMEM;
1593 else
1594 memset(hwep->qh.ptr, 0, sizeof(*hwep->qh.ptr));
1595
1596 /*
1597 * set up shorthands for ep0 out and in endpoints,
1598 * don't add to gadget's ep_list
1599 */
1600 if (i == 0) {
1601 if (j == RX)
1602 ci->ep0out = hwep;
1603 else
1604 ci->ep0in = hwep;
1605
1606 usb_ep_set_maxpacket_limit(&hwep->ep, CTRL_PAYLOAD_MAX);
1607 continue;
1608 }
1609
1610 list_add_tail(&hwep->ep.ep_list, &ci->gadget.ep_list);
1611 }
1612
1613 return retval;
1614}
1615
1616static void destroy_eps(struct ci_hdrc *ci)
1617{
1618 int i;
1619
1620 for (i = 0; i < ci->hw_ep_max; i++) {
1621 struct ci_hw_ep *hwep = &ci->ci_hw_ep[i];
1622
1623 if (hwep->pending_td)
1624 free_pending_td(hwep);
1625 dma_pool_free(ci->qh_pool, hwep->qh.ptr, hwep->qh.dma);
1626 }
1627}
1628
1629/**
1630 * ci_udc_start: register a gadget driver
1631 * @gadget: our gadget
1632 * @driver: the driver being registered
1633 *
1634 * Interrupts are enabled here.
1635 */
1636static int ci_udc_start(struct usb_gadget *gadget,
1637 struct usb_gadget_driver *driver)
1638{
1639 struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget);
1640 unsigned long flags;
1641 int retval = -ENOMEM;
1642
1643 if (driver->disconnect == NULL)
1644 return -EINVAL;
1645
1646
1647 ci->ep0out->ep.desc = &ctrl_endpt_out_desc;
1648 retval = usb_ep_enable(&ci->ep0out->ep);
1649 if (retval)
1650 return retval;
1651
1652 ci->ep0in->ep.desc = &ctrl_endpt_in_desc;
1653 retval = usb_ep_enable(&ci->ep0in->ep);
1654 if (retval)
1655 return retval;
1656
1657 ci->driver = driver;
1658 pm_runtime_get_sync(&ci->gadget.dev);
1659 if (ci->vbus_active) {
1660 spin_lock_irqsave(&ci->lock, flags);
1661 hw_device_reset(ci, USBMODE_CM_DC);
1662 } else {
1663 pm_runtime_put_sync(&ci->gadget.dev);
1664 return retval;
1665 }
1666
1667 retval = hw_device_state(ci, ci->ep0out->qh.dma);
1668 spin_unlock_irqrestore(&ci->lock, flags);
1669 if (retval)
1670 pm_runtime_put_sync(&ci->gadget.dev);
1671
1672 return retval;
1673}
1674
1675/**
1676 * ci_udc_stop: unregister a gadget driver
1677 */
1678static int ci_udc_stop(struct usb_gadget *gadget,
1679 struct usb_gadget_driver *driver)
1680{
1681 struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget);
1682 unsigned long flags;
1683
1684 spin_lock_irqsave(&ci->lock, flags);
1685
1686 if (ci->vbus_active) {
1687 hw_device_state(ci, 0);
1688 if (ci->platdata->notify_event)
1689 ci->platdata->notify_event(ci,
1690 CI_HDRC_CONTROLLER_STOPPED_EVENT);
1691 spin_unlock_irqrestore(&ci->lock, flags);
1692 _gadget_stop_activity(&ci->gadget);
1693 spin_lock_irqsave(&ci->lock, flags);
1694 pm_runtime_put(&ci->gadget.dev);
1695 }
1696
1697 ci->driver = NULL;
1698 spin_unlock_irqrestore(&ci->lock, flags);
1699
1700 return 0;
1701}
1702
1703/******************************************************************************
1704 * BUS block
1705 *****************************************************************************/
1706/**
1707 * udc_irq: ci interrupt handler
1708 *
1709 * This function returns IRQ_HANDLED if the IRQ has been handled
1710 * It locks access to registers
1711 */
1712static irqreturn_t udc_irq(struct ci_hdrc *ci)
1713{
1714 irqreturn_t retval;
1715 u32 intr;
1716
1717 if (ci == NULL)
1718 return IRQ_HANDLED;
1719
1720 spin_lock(&ci->lock);
1721
1722 if (ci->platdata->flags & CI_HDRC_REGS_SHARED) {
1723 if (hw_read(ci, OP_USBMODE, USBMODE_CM) !=
1724 USBMODE_CM_DC) {
1725 spin_unlock(&ci->lock);
1726 return IRQ_NONE;
1727 }
1728 }
1729 intr = hw_test_and_clear_intr_active(ci);
1730
1731 if (intr) {
1732 /* order defines priority - do NOT change it */
1733 if (USBi_URI & intr)
1734 isr_reset_handler(ci);
1735
1736 if (USBi_PCI & intr) {
1737 ci->gadget.speed = hw_port_is_high_speed(ci) ?
1738 USB_SPEED_HIGH : USB_SPEED_FULL;
1739 if (ci->suspended && ci->driver->resume) {
1740 spin_unlock(&ci->lock);
1741 ci->driver->resume(&ci->gadget);
1742 spin_lock(&ci->lock);
1743 ci->suspended = 0;
1744 }
1745 }
1746
1747 if (USBi_UI & intr)
1748 isr_tr_complete_handler(ci);
1749
1750 if (USBi_SLI & intr) {
1751 if (ci->gadget.speed != USB_SPEED_UNKNOWN &&
1752 ci->driver->suspend) {
1753 ci->suspended = 1;
1754 spin_unlock(&ci->lock);
1755 ci->driver->suspend(&ci->gadget);
1756 spin_lock(&ci->lock);
1757 }
1758 }
1759 retval = IRQ_HANDLED;
1760 } else {
1761 retval = IRQ_NONE;
1762 }
1763 spin_unlock(&ci->lock);
1764
1765 return retval;
1766}
1767
1768/**
1769 * udc_start: initialize gadget role
1770 * @ci: chipidea controller
1771 */
1772static int udc_start(struct ci_hdrc *ci)
1773{
1774 struct device *dev = ci->dev;
1775 int retval = 0;
1776
1777 spin_lock_init(&ci->lock);
1778
1779 ci->gadget.ops = &usb_gadget_ops;
1780 ci->gadget.speed = USB_SPEED_UNKNOWN;
1781 ci->gadget.max_speed = USB_SPEED_HIGH;
1782 ci->gadget.is_otg = 0;
1783 ci->gadget.name = ci->platdata->name;
1784
1785 INIT_LIST_HEAD(&ci->gadget.ep_list);
1786
1787 /* alloc resources */
1788 ci->qh_pool = dma_pool_create("ci_hw_qh", dev,
1789 sizeof(struct ci_hw_qh),
1790 64, CI_HDRC_PAGE_SIZE);
1791 if (ci->qh_pool == NULL)
1792 return -ENOMEM;
1793
1794 ci->td_pool = dma_pool_create("ci_hw_td", dev,
1795 sizeof(struct ci_hw_td),
1796 64, CI_HDRC_PAGE_SIZE);
1797 if (ci->td_pool == NULL) {
1798 retval = -ENOMEM;
1799 goto free_qh_pool;
1800 }
1801
1802 retval = init_eps(ci);
1803 if (retval)
1804 goto free_pools;
1805
1806 ci->gadget.ep0 = &ci->ep0in->ep;
1807
1808 retval = usb_add_gadget_udc(dev, &ci->gadget);
1809 if (retval)
1810 goto destroy_eps;
1811
1812 pm_runtime_no_callbacks(&ci->gadget.dev);
1813 pm_runtime_enable(&ci->gadget.dev);
1814
1815 return retval;
1816
1817destroy_eps:
1818 destroy_eps(ci);
1819free_pools:
1820 dma_pool_destroy(ci->td_pool);
1821free_qh_pool:
1822 dma_pool_destroy(ci->qh_pool);
1823 return retval;
1824}
1825
1826/**
1827 * ci_hdrc_gadget_destroy: parent remove must call this to remove UDC
1828 *
1829 * No interrupts active, the IRQ has been released
1830 */
1831void ci_hdrc_gadget_destroy(struct ci_hdrc *ci)
1832{
1833 if (!ci->roles[CI_ROLE_GADGET])
1834 return;
1835
1836 usb_del_gadget_udc(&ci->gadget);
1837
1838 destroy_eps(ci);
1839
1840 dma_pool_destroy(ci->td_pool);
1841 dma_pool_destroy(ci->qh_pool);
1842}
1843
1844static int udc_id_switch_for_device(struct ci_hdrc *ci)
1845{
1846 if (ci->is_otg) {
1847 ci_clear_otg_interrupt(ci, OTGSC_BSVIS);
1848 ci_enable_otg_interrupt(ci, OTGSC_BSVIE);
1849 }
1850
1851 return 0;
1852}
1853
1854static void udc_id_switch_for_host(struct ci_hdrc *ci)
1855{
1856 if (ci->is_otg) {
1857 /* host doesn't care B_SESSION_VALID event */
1858 ci_clear_otg_interrupt(ci, OTGSC_BSVIS);
1859 ci_disable_otg_interrupt(ci, OTGSC_BSVIE);
1860 }
1861}
1862
1863/**
1864 * ci_hdrc_gadget_init - initialize device related bits
1865 * ci: the controller
1866 *
1867 * This function initializes the gadget, if the device is "device capable".
1868 */
1869int ci_hdrc_gadget_init(struct ci_hdrc *ci)
1870{
1871 struct ci_role_driver *rdrv;
1872
1873 if (!hw_read(ci, CAP_DCCPARAMS, DCCPARAMS_DC))
1874 return -ENXIO;
1875
1876 rdrv = devm_kzalloc(ci->dev, sizeof(struct ci_role_driver), GFP_KERNEL);
1877 if (!rdrv)
1878 return -ENOMEM;
1879
1880 rdrv->start = udc_id_switch_for_device;
1881 rdrv->stop = udc_id_switch_for_host;
1882 rdrv->irq = udc_irq;
1883 rdrv->name = "gadget";
1884 ci->roles[CI_ROLE_GADGET] = rdrv;
1885
1886 return udc_start(ci);
1887}
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * udc.c - ChipIdea UDC driver
4 *
5 * Copyright (C) 2008 Chipidea - MIPS Technologies, Inc. All rights reserved.
6 *
7 * Author: David Lopo
8 */
9
10#include <linux/delay.h>
11#include <linux/device.h>
12#include <linux/dmapool.h>
13#include <linux/err.h>
14#include <linux/irqreturn.h>
15#include <linux/kernel.h>
16#include <linux/slab.h>
17#include <linux/pm_runtime.h>
18#include <linux/pinctrl/consumer.h>
19#include <linux/usb/ch9.h>
20#include <linux/usb/gadget.h>
21#include <linux/usb/otg-fsm.h>
22#include <linux/usb/chipidea.h>
23
24#include "ci.h"
25#include "udc.h"
26#include "bits.h"
27#include "otg.h"
28#include "otg_fsm.h"
29
30/* control endpoint description */
31static const struct usb_endpoint_descriptor
32ctrl_endpt_out_desc = {
33 .bLength = USB_DT_ENDPOINT_SIZE,
34 .bDescriptorType = USB_DT_ENDPOINT,
35
36 .bEndpointAddress = USB_DIR_OUT,
37 .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
38 .wMaxPacketSize = cpu_to_le16(CTRL_PAYLOAD_MAX),
39};
40
41static const struct usb_endpoint_descriptor
42ctrl_endpt_in_desc = {
43 .bLength = USB_DT_ENDPOINT_SIZE,
44 .bDescriptorType = USB_DT_ENDPOINT,
45
46 .bEndpointAddress = USB_DIR_IN,
47 .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
48 .wMaxPacketSize = cpu_to_le16(CTRL_PAYLOAD_MAX),
49};
50
51/**
52 * hw_ep_bit: calculates the bit number
53 * @num: endpoint number
54 * @dir: endpoint direction
55 *
56 * This function returns bit number
57 */
58static inline int hw_ep_bit(int num, int dir)
59{
60 return num + ((dir == TX) ? 16 : 0);
61}
62
63static inline int ep_to_bit(struct ci_hdrc *ci, int n)
64{
65 int fill = 16 - ci->hw_ep_max / 2;
66
67 if (n >= ci->hw_ep_max / 2)
68 n += fill;
69
70 return n;
71}
72
73/**
74 * hw_device_state: enables/disables interrupts (execute without interruption)
75 * @dma: 0 => disable, !0 => enable and set dma engine
76 *
77 * This function returns an error code
78 */
79static int hw_device_state(struct ci_hdrc *ci, u32 dma)
80{
81 if (dma) {
82 hw_write(ci, OP_ENDPTLISTADDR, ~0, dma);
83 /* interrupt, error, port change, reset, sleep/suspend */
84 hw_write(ci, OP_USBINTR, ~0,
85 USBi_UI|USBi_UEI|USBi_PCI|USBi_URI|USBi_SLI);
86 } else {
87 hw_write(ci, OP_USBINTR, ~0, 0);
88 }
89 return 0;
90}
91
92/**
93 * hw_ep_flush: flush endpoint fifo (execute without interruption)
94 * @num: endpoint number
95 * @dir: endpoint direction
96 *
97 * This function returns an error code
98 */
99static int hw_ep_flush(struct ci_hdrc *ci, int num, int dir)
100{
101 int n = hw_ep_bit(num, dir);
102
103 do {
104 /* flush any pending transfer */
105 hw_write(ci, OP_ENDPTFLUSH, ~0, BIT(n));
106 while (hw_read(ci, OP_ENDPTFLUSH, BIT(n)))
107 cpu_relax();
108 } while (hw_read(ci, OP_ENDPTSTAT, BIT(n)));
109
110 return 0;
111}
112
113/**
114 * hw_ep_disable: disables endpoint (execute without interruption)
115 * @num: endpoint number
116 * @dir: endpoint direction
117 *
118 * This function returns an error code
119 */
120static int hw_ep_disable(struct ci_hdrc *ci, int num, int dir)
121{
122 hw_write(ci, OP_ENDPTCTRL + num,
123 (dir == TX) ? ENDPTCTRL_TXE : ENDPTCTRL_RXE, 0);
124 return 0;
125}
126
127/**
128 * hw_ep_enable: enables endpoint (execute without interruption)
129 * @num: endpoint number
130 * @dir: endpoint direction
131 * @type: endpoint type
132 *
133 * This function returns an error code
134 */
135static int hw_ep_enable(struct ci_hdrc *ci, int num, int dir, int type)
136{
137 u32 mask, data;
138
139 if (dir == TX) {
140 mask = ENDPTCTRL_TXT; /* type */
141 data = type << __ffs(mask);
142
143 mask |= ENDPTCTRL_TXS; /* unstall */
144 mask |= ENDPTCTRL_TXR; /* reset data toggle */
145 data |= ENDPTCTRL_TXR;
146 mask |= ENDPTCTRL_TXE; /* enable */
147 data |= ENDPTCTRL_TXE;
148 } else {
149 mask = ENDPTCTRL_RXT; /* type */
150 data = type << __ffs(mask);
151
152 mask |= ENDPTCTRL_RXS; /* unstall */
153 mask |= ENDPTCTRL_RXR; /* reset data toggle */
154 data |= ENDPTCTRL_RXR;
155 mask |= ENDPTCTRL_RXE; /* enable */
156 data |= ENDPTCTRL_RXE;
157 }
158 hw_write(ci, OP_ENDPTCTRL + num, mask, data);
159 return 0;
160}
161
162/**
163 * hw_ep_get_halt: return endpoint halt status
164 * @num: endpoint number
165 * @dir: endpoint direction
166 *
167 * This function returns 1 if endpoint halted
168 */
169static int hw_ep_get_halt(struct ci_hdrc *ci, int num, int dir)
170{
171 u32 mask = (dir == TX) ? ENDPTCTRL_TXS : ENDPTCTRL_RXS;
172
173 return hw_read(ci, OP_ENDPTCTRL + num, mask) ? 1 : 0;
174}
175
176/**
177 * hw_ep_prime: primes endpoint (execute without interruption)
178 * @num: endpoint number
179 * @dir: endpoint direction
180 * @is_ctrl: true if control endpoint
181 *
182 * This function returns an error code
183 */
184static int hw_ep_prime(struct ci_hdrc *ci, int num, int dir, int is_ctrl)
185{
186 int n = hw_ep_bit(num, dir);
187
188 /* Synchronize before ep prime */
189 wmb();
190
191 if (is_ctrl && dir == RX && hw_read(ci, OP_ENDPTSETUPSTAT, BIT(num)))
192 return -EAGAIN;
193
194 hw_write(ci, OP_ENDPTPRIME, ~0, BIT(n));
195
196 while (hw_read(ci, OP_ENDPTPRIME, BIT(n)))
197 cpu_relax();
198 if (is_ctrl && dir == RX && hw_read(ci, OP_ENDPTSETUPSTAT, BIT(num)))
199 return -EAGAIN;
200
201 /* status shoult be tested according with manual but it doesn't work */
202 return 0;
203}
204
205/**
206 * hw_ep_set_halt: configures ep halt & resets data toggle after clear (execute
207 * without interruption)
208 * @num: endpoint number
209 * @dir: endpoint direction
210 * @value: true => stall, false => unstall
211 *
212 * This function returns an error code
213 */
214static int hw_ep_set_halt(struct ci_hdrc *ci, int num, int dir, int value)
215{
216 if (value != 0 && value != 1)
217 return -EINVAL;
218
219 do {
220 enum ci_hw_regs reg = OP_ENDPTCTRL + num;
221 u32 mask_xs = (dir == TX) ? ENDPTCTRL_TXS : ENDPTCTRL_RXS;
222 u32 mask_xr = (dir == TX) ? ENDPTCTRL_TXR : ENDPTCTRL_RXR;
223
224 /* data toggle - reserved for EP0 but it's in ESS */
225 hw_write(ci, reg, mask_xs|mask_xr,
226 value ? mask_xs : mask_xr);
227 } while (value != hw_ep_get_halt(ci, num, dir));
228
229 return 0;
230}
231
232/**
233 * hw_is_port_high_speed: test if port is high speed
234 *
235 * This function returns true if high speed port
236 */
237static int hw_port_is_high_speed(struct ci_hdrc *ci)
238{
239 return ci->hw_bank.lpm ? hw_read(ci, OP_DEVLC, DEVLC_PSPD) :
240 hw_read(ci, OP_PORTSC, PORTSC_HSP);
241}
242
243/**
244 * hw_test_and_clear_complete: test & clear complete status (execute without
245 * interruption)
246 * @n: endpoint number
247 *
248 * This function returns complete status
249 */
250static int hw_test_and_clear_complete(struct ci_hdrc *ci, int n)
251{
252 n = ep_to_bit(ci, n);
253 return hw_test_and_clear(ci, OP_ENDPTCOMPLETE, BIT(n));
254}
255
256/**
257 * hw_test_and_clear_intr_active: test & clear active interrupts (execute
258 * without interruption)
259 *
260 * This function returns active interrutps
261 */
262static u32 hw_test_and_clear_intr_active(struct ci_hdrc *ci)
263{
264 u32 reg = hw_read_intr_status(ci) & hw_read_intr_enable(ci);
265
266 hw_write(ci, OP_USBSTS, ~0, reg);
267 return reg;
268}
269
270/**
271 * hw_test_and_clear_setup_guard: test & clear setup guard (execute without
272 * interruption)
273 *
274 * This function returns guard value
275 */
276static int hw_test_and_clear_setup_guard(struct ci_hdrc *ci)
277{
278 return hw_test_and_write(ci, OP_USBCMD, USBCMD_SUTW, 0);
279}
280
281/**
282 * hw_test_and_set_setup_guard: test & set setup guard (execute without
283 * interruption)
284 *
285 * This function returns guard value
286 */
287static int hw_test_and_set_setup_guard(struct ci_hdrc *ci)
288{
289 return hw_test_and_write(ci, OP_USBCMD, USBCMD_SUTW, USBCMD_SUTW);
290}
291
292/**
293 * hw_usb_set_address: configures USB address (execute without interruption)
294 * @value: new USB address
295 *
296 * This function explicitly sets the address, without the "USBADRA" (advance)
297 * feature, which is not supported by older versions of the controller.
298 */
299static void hw_usb_set_address(struct ci_hdrc *ci, u8 value)
300{
301 hw_write(ci, OP_DEVICEADDR, DEVICEADDR_USBADR,
302 value << __ffs(DEVICEADDR_USBADR));
303}
304
305/**
306 * hw_usb_reset: restart device after a bus reset (execute without
307 * interruption)
308 *
309 * This function returns an error code
310 */
311static int hw_usb_reset(struct ci_hdrc *ci)
312{
313 hw_usb_set_address(ci, 0);
314
315 /* ESS flushes only at end?!? */
316 hw_write(ci, OP_ENDPTFLUSH, ~0, ~0);
317
318 /* clear setup token semaphores */
319 hw_write(ci, OP_ENDPTSETUPSTAT, 0, 0);
320
321 /* clear complete status */
322 hw_write(ci, OP_ENDPTCOMPLETE, 0, 0);
323
324 /* wait until all bits cleared */
325 while (hw_read(ci, OP_ENDPTPRIME, ~0))
326 udelay(10); /* not RTOS friendly */
327
328 /* reset all endpoints ? */
329
330 /* reset internal status and wait for further instructions
331 no need to verify the port reset status (ESS does it) */
332
333 return 0;
334}
335
336/******************************************************************************
337 * UTIL block
338 *****************************************************************************/
339
340static int add_td_to_list(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq,
341 unsigned length)
342{
343 int i;
344 u32 temp;
345 struct td_node *lastnode, *node = kzalloc(sizeof(struct td_node),
346 GFP_ATOMIC);
347
348 if (node == NULL)
349 return -ENOMEM;
350
351 node->ptr = dma_pool_zalloc(hwep->td_pool, GFP_ATOMIC, &node->dma);
352 if (node->ptr == NULL) {
353 kfree(node);
354 return -ENOMEM;
355 }
356
357 node->ptr->token = cpu_to_le32(length << __ffs(TD_TOTAL_BYTES));
358 node->ptr->token &= cpu_to_le32(TD_TOTAL_BYTES);
359 node->ptr->token |= cpu_to_le32(TD_STATUS_ACTIVE);
360 if (hwep->type == USB_ENDPOINT_XFER_ISOC && hwep->dir == TX) {
361 u32 mul = hwreq->req.length / hwep->ep.maxpacket;
362
363 if (hwreq->req.length == 0
364 || hwreq->req.length % hwep->ep.maxpacket)
365 mul++;
366 node->ptr->token |= cpu_to_le32(mul << __ffs(TD_MULTO));
367 }
368
369 temp = (u32) (hwreq->req.dma + hwreq->req.actual);
370 if (length) {
371 node->ptr->page[0] = cpu_to_le32(temp);
372 for (i = 1; i < TD_PAGE_COUNT; i++) {
373 u32 page = temp + i * CI_HDRC_PAGE_SIZE;
374 page &= ~TD_RESERVED_MASK;
375 node->ptr->page[i] = cpu_to_le32(page);
376 }
377 }
378
379 hwreq->req.actual += length;
380
381 if (!list_empty(&hwreq->tds)) {
382 /* get the last entry */
383 lastnode = list_entry(hwreq->tds.prev,
384 struct td_node, td);
385 lastnode->ptr->next = cpu_to_le32(node->dma);
386 }
387
388 INIT_LIST_HEAD(&node->td);
389 list_add_tail(&node->td, &hwreq->tds);
390
391 return 0;
392}
393
394/**
395 * _usb_addr: calculates endpoint address from direction & number
396 * @ep: endpoint
397 */
398static inline u8 _usb_addr(struct ci_hw_ep *ep)
399{
400 return ((ep->dir == TX) ? USB_ENDPOINT_DIR_MASK : 0) | ep->num;
401}
402
403/**
404 * _hardware_enqueue: configures a request at hardware level
405 * @hwep: endpoint
406 * @hwreq: request
407 *
408 * This function returns an error code
409 */
410static int _hardware_enqueue(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq)
411{
412 struct ci_hdrc *ci = hwep->ci;
413 int ret = 0;
414 unsigned rest = hwreq->req.length;
415 int pages = TD_PAGE_COUNT;
416 struct td_node *firstnode, *lastnode;
417
418 /* don't queue twice */
419 if (hwreq->req.status == -EALREADY)
420 return -EALREADY;
421
422 hwreq->req.status = -EALREADY;
423
424 ret = usb_gadget_map_request_by_dev(ci->dev->parent,
425 &hwreq->req, hwep->dir);
426 if (ret)
427 return ret;
428
429 /*
430 * The first buffer could be not page aligned.
431 * In that case we have to span into one extra td.
432 */
433 if (hwreq->req.dma % PAGE_SIZE)
434 pages--;
435
436 if (rest == 0) {
437 ret = add_td_to_list(hwep, hwreq, 0);
438 if (ret < 0)
439 goto done;
440 }
441
442 while (rest > 0) {
443 unsigned count = min(hwreq->req.length - hwreq->req.actual,
444 (unsigned)(pages * CI_HDRC_PAGE_SIZE));
445 ret = add_td_to_list(hwep, hwreq, count);
446 if (ret < 0)
447 goto done;
448
449 rest -= count;
450 }
451
452 if (hwreq->req.zero && hwreq->req.length && hwep->dir == TX
453 && (hwreq->req.length % hwep->ep.maxpacket == 0)) {
454 ret = add_td_to_list(hwep, hwreq, 0);
455 if (ret < 0)
456 goto done;
457 }
458
459 firstnode = list_first_entry(&hwreq->tds, struct td_node, td);
460
461 lastnode = list_entry(hwreq->tds.prev,
462 struct td_node, td);
463
464 lastnode->ptr->next = cpu_to_le32(TD_TERMINATE);
465 if (!hwreq->req.no_interrupt)
466 lastnode->ptr->token |= cpu_to_le32(TD_IOC);
467 wmb();
468
469 hwreq->req.actual = 0;
470 if (!list_empty(&hwep->qh.queue)) {
471 struct ci_hw_req *hwreqprev;
472 int n = hw_ep_bit(hwep->num, hwep->dir);
473 int tmp_stat;
474 struct td_node *prevlastnode;
475 u32 next = firstnode->dma & TD_ADDR_MASK;
476
477 hwreqprev = list_entry(hwep->qh.queue.prev,
478 struct ci_hw_req, queue);
479 prevlastnode = list_entry(hwreqprev->tds.prev,
480 struct td_node, td);
481
482 prevlastnode->ptr->next = cpu_to_le32(next);
483 wmb();
484 if (hw_read(ci, OP_ENDPTPRIME, BIT(n)))
485 goto done;
486 do {
487 hw_write(ci, OP_USBCMD, USBCMD_ATDTW, USBCMD_ATDTW);
488 tmp_stat = hw_read(ci, OP_ENDPTSTAT, BIT(n));
489 } while (!hw_read(ci, OP_USBCMD, USBCMD_ATDTW));
490 hw_write(ci, OP_USBCMD, USBCMD_ATDTW, 0);
491 if (tmp_stat)
492 goto done;
493 }
494
495 /* QH configuration */
496 hwep->qh.ptr->td.next = cpu_to_le32(firstnode->dma);
497 hwep->qh.ptr->td.token &=
498 cpu_to_le32(~(TD_STATUS_HALTED|TD_STATUS_ACTIVE));
499
500 if (hwep->type == USB_ENDPOINT_XFER_ISOC && hwep->dir == RX) {
501 u32 mul = hwreq->req.length / hwep->ep.maxpacket;
502
503 if (hwreq->req.length == 0
504 || hwreq->req.length % hwep->ep.maxpacket)
505 mul++;
506 hwep->qh.ptr->cap |= cpu_to_le32(mul << __ffs(QH_MULT));
507 }
508
509 ret = hw_ep_prime(ci, hwep->num, hwep->dir,
510 hwep->type == USB_ENDPOINT_XFER_CONTROL);
511done:
512 return ret;
513}
514
515/*
516 * free_pending_td: remove a pending request for the endpoint
517 * @hwep: endpoint
518 */
519static void free_pending_td(struct ci_hw_ep *hwep)
520{
521 struct td_node *pending = hwep->pending_td;
522
523 dma_pool_free(hwep->td_pool, pending->ptr, pending->dma);
524 hwep->pending_td = NULL;
525 kfree(pending);
526}
527
528static int reprime_dtd(struct ci_hdrc *ci, struct ci_hw_ep *hwep,
529 struct td_node *node)
530{
531 hwep->qh.ptr->td.next = cpu_to_le32(node->dma);
532 hwep->qh.ptr->td.token &=
533 cpu_to_le32(~(TD_STATUS_HALTED | TD_STATUS_ACTIVE));
534
535 return hw_ep_prime(ci, hwep->num, hwep->dir,
536 hwep->type == USB_ENDPOINT_XFER_CONTROL);
537}
538
539/**
540 * _hardware_dequeue: handles a request at hardware level
541 * @gadget: gadget
542 * @hwep: endpoint
543 *
544 * This function returns an error code
545 */
546static int _hardware_dequeue(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq)
547{
548 u32 tmptoken;
549 struct td_node *node, *tmpnode;
550 unsigned remaining_length;
551 unsigned actual = hwreq->req.length;
552 struct ci_hdrc *ci = hwep->ci;
553
554 if (hwreq->req.status != -EALREADY)
555 return -EINVAL;
556
557 hwreq->req.status = 0;
558
559 list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
560 tmptoken = le32_to_cpu(node->ptr->token);
561 if ((TD_STATUS_ACTIVE & tmptoken) != 0) {
562 int n = hw_ep_bit(hwep->num, hwep->dir);
563
564 if (ci->rev == CI_REVISION_24)
565 if (!hw_read(ci, OP_ENDPTSTAT, BIT(n)))
566 reprime_dtd(ci, hwep, node);
567 hwreq->req.status = -EALREADY;
568 return -EBUSY;
569 }
570
571 remaining_length = (tmptoken & TD_TOTAL_BYTES);
572 remaining_length >>= __ffs(TD_TOTAL_BYTES);
573 actual -= remaining_length;
574
575 hwreq->req.status = tmptoken & TD_STATUS;
576 if ((TD_STATUS_HALTED & hwreq->req.status)) {
577 hwreq->req.status = -EPIPE;
578 break;
579 } else if ((TD_STATUS_DT_ERR & hwreq->req.status)) {
580 hwreq->req.status = -EPROTO;
581 break;
582 } else if ((TD_STATUS_TR_ERR & hwreq->req.status)) {
583 hwreq->req.status = -EILSEQ;
584 break;
585 }
586
587 if (remaining_length) {
588 if (hwep->dir == TX) {
589 hwreq->req.status = -EPROTO;
590 break;
591 }
592 }
593 /*
594 * As the hardware could still address the freed td
595 * which will run the udc unusable, the cleanup of the
596 * td has to be delayed by one.
597 */
598 if (hwep->pending_td)
599 free_pending_td(hwep);
600
601 hwep->pending_td = node;
602 list_del_init(&node->td);
603 }
604
605 usb_gadget_unmap_request_by_dev(hwep->ci->dev->parent,
606 &hwreq->req, hwep->dir);
607
608 hwreq->req.actual += actual;
609
610 if (hwreq->req.status)
611 return hwreq->req.status;
612
613 return hwreq->req.actual;
614}
615
616/**
617 * _ep_nuke: dequeues all endpoint requests
618 * @hwep: endpoint
619 *
620 * This function returns an error code
621 * Caller must hold lock
622 */
623static int _ep_nuke(struct ci_hw_ep *hwep)
624__releases(hwep->lock)
625__acquires(hwep->lock)
626{
627 struct td_node *node, *tmpnode;
628 if (hwep == NULL)
629 return -EINVAL;
630
631 hw_ep_flush(hwep->ci, hwep->num, hwep->dir);
632
633 while (!list_empty(&hwep->qh.queue)) {
634
635 /* pop oldest request */
636 struct ci_hw_req *hwreq = list_entry(hwep->qh.queue.next,
637 struct ci_hw_req, queue);
638
639 list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
640 dma_pool_free(hwep->td_pool, node->ptr, node->dma);
641 list_del_init(&node->td);
642 node->ptr = NULL;
643 kfree(node);
644 }
645
646 list_del_init(&hwreq->queue);
647 hwreq->req.status = -ESHUTDOWN;
648
649 if (hwreq->req.complete != NULL) {
650 spin_unlock(hwep->lock);
651 usb_gadget_giveback_request(&hwep->ep, &hwreq->req);
652 spin_lock(hwep->lock);
653 }
654 }
655
656 if (hwep->pending_td)
657 free_pending_td(hwep);
658
659 return 0;
660}
661
662static int _ep_set_halt(struct usb_ep *ep, int value, bool check_transfer)
663{
664 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
665 int direction, retval = 0;
666 unsigned long flags;
667
668 if (ep == NULL || hwep->ep.desc == NULL)
669 return -EINVAL;
670
671 if (usb_endpoint_xfer_isoc(hwep->ep.desc))
672 return -EOPNOTSUPP;
673
674 spin_lock_irqsave(hwep->lock, flags);
675
676 if (value && hwep->dir == TX && check_transfer &&
677 !list_empty(&hwep->qh.queue) &&
678 !usb_endpoint_xfer_control(hwep->ep.desc)) {
679 spin_unlock_irqrestore(hwep->lock, flags);
680 return -EAGAIN;
681 }
682
683 direction = hwep->dir;
684 do {
685 retval |= hw_ep_set_halt(hwep->ci, hwep->num, hwep->dir, value);
686
687 if (!value)
688 hwep->wedge = 0;
689
690 if (hwep->type == USB_ENDPOINT_XFER_CONTROL)
691 hwep->dir = (hwep->dir == TX) ? RX : TX;
692
693 } while (hwep->dir != direction);
694
695 spin_unlock_irqrestore(hwep->lock, flags);
696 return retval;
697}
698
699
700/**
701 * _gadget_stop_activity: stops all USB activity, flushes & disables all endpts
702 * @gadget: gadget
703 *
704 * This function returns an error code
705 */
706static int _gadget_stop_activity(struct usb_gadget *gadget)
707{
708 struct usb_ep *ep;
709 struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget);
710 unsigned long flags;
711
712 /* flush all endpoints */
713 gadget_for_each_ep(ep, gadget) {
714 usb_ep_fifo_flush(ep);
715 }
716 usb_ep_fifo_flush(&ci->ep0out->ep);
717 usb_ep_fifo_flush(&ci->ep0in->ep);
718
719 /* make sure to disable all endpoints */
720 gadget_for_each_ep(ep, gadget) {
721 usb_ep_disable(ep);
722 }
723
724 if (ci->status != NULL) {
725 usb_ep_free_request(&ci->ep0in->ep, ci->status);
726 ci->status = NULL;
727 }
728
729 spin_lock_irqsave(&ci->lock, flags);
730 ci->gadget.speed = USB_SPEED_UNKNOWN;
731 ci->remote_wakeup = 0;
732 ci->suspended = 0;
733 spin_unlock_irqrestore(&ci->lock, flags);
734
735 return 0;
736}
737
738/******************************************************************************
739 * ISR block
740 *****************************************************************************/
741/**
742 * isr_reset_handler: USB reset interrupt handler
743 * @ci: UDC device
744 *
745 * This function resets USB engine after a bus reset occurred
746 */
747static void isr_reset_handler(struct ci_hdrc *ci)
748__releases(ci->lock)
749__acquires(ci->lock)
750{
751 int retval;
752
753 spin_unlock(&ci->lock);
754 if (ci->gadget.speed != USB_SPEED_UNKNOWN)
755 usb_gadget_udc_reset(&ci->gadget, ci->driver);
756
757 retval = _gadget_stop_activity(&ci->gadget);
758 if (retval)
759 goto done;
760
761 retval = hw_usb_reset(ci);
762 if (retval)
763 goto done;
764
765 ci->status = usb_ep_alloc_request(&ci->ep0in->ep, GFP_ATOMIC);
766 if (ci->status == NULL)
767 retval = -ENOMEM;
768
769done:
770 spin_lock(&ci->lock);
771
772 if (retval)
773 dev_err(ci->dev, "error: %i\n", retval);
774}
775
776/**
777 * isr_get_status_complete: get_status request complete function
778 * @ep: endpoint
779 * @req: request handled
780 *
781 * Caller must release lock
782 */
783static void isr_get_status_complete(struct usb_ep *ep, struct usb_request *req)
784{
785 if (ep == NULL || req == NULL)
786 return;
787
788 kfree(req->buf);
789 usb_ep_free_request(ep, req);
790}
791
792/**
793 * _ep_queue: queues (submits) an I/O request to an endpoint
794 * @ep: endpoint
795 * @req: request
796 * @gfp_flags: GFP flags (not used)
797 *
798 * Caller must hold lock
799 * This function returns an error code
800 */
801static int _ep_queue(struct usb_ep *ep, struct usb_request *req,
802 gfp_t __maybe_unused gfp_flags)
803{
804 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
805 struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req);
806 struct ci_hdrc *ci = hwep->ci;
807 int retval = 0;
808
809 if (ep == NULL || req == NULL || hwep->ep.desc == NULL)
810 return -EINVAL;
811
812 if (hwep->type == USB_ENDPOINT_XFER_CONTROL) {
813 if (req->length)
814 hwep = (ci->ep0_dir == RX) ?
815 ci->ep0out : ci->ep0in;
816 if (!list_empty(&hwep->qh.queue)) {
817 _ep_nuke(hwep);
818 dev_warn(hwep->ci->dev, "endpoint ctrl %X nuked\n",
819 _usb_addr(hwep));
820 }
821 }
822
823 if (usb_endpoint_xfer_isoc(hwep->ep.desc) &&
824 hwreq->req.length > hwep->ep.mult * hwep->ep.maxpacket) {
825 dev_err(hwep->ci->dev, "request length too big for isochronous\n");
826 return -EMSGSIZE;
827 }
828
829 /* first nuke then test link, e.g. previous status has not sent */
830 if (!list_empty(&hwreq->queue)) {
831 dev_err(hwep->ci->dev, "request already in queue\n");
832 return -EBUSY;
833 }
834
835 /* push request */
836 hwreq->req.status = -EINPROGRESS;
837 hwreq->req.actual = 0;
838
839 retval = _hardware_enqueue(hwep, hwreq);
840
841 if (retval == -EALREADY)
842 retval = 0;
843 if (!retval)
844 list_add_tail(&hwreq->queue, &hwep->qh.queue);
845
846 return retval;
847}
848
849/**
850 * isr_get_status_response: get_status request response
851 * @ci: ci struct
852 * @setup: setup request packet
853 *
854 * This function returns an error code
855 */
856static int isr_get_status_response(struct ci_hdrc *ci,
857 struct usb_ctrlrequest *setup)
858__releases(hwep->lock)
859__acquires(hwep->lock)
860{
861 struct ci_hw_ep *hwep = ci->ep0in;
862 struct usb_request *req = NULL;
863 gfp_t gfp_flags = GFP_ATOMIC;
864 int dir, num, retval;
865
866 if (hwep == NULL || setup == NULL)
867 return -EINVAL;
868
869 spin_unlock(hwep->lock);
870 req = usb_ep_alloc_request(&hwep->ep, gfp_flags);
871 spin_lock(hwep->lock);
872 if (req == NULL)
873 return -ENOMEM;
874
875 req->complete = isr_get_status_complete;
876 req->length = 2;
877 req->buf = kzalloc(req->length, gfp_flags);
878 if (req->buf == NULL) {
879 retval = -ENOMEM;
880 goto err_free_req;
881 }
882
883 if ((setup->bRequestType & USB_RECIP_MASK) == USB_RECIP_DEVICE) {
884 *(u16 *)req->buf = (ci->remote_wakeup << 1) |
885 ci->gadget.is_selfpowered;
886 } else if ((setup->bRequestType & USB_RECIP_MASK) \
887 == USB_RECIP_ENDPOINT) {
888 dir = (le16_to_cpu(setup->wIndex) & USB_ENDPOINT_DIR_MASK) ?
889 TX : RX;
890 num = le16_to_cpu(setup->wIndex) & USB_ENDPOINT_NUMBER_MASK;
891 *(u16 *)req->buf = hw_ep_get_halt(ci, num, dir);
892 }
893 /* else do nothing; reserved for future use */
894
895 retval = _ep_queue(&hwep->ep, req, gfp_flags);
896 if (retval)
897 goto err_free_buf;
898
899 return 0;
900
901 err_free_buf:
902 kfree(req->buf);
903 err_free_req:
904 spin_unlock(hwep->lock);
905 usb_ep_free_request(&hwep->ep, req);
906 spin_lock(hwep->lock);
907 return retval;
908}
909
910/**
911 * isr_setup_status_complete: setup_status request complete function
912 * @ep: endpoint
913 * @req: request handled
914 *
915 * Caller must release lock. Put the port in test mode if test mode
916 * feature is selected.
917 */
918static void
919isr_setup_status_complete(struct usb_ep *ep, struct usb_request *req)
920{
921 struct ci_hdrc *ci = req->context;
922 unsigned long flags;
923
924 if (ci->setaddr) {
925 hw_usb_set_address(ci, ci->address);
926 ci->setaddr = false;
927 if (ci->address)
928 usb_gadget_set_state(&ci->gadget, USB_STATE_ADDRESS);
929 }
930
931 spin_lock_irqsave(&ci->lock, flags);
932 if (ci->test_mode)
933 hw_port_test_set(ci, ci->test_mode);
934 spin_unlock_irqrestore(&ci->lock, flags);
935}
936
937/**
938 * isr_setup_status_phase: queues the status phase of a setup transation
939 * @ci: ci struct
940 *
941 * This function returns an error code
942 */
943static int isr_setup_status_phase(struct ci_hdrc *ci)
944{
945 struct ci_hw_ep *hwep;
946
947 /*
948 * Unexpected USB controller behavior, caused by bad signal integrity
949 * or ground reference problems, can lead to isr_setup_status_phase
950 * being called with ci->status equal to NULL.
951 * If this situation occurs, you should review your USB hardware design.
952 */
953 if (WARN_ON_ONCE(!ci->status))
954 return -EPIPE;
955
956 hwep = (ci->ep0_dir == TX) ? ci->ep0out : ci->ep0in;
957 ci->status->context = ci;
958 ci->status->complete = isr_setup_status_complete;
959
960 return _ep_queue(&hwep->ep, ci->status, GFP_ATOMIC);
961}
962
963/**
964 * isr_tr_complete_low: transaction complete low level handler
965 * @hwep: endpoint
966 *
967 * This function returns an error code
968 * Caller must hold lock
969 */
970static int isr_tr_complete_low(struct ci_hw_ep *hwep)
971__releases(hwep->lock)
972__acquires(hwep->lock)
973{
974 struct ci_hw_req *hwreq, *hwreqtemp;
975 struct ci_hw_ep *hweptemp = hwep;
976 int retval = 0;
977
978 list_for_each_entry_safe(hwreq, hwreqtemp, &hwep->qh.queue,
979 queue) {
980 retval = _hardware_dequeue(hwep, hwreq);
981 if (retval < 0)
982 break;
983 list_del_init(&hwreq->queue);
984 if (hwreq->req.complete != NULL) {
985 spin_unlock(hwep->lock);
986 if ((hwep->type == USB_ENDPOINT_XFER_CONTROL) &&
987 hwreq->req.length)
988 hweptemp = hwep->ci->ep0in;
989 usb_gadget_giveback_request(&hweptemp->ep, &hwreq->req);
990 spin_lock(hwep->lock);
991 }
992 }
993
994 if (retval == -EBUSY)
995 retval = 0;
996
997 return retval;
998}
999
1000static int otg_a_alt_hnp_support(struct ci_hdrc *ci)
1001{
1002 dev_warn(&ci->gadget.dev,
1003 "connect the device to an alternate port if you want HNP\n");
1004 return isr_setup_status_phase(ci);
1005}
1006
1007/**
1008 * isr_setup_packet_handler: setup packet handler
1009 * @ci: UDC descriptor
1010 *
1011 * This function handles setup packet
1012 */
1013static void isr_setup_packet_handler(struct ci_hdrc *ci)
1014__releases(ci->lock)
1015__acquires(ci->lock)
1016{
1017 struct ci_hw_ep *hwep = &ci->ci_hw_ep[0];
1018 struct usb_ctrlrequest req;
1019 int type, num, dir, err = -EINVAL;
1020 u8 tmode = 0;
1021
1022 /*
1023 * Flush data and handshake transactions of previous
1024 * setup packet.
1025 */
1026 _ep_nuke(ci->ep0out);
1027 _ep_nuke(ci->ep0in);
1028
1029 /* read_setup_packet */
1030 do {
1031 hw_test_and_set_setup_guard(ci);
1032 memcpy(&req, &hwep->qh.ptr->setup, sizeof(req));
1033 } while (!hw_test_and_clear_setup_guard(ci));
1034
1035 type = req.bRequestType;
1036
1037 ci->ep0_dir = (type & USB_DIR_IN) ? TX : RX;
1038
1039 switch (req.bRequest) {
1040 case USB_REQ_CLEAR_FEATURE:
1041 if (type == (USB_DIR_OUT|USB_RECIP_ENDPOINT) &&
1042 le16_to_cpu(req.wValue) ==
1043 USB_ENDPOINT_HALT) {
1044 if (req.wLength != 0)
1045 break;
1046 num = le16_to_cpu(req.wIndex);
1047 dir = (num & USB_ENDPOINT_DIR_MASK) ? TX : RX;
1048 num &= USB_ENDPOINT_NUMBER_MASK;
1049 if (dir == TX)
1050 num += ci->hw_ep_max / 2;
1051 if (!ci->ci_hw_ep[num].wedge) {
1052 spin_unlock(&ci->lock);
1053 err = usb_ep_clear_halt(
1054 &ci->ci_hw_ep[num].ep);
1055 spin_lock(&ci->lock);
1056 if (err)
1057 break;
1058 }
1059 err = isr_setup_status_phase(ci);
1060 } else if (type == (USB_DIR_OUT|USB_RECIP_DEVICE) &&
1061 le16_to_cpu(req.wValue) ==
1062 USB_DEVICE_REMOTE_WAKEUP) {
1063 if (req.wLength != 0)
1064 break;
1065 ci->remote_wakeup = 0;
1066 err = isr_setup_status_phase(ci);
1067 } else {
1068 goto delegate;
1069 }
1070 break;
1071 case USB_REQ_GET_STATUS:
1072 if ((type != (USB_DIR_IN|USB_RECIP_DEVICE) ||
1073 le16_to_cpu(req.wIndex) == OTG_STS_SELECTOR) &&
1074 type != (USB_DIR_IN|USB_RECIP_ENDPOINT) &&
1075 type != (USB_DIR_IN|USB_RECIP_INTERFACE))
1076 goto delegate;
1077 if (le16_to_cpu(req.wLength) != 2 ||
1078 le16_to_cpu(req.wValue) != 0)
1079 break;
1080 err = isr_get_status_response(ci, &req);
1081 break;
1082 case USB_REQ_SET_ADDRESS:
1083 if (type != (USB_DIR_OUT|USB_RECIP_DEVICE))
1084 goto delegate;
1085 if (le16_to_cpu(req.wLength) != 0 ||
1086 le16_to_cpu(req.wIndex) != 0)
1087 break;
1088 ci->address = (u8)le16_to_cpu(req.wValue);
1089 ci->setaddr = true;
1090 err = isr_setup_status_phase(ci);
1091 break;
1092 case USB_REQ_SET_FEATURE:
1093 if (type == (USB_DIR_OUT|USB_RECIP_ENDPOINT) &&
1094 le16_to_cpu(req.wValue) ==
1095 USB_ENDPOINT_HALT) {
1096 if (req.wLength != 0)
1097 break;
1098 num = le16_to_cpu(req.wIndex);
1099 dir = (num & USB_ENDPOINT_DIR_MASK) ? TX : RX;
1100 num &= USB_ENDPOINT_NUMBER_MASK;
1101 if (dir == TX)
1102 num += ci->hw_ep_max / 2;
1103
1104 spin_unlock(&ci->lock);
1105 err = _ep_set_halt(&ci->ci_hw_ep[num].ep, 1, false);
1106 spin_lock(&ci->lock);
1107 if (!err)
1108 isr_setup_status_phase(ci);
1109 } else if (type == (USB_DIR_OUT|USB_RECIP_DEVICE)) {
1110 if (req.wLength != 0)
1111 break;
1112 switch (le16_to_cpu(req.wValue)) {
1113 case USB_DEVICE_REMOTE_WAKEUP:
1114 ci->remote_wakeup = 1;
1115 err = isr_setup_status_phase(ci);
1116 break;
1117 case USB_DEVICE_TEST_MODE:
1118 tmode = le16_to_cpu(req.wIndex) >> 8;
1119 switch (tmode) {
1120 case TEST_J:
1121 case TEST_K:
1122 case TEST_SE0_NAK:
1123 case TEST_PACKET:
1124 case TEST_FORCE_EN:
1125 ci->test_mode = tmode;
1126 err = isr_setup_status_phase(
1127 ci);
1128 break;
1129 default:
1130 break;
1131 }
1132 break;
1133 case USB_DEVICE_B_HNP_ENABLE:
1134 if (ci_otg_is_fsm_mode(ci)) {
1135 ci->gadget.b_hnp_enable = 1;
1136 err = isr_setup_status_phase(
1137 ci);
1138 }
1139 break;
1140 case USB_DEVICE_A_ALT_HNP_SUPPORT:
1141 if (ci_otg_is_fsm_mode(ci))
1142 err = otg_a_alt_hnp_support(ci);
1143 break;
1144 case USB_DEVICE_A_HNP_SUPPORT:
1145 if (ci_otg_is_fsm_mode(ci)) {
1146 ci->gadget.a_hnp_support = 1;
1147 err = isr_setup_status_phase(
1148 ci);
1149 }
1150 break;
1151 default:
1152 goto delegate;
1153 }
1154 } else {
1155 goto delegate;
1156 }
1157 break;
1158 default:
1159delegate:
1160 if (req.wLength == 0) /* no data phase */
1161 ci->ep0_dir = TX;
1162
1163 spin_unlock(&ci->lock);
1164 err = ci->driver->setup(&ci->gadget, &req);
1165 spin_lock(&ci->lock);
1166 break;
1167 }
1168
1169 if (err < 0) {
1170 spin_unlock(&ci->lock);
1171 if (_ep_set_halt(&hwep->ep, 1, false))
1172 dev_err(ci->dev, "error: _ep_set_halt\n");
1173 spin_lock(&ci->lock);
1174 }
1175}
1176
1177/**
1178 * isr_tr_complete_handler: transaction complete interrupt handler
1179 * @ci: UDC descriptor
1180 *
1181 * This function handles traffic events
1182 */
1183static void isr_tr_complete_handler(struct ci_hdrc *ci)
1184__releases(ci->lock)
1185__acquires(ci->lock)
1186{
1187 unsigned i;
1188 int err;
1189
1190 for (i = 0; i < ci->hw_ep_max; i++) {
1191 struct ci_hw_ep *hwep = &ci->ci_hw_ep[i];
1192
1193 if (hwep->ep.desc == NULL)
1194 continue; /* not configured */
1195
1196 if (hw_test_and_clear_complete(ci, i)) {
1197 err = isr_tr_complete_low(hwep);
1198 if (hwep->type == USB_ENDPOINT_XFER_CONTROL) {
1199 if (err > 0) /* needs status phase */
1200 err = isr_setup_status_phase(ci);
1201 if (err < 0) {
1202 spin_unlock(&ci->lock);
1203 if (_ep_set_halt(&hwep->ep, 1, false))
1204 dev_err(ci->dev,
1205 "error: _ep_set_halt\n");
1206 spin_lock(&ci->lock);
1207 }
1208 }
1209 }
1210
1211 /* Only handle setup packet below */
1212 if (i == 0 &&
1213 hw_test_and_clear(ci, OP_ENDPTSETUPSTAT, BIT(0)))
1214 isr_setup_packet_handler(ci);
1215 }
1216}
1217
1218/******************************************************************************
1219 * ENDPT block
1220 *****************************************************************************/
1221/**
1222 * ep_enable: configure endpoint, making it usable
1223 *
1224 * Check usb_ep_enable() at "usb_gadget.h" for details
1225 */
1226static int ep_enable(struct usb_ep *ep,
1227 const struct usb_endpoint_descriptor *desc)
1228{
1229 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1230 int retval = 0;
1231 unsigned long flags;
1232 u32 cap = 0;
1233
1234 if (ep == NULL || desc == NULL)
1235 return -EINVAL;
1236
1237 spin_lock_irqsave(hwep->lock, flags);
1238
1239 /* only internal SW should enable ctrl endpts */
1240
1241 if (!list_empty(&hwep->qh.queue)) {
1242 dev_warn(hwep->ci->dev, "enabling a non-empty endpoint!\n");
1243 spin_unlock_irqrestore(hwep->lock, flags);
1244 return -EBUSY;
1245 }
1246
1247 hwep->ep.desc = desc;
1248
1249 hwep->dir = usb_endpoint_dir_in(desc) ? TX : RX;
1250 hwep->num = usb_endpoint_num(desc);
1251 hwep->type = usb_endpoint_type(desc);
1252
1253 hwep->ep.maxpacket = usb_endpoint_maxp(desc);
1254 hwep->ep.mult = usb_endpoint_maxp_mult(desc);
1255
1256 if (hwep->type == USB_ENDPOINT_XFER_CONTROL)
1257 cap |= QH_IOS;
1258
1259 cap |= QH_ZLT;
1260 cap |= (hwep->ep.maxpacket << __ffs(QH_MAX_PKT)) & QH_MAX_PKT;
1261 /*
1262 * For ISO-TX, we set mult at QH as the largest value, and use
1263 * MultO at TD as real mult value.
1264 */
1265 if (hwep->type == USB_ENDPOINT_XFER_ISOC && hwep->dir == TX)
1266 cap |= 3 << __ffs(QH_MULT);
1267
1268 hwep->qh.ptr->cap = cpu_to_le32(cap);
1269
1270 hwep->qh.ptr->td.next |= cpu_to_le32(TD_TERMINATE); /* needed? */
1271
1272 if (hwep->num != 0 && hwep->type == USB_ENDPOINT_XFER_CONTROL) {
1273 dev_err(hwep->ci->dev, "Set control xfer at non-ep0\n");
1274 retval = -EINVAL;
1275 }
1276
1277 /*
1278 * Enable endpoints in the HW other than ep0 as ep0
1279 * is always enabled
1280 */
1281 if (hwep->num)
1282 retval |= hw_ep_enable(hwep->ci, hwep->num, hwep->dir,
1283 hwep->type);
1284
1285 spin_unlock_irqrestore(hwep->lock, flags);
1286 return retval;
1287}
1288
1289/**
1290 * ep_disable: endpoint is no longer usable
1291 *
1292 * Check usb_ep_disable() at "usb_gadget.h" for details
1293 */
1294static int ep_disable(struct usb_ep *ep)
1295{
1296 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1297 int direction, retval = 0;
1298 unsigned long flags;
1299
1300 if (ep == NULL)
1301 return -EINVAL;
1302 else if (hwep->ep.desc == NULL)
1303 return -EBUSY;
1304
1305 spin_lock_irqsave(hwep->lock, flags);
1306 if (hwep->ci->gadget.speed == USB_SPEED_UNKNOWN) {
1307 spin_unlock_irqrestore(hwep->lock, flags);
1308 return 0;
1309 }
1310
1311 /* only internal SW should disable ctrl endpts */
1312
1313 direction = hwep->dir;
1314 do {
1315 retval |= _ep_nuke(hwep);
1316 retval |= hw_ep_disable(hwep->ci, hwep->num, hwep->dir);
1317
1318 if (hwep->type == USB_ENDPOINT_XFER_CONTROL)
1319 hwep->dir = (hwep->dir == TX) ? RX : TX;
1320
1321 } while (hwep->dir != direction);
1322
1323 hwep->ep.desc = NULL;
1324
1325 spin_unlock_irqrestore(hwep->lock, flags);
1326 return retval;
1327}
1328
1329/**
1330 * ep_alloc_request: allocate a request object to use with this endpoint
1331 *
1332 * Check usb_ep_alloc_request() at "usb_gadget.h" for details
1333 */
1334static struct usb_request *ep_alloc_request(struct usb_ep *ep, gfp_t gfp_flags)
1335{
1336 struct ci_hw_req *hwreq = NULL;
1337
1338 if (ep == NULL)
1339 return NULL;
1340
1341 hwreq = kzalloc(sizeof(struct ci_hw_req), gfp_flags);
1342 if (hwreq != NULL) {
1343 INIT_LIST_HEAD(&hwreq->queue);
1344 INIT_LIST_HEAD(&hwreq->tds);
1345 }
1346
1347 return (hwreq == NULL) ? NULL : &hwreq->req;
1348}
1349
1350/**
1351 * ep_free_request: frees a request object
1352 *
1353 * Check usb_ep_free_request() at "usb_gadget.h" for details
1354 */
1355static void ep_free_request(struct usb_ep *ep, struct usb_request *req)
1356{
1357 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1358 struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req);
1359 struct td_node *node, *tmpnode;
1360 unsigned long flags;
1361
1362 if (ep == NULL || req == NULL) {
1363 return;
1364 } else if (!list_empty(&hwreq->queue)) {
1365 dev_err(hwep->ci->dev, "freeing queued request\n");
1366 return;
1367 }
1368
1369 spin_lock_irqsave(hwep->lock, flags);
1370
1371 list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
1372 dma_pool_free(hwep->td_pool, node->ptr, node->dma);
1373 list_del_init(&node->td);
1374 node->ptr = NULL;
1375 kfree(node);
1376 }
1377
1378 kfree(hwreq);
1379
1380 spin_unlock_irqrestore(hwep->lock, flags);
1381}
1382
1383/**
1384 * ep_queue: queues (submits) an I/O request to an endpoint
1385 *
1386 * Check usb_ep_queue()* at usb_gadget.h" for details
1387 */
1388static int ep_queue(struct usb_ep *ep, struct usb_request *req,
1389 gfp_t __maybe_unused gfp_flags)
1390{
1391 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1392 int retval = 0;
1393 unsigned long flags;
1394
1395 if (ep == NULL || req == NULL || hwep->ep.desc == NULL)
1396 return -EINVAL;
1397
1398 spin_lock_irqsave(hwep->lock, flags);
1399 if (hwep->ci->gadget.speed == USB_SPEED_UNKNOWN) {
1400 spin_unlock_irqrestore(hwep->lock, flags);
1401 return 0;
1402 }
1403 retval = _ep_queue(ep, req, gfp_flags);
1404 spin_unlock_irqrestore(hwep->lock, flags);
1405 return retval;
1406}
1407
1408/**
1409 * ep_dequeue: dequeues (cancels, unlinks) an I/O request from an endpoint
1410 *
1411 * Check usb_ep_dequeue() at "usb_gadget.h" for details
1412 */
1413static int ep_dequeue(struct usb_ep *ep, struct usb_request *req)
1414{
1415 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1416 struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req);
1417 unsigned long flags;
1418 struct td_node *node, *tmpnode;
1419
1420 if (ep == NULL || req == NULL || hwreq->req.status != -EALREADY ||
1421 hwep->ep.desc == NULL || list_empty(&hwreq->queue) ||
1422 list_empty(&hwep->qh.queue))
1423 return -EINVAL;
1424
1425 spin_lock_irqsave(hwep->lock, flags);
1426 if (hwep->ci->gadget.speed != USB_SPEED_UNKNOWN)
1427 hw_ep_flush(hwep->ci, hwep->num, hwep->dir);
1428
1429 list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
1430 dma_pool_free(hwep->td_pool, node->ptr, node->dma);
1431 list_del(&node->td);
1432 kfree(node);
1433 }
1434
1435 /* pop request */
1436 list_del_init(&hwreq->queue);
1437
1438 usb_gadget_unmap_request(&hwep->ci->gadget, req, hwep->dir);
1439
1440 req->status = -ECONNRESET;
1441
1442 if (hwreq->req.complete != NULL) {
1443 spin_unlock(hwep->lock);
1444 usb_gadget_giveback_request(&hwep->ep, &hwreq->req);
1445 spin_lock(hwep->lock);
1446 }
1447
1448 spin_unlock_irqrestore(hwep->lock, flags);
1449 return 0;
1450}
1451
1452/**
1453 * ep_set_halt: sets the endpoint halt feature
1454 *
1455 * Check usb_ep_set_halt() at "usb_gadget.h" for details
1456 */
1457static int ep_set_halt(struct usb_ep *ep, int value)
1458{
1459 return _ep_set_halt(ep, value, true);
1460}
1461
1462/**
1463 * ep_set_wedge: sets the halt feature and ignores clear requests
1464 *
1465 * Check usb_ep_set_wedge() at "usb_gadget.h" for details
1466 */
1467static int ep_set_wedge(struct usb_ep *ep)
1468{
1469 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1470 unsigned long flags;
1471
1472 if (ep == NULL || hwep->ep.desc == NULL)
1473 return -EINVAL;
1474
1475 spin_lock_irqsave(hwep->lock, flags);
1476 hwep->wedge = 1;
1477 spin_unlock_irqrestore(hwep->lock, flags);
1478
1479 return usb_ep_set_halt(ep);
1480}
1481
1482/**
1483 * ep_fifo_flush: flushes contents of a fifo
1484 *
1485 * Check usb_ep_fifo_flush() at "usb_gadget.h" for details
1486 */
1487static void ep_fifo_flush(struct usb_ep *ep)
1488{
1489 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1490 unsigned long flags;
1491
1492 if (ep == NULL) {
1493 dev_err(hwep->ci->dev, "%02X: -EINVAL\n", _usb_addr(hwep));
1494 return;
1495 }
1496
1497 spin_lock_irqsave(hwep->lock, flags);
1498 if (hwep->ci->gadget.speed == USB_SPEED_UNKNOWN) {
1499 spin_unlock_irqrestore(hwep->lock, flags);
1500 return;
1501 }
1502
1503 hw_ep_flush(hwep->ci, hwep->num, hwep->dir);
1504
1505 spin_unlock_irqrestore(hwep->lock, flags);
1506}
1507
1508/**
1509 * Endpoint-specific part of the API to the USB controller hardware
1510 * Check "usb_gadget.h" for details
1511 */
1512static const struct usb_ep_ops usb_ep_ops = {
1513 .enable = ep_enable,
1514 .disable = ep_disable,
1515 .alloc_request = ep_alloc_request,
1516 .free_request = ep_free_request,
1517 .queue = ep_queue,
1518 .dequeue = ep_dequeue,
1519 .set_halt = ep_set_halt,
1520 .set_wedge = ep_set_wedge,
1521 .fifo_flush = ep_fifo_flush,
1522};
1523
1524/******************************************************************************
1525 * GADGET block
1526 *****************************************************************************/
1527static int ci_udc_vbus_session(struct usb_gadget *_gadget, int is_active)
1528{
1529 struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
1530 unsigned long flags;
1531 int gadget_ready = 0;
1532
1533 spin_lock_irqsave(&ci->lock, flags);
1534 ci->vbus_active = is_active;
1535 if (ci->driver)
1536 gadget_ready = 1;
1537 spin_unlock_irqrestore(&ci->lock, flags);
1538
1539 if (ci->usb_phy)
1540 usb_phy_set_charger_state(ci->usb_phy, is_active ?
1541 USB_CHARGER_PRESENT : USB_CHARGER_ABSENT);
1542
1543 if (gadget_ready) {
1544 if (is_active) {
1545 pm_runtime_get_sync(&_gadget->dev);
1546 hw_device_reset(ci);
1547 hw_device_state(ci, ci->ep0out->qh.dma);
1548 usb_gadget_set_state(_gadget, USB_STATE_POWERED);
1549 usb_udc_vbus_handler(_gadget, true);
1550 } else {
1551 usb_udc_vbus_handler(_gadget, false);
1552 if (ci->driver)
1553 ci->driver->disconnect(&ci->gadget);
1554 hw_device_state(ci, 0);
1555 if (ci->platdata->notify_event)
1556 ci->platdata->notify_event(ci,
1557 CI_HDRC_CONTROLLER_STOPPED_EVENT);
1558 _gadget_stop_activity(&ci->gadget);
1559 pm_runtime_put_sync(&_gadget->dev);
1560 usb_gadget_set_state(_gadget, USB_STATE_NOTATTACHED);
1561 }
1562 }
1563
1564 return 0;
1565}
1566
1567static int ci_udc_wakeup(struct usb_gadget *_gadget)
1568{
1569 struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
1570 unsigned long flags;
1571 int ret = 0;
1572
1573 spin_lock_irqsave(&ci->lock, flags);
1574 if (ci->gadget.speed == USB_SPEED_UNKNOWN) {
1575 spin_unlock_irqrestore(&ci->lock, flags);
1576 return 0;
1577 }
1578 if (!ci->remote_wakeup) {
1579 ret = -EOPNOTSUPP;
1580 goto out;
1581 }
1582 if (!hw_read(ci, OP_PORTSC, PORTSC_SUSP)) {
1583 ret = -EINVAL;
1584 goto out;
1585 }
1586 hw_write(ci, OP_PORTSC, PORTSC_FPR, PORTSC_FPR);
1587out:
1588 spin_unlock_irqrestore(&ci->lock, flags);
1589 return ret;
1590}
1591
1592static int ci_udc_vbus_draw(struct usb_gadget *_gadget, unsigned ma)
1593{
1594 struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
1595
1596 if (ci->usb_phy)
1597 return usb_phy_set_power(ci->usb_phy, ma);
1598 return -ENOTSUPP;
1599}
1600
1601static int ci_udc_selfpowered(struct usb_gadget *_gadget, int is_on)
1602{
1603 struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
1604 struct ci_hw_ep *hwep = ci->ep0in;
1605 unsigned long flags;
1606
1607 spin_lock_irqsave(hwep->lock, flags);
1608 _gadget->is_selfpowered = (is_on != 0);
1609 spin_unlock_irqrestore(hwep->lock, flags);
1610
1611 return 0;
1612}
1613
1614/* Change Data+ pullup status
1615 * this func is used by usb_gadget_connect/disconnet
1616 */
1617static int ci_udc_pullup(struct usb_gadget *_gadget, int is_on)
1618{
1619 struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
1620
1621 /*
1622 * Data+ pullup controlled by OTG state machine in OTG fsm mode;
1623 * and don't touch Data+ in host mode for dual role config.
1624 */
1625 if (ci_otg_is_fsm_mode(ci) || ci->role == CI_ROLE_HOST)
1626 return 0;
1627
1628 pm_runtime_get_sync(&ci->gadget.dev);
1629 if (is_on)
1630 hw_write(ci, OP_USBCMD, USBCMD_RS, USBCMD_RS);
1631 else
1632 hw_write(ci, OP_USBCMD, USBCMD_RS, 0);
1633 pm_runtime_put_sync(&ci->gadget.dev);
1634
1635 return 0;
1636}
1637
1638static int ci_udc_start(struct usb_gadget *gadget,
1639 struct usb_gadget_driver *driver);
1640static int ci_udc_stop(struct usb_gadget *gadget);
1641
1642/* Match ISOC IN from the highest endpoint */
1643static struct usb_ep *ci_udc_match_ep(struct usb_gadget *gadget,
1644 struct usb_endpoint_descriptor *desc,
1645 struct usb_ss_ep_comp_descriptor *comp_desc)
1646{
1647 struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget);
1648 struct usb_ep *ep;
1649
1650 if (usb_endpoint_xfer_isoc(desc) && usb_endpoint_dir_in(desc)) {
1651 list_for_each_entry_reverse(ep, &ci->gadget.ep_list, ep_list) {
1652 if (ep->caps.dir_in && !ep->claimed)
1653 return ep;
1654 }
1655 }
1656
1657 return NULL;
1658}
1659
1660/**
1661 * Device operations part of the API to the USB controller hardware,
1662 * which don't involve endpoints (or i/o)
1663 * Check "usb_gadget.h" for details
1664 */
1665static const struct usb_gadget_ops usb_gadget_ops = {
1666 .vbus_session = ci_udc_vbus_session,
1667 .wakeup = ci_udc_wakeup,
1668 .set_selfpowered = ci_udc_selfpowered,
1669 .pullup = ci_udc_pullup,
1670 .vbus_draw = ci_udc_vbus_draw,
1671 .udc_start = ci_udc_start,
1672 .udc_stop = ci_udc_stop,
1673 .match_ep = ci_udc_match_ep,
1674};
1675
1676static int init_eps(struct ci_hdrc *ci)
1677{
1678 int retval = 0, i, j;
1679
1680 for (i = 0; i < ci->hw_ep_max/2; i++)
1681 for (j = RX; j <= TX; j++) {
1682 int k = i + j * ci->hw_ep_max/2;
1683 struct ci_hw_ep *hwep = &ci->ci_hw_ep[k];
1684
1685 scnprintf(hwep->name, sizeof(hwep->name), "ep%i%s", i,
1686 (j == TX) ? "in" : "out");
1687
1688 hwep->ci = ci;
1689 hwep->lock = &ci->lock;
1690 hwep->td_pool = ci->td_pool;
1691
1692 hwep->ep.name = hwep->name;
1693 hwep->ep.ops = &usb_ep_ops;
1694
1695 if (i == 0) {
1696 hwep->ep.caps.type_control = true;
1697 } else {
1698 hwep->ep.caps.type_iso = true;
1699 hwep->ep.caps.type_bulk = true;
1700 hwep->ep.caps.type_int = true;
1701 }
1702
1703 if (j == TX)
1704 hwep->ep.caps.dir_in = true;
1705 else
1706 hwep->ep.caps.dir_out = true;
1707
1708 /*
1709 * for ep0: maxP defined in desc, for other
1710 * eps, maxP is set by epautoconfig() called
1711 * by gadget layer
1712 */
1713 usb_ep_set_maxpacket_limit(&hwep->ep, (unsigned short)~0);
1714
1715 INIT_LIST_HEAD(&hwep->qh.queue);
1716 hwep->qh.ptr = dma_pool_zalloc(ci->qh_pool, GFP_KERNEL,
1717 &hwep->qh.dma);
1718 if (hwep->qh.ptr == NULL)
1719 retval = -ENOMEM;
1720
1721 /*
1722 * set up shorthands for ep0 out and in endpoints,
1723 * don't add to gadget's ep_list
1724 */
1725 if (i == 0) {
1726 if (j == RX)
1727 ci->ep0out = hwep;
1728 else
1729 ci->ep0in = hwep;
1730
1731 usb_ep_set_maxpacket_limit(&hwep->ep, CTRL_PAYLOAD_MAX);
1732 continue;
1733 }
1734
1735 list_add_tail(&hwep->ep.ep_list, &ci->gadget.ep_list);
1736 }
1737
1738 return retval;
1739}
1740
1741static void destroy_eps(struct ci_hdrc *ci)
1742{
1743 int i;
1744
1745 for (i = 0; i < ci->hw_ep_max; i++) {
1746 struct ci_hw_ep *hwep = &ci->ci_hw_ep[i];
1747
1748 if (hwep->pending_td)
1749 free_pending_td(hwep);
1750 dma_pool_free(ci->qh_pool, hwep->qh.ptr, hwep->qh.dma);
1751 }
1752}
1753
1754/**
1755 * ci_udc_start: register a gadget driver
1756 * @gadget: our gadget
1757 * @driver: the driver being registered
1758 *
1759 * Interrupts are enabled here.
1760 */
1761static int ci_udc_start(struct usb_gadget *gadget,
1762 struct usb_gadget_driver *driver)
1763{
1764 struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget);
1765 int retval;
1766
1767 if (driver->disconnect == NULL)
1768 return -EINVAL;
1769
1770 ci->ep0out->ep.desc = &ctrl_endpt_out_desc;
1771 retval = usb_ep_enable(&ci->ep0out->ep);
1772 if (retval)
1773 return retval;
1774
1775 ci->ep0in->ep.desc = &ctrl_endpt_in_desc;
1776 retval = usb_ep_enable(&ci->ep0in->ep);
1777 if (retval)
1778 return retval;
1779
1780 ci->driver = driver;
1781
1782 /* Start otg fsm for B-device */
1783 if (ci_otg_is_fsm_mode(ci) && ci->fsm.id) {
1784 ci_hdrc_otg_fsm_start(ci);
1785 return retval;
1786 }
1787
1788 pm_runtime_get_sync(&ci->gadget.dev);
1789 if (ci->vbus_active) {
1790 hw_device_reset(ci);
1791 } else {
1792 usb_udc_vbus_handler(&ci->gadget, false);
1793 pm_runtime_put_sync(&ci->gadget.dev);
1794 return retval;
1795 }
1796
1797 retval = hw_device_state(ci, ci->ep0out->qh.dma);
1798 if (retval)
1799 pm_runtime_put_sync(&ci->gadget.dev);
1800
1801 return retval;
1802}
1803
1804static void ci_udc_stop_for_otg_fsm(struct ci_hdrc *ci)
1805{
1806 if (!ci_otg_is_fsm_mode(ci))
1807 return;
1808
1809 mutex_lock(&ci->fsm.lock);
1810 if (ci->fsm.otg->state == OTG_STATE_A_PERIPHERAL) {
1811 ci->fsm.a_bidl_adis_tmout = 1;
1812 ci_hdrc_otg_fsm_start(ci);
1813 } else if (ci->fsm.otg->state == OTG_STATE_B_PERIPHERAL) {
1814 ci->fsm.protocol = PROTO_UNDEF;
1815 ci->fsm.otg->state = OTG_STATE_UNDEFINED;
1816 }
1817 mutex_unlock(&ci->fsm.lock);
1818}
1819
1820/**
1821 * ci_udc_stop: unregister a gadget driver
1822 */
1823static int ci_udc_stop(struct usb_gadget *gadget)
1824{
1825 struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget);
1826 unsigned long flags;
1827
1828 spin_lock_irqsave(&ci->lock, flags);
1829
1830 if (ci->vbus_active) {
1831 hw_device_state(ci, 0);
1832 spin_unlock_irqrestore(&ci->lock, flags);
1833 if (ci->platdata->notify_event)
1834 ci->platdata->notify_event(ci,
1835 CI_HDRC_CONTROLLER_STOPPED_EVENT);
1836 _gadget_stop_activity(&ci->gadget);
1837 spin_lock_irqsave(&ci->lock, flags);
1838 pm_runtime_put(&ci->gadget.dev);
1839 }
1840
1841 ci->driver = NULL;
1842 spin_unlock_irqrestore(&ci->lock, flags);
1843
1844 ci_udc_stop_for_otg_fsm(ci);
1845 return 0;
1846}
1847
1848/******************************************************************************
1849 * BUS block
1850 *****************************************************************************/
1851/**
1852 * udc_irq: ci interrupt handler
1853 *
1854 * This function returns IRQ_HANDLED if the IRQ has been handled
1855 * It locks access to registers
1856 */
1857static irqreturn_t udc_irq(struct ci_hdrc *ci)
1858{
1859 irqreturn_t retval;
1860 u32 intr;
1861
1862 if (ci == NULL)
1863 return IRQ_HANDLED;
1864
1865 spin_lock(&ci->lock);
1866
1867 if (ci->platdata->flags & CI_HDRC_REGS_SHARED) {
1868 if (hw_read(ci, OP_USBMODE, USBMODE_CM) !=
1869 USBMODE_CM_DC) {
1870 spin_unlock(&ci->lock);
1871 return IRQ_NONE;
1872 }
1873 }
1874 intr = hw_test_and_clear_intr_active(ci);
1875
1876 if (intr) {
1877 /* order defines priority - do NOT change it */
1878 if (USBi_URI & intr)
1879 isr_reset_handler(ci);
1880
1881 if (USBi_PCI & intr) {
1882 ci->gadget.speed = hw_port_is_high_speed(ci) ?
1883 USB_SPEED_HIGH : USB_SPEED_FULL;
1884 if (ci->suspended) {
1885 if (ci->driver->resume) {
1886 spin_unlock(&ci->lock);
1887 ci->driver->resume(&ci->gadget);
1888 spin_lock(&ci->lock);
1889 }
1890 ci->suspended = 0;
1891 usb_gadget_set_state(&ci->gadget,
1892 ci->resume_state);
1893 }
1894 }
1895
1896 if (USBi_UI & intr)
1897 isr_tr_complete_handler(ci);
1898
1899 if ((USBi_SLI & intr) && !(ci->suspended)) {
1900 ci->suspended = 1;
1901 ci->resume_state = ci->gadget.state;
1902 if (ci->gadget.speed != USB_SPEED_UNKNOWN &&
1903 ci->driver->suspend) {
1904 spin_unlock(&ci->lock);
1905 ci->driver->suspend(&ci->gadget);
1906 spin_lock(&ci->lock);
1907 }
1908 usb_gadget_set_state(&ci->gadget,
1909 USB_STATE_SUSPENDED);
1910 }
1911 retval = IRQ_HANDLED;
1912 } else {
1913 retval = IRQ_NONE;
1914 }
1915 spin_unlock(&ci->lock);
1916
1917 return retval;
1918}
1919
1920/**
1921 * udc_start: initialize gadget role
1922 * @ci: chipidea controller
1923 */
1924static int udc_start(struct ci_hdrc *ci)
1925{
1926 struct device *dev = ci->dev;
1927 struct usb_otg_caps *otg_caps = &ci->platdata->ci_otg_caps;
1928 int retval = 0;
1929
1930 ci->gadget.ops = &usb_gadget_ops;
1931 ci->gadget.speed = USB_SPEED_UNKNOWN;
1932 ci->gadget.max_speed = USB_SPEED_HIGH;
1933 ci->gadget.name = ci->platdata->name;
1934 ci->gadget.otg_caps = otg_caps;
1935
1936 if (ci->platdata->flags & CI_HDRC_REQUIRES_ALIGNED_DMA)
1937 ci->gadget.quirk_avoids_skb_reserve = 1;
1938
1939 if (ci->is_otg && (otg_caps->hnp_support || otg_caps->srp_support ||
1940 otg_caps->adp_support))
1941 ci->gadget.is_otg = 1;
1942
1943 INIT_LIST_HEAD(&ci->gadget.ep_list);
1944
1945 /* alloc resources */
1946 ci->qh_pool = dma_pool_create("ci_hw_qh", dev->parent,
1947 sizeof(struct ci_hw_qh),
1948 64, CI_HDRC_PAGE_SIZE);
1949 if (ci->qh_pool == NULL)
1950 return -ENOMEM;
1951
1952 ci->td_pool = dma_pool_create("ci_hw_td", dev->parent,
1953 sizeof(struct ci_hw_td),
1954 64, CI_HDRC_PAGE_SIZE);
1955 if (ci->td_pool == NULL) {
1956 retval = -ENOMEM;
1957 goto free_qh_pool;
1958 }
1959
1960 retval = init_eps(ci);
1961 if (retval)
1962 goto free_pools;
1963
1964 ci->gadget.ep0 = &ci->ep0in->ep;
1965
1966 retval = usb_add_gadget_udc(dev, &ci->gadget);
1967 if (retval)
1968 goto destroy_eps;
1969
1970 pm_runtime_no_callbacks(&ci->gadget.dev);
1971 pm_runtime_enable(&ci->gadget.dev);
1972
1973 return retval;
1974
1975destroy_eps:
1976 destroy_eps(ci);
1977free_pools:
1978 dma_pool_destroy(ci->td_pool);
1979free_qh_pool:
1980 dma_pool_destroy(ci->qh_pool);
1981 return retval;
1982}
1983
1984/**
1985 * ci_hdrc_gadget_destroy: parent remove must call this to remove UDC
1986 *
1987 * No interrupts active, the IRQ has been released
1988 */
1989void ci_hdrc_gadget_destroy(struct ci_hdrc *ci)
1990{
1991 if (!ci->roles[CI_ROLE_GADGET])
1992 return;
1993
1994 usb_del_gadget_udc(&ci->gadget);
1995
1996 destroy_eps(ci);
1997
1998 dma_pool_destroy(ci->td_pool);
1999 dma_pool_destroy(ci->qh_pool);
2000}
2001
2002static int udc_id_switch_for_device(struct ci_hdrc *ci)
2003{
2004 if (ci->platdata->pins_device)
2005 pinctrl_select_state(ci->platdata->pctl,
2006 ci->platdata->pins_device);
2007
2008 if (ci->is_otg)
2009 /* Clear and enable BSV irq */
2010 hw_write_otgsc(ci, OTGSC_BSVIS | OTGSC_BSVIE,
2011 OTGSC_BSVIS | OTGSC_BSVIE);
2012
2013 return 0;
2014}
2015
2016static void udc_id_switch_for_host(struct ci_hdrc *ci)
2017{
2018 /*
2019 * host doesn't care B_SESSION_VALID event
2020 * so clear and disbale BSV irq
2021 */
2022 if (ci->is_otg)
2023 hw_write_otgsc(ci, OTGSC_BSVIE | OTGSC_BSVIS, OTGSC_BSVIS);
2024
2025 ci->vbus_active = 0;
2026
2027 if (ci->platdata->pins_device && ci->platdata->pins_default)
2028 pinctrl_select_state(ci->platdata->pctl,
2029 ci->platdata->pins_default);
2030}
2031
2032/**
2033 * ci_hdrc_gadget_init - initialize device related bits
2034 * ci: the controller
2035 *
2036 * This function initializes the gadget, if the device is "device capable".
2037 */
2038int ci_hdrc_gadget_init(struct ci_hdrc *ci)
2039{
2040 struct ci_role_driver *rdrv;
2041 int ret;
2042
2043 if (!hw_read(ci, CAP_DCCPARAMS, DCCPARAMS_DC))
2044 return -ENXIO;
2045
2046 rdrv = devm_kzalloc(ci->dev, sizeof(*rdrv), GFP_KERNEL);
2047 if (!rdrv)
2048 return -ENOMEM;
2049
2050 rdrv->start = udc_id_switch_for_device;
2051 rdrv->stop = udc_id_switch_for_host;
2052 rdrv->irq = udc_irq;
2053 rdrv->name = "gadget";
2054
2055 ret = udc_start(ci);
2056 if (!ret)
2057 ci->roles[CI_ROLE_GADGET] = rdrv;
2058
2059 return ret;
2060}