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1/**************************************************************************
2 *
3 * Copyright 2000-2006 Alacritech, Inc. All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above
12 * copyright notice, this list of conditions and the following
13 * disclaimer in the documentation and/or other materials provided
14 * with the distribution.
15 *
16 * Alternatively, this software may be distributed under the terms of the
17 * GNU General Public License ("GPL") version 2 as published by the Free
18 * Software Foundation.
19 *
20 * THIS SOFTWARE IS PROVIDED BY ALACRITECH, INC. ``AS IS'' AND ANY
21 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL ALACRITECH, INC. OR
24 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
25 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
26 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
27 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
28 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
29 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
30 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31 * SUCH DAMAGE.
32 *
33 * The views and conclusions contained in the software and documentation
34 * are those of the authors and should not be interpreted as representing
35 * official policies, either expressed or implied, of Alacritech, Inc.
36 *
37 **************************************************************************/
38
39/*
40 * FILENAME: slicoss.c
41 *
42 * The SLICOSS driver for Alacritech's IS-NIC products.
43 *
44 * This driver is supposed to support:
45 *
46 * Mojave cards (single port PCI Gigabit) both copper and fiber
47 * Oasis cards (single and dual port PCI-x Gigabit) copper and fiber
48 * Kalahari cards (dual and quad port PCI-e Gigabit) copper and fiber
49 *
50 * The driver was actually tested on Oasis and Kalahari cards.
51 *
52 *
53 * NOTE: This is the standard, non-accelerated version of Alacritech's
54 * IS-NIC driver.
55 */
56
57
58#define KLUDGE_FOR_4GB_BOUNDARY 1
59#define DEBUG_MICROCODE 1
60#define DBG 1
61#define SLIC_INTERRUPT_PROCESS_LIMIT 1
62#define SLIC_OFFLOAD_IP_CHECKSUM 1
63#define STATS_TIMER_INTERVAL 2
64#define PING_TIMER_INTERVAL 1
65#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
66
67#include <linux/kernel.h>
68#include <linux/string.h>
69#include <linux/errno.h>
70#include <linux/ioport.h>
71#include <linux/slab.h>
72#include <linux/interrupt.h>
73#include <linux/timer.h>
74#include <linux/pci.h>
75#include <linux/spinlock.h>
76#include <linux/init.h>
77#include <linux/bitops.h>
78#include <linux/io.h>
79#include <linux/netdevice.h>
80#include <linux/crc32.h>
81#include <linux/etherdevice.h>
82#include <linux/skbuff.h>
83#include <linux/delay.h>
84#include <linux/debugfs.h>
85#include <linux/seq_file.h>
86#include <linux/kthread.h>
87#include <linux/module.h>
88#include <linux/moduleparam.h>
89
90#include <linux/firmware.h>
91#include <linux/types.h>
92#include <linux/dma-mapping.h>
93#include <linux/mii.h>
94#include <linux/if_vlan.h>
95#include <asm/unaligned.h>
96
97#include <linux/ethtool.h>
98#include <linux/uaccess.h>
99#include "slichw.h"
100#include "slic.h"
101
102static uint slic_first_init = 1;
103static char *slic_banner = "Alacritech SLIC Technology(tm) Server "
104 "and Storage Accelerator (Non-Accelerated)";
105
106static char *slic_proc_version = "2.0.351 2006/07/14 12:26:00";
107static char *slic_product_name = "SLIC Technology(tm) Server "
108 "and Storage Accelerator (Non-Accelerated)";
109static char *slic_vendor = "Alacritech, Inc.";
110
111static int slic_debug = 1;
112static int debug = -1;
113static struct net_device *head_netdevice;
114
115static struct base_driver slic_global = { {}, 0, 0, 0, 1, NULL, NULL };
116static int intagg_delay = 100;
117static u32 dynamic_intagg;
118static unsigned int rcv_count;
119static struct dentry *slic_debugfs;
120
121#define DRV_NAME "slicoss"
122#define DRV_VERSION "2.0.1"
123#define DRV_AUTHOR "Alacritech, Inc. Engineering"
124#define DRV_DESCRIPTION "Alacritech SLIC Techonology(tm) "\
125 "Non-Accelerated Driver"
126#define DRV_COPYRIGHT "Copyright 2000-2006 Alacritech, Inc. "\
127 "All rights reserved."
128#define PFX DRV_NAME " "
129
130MODULE_AUTHOR(DRV_AUTHOR);
131MODULE_DESCRIPTION(DRV_DESCRIPTION);
132MODULE_LICENSE("Dual BSD/GPL");
133
134module_param(dynamic_intagg, int, 0);
135MODULE_PARM_DESC(dynamic_intagg, "Dynamic Interrupt Aggregation Setting");
136module_param(intagg_delay, int, 0);
137MODULE_PARM_DESC(intagg_delay, "uSec Interrupt Aggregation Delay");
138
139static const struct pci_device_id slic_pci_tbl[] = {
140 { PCI_DEVICE(PCI_VENDOR_ID_ALACRITECH, SLIC_1GB_DEVICE_ID) },
141 { PCI_DEVICE(PCI_VENDOR_ID_ALACRITECH, SLIC_2GB_DEVICE_ID) },
142 { 0 }
143};
144
145MODULE_DEVICE_TABLE(pci, slic_pci_tbl);
146
147static inline void slic_reg32_write(void __iomem *reg, u32 value, bool flush)
148{
149 writel(value, reg);
150 if (flush)
151 mb();
152}
153
154static inline void slic_reg64_write(struct adapter *adapter, void __iomem *reg,
155 u32 value, void __iomem *regh, u32 paddrh,
156 bool flush)
157{
158 spin_lock_irqsave(&adapter->bit64reglock.lock,
159 adapter->bit64reglock.flags);
160 if (paddrh != adapter->curaddrupper) {
161 adapter->curaddrupper = paddrh;
162 writel(paddrh, regh);
163 }
164 writel(value, reg);
165 if (flush)
166 mb();
167 spin_unlock_irqrestore(&adapter->bit64reglock.lock,
168 adapter->bit64reglock.flags);
169}
170
171static void slic_mcast_set_bit(struct adapter *adapter, char *address)
172{
173 unsigned char crcpoly;
174
175 /* Get the CRC polynomial for the mac address */
176 /* we use bits 1-8 (lsb), bitwise reversed,
177 * msb (= lsb bit 0 before bitrev) is automatically discarded */
178 crcpoly = (ether_crc(ETH_ALEN, address)>>23);
179
180 /* We only have space on the SLIC for 64 entries. Lop
181 * off the top two bits. (2^6 = 64)
182 */
183 crcpoly &= 0x3F;
184
185 /* OR in the new bit into our 64 bit mask. */
186 adapter->mcastmask |= (u64) 1 << crcpoly;
187}
188
189static void slic_mcast_set_mask(struct adapter *adapter)
190{
191 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
192
193 if (adapter->macopts & (MAC_ALLMCAST | MAC_PROMISC)) {
194 /* Turn on all multicast addresses. We have to do this for
195 * promiscuous mode as well as ALLMCAST mode. It saves the
196 * Microcode from having to keep state about the MAC
197 * configuration.
198 */
199 slic_reg32_write(&slic_regs->slic_mcastlow, 0xFFFFFFFF, FLUSH);
200 slic_reg32_write(&slic_regs->slic_mcasthigh, 0xFFFFFFFF,
201 FLUSH);
202 } else {
203 /* Commit our multicast mast to the SLIC by writing to the
204 * multicast address mask registers
205 */
206 slic_reg32_write(&slic_regs->slic_mcastlow,
207 (u32)(adapter->mcastmask & 0xFFFFFFFF), FLUSH);
208 slic_reg32_write(&slic_regs->slic_mcasthigh,
209 (u32)((adapter->mcastmask >> 32) & 0xFFFFFFFF), FLUSH);
210 }
211}
212
213static void slic_timer_ping(ulong dev)
214{
215 struct adapter *adapter;
216 struct sliccard *card;
217
218 adapter = netdev_priv((struct net_device *)dev);
219 card = adapter->card;
220
221 adapter->pingtimer.expires = jiffies + (PING_TIMER_INTERVAL * HZ);
222 add_timer(&adapter->pingtimer);
223}
224
225static void slic_unmap_mmio_space(struct adapter *adapter)
226{
227 if (adapter->slic_regs)
228 iounmap(adapter->slic_regs);
229 adapter->slic_regs = NULL;
230}
231
232/*
233 * slic_link_config
234 *
235 * Write phy control to configure link duplex/speed
236 *
237 */
238static void slic_link_config(struct adapter *adapter,
239 u32 linkspeed, u32 linkduplex)
240{
241 u32 __iomem *wphy;
242 u32 speed;
243 u32 duplex;
244 u32 phy_config;
245 u32 phy_advreg;
246 u32 phy_gctlreg;
247
248 if (adapter->state != ADAPT_UP)
249 return;
250
251 if (linkspeed > LINK_1000MB)
252 linkspeed = LINK_AUTOSPEED;
253 if (linkduplex > LINK_AUTOD)
254 linkduplex = LINK_AUTOD;
255
256 wphy = &adapter->slic_regs->slic_wphy;
257
258 if ((linkspeed == LINK_AUTOSPEED) || (linkspeed == LINK_1000MB)) {
259 if (adapter->flags & ADAPT_FLAGS_FIBERMEDIA) {
260 /* We've got a fiber gigabit interface, and register
261 * 4 is different in fiber mode than in copper mode
262 */
263
264 /* advertise FD only @1000 Mb */
265 phy_advreg = (MIICR_REG_4 | (PAR_ADV1000XFD));
266 /* enable PAUSE frames */
267 phy_advreg |= PAR_ASYMPAUSE_FIBER;
268 slic_reg32_write(wphy, phy_advreg, FLUSH);
269
270 if (linkspeed == LINK_AUTOSPEED) {
271 /* reset phy, enable auto-neg */
272 phy_config =
273 (MIICR_REG_PCR |
274 (PCR_RESET | PCR_AUTONEG |
275 PCR_AUTONEG_RST));
276 slic_reg32_write(wphy, phy_config, FLUSH);
277 } else { /* forced 1000 Mb FD*/
278 /* power down phy to break link
279 this may not work) */
280 phy_config = (MIICR_REG_PCR | PCR_POWERDOWN);
281 slic_reg32_write(wphy, phy_config, FLUSH);
282 /* wait, Marvell says 1 sec,
283 try to get away with 10 ms */
284 mdelay(10);
285
286 /* disable auto-neg, set speed/duplex,
287 soft reset phy, powerup */
288 phy_config =
289 (MIICR_REG_PCR |
290 (PCR_RESET | PCR_SPEED_1000 |
291 PCR_DUPLEX_FULL));
292 slic_reg32_write(wphy, phy_config, FLUSH);
293 }
294 } else { /* copper gigabit */
295
296 /* Auto-Negotiate or 1000 Mb must be auto negotiated
297 * We've got a copper gigabit interface, and
298 * register 4 is different in copper mode than
299 * in fiber mode
300 */
301 if (linkspeed == LINK_AUTOSPEED) {
302 /* advertise 10/100 Mb modes */
303 phy_advreg =
304 (MIICR_REG_4 |
305 (PAR_ADV100FD | PAR_ADV100HD | PAR_ADV10FD
306 | PAR_ADV10HD));
307 } else {
308 /* linkspeed == LINK_1000MB -
309 don't advertise 10/100 Mb modes */
310 phy_advreg = MIICR_REG_4;
311 }
312 /* enable PAUSE frames */
313 phy_advreg |= PAR_ASYMPAUSE;
314 /* required by the Cicada PHY */
315 phy_advreg |= PAR_802_3;
316 slic_reg32_write(wphy, phy_advreg, FLUSH);
317 /* advertise FD only @1000 Mb */
318 phy_gctlreg = (MIICR_REG_9 | (PGC_ADV1000FD));
319 slic_reg32_write(wphy, phy_gctlreg, FLUSH);
320
321 if (adapter->subsysid != SLIC_1GB_CICADA_SUBSYS_ID) {
322 /* if a Marvell PHY
323 enable auto crossover */
324 phy_config =
325 (MIICR_REG_16 | (MRV_REG16_XOVERON));
326 slic_reg32_write(wphy, phy_config, FLUSH);
327
328 /* reset phy, enable auto-neg */
329 phy_config =
330 (MIICR_REG_PCR |
331 (PCR_RESET | PCR_AUTONEG |
332 PCR_AUTONEG_RST));
333 slic_reg32_write(wphy, phy_config, FLUSH);
334 } else { /* it's a Cicada PHY */
335 /* enable and restart auto-neg (don't reset) */
336 phy_config =
337 (MIICR_REG_PCR |
338 (PCR_AUTONEG | PCR_AUTONEG_RST));
339 slic_reg32_write(wphy, phy_config, FLUSH);
340 }
341 }
342 } else {
343 /* Forced 10/100 */
344 if (linkspeed == LINK_10MB)
345 speed = 0;
346 else
347 speed = PCR_SPEED_100;
348 if (linkduplex == LINK_HALFD)
349 duplex = 0;
350 else
351 duplex = PCR_DUPLEX_FULL;
352
353 if (adapter->subsysid != SLIC_1GB_CICADA_SUBSYS_ID) {
354 /* if a Marvell PHY
355 disable auto crossover */
356 phy_config = (MIICR_REG_16 | (MRV_REG16_XOVEROFF));
357 slic_reg32_write(wphy, phy_config, FLUSH);
358 }
359
360 /* power down phy to break link (this may not work) */
361 phy_config = (MIICR_REG_PCR | (PCR_POWERDOWN | speed | duplex));
362 slic_reg32_write(wphy, phy_config, FLUSH);
363
364 /* wait, Marvell says 1 sec, try to get away with 10 ms */
365 mdelay(10);
366
367 if (adapter->subsysid != SLIC_1GB_CICADA_SUBSYS_ID) {
368 /* if a Marvell PHY
369 disable auto-neg, set speed,
370 soft reset phy, powerup */
371 phy_config =
372 (MIICR_REG_PCR | (PCR_RESET | speed | duplex));
373 slic_reg32_write(wphy, phy_config, FLUSH);
374 } else { /* it's a Cicada PHY */
375 /* disable auto-neg, set speed, powerup */
376 phy_config = (MIICR_REG_PCR | (speed | duplex));
377 slic_reg32_write(wphy, phy_config, FLUSH);
378 }
379 }
380}
381
382static int slic_card_download_gbrcv(struct adapter *adapter)
383{
384 const struct firmware *fw;
385 const char *file = "";
386 int ret;
387 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
388 u32 codeaddr;
389 u32 instruction;
390 int index = 0;
391 u32 rcvucodelen = 0;
392
393 switch (adapter->devid) {
394 case SLIC_2GB_DEVICE_ID:
395 file = "slicoss/oasisrcvucode.sys";
396 break;
397 case SLIC_1GB_DEVICE_ID:
398 file = "slicoss/gbrcvucode.sys";
399 break;
400 default:
401 return -ENOENT;
402 }
403
404 ret = request_firmware(&fw, file, &adapter->pcidev->dev);
405 if (ret) {
406 dev_err(&adapter->pcidev->dev,
407 "SLICOSS: Failed to load firmware %s\n", file);
408 return ret;
409 }
410
411 rcvucodelen = *(u32 *)(fw->data + index);
412 index += 4;
413 switch (adapter->devid) {
414 case SLIC_2GB_DEVICE_ID:
415 if (rcvucodelen != OasisRcvUCodeLen) {
416 release_firmware(fw);
417 return -EINVAL;
418 }
419 break;
420 case SLIC_1GB_DEVICE_ID:
421 if (rcvucodelen != GBRcvUCodeLen) {
422 release_firmware(fw);
423 return -EINVAL;
424 }
425 break;
426 }
427 /* start download */
428 slic_reg32_write(&slic_regs->slic_rcv_wcs, SLIC_RCVWCS_BEGIN, FLUSH);
429 /* download the rcv sequencer ucode */
430 for (codeaddr = 0; codeaddr < rcvucodelen; codeaddr++) {
431 /* write out instruction address */
432 slic_reg32_write(&slic_regs->slic_rcv_wcs, codeaddr, FLUSH);
433
434 instruction = *(u32 *)(fw->data + index);
435 index += 4;
436 /* write out the instruction data low addr */
437 slic_reg32_write(&slic_regs->slic_rcv_wcs, instruction, FLUSH);
438
439 instruction = *(u8 *)(fw->data + index);
440 index++;
441 /* write out the instruction data high addr */
442 slic_reg32_write(&slic_regs->slic_rcv_wcs, (u8)instruction,
443 FLUSH);
444 }
445
446 /* download finished */
447 release_firmware(fw);
448 slic_reg32_write(&slic_regs->slic_rcv_wcs, SLIC_RCVWCS_FINISH, FLUSH);
449 return 0;
450}
451
452MODULE_FIRMWARE("slicoss/oasisrcvucode.sys");
453MODULE_FIRMWARE("slicoss/gbrcvucode.sys");
454
455static int slic_card_download(struct adapter *adapter)
456{
457 const struct firmware *fw;
458 const char *file = "";
459 int ret;
460 u32 section;
461 int thissectionsize;
462 int codeaddr;
463 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
464 u32 instruction;
465 u32 baseaddress;
466 u32 i;
467 u32 numsects = 0;
468 u32 sectsize[3];
469 u32 sectstart[3];
470 int ucode_start, index = 0;
471
472 switch (adapter->devid) {
473 case SLIC_2GB_DEVICE_ID:
474 file = "slicoss/oasisdownload.sys";
475 break;
476 case SLIC_1GB_DEVICE_ID:
477 file = "slicoss/gbdownload.sys";
478 break;
479 default:
480 return -ENOENT;
481 }
482 ret = request_firmware(&fw, file, &adapter->pcidev->dev);
483 if (ret) {
484 dev_err(&adapter->pcidev->dev,
485 "SLICOSS: Failed to load firmware %s\n", file);
486 return ret;
487 }
488 numsects = *(u32 *)(fw->data + index);
489 index += 4;
490 for (i = 0; i < numsects; i++) {
491 sectsize[i] = *(u32 *)(fw->data + index);
492 index += 4;
493 }
494 for (i = 0; i < numsects; i++) {
495 sectstart[i] = *(u32 *)(fw->data + index);
496 index += 4;
497 }
498 ucode_start = index;
499 instruction = *(u32 *)(fw->data + index);
500 index += 4;
501 for (section = 0; section < numsects; section++) {
502 baseaddress = sectstart[section];
503 thissectionsize = sectsize[section] >> 3;
504
505 for (codeaddr = 0; codeaddr < thissectionsize; codeaddr++) {
506 /* Write out instruction address */
507 slic_reg32_write(&slic_regs->slic_wcs,
508 baseaddress + codeaddr, FLUSH);
509 /* Write out instruction to low addr */
510 slic_reg32_write(&slic_regs->slic_wcs, instruction, FLUSH);
511 instruction = *(u32 *)(fw->data + index);
512 index += 4;
513
514 /* Write out instruction to high addr */
515 slic_reg32_write(&slic_regs->slic_wcs, instruction, FLUSH);
516 instruction = *(u32 *)(fw->data + index);
517 index += 4;
518 }
519 }
520 index = ucode_start;
521 for (section = 0; section < numsects; section++) {
522 instruction = *(u32 *)(fw->data + index);
523 baseaddress = sectstart[section];
524 if (baseaddress < 0x8000)
525 continue;
526 thissectionsize = sectsize[section] >> 3;
527
528 for (codeaddr = 0; codeaddr < thissectionsize; codeaddr++) {
529 /* Write out instruction address */
530 slic_reg32_write(&slic_regs->slic_wcs,
531 SLIC_WCS_COMPARE | (baseaddress + codeaddr),
532 FLUSH);
533 /* Write out instruction to low addr */
534 slic_reg32_write(&slic_regs->slic_wcs, instruction,
535 FLUSH);
536 instruction = *(u32 *)(fw->data + index);
537 index += 4;
538 /* Write out instruction to high addr */
539 slic_reg32_write(&slic_regs->slic_wcs, instruction,
540 FLUSH);
541 instruction = *(u32 *)(fw->data + index);
542 index += 4;
543
544 /* Check SRAM location zero. If it is non-zero. Abort.*/
545/* failure = readl((u32 __iomem *)&slic_regs->slic_reset);
546 if (failure) {
547 release_firmware(fw);
548 return -EIO;
549 }*/
550 }
551 }
552 release_firmware(fw);
553 /* Everything OK, kick off the card */
554 mdelay(10);
555 slic_reg32_write(&slic_regs->slic_wcs, SLIC_WCS_START, FLUSH);
556
557 /* stall for 20 ms, long enough for ucode to init card
558 and reach mainloop */
559 mdelay(20);
560
561 return 0;
562}
563
564MODULE_FIRMWARE("slicoss/oasisdownload.sys");
565MODULE_FIRMWARE("slicoss/gbdownload.sys");
566
567static void slic_adapter_set_hwaddr(struct adapter *adapter)
568{
569 struct sliccard *card = adapter->card;
570
571 if ((adapter->card) && (card->config_set)) {
572 memcpy(adapter->macaddr,
573 card->config.MacInfo[adapter->functionnumber].macaddrA,
574 sizeof(struct slic_config_mac));
575 if (is_zero_ether_addr(adapter->currmacaddr))
576 memcpy(adapter->currmacaddr, adapter->macaddr,
577 ETH_ALEN);
578 if (adapter->netdev)
579 memcpy(adapter->netdev->dev_addr, adapter->currmacaddr,
580 ETH_ALEN);
581 }
582}
583
584static void slic_intagg_set(struct adapter *adapter, u32 value)
585{
586 slic_reg32_write(&adapter->slic_regs->slic_intagg, value, FLUSH);
587 adapter->card->loadlevel_current = value;
588}
589
590static void slic_soft_reset(struct adapter *adapter)
591{
592 if (adapter->card->state == CARD_UP) {
593 slic_reg32_write(&adapter->slic_regs->slic_quiesce, 0, FLUSH);
594 mdelay(1);
595 }
596
597 slic_reg32_write(&adapter->slic_regs->slic_reset, SLIC_RESET_MAGIC,
598 FLUSH);
599 mdelay(1);
600}
601
602static void slic_mac_address_config(struct adapter *adapter)
603{
604 u32 value;
605 u32 value2;
606 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
607
608 value = *(u32 *) &adapter->currmacaddr[2];
609 value = ntohl(value);
610 slic_reg32_write(&slic_regs->slic_wraddral, value, FLUSH);
611 slic_reg32_write(&slic_regs->slic_wraddrbl, value, FLUSH);
612
613 value2 = (u32) ((adapter->currmacaddr[0] << 8 |
614 adapter->currmacaddr[1]) & 0xFFFF);
615
616 slic_reg32_write(&slic_regs->slic_wraddrah, value2, FLUSH);
617 slic_reg32_write(&slic_regs->slic_wraddrbh, value2, FLUSH);
618
619 /* Write our multicast mask out to the card. This is done */
620 /* here in addition to the slic_mcast_addr_set routine */
621 /* because ALL_MCAST may have been enabled or disabled */
622 slic_mcast_set_mask(adapter);
623}
624
625static void slic_mac_config(struct adapter *adapter)
626{
627 u32 value;
628 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
629
630 /* Setup GMAC gaps */
631 if (adapter->linkspeed == LINK_1000MB) {
632 value = ((GMCR_GAPBB_1000 << GMCR_GAPBB_SHIFT) |
633 (GMCR_GAPR1_1000 << GMCR_GAPR1_SHIFT) |
634 (GMCR_GAPR2_1000 << GMCR_GAPR2_SHIFT));
635 } else {
636 value = ((GMCR_GAPBB_100 << GMCR_GAPBB_SHIFT) |
637 (GMCR_GAPR1_100 << GMCR_GAPR1_SHIFT) |
638 (GMCR_GAPR2_100 << GMCR_GAPR2_SHIFT));
639 }
640
641 /* enable GMII */
642 if (adapter->linkspeed == LINK_1000MB)
643 value |= GMCR_GBIT;
644
645 /* enable fullduplex */
646 if ((adapter->linkduplex == LINK_FULLD)
647 || (adapter->macopts & MAC_LOOPBACK)) {
648 value |= GMCR_FULLD;
649 }
650
651 /* write mac config */
652 slic_reg32_write(&slic_regs->slic_wmcfg, value, FLUSH);
653
654 /* setup mac addresses */
655 slic_mac_address_config(adapter);
656}
657
658static void slic_config_set(struct adapter *adapter, bool linkchange)
659{
660 u32 value;
661 u32 RcrReset;
662 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
663
664 if (linkchange) {
665 /* Setup MAC */
666 slic_mac_config(adapter);
667 RcrReset = GRCR_RESET;
668 } else {
669 slic_mac_address_config(adapter);
670 RcrReset = 0;
671 }
672
673 if (adapter->linkduplex == LINK_FULLD) {
674 /* setup xmtcfg */
675 value = (GXCR_RESET | /* Always reset */
676 GXCR_XMTEN | /* Enable transmit */
677 GXCR_PAUSEEN); /* Enable pause */
678
679 slic_reg32_write(&slic_regs->slic_wxcfg, value, FLUSH);
680
681 /* Setup rcvcfg last */
682 value = (RcrReset | /* Reset, if linkchange */
683 GRCR_CTLEN | /* Enable CTL frames */
684 GRCR_ADDRAEN | /* Address A enable */
685 GRCR_RCVBAD | /* Rcv bad frames */
686 (GRCR_HASHSIZE << GRCR_HASHSIZE_SHIFT));
687 } else {
688 /* setup xmtcfg */
689 value = (GXCR_RESET | /* Always reset */
690 GXCR_XMTEN); /* Enable transmit */
691
692 slic_reg32_write(&slic_regs->slic_wxcfg, value, FLUSH);
693
694 /* Setup rcvcfg last */
695 value = (RcrReset | /* Reset, if linkchange */
696 GRCR_ADDRAEN | /* Address A enable */
697 GRCR_RCVBAD | /* Rcv bad frames */
698 (GRCR_HASHSIZE << GRCR_HASHSIZE_SHIFT));
699 }
700
701 if (adapter->state != ADAPT_DOWN) {
702 /* Only enable receive if we are restarting or running */
703 value |= GRCR_RCVEN;
704 }
705
706 if (adapter->macopts & MAC_PROMISC)
707 value |= GRCR_RCVALL;
708
709 slic_reg32_write(&slic_regs->slic_wrcfg, value, FLUSH);
710}
711
712/*
713 * Turn off RCV and XMT, power down PHY
714 */
715static void slic_config_clear(struct adapter *adapter)
716{
717 u32 value;
718 u32 phy_config;
719 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
720
721 /* Setup xmtcfg */
722 value = (GXCR_RESET | /* Always reset */
723 GXCR_PAUSEEN); /* Enable pause */
724
725 slic_reg32_write(&slic_regs->slic_wxcfg, value, FLUSH);
726
727 value = (GRCR_RESET | /* Always reset */
728 GRCR_CTLEN | /* Enable CTL frames */
729 GRCR_ADDRAEN | /* Address A enable */
730 (GRCR_HASHSIZE << GRCR_HASHSIZE_SHIFT));
731
732 slic_reg32_write(&slic_regs->slic_wrcfg, value, FLUSH);
733
734 /* power down phy */
735 phy_config = (MIICR_REG_PCR | (PCR_POWERDOWN));
736 slic_reg32_write(&slic_regs->slic_wphy, phy_config, FLUSH);
737}
738
739static bool slic_mac_filter(struct adapter *adapter,
740 struct ether_header *ether_frame)
741{
742 struct net_device *netdev = adapter->netdev;
743 u32 opts = adapter->macopts;
744
745 if (opts & MAC_PROMISC)
746 return true;
747
748 if (is_broadcast_ether_addr(ether_frame->ether_dhost)) {
749 if (opts & MAC_BCAST) {
750 adapter->rcv_broadcasts++;
751 return true;
752 } else {
753 return false;
754 }
755 }
756
757 if (is_multicast_ether_addr(ether_frame->ether_dhost)) {
758 if (opts & MAC_ALLMCAST) {
759 adapter->rcv_multicasts++;
760 netdev->stats.multicast++;
761 return true;
762 }
763 if (opts & MAC_MCAST) {
764 struct mcast_address *mcaddr = adapter->mcastaddrs;
765
766 while (mcaddr) {
767 if (ether_addr_equal(mcaddr->address,
768 ether_frame->ether_dhost)) {
769 adapter->rcv_multicasts++;
770 netdev->stats.multicast++;
771 return true;
772 }
773 mcaddr = mcaddr->next;
774 }
775 return false;
776 } else {
777 return false;
778 }
779 }
780 if (opts & MAC_DIRECTED) {
781 adapter->rcv_unicasts++;
782 return true;
783 }
784 return false;
785
786}
787
788static int slic_mac_set_address(struct net_device *dev, void *ptr)
789{
790 struct adapter *adapter = netdev_priv(dev);
791 struct sockaddr *addr = ptr;
792
793 if (netif_running(dev))
794 return -EBUSY;
795 if (!adapter)
796 return -EBUSY;
797
798 if (!is_valid_ether_addr(addr->sa_data))
799 return -EINVAL;
800
801 memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
802 memcpy(adapter->currmacaddr, addr->sa_data, dev->addr_len);
803
804 slic_config_set(adapter, true);
805 return 0;
806}
807
808static void slic_timer_load_check(ulong cardaddr)
809{
810 struct sliccard *card = (struct sliccard *)cardaddr;
811 struct adapter *adapter = card->master;
812 u32 __iomem *intagg;
813 u32 load = card->events;
814 u32 level = 0;
815
816 if ((adapter) && (adapter->state == ADAPT_UP) &&
817 (card->state == CARD_UP) && (slic_global.dynamic_intagg)) {
818 intagg = &adapter->slic_regs->slic_intagg;
819 if (adapter->devid == SLIC_1GB_DEVICE_ID) {
820 if (adapter->linkspeed == LINK_1000MB)
821 level = 100;
822 else {
823 if (load > SLIC_LOAD_5)
824 level = SLIC_INTAGG_5;
825 else if (load > SLIC_LOAD_4)
826 level = SLIC_INTAGG_4;
827 else if (load > SLIC_LOAD_3)
828 level = SLIC_INTAGG_3;
829 else if (load > SLIC_LOAD_2)
830 level = SLIC_INTAGG_2;
831 else if (load > SLIC_LOAD_1)
832 level = SLIC_INTAGG_1;
833 else
834 level = SLIC_INTAGG_0;
835 }
836 if (card->loadlevel_current != level) {
837 card->loadlevel_current = level;
838 slic_reg32_write(intagg, level, FLUSH);
839 }
840 } else {
841 if (load > SLIC_LOAD_5)
842 level = SLIC_INTAGG_5;
843 else if (load > SLIC_LOAD_4)
844 level = SLIC_INTAGG_4;
845 else if (load > SLIC_LOAD_3)
846 level = SLIC_INTAGG_3;
847 else if (load > SLIC_LOAD_2)
848 level = SLIC_INTAGG_2;
849 else if (load > SLIC_LOAD_1)
850 level = SLIC_INTAGG_1;
851 else
852 level = SLIC_INTAGG_0;
853 if (card->loadlevel_current != level) {
854 card->loadlevel_current = level;
855 slic_reg32_write(intagg, level, FLUSH);
856 }
857 }
858 }
859 card->events = 0;
860 card->loadtimer.expires = jiffies + (SLIC_LOADTIMER_PERIOD * HZ);
861 add_timer(&card->loadtimer);
862}
863
864static int slic_upr_queue_request(struct adapter *adapter,
865 u32 upr_request,
866 u32 upr_data,
867 u32 upr_data_h,
868 u32 upr_buffer, u32 upr_buffer_h)
869{
870 struct slic_upr *upr;
871 struct slic_upr *uprqueue;
872
873 upr = kmalloc(sizeof(struct slic_upr), GFP_ATOMIC);
874 if (!upr)
875 return -ENOMEM;
876
877 upr->adapter = adapter->port;
878 upr->upr_request = upr_request;
879 upr->upr_data = upr_data;
880 upr->upr_buffer = upr_buffer;
881 upr->upr_data_h = upr_data_h;
882 upr->upr_buffer_h = upr_buffer_h;
883 upr->next = NULL;
884 if (adapter->upr_list) {
885 uprqueue = adapter->upr_list;
886
887 while (uprqueue->next)
888 uprqueue = uprqueue->next;
889 uprqueue->next = upr;
890 } else {
891 adapter->upr_list = upr;
892 }
893 return 0;
894}
895
896static void slic_upr_start(struct adapter *adapter)
897{
898 struct slic_upr *upr;
899 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
900/*
901 char * ptr1;
902 char * ptr2;
903 uint cmdoffset;
904*/
905 upr = adapter->upr_list;
906 if (!upr)
907 return;
908 if (adapter->upr_busy)
909 return;
910 adapter->upr_busy = 1;
911
912 switch (upr->upr_request) {
913 case SLIC_UPR_STATS:
914 if (upr->upr_data_h == 0) {
915 slic_reg32_write(&slic_regs->slic_stats, upr->upr_data,
916 FLUSH);
917 } else {
918 slic_reg64_write(adapter, &slic_regs->slic_stats64,
919 upr->upr_data,
920 &slic_regs->slic_addr_upper,
921 upr->upr_data_h, FLUSH);
922 }
923 break;
924
925 case SLIC_UPR_RLSR:
926 slic_reg64_write(adapter, &slic_regs->slic_rlsr, upr->upr_data,
927 &slic_regs->slic_addr_upper, upr->upr_data_h,
928 FLUSH);
929 break;
930
931 case SLIC_UPR_RCONFIG:
932 slic_reg64_write(adapter, &slic_regs->slic_rconfig,
933 upr->upr_data, &slic_regs->slic_addr_upper,
934 upr->upr_data_h, FLUSH);
935 break;
936 case SLIC_UPR_PING:
937 slic_reg32_write(&slic_regs->slic_ping, 1, FLUSH);
938 break;
939 }
940}
941
942static int slic_upr_request(struct adapter *adapter,
943 u32 upr_request,
944 u32 upr_data,
945 u32 upr_data_h,
946 u32 upr_buffer, u32 upr_buffer_h)
947{
948 int rc;
949
950 spin_lock_irqsave(&adapter->upr_lock.lock, adapter->upr_lock.flags);
951 rc = slic_upr_queue_request(adapter,
952 upr_request,
953 upr_data,
954 upr_data_h, upr_buffer, upr_buffer_h);
955 if (rc)
956 goto err_unlock_irq;
957
958 slic_upr_start(adapter);
959err_unlock_irq:
960 spin_unlock_irqrestore(&adapter->upr_lock.lock,
961 adapter->upr_lock.flags);
962 return rc;
963}
964
965static void slic_link_upr_complete(struct adapter *adapter, u32 isr)
966{
967 u32 linkstatus = adapter->pshmem->linkstatus;
968 uint linkup;
969 unsigned char linkspeed;
970 unsigned char linkduplex;
971
972 if ((isr & ISR_UPCERR) || (isr & ISR_UPCBSY)) {
973 struct slic_shmem *pshmem;
974
975 pshmem = (struct slic_shmem *)(unsigned long)
976 adapter->phys_shmem;
977#if BITS_PER_LONG == 64
978 slic_upr_queue_request(adapter,
979 SLIC_UPR_RLSR,
980 SLIC_GET_ADDR_LOW(&pshmem->linkstatus),
981 SLIC_GET_ADDR_HIGH(&pshmem->linkstatus),
982 0, 0);
983#else
984 slic_upr_queue_request(adapter,
985 SLIC_UPR_RLSR,
986 (u32) &pshmem->linkstatus,
987 SLIC_GET_ADDR_HIGH(pshmem), 0, 0);
988#endif
989 return;
990 }
991 if (adapter->state != ADAPT_UP)
992 return;
993
994 linkup = linkstatus & GIG_LINKUP ? LINK_UP : LINK_DOWN;
995 if (linkstatus & GIG_SPEED_1000)
996 linkspeed = LINK_1000MB;
997 else if (linkstatus & GIG_SPEED_100)
998 linkspeed = LINK_100MB;
999 else
1000 linkspeed = LINK_10MB;
1001
1002 if (linkstatus & GIG_FULLDUPLEX)
1003 linkduplex = LINK_FULLD;
1004 else
1005 linkduplex = LINK_HALFD;
1006
1007 if ((adapter->linkstate == LINK_DOWN) && (linkup == LINK_DOWN))
1008 return;
1009
1010 /* link up event, but nothing has changed */
1011 if ((adapter->linkstate == LINK_UP) &&
1012 (linkup == LINK_UP) &&
1013 (adapter->linkspeed == linkspeed) &&
1014 (adapter->linkduplex == linkduplex))
1015 return;
1016
1017 /* link has changed at this point */
1018
1019 /* link has gone from up to down */
1020 if (linkup == LINK_DOWN) {
1021 adapter->linkstate = LINK_DOWN;
1022 return;
1023 }
1024
1025 /* link has gone from down to up */
1026 adapter->linkspeed = linkspeed;
1027 adapter->linkduplex = linkduplex;
1028
1029 if (adapter->linkstate != LINK_UP) {
1030 /* setup the mac */
1031 slic_config_set(adapter, true);
1032 adapter->linkstate = LINK_UP;
1033 netif_start_queue(adapter->netdev);
1034 }
1035}
1036
1037static void slic_upr_request_complete(struct adapter *adapter, u32 isr)
1038{
1039 struct sliccard *card = adapter->card;
1040 struct slic_upr *upr;
1041
1042 spin_lock_irqsave(&adapter->upr_lock.lock, adapter->upr_lock.flags);
1043 upr = adapter->upr_list;
1044 if (!upr) {
1045 spin_unlock_irqrestore(&adapter->upr_lock.lock,
1046 adapter->upr_lock.flags);
1047 return;
1048 }
1049 adapter->upr_list = upr->next;
1050 upr->next = NULL;
1051 adapter->upr_busy = 0;
1052 switch (upr->upr_request) {
1053 case SLIC_UPR_STATS:
1054 {
1055 struct slic_stats *slicstats =
1056 (struct slic_stats *) &adapter->pshmem->inicstats;
1057 struct slic_stats *newstats = slicstats;
1058 struct slic_stats *old = &adapter->inicstats_prev;
1059 struct slicnet_stats *stst = &adapter->slic_stats;
1060
1061 if (isr & ISR_UPCERR) {
1062 dev_err(&adapter->netdev->dev,
1063 "SLIC_UPR_STATS command failed isr[%x]\n",
1064 isr);
1065
1066 break;
1067 }
1068 UPDATE_STATS_GB(stst->tcp.xmit_tcp_segs,
1069 newstats->xmit_tcp_segs_gb,
1070 old->xmit_tcp_segs_gb);
1071
1072 UPDATE_STATS_GB(stst->tcp.xmit_tcp_bytes,
1073 newstats->xmit_tcp_bytes_gb,
1074 old->xmit_tcp_bytes_gb);
1075
1076 UPDATE_STATS_GB(stst->tcp.rcv_tcp_segs,
1077 newstats->rcv_tcp_segs_gb,
1078 old->rcv_tcp_segs_gb);
1079
1080 UPDATE_STATS_GB(stst->tcp.rcv_tcp_bytes,
1081 newstats->rcv_tcp_bytes_gb,
1082 old->rcv_tcp_bytes_gb);
1083
1084 UPDATE_STATS_GB(stst->iface.xmt_bytes,
1085 newstats->xmit_bytes_gb,
1086 old->xmit_bytes_gb);
1087
1088 UPDATE_STATS_GB(stst->iface.xmt_ucast,
1089 newstats->xmit_unicasts_gb,
1090 old->xmit_unicasts_gb);
1091
1092 UPDATE_STATS_GB(stst->iface.rcv_bytes,
1093 newstats->rcv_bytes_gb,
1094 old->rcv_bytes_gb);
1095
1096 UPDATE_STATS_GB(stst->iface.rcv_ucast,
1097 newstats->rcv_unicasts_gb,
1098 old->rcv_unicasts_gb);
1099
1100 UPDATE_STATS_GB(stst->iface.xmt_errors,
1101 newstats->xmit_collisions_gb,
1102 old->xmit_collisions_gb);
1103
1104 UPDATE_STATS_GB(stst->iface.xmt_errors,
1105 newstats->xmit_excess_collisions_gb,
1106 old->xmit_excess_collisions_gb);
1107
1108 UPDATE_STATS_GB(stst->iface.xmt_errors,
1109 newstats->xmit_other_error_gb,
1110 old->xmit_other_error_gb);
1111
1112 UPDATE_STATS_GB(stst->iface.rcv_errors,
1113 newstats->rcv_other_error_gb,
1114 old->rcv_other_error_gb);
1115
1116 UPDATE_STATS_GB(stst->iface.rcv_discards,
1117 newstats->rcv_drops_gb,
1118 old->rcv_drops_gb);
1119
1120 if (newstats->rcv_drops_gb > old->rcv_drops_gb) {
1121 adapter->rcv_drops +=
1122 (newstats->rcv_drops_gb -
1123 old->rcv_drops_gb);
1124 }
1125 memcpy(old, newstats, sizeof(struct slic_stats));
1126 break;
1127 }
1128 case SLIC_UPR_RLSR:
1129 slic_link_upr_complete(adapter, isr);
1130 break;
1131 case SLIC_UPR_RCONFIG:
1132 break;
1133 case SLIC_UPR_PING:
1134 card->pingstatus |= (isr & ISR_PINGDSMASK);
1135 break;
1136 }
1137 kfree(upr);
1138 slic_upr_start(adapter);
1139 spin_unlock_irqrestore(&adapter->upr_lock.lock,
1140 adapter->upr_lock.flags);
1141}
1142
1143static void slic_config_get(struct adapter *adapter, u32 config,
1144 u32 config_h)
1145{
1146 int status;
1147
1148 status = slic_upr_request(adapter,
1149 SLIC_UPR_RCONFIG,
1150 (u32) config, (u32) config_h, 0, 0);
1151}
1152
1153/*
1154 * this is here to checksum the eeprom, there is some ucode bug
1155 * which prevens us from using the ucode result.
1156 * remove this once ucode is fixed.
1157 */
1158static ushort slic_eeprom_cksum(char *m, int len)
1159{
1160#define ADDCARRY(x) (x > 65535 ? x -= 65535 : x)
1161#define REDUCE {l_util.l = sum; sum = l_util.s[0] + l_util.s[1]; ADDCARRY(sum);\
1162 }
1163
1164 u16 *w;
1165 u32 sum = 0;
1166 u32 byte_swapped = 0;
1167 u32 w_int;
1168
1169 union {
1170 char c[2];
1171 ushort s;
1172 } s_util;
1173
1174 union {
1175 ushort s[2];
1176 int l;
1177 } l_util;
1178
1179 l_util.l = 0;
1180 s_util.s = 0;
1181
1182 w = (u16 *)m;
1183#if BITS_PER_LONG == 64
1184 w_int = (u32) ((ulong) w & 0x00000000FFFFFFFF);
1185#else
1186 w_int = (u32) (w);
1187#endif
1188 if ((1 & w_int) && (len > 0)) {
1189 REDUCE;
1190 sum <<= 8;
1191 s_util.c[0] = *(unsigned char *)w;
1192 w = (u16 *)((char *)w + 1);
1193 len--;
1194 byte_swapped = 1;
1195 }
1196
1197 /* Unroll the loop to make overhead from branches &c small. */
1198 while ((len -= 32) >= 0) {
1199 sum += w[0];
1200 sum += w[1];
1201 sum += w[2];
1202 sum += w[3];
1203 sum += w[4];
1204 sum += w[5];
1205 sum += w[6];
1206 sum += w[7];
1207 sum += w[8];
1208 sum += w[9];
1209 sum += w[10];
1210 sum += w[11];
1211 sum += w[12];
1212 sum += w[13];
1213 sum += w[14];
1214 sum += w[15];
1215 w = (u16 *)((ulong) w + 16); /* verify */
1216 }
1217 len += 32;
1218 while ((len -= 8) >= 0) {
1219 sum += w[0];
1220 sum += w[1];
1221 sum += w[2];
1222 sum += w[3];
1223 w = (u16 *)((ulong) w + 4); /* verify */
1224 }
1225 len += 8;
1226 if (len != 0 || byte_swapped != 0) {
1227 REDUCE;
1228 while ((len -= 2) >= 0)
1229 sum += *w++; /* verify */
1230 if (byte_swapped) {
1231 REDUCE;
1232 sum <<= 8;
1233 byte_swapped = 0;
1234 if (len == -1) {
1235 s_util.c[1] = *(char *) w;
1236 sum += s_util.s;
1237 len = 0;
1238 } else {
1239 len = -1;
1240 }
1241
1242 } else if (len == -1) {
1243 s_util.c[0] = *(char *) w;
1244 }
1245
1246 if (len == -1) {
1247 s_util.c[1] = 0;
1248 sum += s_util.s;
1249 }
1250 }
1251 REDUCE;
1252 return (ushort) sum;
1253}
1254
1255static void slic_rspqueue_free(struct adapter *adapter)
1256{
1257 int i;
1258 struct slic_rspqueue *rspq = &adapter->rspqueue;
1259
1260 for (i = 0; i < rspq->num_pages; i++) {
1261 if (rspq->vaddr[i]) {
1262 pci_free_consistent(adapter->pcidev, PAGE_SIZE,
1263 rspq->vaddr[i], rspq->paddr[i]);
1264 }
1265 rspq->vaddr[i] = NULL;
1266 rspq->paddr[i] = 0;
1267 }
1268 rspq->offset = 0;
1269 rspq->pageindex = 0;
1270 rspq->rspbuf = NULL;
1271}
1272
1273static int slic_rspqueue_init(struct adapter *adapter)
1274{
1275 int i;
1276 struct slic_rspqueue *rspq = &adapter->rspqueue;
1277 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
1278 u32 paddrh = 0;
1279
1280 memset(rspq, 0, sizeof(struct slic_rspqueue));
1281
1282 rspq->num_pages = SLIC_RSPQ_PAGES_GB;
1283
1284 for (i = 0; i < rspq->num_pages; i++) {
1285 rspq->vaddr[i] = pci_alloc_consistent(adapter->pcidev,
1286 PAGE_SIZE,
1287 &rspq->paddr[i]);
1288 if (!rspq->vaddr[i]) {
1289 dev_err(&adapter->pcidev->dev,
1290 "pci_alloc_consistent failed\n");
1291 slic_rspqueue_free(adapter);
1292 return -ENOMEM;
1293 }
1294 /* FIXME:
1295 * do we really need this assertions (4K PAGE_SIZE aligned addr)? */
1296 memset(rspq->vaddr[i], 0, PAGE_SIZE);
1297
1298 if (paddrh == 0) {
1299 slic_reg32_write(&slic_regs->slic_rbar,
1300 (rspq->paddr[i] | SLIC_RSPQ_BUFSINPAGE),
1301 DONT_FLUSH);
1302 } else {
1303 slic_reg64_write(adapter, &slic_regs->slic_rbar64,
1304 (rspq->paddr[i] | SLIC_RSPQ_BUFSINPAGE),
1305 &slic_regs->slic_addr_upper,
1306 paddrh, DONT_FLUSH);
1307 }
1308 }
1309 rspq->offset = 0;
1310 rspq->pageindex = 0;
1311 rspq->rspbuf = (struct slic_rspbuf *)rspq->vaddr[0];
1312 return 0;
1313}
1314
1315static struct slic_rspbuf *slic_rspqueue_getnext(struct adapter *adapter)
1316{
1317 struct slic_rspqueue *rspq = &adapter->rspqueue;
1318 struct slic_rspbuf *buf;
1319
1320 if (!(rspq->rspbuf->status))
1321 return NULL;
1322
1323 buf = rspq->rspbuf;
1324 if (++rspq->offset < SLIC_RSPQ_BUFSINPAGE) {
1325 rspq->rspbuf++;
1326 } else {
1327 slic_reg64_write(adapter, &adapter->slic_regs->slic_rbar64,
1328 (rspq->paddr[rspq->pageindex] | SLIC_RSPQ_BUFSINPAGE),
1329 &adapter->slic_regs->slic_addr_upper, 0, DONT_FLUSH);
1330 rspq->pageindex = (rspq->pageindex + 1) % rspq->num_pages;
1331 rspq->offset = 0;
1332 rspq->rspbuf = (struct slic_rspbuf *)
1333 rspq->vaddr[rspq->pageindex];
1334 }
1335
1336 return buf;
1337}
1338
1339static void slic_cmdqmem_free(struct adapter *adapter)
1340{
1341 struct slic_cmdqmem *cmdqmem = &adapter->cmdqmem;
1342 int i;
1343
1344 for (i = 0; i < SLIC_CMDQ_MAXPAGES; i++) {
1345 if (cmdqmem->pages[i]) {
1346 pci_free_consistent(adapter->pcidev,
1347 PAGE_SIZE,
1348 (void *) cmdqmem->pages[i],
1349 cmdqmem->dma_pages[i]);
1350 }
1351 }
1352 memset(cmdqmem, 0, sizeof(struct slic_cmdqmem));
1353}
1354
1355static u32 *slic_cmdqmem_addpage(struct adapter *adapter)
1356{
1357 struct slic_cmdqmem *cmdqmem = &adapter->cmdqmem;
1358 u32 *pageaddr;
1359
1360 if (cmdqmem->pagecnt >= SLIC_CMDQ_MAXPAGES)
1361 return NULL;
1362 pageaddr = pci_alloc_consistent(adapter->pcidev,
1363 PAGE_SIZE,
1364 &cmdqmem->dma_pages[cmdqmem->pagecnt]);
1365 if (!pageaddr)
1366 return NULL;
1367
1368 cmdqmem->pages[cmdqmem->pagecnt] = pageaddr;
1369 cmdqmem->pagecnt++;
1370 return pageaddr;
1371}
1372
1373static void slic_cmdq_free(struct adapter *adapter)
1374{
1375 struct slic_hostcmd *cmd;
1376
1377 cmd = adapter->cmdq_all.head;
1378 while (cmd) {
1379 if (cmd->busy) {
1380 struct sk_buff *tempskb;
1381
1382 tempskb = cmd->skb;
1383 if (tempskb) {
1384 cmd->skb = NULL;
1385 dev_kfree_skb_irq(tempskb);
1386 }
1387 }
1388 cmd = cmd->next_all;
1389 }
1390 memset(&adapter->cmdq_all, 0, sizeof(struct slic_cmdqueue));
1391 memset(&adapter->cmdq_free, 0, sizeof(struct slic_cmdqueue));
1392 memset(&adapter->cmdq_done, 0, sizeof(struct slic_cmdqueue));
1393 slic_cmdqmem_free(adapter);
1394}
1395
1396static void slic_cmdq_addcmdpage(struct adapter *adapter, u32 *page)
1397{
1398 struct slic_hostcmd *cmd;
1399 struct slic_hostcmd *prev;
1400 struct slic_hostcmd *tail;
1401 struct slic_cmdqueue *cmdq;
1402 int cmdcnt;
1403 void *cmdaddr;
1404 ulong phys_addr;
1405 u32 phys_addrl;
1406 u32 phys_addrh;
1407 struct slic_handle *pslic_handle;
1408
1409 cmdaddr = page;
1410 cmd = (struct slic_hostcmd *)cmdaddr;
1411 cmdcnt = 0;
1412
1413 phys_addr = virt_to_bus((void *)page);
1414 phys_addrl = SLIC_GET_ADDR_LOW(phys_addr);
1415 phys_addrh = SLIC_GET_ADDR_HIGH(phys_addr);
1416
1417 prev = NULL;
1418 tail = cmd;
1419 while ((cmdcnt < SLIC_CMDQ_CMDSINPAGE) &&
1420 (adapter->slic_handle_ix < 256)) {
1421 /* Allocate and initialize a SLIC_HANDLE for this command */
1422 spin_lock_irqsave(&adapter->handle_lock.lock,
1423 adapter->handle_lock.flags);
1424 pslic_handle = adapter->pfree_slic_handles;
1425 if (pslic_handle)
1426 adapter->pfree_slic_handles = pslic_handle->next;
1427 spin_unlock_irqrestore(&adapter->handle_lock.lock,
1428 adapter->handle_lock.flags);
1429 pslic_handle->type = SLIC_HANDLE_CMD;
1430 pslic_handle->address = (void *) cmd;
1431 pslic_handle->offset = (ushort) adapter->slic_handle_ix++;
1432 pslic_handle->other_handle = NULL;
1433 pslic_handle->next = NULL;
1434
1435 cmd->pslic_handle = pslic_handle;
1436 cmd->cmd64.hosthandle = pslic_handle->token.handle_token;
1437 cmd->busy = false;
1438 cmd->paddrl = phys_addrl;
1439 cmd->paddrh = phys_addrh;
1440 cmd->next_all = prev;
1441 cmd->next = prev;
1442 prev = cmd;
1443 phys_addrl += SLIC_HOSTCMD_SIZE;
1444 cmdaddr += SLIC_HOSTCMD_SIZE;
1445
1446 cmd = (struct slic_hostcmd *)cmdaddr;
1447 cmdcnt++;
1448 }
1449
1450 cmdq = &adapter->cmdq_all;
1451 cmdq->count += cmdcnt; /* SLIC_CMDQ_CMDSINPAGE; mooktodo */
1452 tail->next_all = cmdq->head;
1453 cmdq->head = prev;
1454 cmdq = &adapter->cmdq_free;
1455 spin_lock_irqsave(&cmdq->lock.lock, cmdq->lock.flags);
1456 cmdq->count += cmdcnt; /* SLIC_CMDQ_CMDSINPAGE; mooktodo */
1457 tail->next = cmdq->head;
1458 cmdq->head = prev;
1459 spin_unlock_irqrestore(&cmdq->lock.lock, cmdq->lock.flags);
1460}
1461
1462static int slic_cmdq_init(struct adapter *adapter)
1463{
1464 int i;
1465 u32 *pageaddr;
1466
1467 memset(&adapter->cmdq_all, 0, sizeof(struct slic_cmdqueue));
1468 memset(&adapter->cmdq_free, 0, sizeof(struct slic_cmdqueue));
1469 memset(&adapter->cmdq_done, 0, sizeof(struct slic_cmdqueue));
1470 spin_lock_init(&adapter->cmdq_all.lock.lock);
1471 spin_lock_init(&adapter->cmdq_free.lock.lock);
1472 spin_lock_init(&adapter->cmdq_done.lock.lock);
1473 memset(&adapter->cmdqmem, 0, sizeof(struct slic_cmdqmem));
1474 adapter->slic_handle_ix = 1;
1475 for (i = 0; i < SLIC_CMDQ_INITPAGES; i++) {
1476 pageaddr = slic_cmdqmem_addpage(adapter);
1477 if (!pageaddr) {
1478 slic_cmdq_free(adapter);
1479 return -ENOMEM;
1480 }
1481 slic_cmdq_addcmdpage(adapter, pageaddr);
1482 }
1483 adapter->slic_handle_ix = 1;
1484
1485 return 0;
1486}
1487
1488static void slic_cmdq_reset(struct adapter *adapter)
1489{
1490 struct slic_hostcmd *hcmd;
1491 struct sk_buff *skb;
1492 u32 outstanding;
1493
1494 spin_lock_irqsave(&adapter->cmdq_free.lock.lock,
1495 adapter->cmdq_free.lock.flags);
1496 spin_lock_irqsave(&adapter->cmdq_done.lock.lock,
1497 adapter->cmdq_done.lock.flags);
1498 outstanding = adapter->cmdq_all.count - adapter->cmdq_done.count;
1499 outstanding -= adapter->cmdq_free.count;
1500 hcmd = adapter->cmdq_all.head;
1501 while (hcmd) {
1502 if (hcmd->busy) {
1503 skb = hcmd->skb;
1504 hcmd->busy = 0;
1505 hcmd->skb = NULL;
1506 dev_kfree_skb_irq(skb);
1507 }
1508 hcmd = hcmd->next_all;
1509 }
1510 adapter->cmdq_free.count = 0;
1511 adapter->cmdq_free.head = NULL;
1512 adapter->cmdq_free.tail = NULL;
1513 adapter->cmdq_done.count = 0;
1514 adapter->cmdq_done.head = NULL;
1515 adapter->cmdq_done.tail = NULL;
1516 adapter->cmdq_free.head = adapter->cmdq_all.head;
1517 hcmd = adapter->cmdq_all.head;
1518 while (hcmd) {
1519 adapter->cmdq_free.count++;
1520 hcmd->next = hcmd->next_all;
1521 hcmd = hcmd->next_all;
1522 }
1523 if (adapter->cmdq_free.count != adapter->cmdq_all.count) {
1524 dev_err(&adapter->netdev->dev,
1525 "free_count %d != all count %d\n",
1526 adapter->cmdq_free.count, adapter->cmdq_all.count);
1527 }
1528 spin_unlock_irqrestore(&adapter->cmdq_done.lock.lock,
1529 adapter->cmdq_done.lock.flags);
1530 spin_unlock_irqrestore(&adapter->cmdq_free.lock.lock,
1531 adapter->cmdq_free.lock.flags);
1532}
1533
1534static void slic_cmdq_getdone(struct adapter *adapter)
1535{
1536 struct slic_cmdqueue *done_cmdq = &adapter->cmdq_done;
1537 struct slic_cmdqueue *free_cmdq = &adapter->cmdq_free;
1538
1539 spin_lock_irqsave(&done_cmdq->lock.lock, done_cmdq->lock.flags);
1540
1541 free_cmdq->head = done_cmdq->head;
1542 free_cmdq->count = done_cmdq->count;
1543 done_cmdq->head = NULL;
1544 done_cmdq->tail = NULL;
1545 done_cmdq->count = 0;
1546 spin_unlock_irqrestore(&done_cmdq->lock.lock, done_cmdq->lock.flags);
1547}
1548
1549static struct slic_hostcmd *slic_cmdq_getfree(struct adapter *adapter)
1550{
1551 struct slic_cmdqueue *cmdq = &adapter->cmdq_free;
1552 struct slic_hostcmd *cmd = NULL;
1553
1554lock_and_retry:
1555 spin_lock_irqsave(&cmdq->lock.lock, cmdq->lock.flags);
1556retry:
1557 cmd = cmdq->head;
1558 if (cmd) {
1559 cmdq->head = cmd->next;
1560 cmdq->count--;
1561 spin_unlock_irqrestore(&cmdq->lock.lock, cmdq->lock.flags);
1562 } else {
1563 slic_cmdq_getdone(adapter);
1564 cmd = cmdq->head;
1565 if (cmd) {
1566 goto retry;
1567 } else {
1568 u32 *pageaddr;
1569
1570 spin_unlock_irqrestore(&cmdq->lock.lock,
1571 cmdq->lock.flags);
1572 pageaddr = slic_cmdqmem_addpage(adapter);
1573 if (pageaddr) {
1574 slic_cmdq_addcmdpage(adapter, pageaddr);
1575 goto lock_and_retry;
1576 }
1577 }
1578 }
1579 return cmd;
1580}
1581
1582static void slic_cmdq_putdone_irq(struct adapter *adapter,
1583 struct slic_hostcmd *cmd)
1584{
1585 struct slic_cmdqueue *cmdq = &adapter->cmdq_done;
1586
1587 spin_lock(&cmdq->lock.lock);
1588 cmd->busy = 0;
1589 cmd->next = cmdq->head;
1590 cmdq->head = cmd;
1591 cmdq->count++;
1592 if ((adapter->xmitq_full) && (cmdq->count > 10))
1593 netif_wake_queue(adapter->netdev);
1594 spin_unlock(&cmdq->lock.lock);
1595}
1596
1597static int slic_rcvqueue_fill(struct adapter *adapter)
1598{
1599 void *paddr;
1600 u32 paddrl;
1601 u32 paddrh;
1602 struct slic_rcvqueue *rcvq = &adapter->rcvqueue;
1603 int i = 0;
1604 struct device *dev = &adapter->netdev->dev;
1605
1606 while (i < SLIC_RCVQ_FILLENTRIES) {
1607 struct slic_rcvbuf *rcvbuf;
1608 struct sk_buff *skb;
1609#ifdef KLUDGE_FOR_4GB_BOUNDARY
1610retry_rcvqfill:
1611#endif
1612 skb = alloc_skb(SLIC_RCVQ_RCVBUFSIZE, GFP_ATOMIC);
1613 if (skb) {
1614 paddr = (void *)(unsigned long)
1615 pci_map_single(adapter->pcidev,
1616 skb->data,
1617 SLIC_RCVQ_RCVBUFSIZE,
1618 PCI_DMA_FROMDEVICE);
1619 paddrl = SLIC_GET_ADDR_LOW(paddr);
1620 paddrh = SLIC_GET_ADDR_HIGH(paddr);
1621
1622 skb->len = SLIC_RCVBUF_HEADSIZE;
1623 rcvbuf = (struct slic_rcvbuf *)skb->head;
1624 rcvbuf->status = 0;
1625 skb->next = NULL;
1626#ifdef KLUDGE_FOR_4GB_BOUNDARY
1627 if (paddrl == 0) {
1628 dev_err(dev, "%s: LOW 32bits PHYSICAL ADDRESS == 0\n",
1629 __func__);
1630 dev_err(dev, "skb[%p] PROBLEM\n", skb);
1631 dev_err(dev, " skbdata[%p]\n", skb->data);
1632 dev_err(dev, " skblen[%x]\n", skb->len);
1633 dev_err(dev, " paddr[%p]\n", paddr);
1634 dev_err(dev, " paddrl[%x]\n", paddrl);
1635 dev_err(dev, " paddrh[%x]\n", paddrh);
1636 dev_err(dev, " rcvq->head[%p]\n", rcvq->head);
1637 dev_err(dev, " rcvq->tail[%p]\n", rcvq->tail);
1638 dev_err(dev, " rcvq->count[%x]\n", rcvq->count);
1639 dev_err(dev, "SKIP THIS SKB!!!!!!!!\n");
1640 goto retry_rcvqfill;
1641 }
1642#else
1643 if (paddrl == 0) {
1644 dev_err(dev, "%s: LOW 32bits PHYSICAL ADDRESS == 0\n",
1645 __func__);
1646 dev_err(dev, "skb[%p] PROBLEM\n", skb);
1647 dev_err(dev, " skbdata[%p]\n", skb->data);
1648 dev_err(dev, " skblen[%x]\n", skb->len);
1649 dev_err(dev, " paddr[%p]\n", paddr);
1650 dev_err(dev, " paddrl[%x]\n", paddrl);
1651 dev_err(dev, " paddrh[%x]\n", paddrh);
1652 dev_err(dev, " rcvq->head[%p]\n", rcvq->head);
1653 dev_err(dev, " rcvq->tail[%p]\n", rcvq->tail);
1654 dev_err(dev, " rcvq->count[%x]\n", rcvq->count);
1655 dev_err(dev, "GIVE TO CARD ANYWAY\n");
1656 }
1657#endif
1658 if (paddrh == 0) {
1659 slic_reg32_write(&adapter->slic_regs->slic_hbar,
1660 (u32)paddrl, DONT_FLUSH);
1661 } else {
1662 slic_reg64_write(adapter,
1663 &adapter->slic_regs->slic_hbar64,
1664 paddrl,
1665 &adapter->slic_regs->slic_addr_upper,
1666 paddrh, DONT_FLUSH);
1667 }
1668 if (rcvq->head)
1669 rcvq->tail->next = skb;
1670 else
1671 rcvq->head = skb;
1672 rcvq->tail = skb;
1673 rcvq->count++;
1674 i++;
1675 } else {
1676 dev_err(&adapter->netdev->dev,
1677 "slic_rcvqueue_fill could only get [%d] skbuffs\n",
1678 i);
1679 break;
1680 }
1681 }
1682 return i;
1683}
1684
1685static void slic_rcvqueue_free(struct adapter *adapter)
1686{
1687 struct slic_rcvqueue *rcvq = &adapter->rcvqueue;
1688 struct sk_buff *skb;
1689
1690 while (rcvq->head) {
1691 skb = rcvq->head;
1692 rcvq->head = rcvq->head->next;
1693 dev_kfree_skb(skb);
1694 }
1695 rcvq->tail = NULL;
1696 rcvq->head = NULL;
1697 rcvq->count = 0;
1698}
1699
1700static int slic_rcvqueue_init(struct adapter *adapter)
1701{
1702 int i, count;
1703 struct slic_rcvqueue *rcvq = &adapter->rcvqueue;
1704
1705 rcvq->tail = NULL;
1706 rcvq->head = NULL;
1707 rcvq->size = SLIC_RCVQ_ENTRIES;
1708 rcvq->errors = 0;
1709 rcvq->count = 0;
1710 i = (SLIC_RCVQ_ENTRIES / SLIC_RCVQ_FILLENTRIES);
1711 count = 0;
1712 while (i) {
1713 count += slic_rcvqueue_fill(adapter);
1714 i--;
1715 }
1716 if (rcvq->count < SLIC_RCVQ_MINENTRIES) {
1717 slic_rcvqueue_free(adapter);
1718 return -ENOMEM;
1719 }
1720 return 0;
1721}
1722
1723static struct sk_buff *slic_rcvqueue_getnext(struct adapter *adapter)
1724{
1725 struct slic_rcvqueue *rcvq = &adapter->rcvqueue;
1726 struct sk_buff *skb;
1727 struct slic_rcvbuf *rcvbuf;
1728 int count;
1729
1730 if (rcvq->count) {
1731 skb = rcvq->head;
1732 rcvbuf = (struct slic_rcvbuf *)skb->head;
1733
1734 if (rcvbuf->status & IRHDDR_SVALID) {
1735 rcvq->head = rcvq->head->next;
1736 skb->next = NULL;
1737 rcvq->count--;
1738 } else {
1739 skb = NULL;
1740 }
1741 } else {
1742 dev_err(&adapter->netdev->dev,
1743 "RcvQ Empty!! rcvq[%p] count[%x]\n", rcvq, rcvq->count);
1744 skb = NULL;
1745 }
1746 while (rcvq->count < SLIC_RCVQ_FILLTHRESH) {
1747 count = slic_rcvqueue_fill(adapter);
1748 if (!count)
1749 break;
1750 }
1751 if (skb)
1752 rcvq->errors = 0;
1753 return skb;
1754}
1755
1756static u32 slic_rcvqueue_reinsert(struct adapter *adapter, struct sk_buff *skb)
1757{
1758 struct slic_rcvqueue *rcvq = &adapter->rcvqueue;
1759 void *paddr;
1760 u32 paddrl;
1761 u32 paddrh;
1762 struct slic_rcvbuf *rcvbuf = (struct slic_rcvbuf *)skb->head;
1763 struct device *dev;
1764
1765 paddr = (void *)(unsigned long)
1766 pci_map_single(adapter->pcidev, skb->head,
1767 SLIC_RCVQ_RCVBUFSIZE, PCI_DMA_FROMDEVICE);
1768 rcvbuf->status = 0;
1769 skb->next = NULL;
1770
1771 paddrl = SLIC_GET_ADDR_LOW(paddr);
1772 paddrh = SLIC_GET_ADDR_HIGH(paddr);
1773
1774 if (paddrl == 0) {
1775 dev = &adapter->netdev->dev;
1776 dev_err(dev, "%s: LOW 32bits PHYSICAL ADDRESS == 0\n",
1777 __func__);
1778 dev_err(dev, "skb[%p] PROBLEM\n", skb);
1779 dev_err(dev, " skbdata[%p]\n", skb->data);
1780 dev_err(dev, " skblen[%x]\n", skb->len);
1781 dev_err(dev, " paddr[%p]\n", paddr);
1782 dev_err(dev, " paddrl[%x]\n", paddrl);
1783 dev_err(dev, " paddrh[%x]\n", paddrh);
1784 dev_err(dev, " rcvq->head[%p]\n", rcvq->head);
1785 dev_err(dev, " rcvq->tail[%p]\n", rcvq->tail);
1786 dev_err(dev, " rcvq->count[%x]\n", rcvq->count);
1787 }
1788 if (paddrh == 0) {
1789 slic_reg32_write(&adapter->slic_regs->slic_hbar, (u32)paddrl,
1790 DONT_FLUSH);
1791 } else {
1792 slic_reg64_write(adapter, &adapter->slic_regs->slic_hbar64,
1793 paddrl, &adapter->slic_regs->slic_addr_upper,
1794 paddrh, DONT_FLUSH);
1795 }
1796 if (rcvq->head)
1797 rcvq->tail->next = skb;
1798 else
1799 rcvq->head = skb;
1800 rcvq->tail = skb;
1801 rcvq->count++;
1802 return rcvq->count;
1803}
1804
1805static int slic_debug_card_show(struct seq_file *seq, void *v)
1806{
1807#ifdef MOOKTODO
1808 int i;
1809 struct sliccard *card = seq->private;
1810 struct slic_config *config = &card->config;
1811 unsigned char *fru = (unsigned char *)(&card->config.atk_fru);
1812 unsigned char *oemfru = (unsigned char *)(&card->config.OemFru);
1813#endif
1814
1815 seq_printf(seq, "driver_version : %s\n", slic_proc_version);
1816 seq_puts(seq, "Microcode versions:\n");
1817 seq_printf(seq, " Gigabit (gb) : %s %s\n",
1818 MOJAVE_UCODE_VERS_STRING, MOJAVE_UCODE_VERS_DATE);
1819 seq_printf(seq, " Gigabit Receiver : %s %s\n",
1820 GB_RCVUCODE_VERS_STRING, GB_RCVUCODE_VERS_DATE);
1821 seq_printf(seq, "Vendor : %s\n", slic_vendor);
1822 seq_printf(seq, "Product Name : %s\n", slic_product_name);
1823#ifdef MOOKTODO
1824 seq_printf(seq, "VendorId : %4.4X\n",
1825 config->VendorId);
1826 seq_printf(seq, "DeviceId : %4.4X\n",
1827 config->DeviceId);
1828 seq_printf(seq, "RevisionId : %2.2x\n",
1829 config->RevisionId);
1830 seq_printf(seq, "Bus # : %d\n", card->busnumber);
1831 seq_printf(seq, "Device # : %d\n", card->slotnumber);
1832 seq_printf(seq, "Interfaces : %d\n", card->card_size);
1833 seq_printf(seq, " Initialized : %d\n",
1834 card->adapters_activated);
1835 seq_printf(seq, " Allocated : %d\n",
1836 card->adapters_allocated);
1837 for (i = 0; i < card->card_size; i++) {
1838 seq_printf(seq,
1839 " MAC%d : %2.2X %2.2X %2.2X %2.2X %2.2X %2.2X\n",
1840 i, config->macinfo[i].macaddrA[0],
1841 config->macinfo[i].macaddrA[1],
1842 config->macinfo[i].macaddrA[2],
1843 config->macinfo[i].macaddrA[3],
1844 config->macinfo[i].macaddrA[4],
1845 config->macinfo[i].macaddrA[5]);
1846 }
1847 seq_puts(seq, " IF Init State Duplex/Speed irq\n");
1848 seq_puts(seq, " -------------------------------\n");
1849 for (i = 0; i < card->adapters_allocated; i++) {
1850 struct adapter *adapter;
1851
1852 adapter = card->adapter[i];
1853 if (adapter) {
1854 seq_printf(seq,
1855 " %d %d %s %s %s 0x%X\n",
1856 adapter->physport, adapter->state,
1857 SLIC_LINKSTATE(adapter->linkstate),
1858 SLIC_DUPLEX(adapter->linkduplex),
1859 SLIC_SPEED(adapter->linkspeed),
1860 (uint) adapter->irq);
1861 }
1862 }
1863 seq_printf(seq, "Generation # : %4.4X\n", card->gennumber);
1864 seq_printf(seq, "RcvQ max entries : %4.4X\n",
1865 SLIC_RCVQ_ENTRIES);
1866 seq_printf(seq, "Ping Status : %8.8X\n",
1867 card->pingstatus);
1868 seq_printf(seq, "Minimum grant : %2.2x\n",
1869 config->MinGrant);
1870 seq_printf(seq, "Maximum Latency : %2.2x\n", config->MaxLat);
1871 seq_printf(seq, "PciStatus : %4.4x\n",
1872 config->Pcistatus);
1873 seq_printf(seq, "Debug Device Id : %4.4x\n",
1874 config->DbgDevId);
1875 seq_printf(seq, "DRAM ROM Function : %4.4x\n",
1876 config->DramRomFn);
1877 seq_printf(seq, "Network interface Pin 1 : %2.2x\n",
1878 config->NetIntPin1);
1879 seq_printf(seq, "Network interface Pin 2 : %2.2x\n",
1880 config->NetIntPin1);
1881 seq_printf(seq, "Network interface Pin 3 : %2.2x\n",
1882 config->NetIntPin1);
1883 seq_printf(seq, "PM capabilities : %4.4X\n",
1884 config->PMECapab);
1885 seq_printf(seq, "Network Clock Controls : %4.4X\n",
1886 config->NwClkCtrls);
1887
1888 switch (config->FruFormat) {
1889 case ATK_FRU_FORMAT:
1890 {
1891 seq_puts(seq,
1892 "Vendor : Alacritech, Inc.\n");
1893 seq_printf(seq,
1894 "Assembly # : %c%c%c%c%c%c\n",
1895 fru[0], fru[1], fru[2], fru[3], fru[4],
1896 fru[5]);
1897 seq_printf(seq,
1898 "Revision # : %c%c\n",
1899 fru[6], fru[7]);
1900
1901 if (config->OEMFruFormat == VENDOR4_FRU_FORMAT) {
1902 seq_printf(seq,
1903 "Serial # : %c%c%c%c%c%c%c%c%c%c%c%c\n",
1904 fru[8], fru[9], fru[10],
1905 fru[11], fru[12], fru[13],
1906 fru[16], fru[17], fru[18],
1907 fru[19], fru[20], fru[21]);
1908 } else {
1909 seq_printf(seq,
1910 "Serial # : %c%c%c%c%c%c%c%c%c%c%c%c%c%c\n",
1911 fru[8], fru[9], fru[10],
1912 fru[11], fru[12], fru[13],
1913 fru[14], fru[15], fru[16],
1914 fru[17], fru[18], fru[19],
1915 fru[20], fru[21]);
1916 }
1917 break;
1918 }
1919
1920 default:
1921 {
1922 seq_puts(seq,
1923 "Vendor : Alacritech, Inc.\n");
1924 seq_puts(seq,
1925 "Serial # : Empty FRU\n");
1926 break;
1927 }
1928 }
1929
1930 switch (config->OEMFruFormat) {
1931 case VENDOR1_FRU_FORMAT:
1932 {
1933 seq_puts(seq, "FRU Information:\n");
1934 seq_printf(seq, " Commodity # : %c\n",
1935 oemfru[0]);
1936 seq_printf(seq,
1937 " Assembly # : %c%c%c%c\n",
1938 oemfru[1], oemfru[2], oemfru[3], oemfru[4]);
1939 seq_printf(seq,
1940 " Revision # : %c%c\n",
1941 oemfru[5], oemfru[6]);
1942 seq_printf(seq,
1943 " Supplier # : %c%c\n",
1944 oemfru[7], oemfru[8]);
1945 seq_printf(seq,
1946 " Date : %c%c\n",
1947 oemfru[9], oemfru[10]);
1948 seq_sprintf(seq,
1949 " Sequence # : %c%c%c\n",
1950 oemfru[11], oemfru[12], oemfru[13]);
1951 break;
1952 }
1953
1954 case VENDOR2_FRU_FORMAT:
1955 {
1956 seq_puts(seq, "FRU Information:\n");
1957 seq_printf(seq,
1958 " Part # : %c%c%c%c%c%c%c%c\n",
1959 oemfru[0], oemfru[1], oemfru[2],
1960 oemfru[3], oemfru[4], oemfru[5],
1961 oemfru[6], oemfru[7]);
1962 seq_printf(seq,
1963 " Supplier # : %c%c%c%c%c\n",
1964 oemfru[8], oemfru[9], oemfru[10],
1965 oemfru[11], oemfru[12]);
1966 seq_printf(seq,
1967 " Date : %c%c%c\n",
1968 oemfru[13], oemfru[14], oemfru[15]);
1969 seq_sprintf(seq,
1970 " Sequence # : %c%c%c%c\n",
1971 oemfru[16], oemfru[17], oemfru[18],
1972 oemfru[19]);
1973 break;
1974 }
1975
1976 case VENDOR3_FRU_FORMAT:
1977 {
1978 seq_puts(seq, "FRU Information:\n");
1979 }
1980
1981 case VENDOR4_FRU_FORMAT:
1982 {
1983 seq_puts(seq, "FRU Information:\n");
1984 seq_printf(seq,
1985 " FRU Number : %c%c%c%c%c%c%c%c\n",
1986 oemfru[0], oemfru[1], oemfru[2],
1987 oemfru[3], oemfru[4], oemfru[5],
1988 oemfru[6], oemfru[7]);
1989 seq_sprintf(seq,
1990 " Part Number : %c%c%c%c%c%c%c%c\n",
1991 oemfru[8], oemfru[9], oemfru[10],
1992 oemfru[11], oemfru[12], oemfru[13],
1993 oemfru[14], oemfru[15]);
1994 seq_printf(seq,
1995 " EC Level : %c%c%c%c%c%c%c%c\n",
1996 oemfru[16], oemfru[17], oemfru[18],
1997 oemfru[19], oemfru[20], oemfru[21],
1998 oemfru[22], oemfru[23]);
1999 break;
2000 }
2001
2002 default:
2003 break;
2004 }
2005#endif
2006
2007 return 0;
2008}
2009
2010static int slic_debug_adapter_show(struct seq_file *seq, void *v)
2011{
2012 struct adapter *adapter = seq->private;
2013 struct net_device *netdev = adapter->netdev;
2014
2015 seq_printf(seq, "info: interface : %s\n",
2016 adapter->netdev->name);
2017 seq_printf(seq, "info: status : %s\n",
2018 SLIC_LINKSTATE(adapter->linkstate));
2019 seq_printf(seq, "info: port : %d\n",
2020 adapter->physport);
2021 seq_printf(seq, "info: speed : %s\n",
2022 SLIC_SPEED(adapter->linkspeed));
2023 seq_printf(seq, "info: duplex : %s\n",
2024 SLIC_DUPLEX(adapter->linkduplex));
2025 seq_printf(seq, "info: irq : 0x%X\n",
2026 (uint) adapter->irq);
2027 seq_printf(seq, "info: Interrupt Agg Delay: %d usec\n",
2028 adapter->card->loadlevel_current);
2029 seq_printf(seq, "info: RcvQ max entries : %4.4X\n",
2030 SLIC_RCVQ_ENTRIES);
2031 seq_printf(seq, "info: RcvQ current : %4.4X\n",
2032 adapter->rcvqueue.count);
2033 seq_printf(seq, "rx stats: packets : %8.8lX\n",
2034 netdev->stats.rx_packets);
2035 seq_printf(seq, "rx stats: bytes : %8.8lX\n",
2036 netdev->stats.rx_bytes);
2037 seq_printf(seq, "rx stats: broadcasts : %8.8X\n",
2038 adapter->rcv_broadcasts);
2039 seq_printf(seq, "rx stats: multicasts : %8.8X\n",
2040 adapter->rcv_multicasts);
2041 seq_printf(seq, "rx stats: unicasts : %8.8X\n",
2042 adapter->rcv_unicasts);
2043 seq_printf(seq, "rx stats: errors : %8.8X\n",
2044 (u32) adapter->slic_stats.iface.rcv_errors);
2045 seq_printf(seq, "rx stats: Missed errors : %8.8X\n",
2046 (u32) adapter->slic_stats.iface.rcv_discards);
2047 seq_printf(seq, "rx stats: drops : %8.8X\n",
2048 (u32) adapter->rcv_drops);
2049 seq_printf(seq, "tx stats: packets : %8.8lX\n",
2050 netdev->stats.tx_packets);
2051 seq_printf(seq, "tx stats: bytes : %8.8lX\n",
2052 netdev->stats.tx_bytes);
2053 seq_printf(seq, "tx stats: errors : %8.8X\n",
2054 (u32) adapter->slic_stats.iface.xmt_errors);
2055 seq_printf(seq, "rx stats: multicasts : %8.8lX\n",
2056 netdev->stats.multicast);
2057 seq_printf(seq, "tx stats: collision errors : %8.8X\n",
2058 (u32) adapter->slic_stats.iface.xmit_collisions);
2059 seq_printf(seq, "perf: Max rcv frames/isr : %8.8X\n",
2060 adapter->max_isr_rcvs);
2061 seq_printf(seq, "perf: Rcv interrupt yields : %8.8X\n",
2062 adapter->rcv_interrupt_yields);
2063 seq_printf(seq, "perf: Max xmit complete/isr : %8.8X\n",
2064 adapter->max_isr_xmits);
2065 seq_printf(seq, "perf: error interrupts : %8.8X\n",
2066 adapter->error_interrupts);
2067 seq_printf(seq, "perf: error rmiss interrupts : %8.8X\n",
2068 adapter->error_rmiss_interrupts);
2069 seq_printf(seq, "perf: rcv interrupts : %8.8X\n",
2070 adapter->rcv_interrupts);
2071 seq_printf(seq, "perf: xmit interrupts : %8.8X\n",
2072 adapter->xmit_interrupts);
2073 seq_printf(seq, "perf: link event interrupts : %8.8X\n",
2074 adapter->linkevent_interrupts);
2075 seq_printf(seq, "perf: UPR interrupts : %8.8X\n",
2076 adapter->upr_interrupts);
2077 seq_printf(seq, "perf: interrupt count : %8.8X\n",
2078 adapter->num_isrs);
2079 seq_printf(seq, "perf: false interrupts : %8.8X\n",
2080 adapter->false_interrupts);
2081 seq_printf(seq, "perf: All register writes : %8.8X\n",
2082 adapter->all_reg_writes);
2083 seq_printf(seq, "perf: ICR register writes : %8.8X\n",
2084 adapter->icr_reg_writes);
2085 seq_printf(seq, "perf: ISR register writes : %8.8X\n",
2086 adapter->isr_reg_writes);
2087 seq_printf(seq, "ifevents: overflow 802 errors : %8.8X\n",
2088 adapter->if_events.oflow802);
2089 seq_printf(seq, "ifevents: transport overflow errors: %8.8X\n",
2090 adapter->if_events.Tprtoflow);
2091 seq_printf(seq, "ifevents: underflow errors : %8.8X\n",
2092 adapter->if_events.uflow802);
2093 seq_printf(seq, "ifevents: receive early : %8.8X\n",
2094 adapter->if_events.rcvearly);
2095 seq_printf(seq, "ifevents: buffer overflows : %8.8X\n",
2096 adapter->if_events.Bufov);
2097 seq_printf(seq, "ifevents: carrier errors : %8.8X\n",
2098 adapter->if_events.Carre);
2099 seq_printf(seq, "ifevents: Long : %8.8X\n",
2100 adapter->if_events.Longe);
2101 seq_printf(seq, "ifevents: invalid preambles : %8.8X\n",
2102 adapter->if_events.Invp);
2103 seq_printf(seq, "ifevents: CRC errors : %8.8X\n",
2104 adapter->if_events.Crc);
2105 seq_printf(seq, "ifevents: dribble nibbles : %8.8X\n",
2106 adapter->if_events.Drbl);
2107 seq_printf(seq, "ifevents: Code violations : %8.8X\n",
2108 adapter->if_events.Code);
2109 seq_printf(seq, "ifevents: TCP checksum errors : %8.8X\n",
2110 adapter->if_events.TpCsum);
2111 seq_printf(seq, "ifevents: TCP header short errors : %8.8X\n",
2112 adapter->if_events.TpHlen);
2113 seq_printf(seq, "ifevents: IP checksum errors : %8.8X\n",
2114 adapter->if_events.IpCsum);
2115 seq_printf(seq, "ifevents: IP frame incompletes : %8.8X\n",
2116 adapter->if_events.IpLen);
2117 seq_printf(seq, "ifevents: IP headers shorts : %8.8X\n",
2118 adapter->if_events.IpHlen);
2119
2120 return 0;
2121}
2122static int slic_debug_adapter_open(struct inode *inode, struct file *file)
2123{
2124 return single_open(file, slic_debug_adapter_show, inode->i_private);
2125}
2126
2127static int slic_debug_card_open(struct inode *inode, struct file *file)
2128{
2129 return single_open(file, slic_debug_card_show, inode->i_private);
2130}
2131
2132static const struct file_operations slic_debug_adapter_fops = {
2133 .owner = THIS_MODULE,
2134 .open = slic_debug_adapter_open,
2135 .read = seq_read,
2136 .llseek = seq_lseek,
2137 .release = single_release,
2138};
2139
2140static const struct file_operations slic_debug_card_fops = {
2141 .owner = THIS_MODULE,
2142 .open = slic_debug_card_open,
2143 .read = seq_read,
2144 .llseek = seq_lseek,
2145 .release = single_release,
2146};
2147
2148static void slic_debug_adapter_create(struct adapter *adapter)
2149{
2150 struct dentry *d;
2151 char name[7];
2152 struct sliccard *card = adapter->card;
2153
2154 if (!card->debugfs_dir)
2155 return;
2156
2157 sprintf(name, "port%d", adapter->port);
2158 d = debugfs_create_file(name, S_IRUGO,
2159 card->debugfs_dir, adapter,
2160 &slic_debug_adapter_fops);
2161 if (!d || IS_ERR(d))
2162 pr_info(PFX "%s: debugfs create failed\n", name);
2163 else
2164 adapter->debugfs_entry = d;
2165}
2166
2167static void slic_debug_adapter_destroy(struct adapter *adapter)
2168{
2169 debugfs_remove(adapter->debugfs_entry);
2170 adapter->debugfs_entry = NULL;
2171}
2172
2173static void slic_debug_card_create(struct sliccard *card)
2174{
2175 struct dentry *d;
2176 char name[IFNAMSIZ];
2177
2178 snprintf(name, sizeof(name), "slic%d", card->cardnum);
2179 d = debugfs_create_dir(name, slic_debugfs);
2180 if (!d || IS_ERR(d))
2181 pr_info(PFX "%s: debugfs create dir failed\n",
2182 name);
2183 else {
2184 card->debugfs_dir = d;
2185 d = debugfs_create_file("cardinfo", S_IRUGO,
2186 slic_debugfs, card,
2187 &slic_debug_card_fops);
2188 if (!d || IS_ERR(d))
2189 pr_info(PFX "%s: debugfs create failed\n",
2190 name);
2191 else
2192 card->debugfs_cardinfo = d;
2193 }
2194}
2195
2196static void slic_debug_card_destroy(struct sliccard *card)
2197{
2198 int i;
2199
2200 for (i = 0; i < card->card_size; i++) {
2201 struct adapter *adapter;
2202
2203 adapter = card->adapter[i];
2204 if (adapter)
2205 slic_debug_adapter_destroy(adapter);
2206 }
2207 debugfs_remove(card->debugfs_cardinfo);
2208 debugfs_remove(card->debugfs_dir);
2209}
2210
2211static void slic_debug_init(void)
2212{
2213 struct dentry *ent;
2214
2215 ent = debugfs_create_dir("slic", NULL);
2216 if (!ent || IS_ERR(ent)) {
2217 pr_info(PFX "debugfs create directory failed\n");
2218 return;
2219 }
2220
2221 slic_debugfs = ent;
2222}
2223
2224static void slic_debug_cleanup(void)
2225{
2226 debugfs_remove(slic_debugfs);
2227}
2228
2229/*
2230 * slic_link_event_handler -
2231 *
2232 * Initiate a link configuration sequence. The link configuration begins
2233 * by issuing a READ_LINK_STATUS command to the Utility Processor on the
2234 * SLIC. Since the command finishes asynchronously, the slic_upr_comlete
2235 * routine will follow it up witha UP configuration write command, which
2236 * will also complete asynchronously.
2237 *
2238 */
2239static void slic_link_event_handler(struct adapter *adapter)
2240{
2241 int status;
2242 struct slic_shmem *pshmem;
2243
2244 if (adapter->state != ADAPT_UP) {
2245 /* Adapter is not operational. Ignore. */
2246 return;
2247 }
2248
2249 pshmem = (struct slic_shmem *)(unsigned long)adapter->phys_shmem;
2250
2251#if BITS_PER_LONG == 64
2252 status = slic_upr_request(adapter,
2253 SLIC_UPR_RLSR,
2254 SLIC_GET_ADDR_LOW(&pshmem->linkstatus),
2255 SLIC_GET_ADDR_HIGH(&pshmem->linkstatus),
2256 0, 0);
2257#else
2258 status = slic_upr_request(adapter, SLIC_UPR_RLSR,
2259 (u32) &pshmem->linkstatus, /* no 4GB wrap guaranteed */
2260 0, 0, 0);
2261#endif
2262}
2263
2264static void slic_init_cleanup(struct adapter *adapter)
2265{
2266 if (adapter->intrregistered) {
2267 adapter->intrregistered = 0;
2268 free_irq(adapter->netdev->irq, adapter->netdev);
2269
2270 }
2271 if (adapter->pshmem) {
2272 pci_free_consistent(adapter->pcidev,
2273 sizeof(struct slic_shmem),
2274 adapter->pshmem, adapter->phys_shmem);
2275 adapter->pshmem = NULL;
2276 adapter->phys_shmem = (dma_addr_t)(unsigned long)NULL;
2277 }
2278
2279 if (adapter->pingtimerset) {
2280 adapter->pingtimerset = 0;
2281 del_timer(&adapter->pingtimer);
2282 }
2283
2284 slic_rspqueue_free(adapter);
2285 slic_cmdq_free(adapter);
2286 slic_rcvqueue_free(adapter);
2287}
2288
2289/*
2290 * Allocate a mcast_address structure to hold the multicast address.
2291 * Link it in.
2292 */
2293static int slic_mcast_add_list(struct adapter *adapter, char *address)
2294{
2295 struct mcast_address *mcaddr, *mlist;
2296
2297 /* Check to see if it already exists */
2298 mlist = adapter->mcastaddrs;
2299 while (mlist) {
2300 if (ether_addr_equal(mlist->address, address))
2301 return 0;
2302 mlist = mlist->next;
2303 }
2304
2305 /* Doesn't already exist. Allocate a structure to hold it */
2306 mcaddr = kmalloc(sizeof(struct mcast_address), GFP_ATOMIC);
2307 if (mcaddr == NULL)
2308 return 1;
2309
2310 memcpy(mcaddr->address, address, ETH_ALEN);
2311
2312 mcaddr->next = adapter->mcastaddrs;
2313 adapter->mcastaddrs = mcaddr;
2314
2315 return 0;
2316}
2317
2318static void slic_mcast_set_list(struct net_device *dev)
2319{
2320 struct adapter *adapter = netdev_priv(dev);
2321 int status = 0;
2322 char *addresses;
2323 struct netdev_hw_addr *ha;
2324
2325 netdev_for_each_mc_addr(ha, dev) {
2326 addresses = (char *) &ha->addr;
2327 status = slic_mcast_add_list(adapter, addresses);
2328 if (status != 0)
2329 break;
2330 slic_mcast_set_bit(adapter, addresses);
2331 }
2332
2333 if (adapter->devflags_prev != dev->flags) {
2334 adapter->macopts = MAC_DIRECTED;
2335 if (dev->flags) {
2336 if (dev->flags & IFF_BROADCAST)
2337 adapter->macopts |= MAC_BCAST;
2338 if (dev->flags & IFF_PROMISC)
2339 adapter->macopts |= MAC_PROMISC;
2340 if (dev->flags & IFF_ALLMULTI)
2341 adapter->macopts |= MAC_ALLMCAST;
2342 if (dev->flags & IFF_MULTICAST)
2343 adapter->macopts |= MAC_MCAST;
2344 }
2345 adapter->devflags_prev = dev->flags;
2346 slic_config_set(adapter, true);
2347 } else {
2348 if (status == 0)
2349 slic_mcast_set_mask(adapter);
2350 }
2351}
2352
2353#define XMIT_FAIL_LINK_STATE 1
2354#define XMIT_FAIL_ZERO_LENGTH 2
2355#define XMIT_FAIL_HOSTCMD_FAIL 3
2356
2357static void slic_xmit_build_request(struct adapter *adapter,
2358 struct slic_hostcmd *hcmd, struct sk_buff *skb)
2359{
2360 struct slic_host64_cmd *ihcmd;
2361 ulong phys_addr;
2362
2363 ihcmd = &hcmd->cmd64;
2364
2365 ihcmd->flags = (adapter->port << IHFLG_IFSHFT);
2366 ihcmd->command = IHCMD_XMT_REQ;
2367 ihcmd->u.slic_buffers.totlen = skb->len;
2368 phys_addr = pci_map_single(adapter->pcidev, skb->data, skb->len,
2369 PCI_DMA_TODEVICE);
2370 ihcmd->u.slic_buffers.bufs[0].paddrl = SLIC_GET_ADDR_LOW(phys_addr);
2371 ihcmd->u.slic_buffers.bufs[0].paddrh = SLIC_GET_ADDR_HIGH(phys_addr);
2372 ihcmd->u.slic_buffers.bufs[0].length = skb->len;
2373#if BITS_PER_LONG == 64
2374 hcmd->cmdsize = (u32) ((((u64)&ihcmd->u.slic_buffers.bufs[1] -
2375 (u64) hcmd) + 31) >> 5);
2376#else
2377 hcmd->cmdsize = ((((u32) &ihcmd->u.slic_buffers.bufs[1] -
2378 (u32) hcmd) + 31) >> 5);
2379#endif
2380}
2381
2382static void slic_xmit_fail(struct adapter *adapter,
2383 struct sk_buff *skb,
2384 void *cmd, u32 skbtype, u32 status)
2385{
2386 if (adapter->xmitq_full)
2387 netif_stop_queue(adapter->netdev);
2388 if ((cmd == NULL) && (status <= XMIT_FAIL_HOSTCMD_FAIL)) {
2389 switch (status) {
2390 case XMIT_FAIL_LINK_STATE:
2391 dev_err(&adapter->netdev->dev,
2392 "reject xmit skb[%p: %x] linkstate[%s] adapter[%s:%d] card[%s:%d]\n",
2393 skb, skb->pkt_type,
2394 SLIC_LINKSTATE(adapter->linkstate),
2395 SLIC_ADAPTER_STATE(adapter->state),
2396 adapter->state,
2397 SLIC_CARD_STATE(adapter->card->state),
2398 adapter->card->state);
2399 break;
2400 case XMIT_FAIL_ZERO_LENGTH:
2401 dev_err(&adapter->netdev->dev,
2402 "xmit_start skb->len == 0 skb[%p] type[%x]\n",
2403 skb, skb->pkt_type);
2404 break;
2405 case XMIT_FAIL_HOSTCMD_FAIL:
2406 dev_err(&adapter->netdev->dev,
2407 "xmit_start skb[%p] type[%x] No host commands available\n", skb, skb->pkt_type);
2408 break;
2409 }
2410 }
2411 dev_kfree_skb(skb);
2412 adapter->netdev->stats.tx_dropped++;
2413}
2414
2415static void slic_rcv_handle_error(struct adapter *adapter,
2416 struct slic_rcvbuf *rcvbuf)
2417{
2418 struct slic_hddr_wds *hdr = (struct slic_hddr_wds *)rcvbuf->data;
2419 struct net_device *netdev = adapter->netdev;
2420
2421 if (adapter->devid != SLIC_1GB_DEVICE_ID) {
2422 if (hdr->frame_status14 & VRHSTAT_802OE)
2423 adapter->if_events.oflow802++;
2424 if (hdr->frame_status14 & VRHSTAT_TPOFLO)
2425 adapter->if_events.Tprtoflow++;
2426 if (hdr->frame_status_b14 & VRHSTATB_802UE)
2427 adapter->if_events.uflow802++;
2428 if (hdr->frame_status_b14 & VRHSTATB_RCVE) {
2429 adapter->if_events.rcvearly++;
2430 netdev->stats.rx_fifo_errors++;
2431 }
2432 if (hdr->frame_status_b14 & VRHSTATB_BUFF) {
2433 adapter->if_events.Bufov++;
2434 netdev->stats.rx_over_errors++;
2435 }
2436 if (hdr->frame_status_b14 & VRHSTATB_CARRE) {
2437 adapter->if_events.Carre++;
2438 netdev->stats.tx_carrier_errors++;
2439 }
2440 if (hdr->frame_status_b14 & VRHSTATB_LONGE)
2441 adapter->if_events.Longe++;
2442 if (hdr->frame_status_b14 & VRHSTATB_PREA)
2443 adapter->if_events.Invp++;
2444 if (hdr->frame_status_b14 & VRHSTATB_CRC) {
2445 adapter->if_events.Crc++;
2446 netdev->stats.rx_crc_errors++;
2447 }
2448 if (hdr->frame_status_b14 & VRHSTATB_DRBL)
2449 adapter->if_events.Drbl++;
2450 if (hdr->frame_status_b14 & VRHSTATB_CODE)
2451 adapter->if_events.Code++;
2452 if (hdr->frame_status_b14 & VRHSTATB_TPCSUM)
2453 adapter->if_events.TpCsum++;
2454 if (hdr->frame_status_b14 & VRHSTATB_TPHLEN)
2455 adapter->if_events.TpHlen++;
2456 if (hdr->frame_status_b14 & VRHSTATB_IPCSUM)
2457 adapter->if_events.IpCsum++;
2458 if (hdr->frame_status_b14 & VRHSTATB_IPLERR)
2459 adapter->if_events.IpLen++;
2460 if (hdr->frame_status_b14 & VRHSTATB_IPHERR)
2461 adapter->if_events.IpHlen++;
2462 } else {
2463 if (hdr->frame_statusGB & VGBSTAT_XPERR) {
2464 u32 xerr = hdr->frame_statusGB >> VGBSTAT_XERRSHFT;
2465
2466 if (xerr == VGBSTAT_XCSERR)
2467 adapter->if_events.TpCsum++;
2468 if (xerr == VGBSTAT_XUFLOW)
2469 adapter->if_events.Tprtoflow++;
2470 if (xerr == VGBSTAT_XHLEN)
2471 adapter->if_events.TpHlen++;
2472 }
2473 if (hdr->frame_statusGB & VGBSTAT_NETERR) {
2474 u32 nerr =
2475 (hdr->
2476 frame_statusGB >> VGBSTAT_NERRSHFT) &
2477 VGBSTAT_NERRMSK;
2478 if (nerr == VGBSTAT_NCSERR)
2479 adapter->if_events.IpCsum++;
2480 if (nerr == VGBSTAT_NUFLOW)
2481 adapter->if_events.IpLen++;
2482 if (nerr == VGBSTAT_NHLEN)
2483 adapter->if_events.IpHlen++;
2484 }
2485 if (hdr->frame_statusGB & VGBSTAT_LNKERR) {
2486 u32 lerr = hdr->frame_statusGB & VGBSTAT_LERRMSK;
2487
2488 if (lerr == VGBSTAT_LDEARLY)
2489 adapter->if_events.rcvearly++;
2490 if (lerr == VGBSTAT_LBOFLO)
2491 adapter->if_events.Bufov++;
2492 if (lerr == VGBSTAT_LCODERR)
2493 adapter->if_events.Code++;
2494 if (lerr == VGBSTAT_LDBLNBL)
2495 adapter->if_events.Drbl++;
2496 if (lerr == VGBSTAT_LCRCERR)
2497 adapter->if_events.Crc++;
2498 if (lerr == VGBSTAT_LOFLO)
2499 adapter->if_events.oflow802++;
2500 if (lerr == VGBSTAT_LUFLO)
2501 adapter->if_events.uflow802++;
2502 }
2503 }
2504 return;
2505}
2506
2507#define TCP_OFFLOAD_FRAME_PUSHFLAG 0x10000000
2508#define M_FAST_PATH 0x0040
2509
2510static void slic_rcv_handler(struct adapter *adapter)
2511{
2512 struct net_device *netdev = adapter->netdev;
2513 struct sk_buff *skb;
2514 struct slic_rcvbuf *rcvbuf;
2515 u32 frames = 0;
2516
2517 while ((skb = slic_rcvqueue_getnext(adapter))) {
2518 u32 rx_bytes;
2519
2520 rcvbuf = (struct slic_rcvbuf *)skb->head;
2521 adapter->card->events++;
2522 if (rcvbuf->status & IRHDDR_ERR) {
2523 adapter->rx_errors++;
2524 slic_rcv_handle_error(adapter, rcvbuf);
2525 slic_rcvqueue_reinsert(adapter, skb);
2526 continue;
2527 }
2528
2529 if (!slic_mac_filter(adapter, (struct ether_header *)
2530 rcvbuf->data)) {
2531 slic_rcvqueue_reinsert(adapter, skb);
2532 continue;
2533 }
2534 skb_pull(skb, SLIC_RCVBUF_HEADSIZE);
2535 rx_bytes = (rcvbuf->length & IRHDDR_FLEN_MSK);
2536 skb_put(skb, rx_bytes);
2537 netdev->stats.rx_packets++;
2538 netdev->stats.rx_bytes += rx_bytes;
2539#if SLIC_OFFLOAD_IP_CHECKSUM
2540 skb->ip_summed = CHECKSUM_UNNECESSARY;
2541#endif
2542
2543 skb->dev = adapter->netdev;
2544 skb->protocol = eth_type_trans(skb, skb->dev);
2545 netif_rx(skb);
2546
2547 ++frames;
2548#if SLIC_INTERRUPT_PROCESS_LIMIT
2549 if (frames >= SLIC_RCVQ_MAX_PROCESS_ISR) {
2550 adapter->rcv_interrupt_yields++;
2551 break;
2552 }
2553#endif
2554 }
2555 adapter->max_isr_rcvs = max(adapter->max_isr_rcvs, frames);
2556}
2557
2558static void slic_xmit_complete(struct adapter *adapter)
2559{
2560 struct slic_hostcmd *hcmd;
2561 struct slic_rspbuf *rspbuf;
2562 u32 frames = 0;
2563 struct slic_handle_word slic_handle_word;
2564
2565 do {
2566 rspbuf = slic_rspqueue_getnext(adapter);
2567 if (!rspbuf)
2568 break;
2569 adapter->xmit_completes++;
2570 adapter->card->events++;
2571 /*
2572 Get the complete host command buffer
2573 */
2574 slic_handle_word.handle_token = rspbuf->hosthandle;
2575 hcmd =
2576 (struct slic_hostcmd *)
2577 adapter->slic_handles[slic_handle_word.handle_index].
2578 address;
2579/* hcmd = (struct slic_hostcmd *) rspbuf->hosthandle; */
2580 if (hcmd->type == SLIC_CMD_DUMB) {
2581 if (hcmd->skb)
2582 dev_kfree_skb_irq(hcmd->skb);
2583 slic_cmdq_putdone_irq(adapter, hcmd);
2584 }
2585 rspbuf->status = 0;
2586 rspbuf->hosthandle = 0;
2587 frames++;
2588 } while (1);
2589 adapter->max_isr_xmits = max(adapter->max_isr_xmits, frames);
2590}
2591
2592static void slic_interrupt_card_up(u32 isr, struct adapter *adapter,
2593 struct net_device *dev)
2594{
2595 if (isr & ~ISR_IO) {
2596 if (isr & ISR_ERR) {
2597 adapter->error_interrupts++;
2598 if (isr & ISR_RMISS) {
2599 int count;
2600 int pre_count;
2601 int errors;
2602
2603 struct slic_rcvqueue *rcvq =
2604 &adapter->rcvqueue;
2605
2606 adapter->error_rmiss_interrupts++;
2607
2608 if (!rcvq->errors)
2609 rcv_count = rcvq->count;
2610 pre_count = rcvq->count;
2611 errors = rcvq->errors;
2612
2613 while (rcvq->count < SLIC_RCVQ_FILLTHRESH) {
2614 count = slic_rcvqueue_fill(adapter);
2615 if (!count)
2616 break;
2617 }
2618 } else if (isr & ISR_XDROP) {
2619 dev_err(&dev->dev,
2620 "isr & ISR_ERR [%x] ISR_XDROP\n", isr);
2621 } else {
2622 dev_err(&dev->dev,
2623 "isr & ISR_ERR [%x]\n",
2624 isr);
2625 }
2626 }
2627
2628 if (isr & ISR_LEVENT) {
2629 adapter->linkevent_interrupts++;
2630 slic_link_event_handler(adapter);
2631 }
2632
2633 if ((isr & ISR_UPC) || (isr & ISR_UPCERR) ||
2634 (isr & ISR_UPCBSY)) {
2635 adapter->upr_interrupts++;
2636 slic_upr_request_complete(adapter, isr);
2637 }
2638 }
2639
2640 if (isr & ISR_RCV) {
2641 adapter->rcv_interrupts++;
2642 slic_rcv_handler(adapter);
2643 }
2644
2645 if (isr & ISR_CMD) {
2646 adapter->xmit_interrupts++;
2647 slic_xmit_complete(adapter);
2648 }
2649}
2650
2651
2652static irqreturn_t slic_interrupt(int irq, void *dev_id)
2653{
2654 struct net_device *dev = (struct net_device *)dev_id;
2655 struct adapter *adapter = netdev_priv(dev);
2656 u32 isr;
2657
2658 if ((adapter->pshmem) && (adapter->pshmem->isr)) {
2659 slic_reg32_write(&adapter->slic_regs->slic_icr,
2660 ICR_INT_MASK, FLUSH);
2661 isr = adapter->isrcopy = adapter->pshmem->isr;
2662 adapter->pshmem->isr = 0;
2663 adapter->num_isrs++;
2664 switch (adapter->card->state) {
2665 case CARD_UP:
2666 slic_interrupt_card_up(isr, adapter, dev);
2667 break;
2668
2669 case CARD_DOWN:
2670 if ((isr & ISR_UPC) ||
2671 (isr & ISR_UPCERR) || (isr & ISR_UPCBSY)) {
2672 adapter->upr_interrupts++;
2673 slic_upr_request_complete(adapter, isr);
2674 }
2675 break;
2676 }
2677
2678 adapter->isrcopy = 0;
2679 adapter->all_reg_writes += 2;
2680 adapter->isr_reg_writes++;
2681 slic_reg32_write(&adapter->slic_regs->slic_isr, 0, FLUSH);
2682 } else {
2683 adapter->false_interrupts++;
2684 }
2685 return IRQ_HANDLED;
2686}
2687
2688#define NORMAL_ETHFRAME 0
2689
2690static netdev_tx_t slic_xmit_start(struct sk_buff *skb, struct net_device *dev)
2691{
2692 struct sliccard *card;
2693 struct adapter *adapter = netdev_priv(dev);
2694 struct slic_hostcmd *hcmd = NULL;
2695 u32 status = 0;
2696 void *offloadcmd = NULL;
2697
2698 card = adapter->card;
2699 if ((adapter->linkstate != LINK_UP) ||
2700 (adapter->state != ADAPT_UP) || (card->state != CARD_UP)) {
2701 status = XMIT_FAIL_LINK_STATE;
2702 goto xmit_fail;
2703
2704 } else if (skb->len == 0) {
2705 status = XMIT_FAIL_ZERO_LENGTH;
2706 goto xmit_fail;
2707 }
2708
2709 hcmd = slic_cmdq_getfree(adapter);
2710 if (!hcmd) {
2711 adapter->xmitq_full = 1;
2712 status = XMIT_FAIL_HOSTCMD_FAIL;
2713 goto xmit_fail;
2714 }
2715 hcmd->skb = skb;
2716 hcmd->busy = 1;
2717 hcmd->type = SLIC_CMD_DUMB;
2718 slic_xmit_build_request(adapter, hcmd, skb);
2719 dev->stats.tx_packets++;
2720 dev->stats.tx_bytes += skb->len;
2721
2722#ifdef DEBUG_DUMP
2723 if (adapter->kill_card) {
2724 struct slic_host64_cmd ihcmd;
2725
2726 ihcmd = &hcmd->cmd64;
2727
2728 ihcmd->flags |= 0x40;
2729 adapter->kill_card = 0; /* only do this once */
2730 }
2731#endif
2732 if (hcmd->paddrh == 0) {
2733 slic_reg32_write(&adapter->slic_regs->slic_cbar,
2734 (hcmd->paddrl | hcmd->cmdsize), DONT_FLUSH);
2735 } else {
2736 slic_reg64_write(adapter, &adapter->slic_regs->slic_cbar64,
2737 (hcmd->paddrl | hcmd->cmdsize),
2738 &adapter->slic_regs->slic_addr_upper,
2739 hcmd->paddrh, DONT_FLUSH);
2740 }
2741xmit_done:
2742 return NETDEV_TX_OK;
2743xmit_fail:
2744 slic_xmit_fail(adapter, skb, offloadcmd, NORMAL_ETHFRAME, status);
2745 goto xmit_done;
2746}
2747
2748
2749static void slic_adapter_freeresources(struct adapter *adapter)
2750{
2751 slic_init_cleanup(adapter);
2752 adapter->error_interrupts = 0;
2753 adapter->rcv_interrupts = 0;
2754 adapter->xmit_interrupts = 0;
2755 adapter->linkevent_interrupts = 0;
2756 adapter->upr_interrupts = 0;
2757 adapter->num_isrs = 0;
2758 adapter->xmit_completes = 0;
2759 adapter->rcv_broadcasts = 0;
2760 adapter->rcv_multicasts = 0;
2761 adapter->rcv_unicasts = 0;
2762}
2763
2764static int slic_adapter_allocresources(struct adapter *adapter)
2765{
2766 if (!adapter->intrregistered) {
2767 int retval;
2768
2769 spin_unlock_irqrestore(&slic_global.driver_lock.lock,
2770 slic_global.driver_lock.flags);
2771
2772 retval = request_irq(adapter->netdev->irq,
2773 &slic_interrupt,
2774 IRQF_SHARED,
2775 adapter->netdev->name, adapter->netdev);
2776
2777 spin_lock_irqsave(&slic_global.driver_lock.lock,
2778 slic_global.driver_lock.flags);
2779
2780 if (retval) {
2781 dev_err(&adapter->netdev->dev,
2782 "request_irq (%s) FAILED [%x]\n",
2783 adapter->netdev->name, retval);
2784 return retval;
2785 }
2786 adapter->intrregistered = 1;
2787 }
2788 return 0;
2789}
2790
2791/*
2792 * slic_if_init
2793 *
2794 * Perform initialization of our slic interface.
2795 *
2796 */
2797static int slic_if_init(struct adapter *adapter)
2798{
2799 struct sliccard *card = adapter->card;
2800 struct net_device *dev = adapter->netdev;
2801 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
2802 struct slic_shmem *pshmem;
2803 int rc;
2804
2805 /* adapter should be down at this point */
2806 if (adapter->state != ADAPT_DOWN) {
2807 dev_err(&dev->dev, "%s: adapter->state != ADAPT_DOWN\n",
2808 __func__);
2809 rc = -EIO;
2810 goto err;
2811 }
2812
2813 adapter->devflags_prev = dev->flags;
2814 adapter->macopts = MAC_DIRECTED;
2815 if (dev->flags) {
2816 if (dev->flags & IFF_BROADCAST)
2817 adapter->macopts |= MAC_BCAST;
2818 if (dev->flags & IFF_PROMISC)
2819 adapter->macopts |= MAC_PROMISC;
2820 if (dev->flags & IFF_ALLMULTI)
2821 adapter->macopts |= MAC_ALLMCAST;
2822 if (dev->flags & IFF_MULTICAST)
2823 adapter->macopts |= MAC_MCAST;
2824 }
2825 rc = slic_adapter_allocresources(adapter);
2826 if (rc) {
2827 dev_err(&dev->dev,
2828 "%s: slic_adapter_allocresources FAILED %x\n",
2829 __func__, rc);
2830 slic_adapter_freeresources(adapter);
2831 goto err;
2832 }
2833
2834 if (!adapter->queues_initialized) {
2835 rc = slic_rspqueue_init(adapter);
2836 if (rc)
2837 goto err;
2838 rc = slic_cmdq_init(adapter);
2839 if (rc)
2840 goto err;
2841 rc = slic_rcvqueue_init(adapter);
2842 if (rc)
2843 goto err;
2844 adapter->queues_initialized = 1;
2845 }
2846
2847 slic_reg32_write(&slic_regs->slic_icr, ICR_INT_OFF, FLUSH);
2848 mdelay(1);
2849
2850 if (!adapter->isp_initialized) {
2851 pshmem = (struct slic_shmem *)(unsigned long)
2852 adapter->phys_shmem;
2853
2854 spin_lock_irqsave(&adapter->bit64reglock.lock,
2855 adapter->bit64reglock.flags);
2856
2857#if BITS_PER_LONG == 64
2858 slic_reg32_write(&slic_regs->slic_addr_upper,
2859 SLIC_GET_ADDR_HIGH(&pshmem->isr), DONT_FLUSH);
2860 slic_reg32_write(&slic_regs->slic_isp,
2861 SLIC_GET_ADDR_LOW(&pshmem->isr), FLUSH);
2862#else
2863 slic_reg32_write(&slic_regs->slic_addr_upper, 0, DONT_FLUSH);
2864 slic_reg32_write(&slic_regs->slic_isp, (u32)&pshmem->isr, FLUSH);
2865#endif
2866 spin_unlock_irqrestore(&adapter->bit64reglock.lock,
2867 adapter->bit64reglock.flags);
2868 adapter->isp_initialized = 1;
2869 }
2870
2871 adapter->state = ADAPT_UP;
2872 if (!card->loadtimerset) {
2873 init_timer(&card->loadtimer);
2874 card->loadtimer.expires =
2875 jiffies + (SLIC_LOADTIMER_PERIOD * HZ);
2876 card->loadtimer.data = (ulong) card;
2877 card->loadtimer.function = &slic_timer_load_check;
2878 add_timer(&card->loadtimer);
2879
2880 card->loadtimerset = 1;
2881 }
2882
2883 if (!adapter->pingtimerset) {
2884 init_timer(&adapter->pingtimer);
2885 adapter->pingtimer.expires =
2886 jiffies + (PING_TIMER_INTERVAL * HZ);
2887 adapter->pingtimer.data = (ulong) dev;
2888 adapter->pingtimer.function = &slic_timer_ping;
2889 add_timer(&adapter->pingtimer);
2890 adapter->pingtimerset = 1;
2891 adapter->card->pingstatus = ISR_PINGMASK;
2892 }
2893
2894 /*
2895 * clear any pending events, then enable interrupts
2896 */
2897 adapter->isrcopy = 0;
2898 adapter->pshmem->isr = 0;
2899 slic_reg32_write(&slic_regs->slic_isr, 0, FLUSH);
2900 slic_reg32_write(&slic_regs->slic_icr, ICR_INT_ON, FLUSH);
2901
2902 slic_link_config(adapter, LINK_AUTOSPEED, LINK_AUTOD);
2903 slic_link_event_handler(adapter);
2904
2905err:
2906 return rc;
2907}
2908
2909static int slic_entry_open(struct net_device *dev)
2910{
2911 struct adapter *adapter = netdev_priv(dev);
2912 struct sliccard *card = adapter->card;
2913 int status;
2914
2915 netif_stop_queue(adapter->netdev);
2916
2917 spin_lock_irqsave(&slic_global.driver_lock.lock,
2918 slic_global.driver_lock.flags);
2919 if (!adapter->activated) {
2920 card->adapters_activated++;
2921 slic_global.num_slic_ports_active++;
2922 adapter->activated = 1;
2923 }
2924 status = slic_if_init(adapter);
2925
2926 if (status != 0) {
2927 if (adapter->activated) {
2928 card->adapters_activated--;
2929 slic_global.num_slic_ports_active--;
2930 adapter->activated = 0;
2931 }
2932 goto spin_unlock;
2933 }
2934 if (!card->master)
2935 card->master = adapter;
2936
2937spin_unlock:
2938 spin_unlock_irqrestore(&slic_global.driver_lock.lock,
2939 slic_global.driver_lock.flags);
2940 return status;
2941}
2942
2943static void slic_card_cleanup(struct sliccard *card)
2944{
2945 if (card->loadtimerset) {
2946 card->loadtimerset = 0;
2947 del_timer_sync(&card->loadtimer);
2948 }
2949
2950 slic_debug_card_destroy(card);
2951
2952 kfree(card);
2953}
2954
2955static void slic_entry_remove(struct pci_dev *pcidev)
2956{
2957 struct net_device *dev = pci_get_drvdata(pcidev);
2958 u32 mmio_start = 0;
2959 uint mmio_len = 0;
2960 struct adapter *adapter = netdev_priv(dev);
2961 struct sliccard *card;
2962 struct mcast_address *mcaddr, *mlist;
2963
2964 slic_adapter_freeresources(adapter);
2965 slic_unmap_mmio_space(adapter);
2966 unregister_netdev(dev);
2967
2968 mmio_start = pci_resource_start(pcidev, 0);
2969 mmio_len = pci_resource_len(pcidev, 0);
2970
2971 release_mem_region(mmio_start, mmio_len);
2972
2973 iounmap((void __iomem *)dev->base_addr);
2974 /* free multicast addresses */
2975 mlist = adapter->mcastaddrs;
2976 while (mlist) {
2977 mcaddr = mlist;
2978 mlist = mlist->next;
2979 kfree(mcaddr);
2980 }
2981 card = adapter->card;
2982 card->adapters_allocated--;
2983 adapter->allocated = 0;
2984 if (!card->adapters_allocated) {
2985 struct sliccard *curr_card = slic_global.slic_card;
2986 if (curr_card == card) {
2987 slic_global.slic_card = card->next;
2988 } else {
2989 while (curr_card->next != card)
2990 curr_card = curr_card->next;
2991 curr_card->next = card->next;
2992 }
2993 slic_global.num_slic_cards--;
2994 slic_card_cleanup(card);
2995 }
2996 free_netdev(dev);
2997 pci_release_regions(pcidev);
2998 pci_disable_device(pcidev);
2999}
3000
3001static int slic_entry_halt(struct net_device *dev)
3002{
3003 struct adapter *adapter = netdev_priv(dev);
3004 struct sliccard *card = adapter->card;
3005 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
3006
3007 spin_lock_irqsave(&slic_global.driver_lock.lock,
3008 slic_global.driver_lock.flags);
3009 netif_stop_queue(adapter->netdev);
3010 adapter->state = ADAPT_DOWN;
3011 adapter->linkstate = LINK_DOWN;
3012 adapter->upr_list = NULL;
3013 adapter->upr_busy = 0;
3014 adapter->devflags_prev = 0;
3015 slic_reg32_write(&slic_regs->slic_icr, ICR_INT_OFF, FLUSH);
3016 adapter->all_reg_writes++;
3017 adapter->icr_reg_writes++;
3018 slic_config_clear(adapter);
3019 if (adapter->activated) {
3020 card->adapters_activated--;
3021 slic_global.num_slic_ports_active--;
3022 adapter->activated = 0;
3023 }
3024#ifdef AUTOMATIC_RESET
3025 slic_reg32_write(&slic_regs->slic_reset_iface, 0, FLUSH);
3026#endif
3027 /*
3028 * Reset the adapter's cmd queues
3029 */
3030 slic_cmdq_reset(adapter);
3031
3032#ifdef AUTOMATIC_RESET
3033 if (!card->adapters_activated)
3034 slic_card_init(card, adapter);
3035#endif
3036
3037 spin_unlock_irqrestore(&slic_global.driver_lock.lock,
3038 slic_global.driver_lock.flags);
3039 return 0;
3040}
3041
3042static struct net_device_stats *slic_get_stats(struct net_device *dev)
3043{
3044 struct adapter *adapter = netdev_priv(dev);
3045
3046 dev->stats.collisions = adapter->slic_stats.iface.xmit_collisions;
3047 dev->stats.rx_errors = adapter->slic_stats.iface.rcv_errors;
3048 dev->stats.tx_errors = adapter->slic_stats.iface.xmt_errors;
3049 dev->stats.rx_missed_errors = adapter->slic_stats.iface.rcv_discards;
3050 dev->stats.tx_heartbeat_errors = 0;
3051 dev->stats.tx_aborted_errors = 0;
3052 dev->stats.tx_window_errors = 0;
3053 dev->stats.tx_fifo_errors = 0;
3054 dev->stats.rx_frame_errors = 0;
3055 dev->stats.rx_length_errors = 0;
3056
3057 return &dev->stats;
3058}
3059
3060static int slic_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
3061{
3062 struct adapter *adapter = netdev_priv(dev);
3063 struct ethtool_cmd edata;
3064 struct ethtool_cmd ecmd;
3065 u32 data[7];
3066 u32 intagg;
3067
3068 switch (cmd) {
3069 case SIOCSLICSETINTAGG:
3070 if (copy_from_user(data, rq->ifr_data, 28))
3071 return -EFAULT;
3072 intagg = data[0];
3073 dev_err(&dev->dev, "%s: set interrupt aggregation to %d\n",
3074 __func__, intagg);
3075 slic_intagg_set(adapter, intagg);
3076 return 0;
3077
3078#ifdef SLIC_TRACE_DUMP_ENABLED
3079 case SIOCSLICTRACEDUMP:
3080 {
3081 u32 value;
3082 DBG_IOCTL("slic_ioctl SIOCSLIC_TRACE_DUMP\n");
3083
3084 if (copy_from_user(data, rq->ifr_data, 28)) {
3085 PRINT_ERROR
3086 ("slic: copy_from_user FAILED getting initial simba param\n");
3087 return -EFAULT;
3088 }
3089
3090 value = data[0];
3091 if (tracemon_request == SLIC_DUMP_DONE) {
3092 PRINT_ERROR
3093 ("ATK Diagnostic Trace Dump Requested\n");
3094 tracemon_request = SLIC_DUMP_REQUESTED;
3095 tracemon_request_type = value;
3096 tracemon_timestamp = jiffies;
3097 } else if ((tracemon_request == SLIC_DUMP_REQUESTED) ||
3098 (tracemon_request ==
3099 SLIC_DUMP_IN_PROGRESS)) {
3100 PRINT_ERROR
3101 ("ATK Diagnostic Trace Dump Requested but already in progress... ignore\n");
3102 } else {
3103 PRINT_ERROR
3104 ("ATK Diagnostic Trace Dump Requested\n");
3105 tracemon_request = SLIC_DUMP_REQUESTED;
3106 tracemon_request_type = value;
3107 tracemon_timestamp = jiffies;
3108 }
3109 return 0;
3110 }
3111#endif
3112 case SIOCETHTOOL:
3113 if (copy_from_user(&ecmd, rq->ifr_data, sizeof(ecmd)))
3114 return -EFAULT;
3115
3116 if (ecmd.cmd == ETHTOOL_GSET) {
3117 memset(&edata, 0, sizeof(edata));
3118 edata.supported = (SUPPORTED_10baseT_Half |
3119 SUPPORTED_10baseT_Full |
3120 SUPPORTED_100baseT_Half |
3121 SUPPORTED_100baseT_Full |
3122 SUPPORTED_Autoneg | SUPPORTED_MII);
3123 edata.port = PORT_MII;
3124 edata.transceiver = XCVR_INTERNAL;
3125 edata.phy_address = 0;
3126 if (adapter->linkspeed == LINK_100MB)
3127 edata.speed = SPEED_100;
3128 else if (adapter->linkspeed == LINK_10MB)
3129 edata.speed = SPEED_10;
3130 else
3131 edata.speed = 0;
3132
3133 if (adapter->linkduplex == LINK_FULLD)
3134 edata.duplex = DUPLEX_FULL;
3135 else
3136 edata.duplex = DUPLEX_HALF;
3137
3138 edata.autoneg = AUTONEG_ENABLE;
3139 edata.maxtxpkt = 1;
3140 edata.maxrxpkt = 1;
3141 if (copy_to_user(rq->ifr_data, &edata, sizeof(edata)))
3142 return -EFAULT;
3143
3144 } else if (ecmd.cmd == ETHTOOL_SSET) {
3145 if (!capable(CAP_NET_ADMIN))
3146 return -EPERM;
3147
3148 if (adapter->linkspeed == LINK_100MB)
3149 edata.speed = SPEED_100;
3150 else if (adapter->linkspeed == LINK_10MB)
3151 edata.speed = SPEED_10;
3152 else
3153 edata.speed = 0;
3154
3155 if (adapter->linkduplex == LINK_FULLD)
3156 edata.duplex = DUPLEX_FULL;
3157 else
3158 edata.duplex = DUPLEX_HALF;
3159
3160 edata.autoneg = AUTONEG_ENABLE;
3161 edata.maxtxpkt = 1;
3162 edata.maxrxpkt = 1;
3163 if ((ecmd.speed != edata.speed) ||
3164 (ecmd.duplex != edata.duplex)) {
3165 u32 speed;
3166 u32 duplex;
3167
3168 if (ecmd.speed == SPEED_10)
3169 speed = 0;
3170 else
3171 speed = PCR_SPEED_100;
3172 if (ecmd.duplex == DUPLEX_FULL)
3173 duplex = PCR_DUPLEX_FULL;
3174 else
3175 duplex = 0;
3176 slic_link_config(adapter, speed, duplex);
3177 slic_link_event_handler(adapter);
3178 }
3179 }
3180 return 0;
3181 default:
3182 return -EOPNOTSUPP;
3183 }
3184}
3185
3186static void slic_config_pci(struct pci_dev *pcidev)
3187{
3188 u16 pci_command;
3189 u16 new_command;
3190
3191 pci_read_config_word(pcidev, PCI_COMMAND, &pci_command);
3192
3193 new_command = pci_command | PCI_COMMAND_MASTER
3194 | PCI_COMMAND_MEMORY
3195 | PCI_COMMAND_INVALIDATE
3196 | PCI_COMMAND_PARITY | PCI_COMMAND_SERR | PCI_COMMAND_FAST_BACK;
3197 if (pci_command != new_command)
3198 pci_write_config_word(pcidev, PCI_COMMAND, new_command);
3199}
3200
3201static int slic_card_init(struct sliccard *card, struct adapter *adapter)
3202{
3203 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
3204 struct slic_eeprom *peeprom;
3205 struct oslic_eeprom *pOeeprom;
3206 dma_addr_t phys_config;
3207 u32 phys_configh;
3208 u32 phys_configl;
3209 u32 i = 0;
3210 struct slic_shmem *pshmem;
3211 int status;
3212 uint macaddrs = card->card_size;
3213 ushort eecodesize;
3214 ushort dramsize;
3215 ushort ee_chksum;
3216 ushort calc_chksum;
3217 struct slic_config_mac *pmac;
3218 unsigned char fruformat;
3219 unsigned char oemfruformat;
3220 struct atk_fru *patkfru;
3221 union oemfru *poemfru;
3222
3223 /* Reset everything except PCI configuration space */
3224 slic_soft_reset(adapter);
3225
3226 /* Download the microcode */
3227 status = slic_card_download(adapter);
3228
3229 if (status != 0) {
3230 dev_err(&adapter->pcidev->dev,
3231 "download failed bus %d slot %d\n",
3232 adapter->busnumber, adapter->slotnumber);
3233 return status;
3234 }
3235
3236 if (!card->config_set) {
3237 peeprom = pci_alloc_consistent(adapter->pcidev,
3238 sizeof(struct slic_eeprom),
3239 &phys_config);
3240
3241 phys_configl = SLIC_GET_ADDR_LOW(phys_config);
3242 phys_configh = SLIC_GET_ADDR_HIGH(phys_config);
3243
3244 if (!peeprom) {
3245 dev_err(&adapter->pcidev->dev,
3246 "eeprom read failed to get memory bus %d slot %d\n", adapter->busnumber,
3247 adapter->slotnumber);
3248 return -ENOMEM;
3249 } else {
3250 memset(peeprom, 0, sizeof(struct slic_eeprom));
3251 }
3252 slic_reg32_write(&slic_regs->slic_icr, ICR_INT_OFF, FLUSH);
3253 mdelay(1);
3254 pshmem = (struct slic_shmem *)(unsigned long)
3255 adapter->phys_shmem;
3256
3257 spin_lock_irqsave(&adapter->bit64reglock.lock,
3258 adapter->bit64reglock.flags);
3259 slic_reg32_write(&slic_regs->slic_addr_upper, 0, DONT_FLUSH);
3260 slic_reg32_write(&slic_regs->slic_isp,
3261 SLIC_GET_ADDR_LOW(&pshmem->isr), FLUSH);
3262 spin_unlock_irqrestore(&adapter->bit64reglock.lock,
3263 adapter->bit64reglock.flags);
3264
3265 slic_config_get(adapter, phys_configl, phys_configh);
3266
3267 for (;;) {
3268 if (adapter->pshmem->isr) {
3269 if (adapter->pshmem->isr & ISR_UPC) {
3270 adapter->pshmem->isr = 0;
3271 slic_reg64_write(adapter,
3272 &slic_regs->slic_isp, 0,
3273 &slic_regs->slic_addr_upper,
3274 0, FLUSH);
3275 slic_reg32_write(&slic_regs->slic_isr,
3276 0, FLUSH);
3277
3278 slic_upr_request_complete(adapter, 0);
3279 break;
3280 } else {
3281 adapter->pshmem->isr = 0;
3282 slic_reg32_write(&slic_regs->slic_isr,
3283 0, FLUSH);
3284 }
3285 } else {
3286 mdelay(1);
3287 i++;
3288 if (i > 5000) {
3289 dev_err(&adapter->pcidev->dev,
3290 "%d config data fetch timed out!\n",
3291 adapter->port);
3292 slic_reg64_write(adapter,
3293 &slic_regs->slic_isp, 0,
3294 &slic_regs->slic_addr_upper,
3295 0, FLUSH);
3296 return -EINVAL;
3297 }
3298 }
3299 }
3300
3301 switch (adapter->devid) {
3302 /* Oasis card */
3303 case SLIC_2GB_DEVICE_ID:
3304 /* extract EEPROM data and pointers to EEPROM data */
3305 pOeeprom = (struct oslic_eeprom *) peeprom;
3306 eecodesize = pOeeprom->EecodeSize;
3307 dramsize = pOeeprom->DramSize;
3308 pmac = pOeeprom->MacInfo;
3309 fruformat = pOeeprom->FruFormat;
3310 patkfru = &pOeeprom->AtkFru;
3311 oemfruformat = pOeeprom->OemFruFormat;
3312 poemfru = &pOeeprom->OemFru;
3313 macaddrs = 2;
3314 /* Minor kludge for Oasis card
3315 get 2 MAC addresses from the
3316 EEPROM to ensure that function 1
3317 gets the Port 1 MAC address */
3318 break;
3319 default:
3320 /* extract EEPROM data and pointers to EEPROM data */
3321 eecodesize = peeprom->EecodeSize;
3322 dramsize = peeprom->DramSize;
3323 pmac = peeprom->u2.mac.MacInfo;
3324 fruformat = peeprom->FruFormat;
3325 patkfru = &peeprom->AtkFru;
3326 oemfruformat = peeprom->OemFruFormat;
3327 poemfru = &peeprom->OemFru;
3328 break;
3329 }
3330
3331 card->config.EepromValid = false;
3332
3333 /* see if the EEPROM is valid by checking it's checksum */
3334 if ((eecodesize <= MAX_EECODE_SIZE) &&
3335 (eecodesize >= MIN_EECODE_SIZE)) {
3336
3337 ee_chksum =
3338 *(u16 *) ((char *) peeprom + (eecodesize - 2));
3339 /*
3340 calculate the EEPROM checksum
3341 */
3342 calc_chksum =
3343 ~slic_eeprom_cksum((char *) peeprom,
3344 (eecodesize - 2));
3345 /*
3346 if the ucdoe chksum flag bit worked,
3347 we wouldn't need this
3348 */
3349 if (ee_chksum == calc_chksum)
3350 card->config.EepromValid = true;
3351 }
3352 /* copy in the DRAM size */
3353 card->config.DramSize = dramsize;
3354
3355 /* copy in the MAC address(es) */
3356 for (i = 0; i < macaddrs; i++) {
3357 memcpy(&card->config.MacInfo[i],
3358 &pmac[i], sizeof(struct slic_config_mac));
3359 }
3360
3361 /* copy the Alacritech FRU information */
3362 card->config.FruFormat = fruformat;
3363 memcpy(&card->config.AtkFru, patkfru,
3364 sizeof(struct atk_fru));
3365
3366 pci_free_consistent(adapter->pcidev,
3367 sizeof(struct slic_eeprom),
3368 peeprom, phys_config);
3369
3370 if ((!card->config.EepromValid) &&
3371 (adapter->reg_params.fail_on_bad_eeprom)) {
3372 slic_reg64_write(adapter, &slic_regs->slic_isp, 0,
3373 &slic_regs->slic_addr_upper,
3374 0, FLUSH);
3375 dev_err(&adapter->pcidev->dev,
3376 "unsupported CONFIGURATION EEPROM invalid\n");
3377 return -EINVAL;
3378 }
3379
3380 card->config_set = 1;
3381 }
3382
3383 if (slic_card_download_gbrcv(adapter)) {
3384 dev_err(&adapter->pcidev->dev,
3385 "unable to download GB receive microcode\n");
3386 return -EINVAL;
3387 }
3388
3389 if (slic_global.dynamic_intagg)
3390 slic_intagg_set(adapter, 0);
3391 else
3392 slic_intagg_set(adapter, intagg_delay);
3393
3394 /*
3395 * Initialize ping status to "ok"
3396 */
3397 card->pingstatus = ISR_PINGMASK;
3398
3399 /*
3400 * Lastly, mark our card state as up and return success
3401 */
3402 card->state = CARD_UP;
3403 card->reset_in_progress = 0;
3404
3405 return 0;
3406}
3407
3408static void slic_init_driver(void)
3409{
3410 if (slic_first_init) {
3411 slic_first_init = 0;
3412 spin_lock_init(&slic_global.driver_lock.lock);
3413 slic_debug_init();
3414 }
3415}
3416
3417static void slic_init_adapter(struct net_device *netdev,
3418 struct pci_dev *pcidev,
3419 const struct pci_device_id *pci_tbl_entry,
3420 void __iomem *memaddr, int chip_idx)
3421{
3422 ushort index;
3423 struct slic_handle *pslic_handle;
3424 struct adapter *adapter = netdev_priv(netdev);
3425
3426/* adapter->pcidev = pcidev;*/
3427 adapter->vendid = pci_tbl_entry->vendor;
3428 adapter->devid = pci_tbl_entry->device;
3429 adapter->subsysid = pci_tbl_entry->subdevice;
3430 adapter->busnumber = pcidev->bus->number;
3431 adapter->slotnumber = ((pcidev->devfn >> 3) & 0x1F);
3432 adapter->functionnumber = (pcidev->devfn & 0x7);
3433 adapter->memorylength = pci_resource_len(pcidev, 0);
3434 adapter->slic_regs = (__iomem struct slic_regs *)memaddr;
3435 adapter->irq = pcidev->irq;
3436/* adapter->netdev = netdev;*/
3437 adapter->next_netdevice = head_netdevice;
3438 head_netdevice = netdev;
3439 adapter->chipid = chip_idx;
3440 adapter->port = 0; /*adapter->functionnumber;*/
3441 adapter->cardindex = adapter->port;
3442 adapter->memorybase = memaddr;
3443 spin_lock_init(&adapter->upr_lock.lock);
3444 spin_lock_init(&adapter->bit64reglock.lock);
3445 spin_lock_init(&adapter->adapter_lock.lock);
3446 spin_lock_init(&adapter->reset_lock.lock);
3447 spin_lock_init(&adapter->handle_lock.lock);
3448
3449 adapter->card_size = 1;
3450 /*
3451 Initialize slic_handle array
3452 */
3453 /*
3454 Start with 1. 0 is an invalid host handle.
3455 */
3456 for (index = 1, pslic_handle = &adapter->slic_handles[1];
3457 index < SLIC_CMDQ_MAXCMDS; index++, pslic_handle++) {
3458
3459 pslic_handle->token.handle_index = index;
3460 pslic_handle->type = SLIC_HANDLE_FREE;
3461 pslic_handle->next = adapter->pfree_slic_handles;
3462 adapter->pfree_slic_handles = pslic_handle;
3463 }
3464 adapter->pshmem = (struct slic_shmem *)
3465 pci_alloc_consistent(adapter->pcidev,
3466 sizeof(struct slic_shmem),
3467 &adapter->
3468 phys_shmem);
3469 if (adapter->pshmem)
3470 memset(adapter->pshmem, 0, sizeof(struct slic_shmem));
3471}
3472
3473static const struct net_device_ops slic_netdev_ops = {
3474 .ndo_open = slic_entry_open,
3475 .ndo_stop = slic_entry_halt,
3476 .ndo_start_xmit = slic_xmit_start,
3477 .ndo_do_ioctl = slic_ioctl,
3478 .ndo_set_mac_address = slic_mac_set_address,
3479 .ndo_get_stats = slic_get_stats,
3480 .ndo_set_rx_mode = slic_mcast_set_list,
3481 .ndo_validate_addr = eth_validate_addr,
3482 .ndo_change_mtu = eth_change_mtu,
3483};
3484
3485static u32 slic_card_locate(struct adapter *adapter)
3486{
3487 struct sliccard *card = slic_global.slic_card;
3488 struct physcard *physcard = slic_global.phys_card;
3489 ushort card_hostid;
3490 u16 __iomem *hostid_reg;
3491 uint i;
3492 uint rdhostid_offset = 0;
3493
3494 switch (adapter->devid) {
3495 case SLIC_2GB_DEVICE_ID:
3496 rdhostid_offset = SLIC_RDHOSTID_2GB;
3497 break;
3498 case SLIC_1GB_DEVICE_ID:
3499 rdhostid_offset = SLIC_RDHOSTID_1GB;
3500 break;
3501 default:
3502 return -ENODEV;
3503 }
3504
3505 hostid_reg =
3506 (u16 __iomem *) (((u8 __iomem *) (adapter->slic_regs)) +
3507 rdhostid_offset);
3508
3509 /* read the 16 bit hostid from SRAM */
3510 card_hostid = (ushort) readw(hostid_reg);
3511
3512 /* Initialize a new card structure if need be */
3513 if (card_hostid == SLIC_HOSTID_DEFAULT) {
3514 card = kzalloc(sizeof(struct sliccard), GFP_KERNEL);
3515 if (card == NULL)
3516 return -ENOMEM;
3517
3518 card->next = slic_global.slic_card;
3519 slic_global.slic_card = card;
3520 card->busnumber = adapter->busnumber;
3521 card->slotnumber = adapter->slotnumber;
3522
3523 /* Find an available cardnum */
3524 for (i = 0; i < SLIC_MAX_CARDS; i++) {
3525 if (slic_global.cardnuminuse[i] == 0) {
3526 slic_global.cardnuminuse[i] = 1;
3527 card->cardnum = i;
3528 break;
3529 }
3530 }
3531 slic_global.num_slic_cards++;
3532
3533 slic_debug_card_create(card);
3534 } else {
3535 /* Card exists, find the card this adapter belongs to */
3536 while (card) {
3537 if (card->cardnum == card_hostid)
3538 break;
3539 card = card->next;
3540 }
3541 }
3542
3543 if (!card)
3544 return -ENXIO;
3545 /* Put the adapter in the card's adapter list */
3546 if (!card->adapter[adapter->port]) {
3547 card->adapter[adapter->port] = adapter;
3548 adapter->card = card;
3549 }
3550
3551 card->card_size = 1; /* one port per *logical* card */
3552
3553 while (physcard) {
3554 for (i = 0; i < SLIC_MAX_PORTS; i++) {
3555 if (physcard->adapter[i])
3556 break;
3557 }
3558 if (i == SLIC_MAX_PORTS)
3559 break;
3560
3561 if (physcard->adapter[i]->slotnumber == adapter->slotnumber)
3562 break;
3563 physcard = physcard->next;
3564 }
3565 if (!physcard) {
3566 /* no structure allocated for this physical card yet */
3567 physcard = kzalloc(sizeof(struct physcard), GFP_ATOMIC);
3568 if (!physcard) {
3569 if (card_hostid == SLIC_HOSTID_DEFAULT)
3570 kfree(card);
3571 return -ENOMEM;
3572 }
3573
3574 physcard->next = slic_global.phys_card;
3575 slic_global.phys_card = physcard;
3576 physcard->adapters_allocd = 1;
3577 } else {
3578 physcard->adapters_allocd++;
3579 }
3580 /* Note - this is ZERO relative */
3581 adapter->physport = physcard->adapters_allocd - 1;
3582
3583 physcard->adapter[adapter->physport] = adapter;
3584 adapter->physcard = physcard;
3585
3586 return 0;
3587}
3588
3589static int slic_entry_probe(struct pci_dev *pcidev,
3590 const struct pci_device_id *pci_tbl_entry)
3591{
3592 static int cards_found;
3593 static int did_version;
3594 int err = -ENODEV;
3595 struct net_device *netdev;
3596 struct adapter *adapter;
3597 void __iomem *memmapped_ioaddr = NULL;
3598 u32 status = 0;
3599 ulong mmio_start = 0;
3600 ulong mmio_len = 0;
3601 struct sliccard *card = NULL;
3602 int pci_using_dac = 0;
3603
3604 slic_global.dynamic_intagg = dynamic_intagg;
3605
3606 err = pci_enable_device(pcidev);
3607
3608 if (err)
3609 return err;
3610
3611 if (slic_debug > 0 && did_version++ == 0) {
3612 dev_dbg(&pcidev->dev, "%s\n", slic_banner);
3613 dev_dbg(&pcidev->dev, "%s\n", slic_proc_version);
3614 }
3615
3616 if (!pci_set_dma_mask(pcidev, DMA_BIT_MASK(64))) {
3617 pci_using_dac = 1;
3618 err = pci_set_consistent_dma_mask(pcidev, DMA_BIT_MASK(64));
3619 if (err) {
3620 dev_err(&pcidev->dev, "unable to obtain 64-bit DMA for consistent allocations\n");
3621 goto err_out_disable_pci;
3622 }
3623 } else {
3624 err = pci_set_dma_mask(pcidev, DMA_BIT_MASK(32));
3625 if (err) {
3626 dev_err(&pcidev->dev, "no usable DMA configuration\n");
3627 goto err_out_disable_pci;
3628 }
3629 pci_using_dac = 0;
3630 pci_set_consistent_dma_mask(pcidev, DMA_BIT_MASK(32));
3631 }
3632
3633 err = pci_request_regions(pcidev, DRV_NAME);
3634 if (err) {
3635 dev_err(&pcidev->dev, "can't obtain PCI resources\n");
3636 goto err_out_disable_pci;
3637 }
3638
3639 pci_set_master(pcidev);
3640
3641 netdev = alloc_etherdev(sizeof(struct adapter));
3642 if (!netdev) {
3643 err = -ENOMEM;
3644 goto err_out_exit_slic_probe;
3645 }
3646
3647 SET_NETDEV_DEV(netdev, &pcidev->dev);
3648
3649 pci_set_drvdata(pcidev, netdev);
3650 adapter = netdev_priv(netdev);
3651 adapter->netdev = netdev;
3652 adapter->pcidev = pcidev;
3653 if (pci_using_dac)
3654 netdev->features |= NETIF_F_HIGHDMA;
3655
3656 mmio_start = pci_resource_start(pcidev, 0);
3657 mmio_len = pci_resource_len(pcidev, 0);
3658
3659
3660/* memmapped_ioaddr = (u32)ioremap_nocache(mmio_start, mmio_len);*/
3661 memmapped_ioaddr = ioremap(mmio_start, mmio_len);
3662 if (!memmapped_ioaddr) {
3663 dev_err(&pcidev->dev, "cannot remap MMIO region %lx @ %lx\n",
3664 mmio_len, mmio_start);
3665 err = -ENOMEM;
3666 goto err_out_free_netdev;
3667 }
3668
3669 slic_config_pci(pcidev);
3670
3671 slic_init_driver();
3672
3673 slic_init_adapter(netdev,
3674 pcidev, pci_tbl_entry, memmapped_ioaddr, cards_found);
3675
3676 err = slic_card_locate(adapter);
3677 if (err) {
3678 dev_err(&pcidev->dev, "cannot locate card\n");
3679 goto err_out_unmap;
3680 }
3681
3682 card = adapter->card;
3683
3684 if (!adapter->allocated) {
3685 card->adapters_allocated++;
3686 adapter->allocated = 1;
3687 }
3688
3689 status = slic_card_init(card, adapter);
3690
3691 if (status != 0) {
3692 card->state = CARD_FAIL;
3693 adapter->state = ADAPT_FAIL;
3694 adapter->linkstate = LINK_DOWN;
3695 dev_err(&pcidev->dev, "FAILED status[%x]\n", status);
3696 } else {
3697 slic_adapter_set_hwaddr(adapter);
3698 }
3699
3700 netdev->base_addr = (unsigned long)adapter->memorybase;
3701 netdev->irq = adapter->irq;
3702 netdev->netdev_ops = &slic_netdev_ops;
3703
3704 slic_debug_adapter_create(adapter);
3705
3706 strcpy(netdev->name, "eth%d");
3707 err = register_netdev(netdev);
3708 if (err) {
3709 dev_err(&pcidev->dev, "Cannot register net device, aborting.\n");
3710 goto err_out_unmap;
3711 }
3712
3713 cards_found++;
3714
3715 return status;
3716
3717err_out_unmap:
3718 iounmap(memmapped_ioaddr);
3719err_out_free_netdev:
3720 free_netdev(netdev);
3721err_out_exit_slic_probe:
3722 pci_release_regions(pcidev);
3723err_out_disable_pci:
3724 pci_disable_device(pcidev);
3725 return err;
3726}
3727
3728static struct pci_driver slic_driver = {
3729 .name = DRV_NAME,
3730 .id_table = slic_pci_tbl,
3731 .probe = slic_entry_probe,
3732 .remove = slic_entry_remove,
3733};
3734
3735static int __init slic_module_init(void)
3736{
3737 slic_init_driver();
3738
3739 if (debug >= 0 && slic_debug != debug)
3740 pr_debug("debug level is %d.\n", debug);
3741 if (debug >= 0)
3742 slic_debug = debug;
3743
3744 return pci_register_driver(&slic_driver);
3745}
3746
3747static void __exit slic_module_cleanup(void)
3748{
3749 pci_unregister_driver(&slic_driver);
3750 slic_debug_cleanup();
3751}
3752
3753module_init(slic_module_init);
3754module_exit(slic_module_cleanup);