1// SPDX-License-Identifier: GPL-2.0
  2/* Copyright(c) 2017 - 2019 Pensando Systems, Inc */
  3
  4#include <linux/module.h>
  5#include <linux/netdevice.h>
  6#include <linux/etherdevice.h>
  7#include <linux/pci.h>
  8
  9#include "ionic.h"
 10#include "ionic_bus.h"
 11#include "ionic_lif.h"
 12#include "ionic_debugfs.h"
 13
 14/* Supported devices */
 15static const struct pci_device_id ionic_id_table[] = {
 16	{ PCI_VDEVICE(PENSANDO, PCI_DEVICE_ID_PENSANDO_IONIC_ETH_PF) },
 17	{ PCI_VDEVICE(PENSANDO, PCI_DEVICE_ID_PENSANDO_IONIC_ETH_VF) },
 18	{ 0, }	/* end of table */
 19};
 20MODULE_DEVICE_TABLE(pci, ionic_id_table);
 21
 22int ionic_bus_get_irq(struct ionic *ionic, unsigned int num)
 23{
 24	return pci_irq_vector(ionic->pdev, num);
 25}
 26
 27const char *ionic_bus_info(struct ionic *ionic)
 28{
 29	return pci_name(ionic->pdev);
 30}
 31
 32int ionic_bus_alloc_irq_vectors(struct ionic *ionic, unsigned int nintrs)
 33{
 34	return pci_alloc_irq_vectors(ionic->pdev, nintrs, nintrs,
 35				     PCI_IRQ_MSIX);
 36}
 37
 38void ionic_bus_free_irq_vectors(struct ionic *ionic)
 39{
 40	pci_free_irq_vectors(ionic->pdev);
 41}
 42
 43static int ionic_map_bars(struct ionic *ionic)
 44{
 45	struct pci_dev *pdev = ionic->pdev;
 46	struct device *dev = ionic->dev;
 47	struct ionic_dev_bar *bars;
 48	unsigned int i, j;
 49
 50	bars = ionic->bars;
 51	ionic->num_bars = 0;
 52
 53	for (i = 0, j = 0; i < IONIC_BARS_MAX; i++) {
 54		if (!(pci_resource_flags(pdev, i) & IORESOURCE_MEM))
 55			continue;
 56		bars[j].len = pci_resource_len(pdev, i);
 57
 58		/* only map the whole bar 0 */
 59		if (j > 0) {
 60			bars[j].vaddr = NULL;
 61		} else {
 62			bars[j].vaddr = pci_iomap(pdev, i, bars[j].len);
 63			if (!bars[j].vaddr) {
 64				dev_err(dev,
 65					"Cannot memory-map BAR %d, aborting\n",
 66					i);
 67				return -ENODEV;
 68			}
 69		}
 70
 71		bars[j].bus_addr = pci_resource_start(pdev, i);
 72		bars[j].res_index = i;
 73		ionic->num_bars++;
 74		j++;
 75	}
 76
 77	return 0;
 78}
 79
 80static void ionic_unmap_bars(struct ionic *ionic)
 81{
 82	struct ionic_dev_bar *bars = ionic->bars;
 83	unsigned int i;
 84
 85	for (i = 0; i < IONIC_BARS_MAX; i++) {
 86		if (bars[i].vaddr) {
 87			iounmap(bars[i].vaddr);
 88			bars[i].bus_addr = 0;
 89			bars[i].vaddr = NULL;
 90			bars[i].len = 0;
 91		}
 92	}
 93}
 94
 95void __iomem *ionic_bus_map_dbpage(struct ionic *ionic, int page_num)
 96{
 97	return pci_iomap_range(ionic->pdev,
 98			       ionic->bars[IONIC_PCI_BAR_DBELL].res_index,
 99			       (u64)page_num << PAGE_SHIFT, PAGE_SIZE);
100}
101
102void ionic_bus_unmap_dbpage(struct ionic *ionic, void __iomem *page)
103{
104	iounmap(page);
105}
106
107static int ionic_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
108{
109	struct device *dev = &pdev->dev;
110	struct ionic *ionic;
111	int err;
112
113	ionic = ionic_devlink_alloc(dev);
114	if (!ionic)
115		return -ENOMEM;
116
117	ionic->pdev = pdev;
118	ionic->dev = dev;
119	pci_set_drvdata(pdev, ionic);
120	mutex_init(&ionic->dev_cmd_lock);
121
122	/* Query system for DMA addressing limitation for the device. */
123	err = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(IONIC_ADDR_LEN));
124	if (err) {
125		dev_err(dev, "Unable to obtain 64-bit DMA for consistent allocations, aborting.  err=%d\n",
126			err);
127		goto err_out_clear_drvdata;
128	}
129
130	ionic_debugfs_add_dev(ionic);
131
132	/* Setup PCI device */
133	err = pci_enable_device_mem(pdev);
134	if (err) {
135		dev_err(dev, "Cannot enable PCI device: %d, aborting\n", err);
136		goto err_out_debugfs_del_dev;
137	}
138
139	err = pci_request_regions(pdev, IONIC_DRV_NAME);
140	if (err) {
141		dev_err(dev, "Cannot request PCI regions: %d, aborting\n", err);
142		goto err_out_pci_disable_device;
143	}
144
145	pci_set_master(pdev);
146
147	err = ionic_map_bars(ionic);
148	if (err)
149		goto err_out_pci_clear_master;
150
151	/* Configure the device */
152	err = ionic_setup(ionic);
153	if (err) {
154		dev_err(dev, "Cannot setup device: %d, aborting\n", err);
155		goto err_out_unmap_bars;
156	}
157
158	err = ionic_identify(ionic);
159	if (err) {
160		dev_err(dev, "Cannot identify device: %d, aborting\n", err);
161		goto err_out_teardown;
162	}
163
164	err = ionic_init(ionic);
165	if (err) {
166		dev_err(dev, "Cannot init device: %d, aborting\n", err);
167		goto err_out_teardown;
168	}
169
170	/* Configure the ports */
171	err = ionic_port_identify(ionic);
172	if (err) {
173		dev_err(dev, "Cannot identify port: %d, aborting\n", err);
174		goto err_out_reset;
175	}
176
177	err = ionic_port_init(ionic);
178	if (err) {
179		dev_err(dev, "Cannot init port: %d, aborting\n", err);
180		goto err_out_reset;
181	}
182
183	/* Configure LIFs */
184	err = ionic_lif_identify(ionic, IONIC_LIF_TYPE_CLASSIC,
185				 &ionic->ident.lif);
186	if (err) {
187		dev_err(dev, "Cannot identify LIFs: %d, aborting\n", err);
188		goto err_out_port_reset;
189	}
190
191	err = ionic_lifs_size(ionic);
192	if (err) {
193		dev_err(dev, "Cannot size LIFs: %d, aborting\n", err);
194		goto err_out_port_reset;
195	}
196
197	err = ionic_lifs_alloc(ionic);
198	if (err) {
199		dev_err(dev, "Cannot allocate LIFs: %d, aborting\n", err);
200		goto err_out_free_irqs;
201	}
202
203	err = ionic_lifs_init(ionic);
204	if (err) {
205		dev_err(dev, "Cannot init LIFs: %d, aborting\n", err);
206		goto err_out_free_lifs;
207	}
208
209	err = ionic_lifs_register(ionic);
210	if (err) {
211		dev_err(dev, "Cannot register LIFs: %d, aborting\n", err);
212		goto err_out_deinit_lifs;
213	}
214
215	err = ionic_devlink_register(ionic);
216	if (err) {
217		dev_err(dev, "Cannot register devlink: %d\n", err);
218		goto err_out_deregister_lifs;
219	}
220
221	return 0;
222
223err_out_deregister_lifs:
224	ionic_lifs_unregister(ionic);
225err_out_deinit_lifs:
226	ionic_lifs_deinit(ionic);
227err_out_free_lifs:
228	ionic_lifs_free(ionic);
229err_out_free_irqs:
230	ionic_bus_free_irq_vectors(ionic);
231err_out_port_reset:
232	ionic_port_reset(ionic);
233err_out_reset:
234	ionic_reset(ionic);
235err_out_teardown:
236	ionic_dev_teardown(ionic);
237err_out_unmap_bars:
238	ionic_unmap_bars(ionic);
239	pci_release_regions(pdev);
240err_out_pci_clear_master:
241	pci_clear_master(pdev);
242err_out_pci_disable_device:
243	pci_disable_device(pdev);
244err_out_debugfs_del_dev:
245	ionic_debugfs_del_dev(ionic);
246err_out_clear_drvdata:
247	mutex_destroy(&ionic->dev_cmd_lock);
248	ionic_devlink_free(ionic);
249
250	return err;
251}
252
253static void ionic_remove(struct pci_dev *pdev)
254{
255	struct ionic *ionic = pci_get_drvdata(pdev);
256
257	if (!ionic)
258		return;
259
260	ionic_devlink_unregister(ionic);
261	ionic_lifs_unregister(ionic);
262	ionic_lifs_deinit(ionic);
263	ionic_lifs_free(ionic);
264	ionic_bus_free_irq_vectors(ionic);
265	ionic_port_reset(ionic);
266	ionic_reset(ionic);
267	ionic_dev_teardown(ionic);
268	ionic_unmap_bars(ionic);
269	pci_release_regions(pdev);
270	pci_clear_master(pdev);
271	pci_disable_device(pdev);
272	ionic_debugfs_del_dev(ionic);
273	mutex_destroy(&ionic->dev_cmd_lock);
274	ionic_devlink_free(ionic);
275}
276
277static struct pci_driver ionic_driver = {
278	.name = IONIC_DRV_NAME,
279	.id_table = ionic_id_table,
280	.probe = ionic_probe,
281	.remove = ionic_remove,
282};
283
284int ionic_bus_register_driver(void)
285{
286	return pci_register_driver(&ionic_driver);
287}
288
289void ionic_bus_unregister_driver(void)
290{
291	pci_unregister_driver(&ionic_driver);
292}