Loading...
1/*
2 * Xen PCI - handle PCI (INTx) and MSI infrastructure calls for PV, HVM and
3 * initial domain support. We also handle the DSDT _PRT callbacks for GSI's
4 * used in HVM and initial domain mode (PV does not parse ACPI, so it has no
5 * concept of GSIs). Under PV we hook under the pnbbios API for IRQs and
6 * 0xcf8 PCI configuration read/write.
7 *
8 * Author: Ryan Wilson <hap9@epoch.ncsc.mil>
9 * Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
10 * Stefano Stabellini <stefano.stabellini@eu.citrix.com>
11 */
12#include <linux/module.h>
13#include <linux/init.h>
14#include <linux/pci.h>
15#include <linux/acpi.h>
16
17#include <linux/io.h>
18#include <asm/io_apic.h>
19#include <asm/pci_x86.h>
20
21#include <asm/xen/hypervisor.h>
22
23#include <xen/features.h>
24#include <xen/events.h>
25#include <asm/xen/pci.h>
26
27static int xen_pcifront_enable_irq(struct pci_dev *dev)
28{
29 int rc;
30 int share = 1;
31 int pirq;
32 u8 gsi;
33
34 rc = pci_read_config_byte(dev, PCI_INTERRUPT_LINE, &gsi);
35 if (rc < 0) {
36 dev_warn(&dev->dev, "Xen PCI: failed to read interrupt line: %d\n",
37 rc);
38 return rc;
39 }
40 /* In PV DomU the Xen PCI backend puts the PIRQ in the interrupt line.*/
41 pirq = gsi;
42
43 if (gsi < NR_IRQS_LEGACY)
44 share = 0;
45
46 rc = xen_bind_pirq_gsi_to_irq(gsi, pirq, share, "pcifront");
47 if (rc < 0) {
48 dev_warn(&dev->dev, "Xen PCI: failed to bind GSI%d (PIRQ%d) to IRQ: %d\n",
49 gsi, pirq, rc);
50 return rc;
51 }
52
53 dev->irq = rc;
54 dev_info(&dev->dev, "Xen PCI mapped GSI%d to IRQ%d\n", gsi, dev->irq);
55 return 0;
56}
57
58#ifdef CONFIG_ACPI
59static int xen_register_pirq(u32 gsi, int gsi_override, int triggering,
60 bool set_pirq)
61{
62 int rc, pirq = -1, irq = -1;
63 struct physdev_map_pirq map_irq;
64 int shareable = 0;
65 char *name;
66
67 irq = xen_irq_from_gsi(gsi);
68 if (irq > 0)
69 return irq;
70
71 if (set_pirq)
72 pirq = gsi;
73
74 map_irq.domid = DOMID_SELF;
75 map_irq.type = MAP_PIRQ_TYPE_GSI;
76 map_irq.index = gsi;
77 map_irq.pirq = pirq;
78
79 rc = HYPERVISOR_physdev_op(PHYSDEVOP_map_pirq, &map_irq);
80 if (rc) {
81 printk(KERN_WARNING "xen map irq failed %d\n", rc);
82 return -1;
83 }
84
85 if (triggering == ACPI_EDGE_SENSITIVE) {
86 shareable = 0;
87 name = "ioapic-edge";
88 } else {
89 shareable = 1;
90 name = "ioapic-level";
91 }
92
93 if (gsi_override >= 0)
94 gsi = gsi_override;
95
96 irq = xen_bind_pirq_gsi_to_irq(gsi, map_irq.pirq, shareable, name);
97 if (irq < 0)
98 goto out;
99
100 printk(KERN_DEBUG "xen: --> pirq=%d -> irq=%d (gsi=%d)\n", map_irq.pirq, irq, gsi);
101out:
102 return irq;
103}
104
105static int acpi_register_gsi_xen_hvm(struct device *dev, u32 gsi,
106 int trigger, int polarity)
107{
108 if (!xen_hvm_domain())
109 return -1;
110
111 return xen_register_pirq(gsi, -1 /* no GSI override */, trigger,
112 false /* no mapping of GSI to PIRQ */);
113}
114
115#ifdef CONFIG_XEN_DOM0
116static int xen_register_gsi(u32 gsi, int gsi_override, int triggering, int polarity)
117{
118 int rc, irq;
119 struct physdev_setup_gsi setup_gsi;
120
121 if (!xen_pv_domain())
122 return -1;
123
124 printk(KERN_DEBUG "xen: registering gsi %u triggering %d polarity %d\n",
125 gsi, triggering, polarity);
126
127 irq = xen_register_pirq(gsi, gsi_override, triggering, true);
128
129 setup_gsi.gsi = gsi;
130 setup_gsi.triggering = (triggering == ACPI_EDGE_SENSITIVE ? 0 : 1);
131 setup_gsi.polarity = (polarity == ACPI_ACTIVE_HIGH ? 0 : 1);
132
133 rc = HYPERVISOR_physdev_op(PHYSDEVOP_setup_gsi, &setup_gsi);
134 if (rc == -EEXIST)
135 printk(KERN_INFO "Already setup the GSI :%d\n", gsi);
136 else if (rc) {
137 printk(KERN_ERR "Failed to setup GSI :%d, err_code:%d\n",
138 gsi, rc);
139 }
140
141 return irq;
142}
143
144static int acpi_register_gsi_xen(struct device *dev, u32 gsi,
145 int trigger, int polarity)
146{
147 return xen_register_gsi(gsi, -1 /* no GSI override */, trigger, polarity);
148}
149#endif
150#endif
151
152#if defined(CONFIG_PCI_MSI)
153#include <linux/msi.h>
154#include <asm/msidef.h>
155
156struct xen_pci_frontend_ops *xen_pci_frontend;
157EXPORT_SYMBOL_GPL(xen_pci_frontend);
158
159static int xen_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
160{
161 int irq, ret, i;
162 struct msi_desc *msidesc;
163 int *v;
164
165 if (type == PCI_CAP_ID_MSI && nvec > 1)
166 return 1;
167
168 v = kzalloc(sizeof(int) * max(1, nvec), GFP_KERNEL);
169 if (!v)
170 return -ENOMEM;
171
172 if (type == PCI_CAP_ID_MSIX)
173 ret = xen_pci_frontend_enable_msix(dev, v, nvec);
174 else
175 ret = xen_pci_frontend_enable_msi(dev, v);
176 if (ret)
177 goto error;
178 i = 0;
179 list_for_each_entry(msidesc, &dev->msi_list, list) {
180 irq = xen_bind_pirq_msi_to_irq(dev, msidesc, v[i],
181 (type == PCI_CAP_ID_MSI) ? nvec : 1,
182 (type == PCI_CAP_ID_MSIX) ?
183 "pcifront-msi-x" :
184 "pcifront-msi",
185 DOMID_SELF);
186 if (irq < 0) {
187 ret = irq;
188 goto free;
189 }
190 i++;
191 }
192 kfree(v);
193 return 0;
194
195error:
196 dev_err(&dev->dev, "Xen PCI frontend has not registered MSI/MSI-X support!\n");
197free:
198 kfree(v);
199 return ret;
200}
201
202#define XEN_PIRQ_MSI_DATA (MSI_DATA_TRIGGER_EDGE | \
203 MSI_DATA_LEVEL_ASSERT | (3 << 8) | MSI_DATA_VECTOR(0))
204
205static void xen_msi_compose_msg(struct pci_dev *pdev, unsigned int pirq,
206 struct msi_msg *msg)
207{
208 /* We set vector == 0 to tell the hypervisor we don't care about it,
209 * but we want a pirq setup instead.
210 * We use the dest_id field to pass the pirq that we want. */
211 msg->address_hi = MSI_ADDR_BASE_HI | MSI_ADDR_EXT_DEST_ID(pirq);
212 msg->address_lo =
213 MSI_ADDR_BASE_LO |
214 MSI_ADDR_DEST_MODE_PHYSICAL |
215 MSI_ADDR_REDIRECTION_CPU |
216 MSI_ADDR_DEST_ID(pirq);
217
218 msg->data = XEN_PIRQ_MSI_DATA;
219}
220
221static int xen_hvm_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
222{
223 int irq, pirq;
224 struct msi_desc *msidesc;
225 struct msi_msg msg;
226
227 if (type == PCI_CAP_ID_MSI && nvec > 1)
228 return 1;
229
230 list_for_each_entry(msidesc, &dev->msi_list, list) {
231 __read_msi_msg(msidesc, &msg);
232 pirq = MSI_ADDR_EXT_DEST_ID(msg.address_hi) |
233 ((msg.address_lo >> MSI_ADDR_DEST_ID_SHIFT) & 0xff);
234 if (msg.data != XEN_PIRQ_MSI_DATA ||
235 xen_irq_from_pirq(pirq) < 0) {
236 pirq = xen_allocate_pirq_msi(dev, msidesc);
237 if (pirq < 0) {
238 irq = -ENODEV;
239 goto error;
240 }
241 xen_msi_compose_msg(dev, pirq, &msg);
242 __write_msi_msg(msidesc, &msg);
243 dev_dbg(&dev->dev, "xen: msi bound to pirq=%d\n", pirq);
244 } else {
245 dev_dbg(&dev->dev,
246 "xen: msi already bound to pirq=%d\n", pirq);
247 }
248 irq = xen_bind_pirq_msi_to_irq(dev, msidesc, pirq,
249 (type == PCI_CAP_ID_MSI) ? nvec : 1,
250 (type == PCI_CAP_ID_MSIX) ?
251 "msi-x" : "msi",
252 DOMID_SELF);
253 if (irq < 0)
254 goto error;
255 dev_dbg(&dev->dev,
256 "xen: msi --> pirq=%d --> irq=%d\n", pirq, irq);
257 }
258 return 0;
259
260error:
261 dev_err(&dev->dev,
262 "Xen PCI frontend has not registered MSI/MSI-X support!\n");
263 return irq;
264}
265
266#ifdef CONFIG_XEN_DOM0
267static bool __read_mostly pci_seg_supported = true;
268
269static int xen_initdom_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
270{
271 int ret = 0;
272 struct msi_desc *msidesc;
273
274 list_for_each_entry(msidesc, &dev->msi_list, list) {
275 struct physdev_map_pirq map_irq;
276 domid_t domid;
277
278 domid = ret = xen_find_device_domain_owner(dev);
279 /* N.B. Casting int's -ENODEV to uint16_t results in 0xFFED,
280 * hence check ret value for < 0. */
281 if (ret < 0)
282 domid = DOMID_SELF;
283
284 memset(&map_irq, 0, sizeof(map_irq));
285 map_irq.domid = domid;
286 map_irq.type = MAP_PIRQ_TYPE_MSI_SEG;
287 map_irq.index = -1;
288 map_irq.pirq = -1;
289 map_irq.bus = dev->bus->number |
290 (pci_domain_nr(dev->bus) << 16);
291 map_irq.devfn = dev->devfn;
292
293 if (type == PCI_CAP_ID_MSI && nvec > 1) {
294 map_irq.type = MAP_PIRQ_TYPE_MULTI_MSI;
295 map_irq.entry_nr = nvec;
296 } else if (type == PCI_CAP_ID_MSIX) {
297 int pos;
298 u32 table_offset, bir;
299
300 pos = dev->msix_cap;
301 pci_read_config_dword(dev, pos + PCI_MSIX_TABLE,
302 &table_offset);
303 bir = (u8)(table_offset & PCI_MSIX_TABLE_BIR);
304
305 map_irq.table_base = pci_resource_start(dev, bir);
306 map_irq.entry_nr = msidesc->msi_attrib.entry_nr;
307 }
308
309 ret = -EINVAL;
310 if (pci_seg_supported)
311 ret = HYPERVISOR_physdev_op(PHYSDEVOP_map_pirq,
312 &map_irq);
313 if (type == PCI_CAP_ID_MSI && nvec > 1 && ret) {
314 /*
315 * If MAP_PIRQ_TYPE_MULTI_MSI is not available
316 * there's nothing else we can do in this case.
317 * Just set ret > 0 so driver can retry with
318 * single MSI.
319 */
320 ret = 1;
321 goto out;
322 }
323 if (ret == -EINVAL && !pci_domain_nr(dev->bus)) {
324 map_irq.type = MAP_PIRQ_TYPE_MSI;
325 map_irq.index = -1;
326 map_irq.pirq = -1;
327 map_irq.bus = dev->bus->number;
328 ret = HYPERVISOR_physdev_op(PHYSDEVOP_map_pirq,
329 &map_irq);
330 if (ret != -EINVAL)
331 pci_seg_supported = false;
332 }
333 if (ret) {
334 dev_warn(&dev->dev, "xen map irq failed %d for %d domain\n",
335 ret, domid);
336 goto out;
337 }
338
339 ret = xen_bind_pirq_msi_to_irq(dev, msidesc, map_irq.pirq,
340 (type == PCI_CAP_ID_MSI) ? nvec : 1,
341 (type == PCI_CAP_ID_MSIX) ? "msi-x" : "msi",
342 domid);
343 if (ret < 0)
344 goto out;
345 }
346 ret = 0;
347out:
348 return ret;
349}
350
351static void xen_initdom_restore_msi_irqs(struct pci_dev *dev)
352{
353 int ret = 0;
354
355 if (pci_seg_supported) {
356 struct physdev_pci_device restore_ext;
357
358 restore_ext.seg = pci_domain_nr(dev->bus);
359 restore_ext.bus = dev->bus->number;
360 restore_ext.devfn = dev->devfn;
361 ret = HYPERVISOR_physdev_op(PHYSDEVOP_restore_msi_ext,
362 &restore_ext);
363 if (ret == -ENOSYS)
364 pci_seg_supported = false;
365 WARN(ret && ret != -ENOSYS, "restore_msi_ext -> %d\n", ret);
366 }
367 if (!pci_seg_supported) {
368 struct physdev_restore_msi restore;
369
370 restore.bus = dev->bus->number;
371 restore.devfn = dev->devfn;
372 ret = HYPERVISOR_physdev_op(PHYSDEVOP_restore_msi, &restore);
373 WARN(ret && ret != -ENOSYS, "restore_msi -> %d\n", ret);
374 }
375}
376#endif
377
378static void xen_teardown_msi_irqs(struct pci_dev *dev)
379{
380 struct msi_desc *msidesc;
381
382 msidesc = list_entry(dev->msi_list.next, struct msi_desc, list);
383 if (msidesc->msi_attrib.is_msix)
384 xen_pci_frontend_disable_msix(dev);
385 else
386 xen_pci_frontend_disable_msi(dev);
387
388 /* Free the IRQ's and the msidesc using the generic code. */
389 default_teardown_msi_irqs(dev);
390}
391
392static void xen_teardown_msi_irq(unsigned int irq)
393{
394 xen_destroy_irq(irq);
395}
396static u32 xen_nop_msi_mask_irq(struct msi_desc *desc, u32 mask, u32 flag)
397{
398 return 0;
399}
400static u32 xen_nop_msix_mask_irq(struct msi_desc *desc, u32 flag)
401{
402 return 0;
403}
404#endif
405
406int __init pci_xen_init(void)
407{
408 if (!xen_pv_domain() || xen_initial_domain())
409 return -ENODEV;
410
411 printk(KERN_INFO "PCI: setting up Xen PCI frontend stub\n");
412
413 pcibios_set_cache_line_size();
414
415 pcibios_enable_irq = xen_pcifront_enable_irq;
416 pcibios_disable_irq = NULL;
417
418#ifdef CONFIG_ACPI
419 /* Keep ACPI out of the picture */
420 acpi_noirq = 1;
421#endif
422
423#ifdef CONFIG_PCI_MSI
424 x86_msi.setup_msi_irqs = xen_setup_msi_irqs;
425 x86_msi.teardown_msi_irq = xen_teardown_msi_irq;
426 x86_msi.teardown_msi_irqs = xen_teardown_msi_irqs;
427 x86_msi.msi_mask_irq = xen_nop_msi_mask_irq;
428 x86_msi.msix_mask_irq = xen_nop_msix_mask_irq;
429#endif
430 return 0;
431}
432
433int __init pci_xen_hvm_init(void)
434{
435 if (!xen_have_vector_callback || !xen_feature(XENFEAT_hvm_pirqs))
436 return 0;
437
438#ifdef CONFIG_ACPI
439 /*
440 * We don't want to change the actual ACPI delivery model,
441 * just how GSIs get registered.
442 */
443 __acpi_register_gsi = acpi_register_gsi_xen_hvm;
444#endif
445
446#ifdef CONFIG_PCI_MSI
447 x86_msi.setup_msi_irqs = xen_hvm_setup_msi_irqs;
448 x86_msi.teardown_msi_irq = xen_teardown_msi_irq;
449#endif
450 return 0;
451}
452
453#ifdef CONFIG_XEN_DOM0
454static __init void xen_setup_acpi_sci(void)
455{
456 int rc;
457 int trigger, polarity;
458 int gsi = acpi_sci_override_gsi;
459 int irq = -1;
460 int gsi_override = -1;
461
462 if (!gsi)
463 return;
464
465 rc = acpi_get_override_irq(gsi, &trigger, &polarity);
466 if (rc) {
467 printk(KERN_WARNING "xen: acpi_get_override_irq failed for acpi"
468 " sci, rc=%d\n", rc);
469 return;
470 }
471 trigger = trigger ? ACPI_LEVEL_SENSITIVE : ACPI_EDGE_SENSITIVE;
472 polarity = polarity ? ACPI_ACTIVE_LOW : ACPI_ACTIVE_HIGH;
473
474 printk(KERN_INFO "xen: sci override: global_irq=%d trigger=%d "
475 "polarity=%d\n", gsi, trigger, polarity);
476
477 /* Before we bind the GSI to a Linux IRQ, check whether
478 * we need to override it with bus_irq (IRQ) value. Usually for
479 * IRQs below IRQ_LEGACY_IRQ this holds IRQ == GSI, as so:
480 * ACPI: INT_SRC_OVR (bus 0 bus_irq 9 global_irq 9 low level)
481 * but there are oddballs where the IRQ != GSI:
482 * ACPI: INT_SRC_OVR (bus 0 bus_irq 9 global_irq 20 low level)
483 * which ends up being: gsi_to_irq[9] == 20
484 * (which is what acpi_gsi_to_irq ends up calling when starting the
485 * the ACPI interpreter and keels over since IRQ 9 has not been
486 * setup as we had setup IRQ 20 for it).
487 */
488 if (acpi_gsi_to_irq(gsi, &irq) == 0) {
489 /* Use the provided value if it's valid. */
490 if (irq >= 0)
491 gsi_override = irq;
492 }
493
494 gsi = xen_register_gsi(gsi, gsi_override, trigger, polarity);
495 printk(KERN_INFO "xen: acpi sci %d\n", gsi);
496
497 return;
498}
499
500int __init pci_xen_initial_domain(void)
501{
502 int irq;
503
504#ifdef CONFIG_PCI_MSI
505 x86_msi.setup_msi_irqs = xen_initdom_setup_msi_irqs;
506 x86_msi.teardown_msi_irq = xen_teardown_msi_irq;
507 x86_msi.restore_msi_irqs = xen_initdom_restore_msi_irqs;
508 x86_msi.msi_mask_irq = xen_nop_msi_mask_irq;
509 x86_msi.msix_mask_irq = xen_nop_msix_mask_irq;
510#endif
511 xen_setup_acpi_sci();
512 __acpi_register_gsi = acpi_register_gsi_xen;
513 /* Pre-allocate legacy irqs */
514 for (irq = 0; irq < NR_IRQS_LEGACY; irq++) {
515 int trigger, polarity;
516
517 if (acpi_get_override_irq(irq, &trigger, &polarity) == -1)
518 continue;
519
520 xen_register_pirq(irq, -1 /* no GSI override */,
521 trigger ? ACPI_LEVEL_SENSITIVE : ACPI_EDGE_SENSITIVE,
522 true /* Map GSI to PIRQ */);
523 }
524 if (0 == nr_ioapics) {
525 for (irq = 0; irq < NR_IRQS_LEGACY; irq++)
526 xen_bind_pirq_gsi_to_irq(irq, irq, 0, "xt-pic");
527 }
528 return 0;
529}
530
531struct xen_device_domain_owner {
532 domid_t domain;
533 struct pci_dev *dev;
534 struct list_head list;
535};
536
537static DEFINE_SPINLOCK(dev_domain_list_spinlock);
538static struct list_head dev_domain_list = LIST_HEAD_INIT(dev_domain_list);
539
540static struct xen_device_domain_owner *find_device(struct pci_dev *dev)
541{
542 struct xen_device_domain_owner *owner;
543
544 list_for_each_entry(owner, &dev_domain_list, list) {
545 if (owner->dev == dev)
546 return owner;
547 }
548 return NULL;
549}
550
551int xen_find_device_domain_owner(struct pci_dev *dev)
552{
553 struct xen_device_domain_owner *owner;
554 int domain = -ENODEV;
555
556 spin_lock(&dev_domain_list_spinlock);
557 owner = find_device(dev);
558 if (owner)
559 domain = owner->domain;
560 spin_unlock(&dev_domain_list_spinlock);
561 return domain;
562}
563EXPORT_SYMBOL_GPL(xen_find_device_domain_owner);
564
565int xen_register_device_domain_owner(struct pci_dev *dev, uint16_t domain)
566{
567 struct xen_device_domain_owner *owner;
568
569 owner = kzalloc(sizeof(struct xen_device_domain_owner), GFP_KERNEL);
570 if (!owner)
571 return -ENODEV;
572
573 spin_lock(&dev_domain_list_spinlock);
574 if (find_device(dev)) {
575 spin_unlock(&dev_domain_list_spinlock);
576 kfree(owner);
577 return -EEXIST;
578 }
579 owner->domain = domain;
580 owner->dev = dev;
581 list_add_tail(&owner->list, &dev_domain_list);
582 spin_unlock(&dev_domain_list_spinlock);
583 return 0;
584}
585EXPORT_SYMBOL_GPL(xen_register_device_domain_owner);
586
587int xen_unregister_device_domain_owner(struct pci_dev *dev)
588{
589 struct xen_device_domain_owner *owner;
590
591 spin_lock(&dev_domain_list_spinlock);
592 owner = find_device(dev);
593 if (!owner) {
594 spin_unlock(&dev_domain_list_spinlock);
595 return -ENODEV;
596 }
597 list_del(&owner->list);
598 spin_unlock(&dev_domain_list_spinlock);
599 kfree(owner);
600 return 0;
601}
602EXPORT_SYMBOL_GPL(xen_unregister_device_domain_owner);
603#endif
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Xen PCI - handle PCI (INTx) and MSI infrastructure calls for PV, HVM and
4 * initial domain support. We also handle the DSDT _PRT callbacks for GSI's
5 * used in HVM and initial domain mode (PV does not parse ACPI, so it has no
6 * concept of GSIs). Under PV we hook under the pnbbios API for IRQs and
7 * 0xcf8 PCI configuration read/write.
8 *
9 * Author: Ryan Wilson <hap9@epoch.ncsc.mil>
10 * Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
11 * Stefano Stabellini <stefano.stabellini@eu.citrix.com>
12 */
13#include <linux/export.h>
14#include <linux/init.h>
15#include <linux/pci.h>
16#include <linux/acpi.h>
17
18#include <linux/io.h>
19#include <asm/io_apic.h>
20#include <asm/pci_x86.h>
21
22#include <asm/xen/hypervisor.h>
23
24#include <xen/features.h>
25#include <xen/events.h>
26#include <asm/xen/pci.h>
27#include <asm/xen/cpuid.h>
28#include <asm/apic.h>
29#include <asm/i8259.h>
30
31static int xen_pcifront_enable_irq(struct pci_dev *dev)
32{
33 int rc;
34 int share = 1;
35 int pirq;
36 u8 gsi;
37
38 rc = pci_read_config_byte(dev, PCI_INTERRUPT_LINE, &gsi);
39 if (rc < 0) {
40 dev_warn(&dev->dev, "Xen PCI: failed to read interrupt line: %d\n",
41 rc);
42 return rc;
43 }
44 /* In PV DomU the Xen PCI backend puts the PIRQ in the interrupt line.*/
45 pirq = gsi;
46
47 if (gsi < nr_legacy_irqs())
48 share = 0;
49
50 rc = xen_bind_pirq_gsi_to_irq(gsi, pirq, share, "pcifront");
51 if (rc < 0) {
52 dev_warn(&dev->dev, "Xen PCI: failed to bind GSI%d (PIRQ%d) to IRQ: %d\n",
53 gsi, pirq, rc);
54 return rc;
55 }
56
57 dev->irq = rc;
58 dev_info(&dev->dev, "Xen PCI mapped GSI%d to IRQ%d\n", gsi, dev->irq);
59 return 0;
60}
61
62#ifdef CONFIG_ACPI
63static int xen_register_pirq(u32 gsi, int gsi_override, int triggering,
64 bool set_pirq)
65{
66 int rc, pirq = -1, irq = -1;
67 struct physdev_map_pirq map_irq;
68 int shareable = 0;
69 char *name;
70
71 irq = xen_irq_from_gsi(gsi);
72 if (irq > 0)
73 return irq;
74
75 if (set_pirq)
76 pirq = gsi;
77
78 map_irq.domid = DOMID_SELF;
79 map_irq.type = MAP_PIRQ_TYPE_GSI;
80 map_irq.index = gsi;
81 map_irq.pirq = pirq;
82
83 rc = HYPERVISOR_physdev_op(PHYSDEVOP_map_pirq, &map_irq);
84 if (rc) {
85 printk(KERN_WARNING "xen map irq failed %d\n", rc);
86 return -1;
87 }
88
89 if (triggering == ACPI_EDGE_SENSITIVE) {
90 shareable = 0;
91 name = "ioapic-edge";
92 } else {
93 shareable = 1;
94 name = "ioapic-level";
95 }
96
97 if (gsi_override >= 0)
98 gsi = gsi_override;
99
100 irq = xen_bind_pirq_gsi_to_irq(gsi, map_irq.pirq, shareable, name);
101 if (irq < 0)
102 goto out;
103
104 printk(KERN_DEBUG "xen: --> pirq=%d -> irq=%d (gsi=%d)\n", map_irq.pirq, irq, gsi);
105out:
106 return irq;
107}
108
109static int acpi_register_gsi_xen_hvm(struct device *dev, u32 gsi,
110 int trigger, int polarity)
111{
112 if (!xen_hvm_domain())
113 return -1;
114
115 return xen_register_pirq(gsi, -1 /* no GSI override */, trigger,
116 false /* no mapping of GSI to PIRQ */);
117}
118
119#ifdef CONFIG_XEN_DOM0
120static int xen_register_gsi(u32 gsi, int gsi_override, int triggering, int polarity)
121{
122 int rc, irq;
123 struct physdev_setup_gsi setup_gsi;
124
125 if (!xen_pv_domain())
126 return -1;
127
128 printk(KERN_DEBUG "xen: registering gsi %u triggering %d polarity %d\n",
129 gsi, triggering, polarity);
130
131 irq = xen_register_pirq(gsi, gsi_override, triggering, true);
132
133 setup_gsi.gsi = gsi;
134 setup_gsi.triggering = (triggering == ACPI_EDGE_SENSITIVE ? 0 : 1);
135 setup_gsi.polarity = (polarity == ACPI_ACTIVE_HIGH ? 0 : 1);
136
137 rc = HYPERVISOR_physdev_op(PHYSDEVOP_setup_gsi, &setup_gsi);
138 if (rc == -EEXIST)
139 printk(KERN_INFO "Already setup the GSI :%d\n", gsi);
140 else if (rc) {
141 printk(KERN_ERR "Failed to setup GSI :%d, err_code:%d\n",
142 gsi, rc);
143 }
144
145 return irq;
146}
147
148static int acpi_register_gsi_xen(struct device *dev, u32 gsi,
149 int trigger, int polarity)
150{
151 return xen_register_gsi(gsi, -1 /* no GSI override */, trigger, polarity);
152}
153#endif
154#endif
155
156#if defined(CONFIG_PCI_MSI)
157#include <linux/msi.h>
158#include <asm/msidef.h>
159
160struct xen_pci_frontend_ops *xen_pci_frontend;
161EXPORT_SYMBOL_GPL(xen_pci_frontend);
162
163static int xen_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
164{
165 int irq, ret, i;
166 struct msi_desc *msidesc;
167 int *v;
168
169 if (type == PCI_CAP_ID_MSI && nvec > 1)
170 return 1;
171
172 v = kcalloc(max(1, nvec), sizeof(int), GFP_KERNEL);
173 if (!v)
174 return -ENOMEM;
175
176 if (type == PCI_CAP_ID_MSIX)
177 ret = xen_pci_frontend_enable_msix(dev, v, nvec);
178 else
179 ret = xen_pci_frontend_enable_msi(dev, v);
180 if (ret)
181 goto error;
182 i = 0;
183 for_each_pci_msi_entry(msidesc, dev) {
184 irq = xen_bind_pirq_msi_to_irq(dev, msidesc, v[i],
185 (type == PCI_CAP_ID_MSI) ? nvec : 1,
186 (type == PCI_CAP_ID_MSIX) ?
187 "pcifront-msi-x" :
188 "pcifront-msi",
189 DOMID_SELF);
190 if (irq < 0) {
191 ret = irq;
192 goto free;
193 }
194 i++;
195 }
196 kfree(v);
197 return 0;
198
199error:
200 if (ret == -ENOSYS)
201 dev_err(&dev->dev, "Xen PCI frontend has not registered MSI/MSI-X support!\n");
202 else if (ret)
203 dev_err(&dev->dev, "Xen PCI frontend error: %d!\n", ret);
204free:
205 kfree(v);
206 return ret;
207}
208
209#define XEN_PIRQ_MSI_DATA (MSI_DATA_TRIGGER_EDGE | \
210 MSI_DATA_LEVEL_ASSERT | (3 << 8) | MSI_DATA_VECTOR(0))
211
212static void xen_msi_compose_msg(struct pci_dev *pdev, unsigned int pirq,
213 struct msi_msg *msg)
214{
215 /* We set vector == 0 to tell the hypervisor we don't care about it,
216 * but we want a pirq setup instead.
217 * We use the dest_id field to pass the pirq that we want. */
218 msg->address_hi = MSI_ADDR_BASE_HI | MSI_ADDR_EXT_DEST_ID(pirq);
219 msg->address_lo =
220 MSI_ADDR_BASE_LO |
221 MSI_ADDR_DEST_MODE_PHYSICAL |
222 MSI_ADDR_REDIRECTION_CPU |
223 MSI_ADDR_DEST_ID(pirq);
224
225 msg->data = XEN_PIRQ_MSI_DATA;
226}
227
228static int xen_hvm_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
229{
230 int irq, pirq;
231 struct msi_desc *msidesc;
232 struct msi_msg msg;
233
234 if (type == PCI_CAP_ID_MSI && nvec > 1)
235 return 1;
236
237 for_each_pci_msi_entry(msidesc, dev) {
238 pirq = xen_allocate_pirq_msi(dev, msidesc);
239 if (pirq < 0) {
240 irq = -ENODEV;
241 goto error;
242 }
243 xen_msi_compose_msg(dev, pirq, &msg);
244 __pci_write_msi_msg(msidesc, &msg);
245 dev_dbg(&dev->dev, "xen: msi bound to pirq=%d\n", pirq);
246 irq = xen_bind_pirq_msi_to_irq(dev, msidesc, pirq,
247 (type == PCI_CAP_ID_MSI) ? nvec : 1,
248 (type == PCI_CAP_ID_MSIX) ?
249 "msi-x" : "msi",
250 DOMID_SELF);
251 if (irq < 0)
252 goto error;
253 dev_dbg(&dev->dev,
254 "xen: msi --> pirq=%d --> irq=%d\n", pirq, irq);
255 }
256 return 0;
257
258error:
259 dev_err(&dev->dev, "Failed to create MSI%s! ret=%d!\n",
260 type == PCI_CAP_ID_MSI ? "" : "-X", irq);
261 return irq;
262}
263
264#ifdef CONFIG_XEN_DOM0
265static bool __read_mostly pci_seg_supported = true;
266
267static int xen_initdom_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
268{
269 int ret = 0;
270 struct msi_desc *msidesc;
271
272 for_each_pci_msi_entry(msidesc, dev) {
273 struct physdev_map_pirq map_irq;
274 domid_t domid;
275
276 domid = ret = xen_find_device_domain_owner(dev);
277 /* N.B. Casting int's -ENODEV to uint16_t results in 0xFFED,
278 * hence check ret value for < 0. */
279 if (ret < 0)
280 domid = DOMID_SELF;
281
282 memset(&map_irq, 0, sizeof(map_irq));
283 map_irq.domid = domid;
284 map_irq.type = MAP_PIRQ_TYPE_MSI_SEG;
285 map_irq.index = -1;
286 map_irq.pirq = -1;
287 map_irq.bus = dev->bus->number |
288 (pci_domain_nr(dev->bus) << 16);
289 map_irq.devfn = dev->devfn;
290
291 if (type == PCI_CAP_ID_MSI && nvec > 1) {
292 map_irq.type = MAP_PIRQ_TYPE_MULTI_MSI;
293 map_irq.entry_nr = nvec;
294 } else if (type == PCI_CAP_ID_MSIX) {
295 int pos;
296 unsigned long flags;
297 u32 table_offset, bir;
298
299 pos = dev->msix_cap;
300 pci_read_config_dword(dev, pos + PCI_MSIX_TABLE,
301 &table_offset);
302 bir = (u8)(table_offset & PCI_MSIX_TABLE_BIR);
303 flags = pci_resource_flags(dev, bir);
304 if (!flags || (flags & IORESOURCE_UNSET))
305 return -EINVAL;
306
307 map_irq.table_base = pci_resource_start(dev, bir);
308 map_irq.entry_nr = msidesc->msi_attrib.entry_nr;
309 }
310
311 ret = -EINVAL;
312 if (pci_seg_supported)
313 ret = HYPERVISOR_physdev_op(PHYSDEVOP_map_pirq,
314 &map_irq);
315 if (type == PCI_CAP_ID_MSI && nvec > 1 && ret) {
316 /*
317 * If MAP_PIRQ_TYPE_MULTI_MSI is not available
318 * there's nothing else we can do in this case.
319 * Just set ret > 0 so driver can retry with
320 * single MSI.
321 */
322 ret = 1;
323 goto out;
324 }
325 if (ret == -EINVAL && !pci_domain_nr(dev->bus)) {
326 map_irq.type = MAP_PIRQ_TYPE_MSI;
327 map_irq.index = -1;
328 map_irq.pirq = -1;
329 map_irq.bus = dev->bus->number;
330 ret = HYPERVISOR_physdev_op(PHYSDEVOP_map_pirq,
331 &map_irq);
332 if (ret != -EINVAL)
333 pci_seg_supported = false;
334 }
335 if (ret) {
336 dev_warn(&dev->dev, "xen map irq failed %d for %d domain\n",
337 ret, domid);
338 goto out;
339 }
340
341 ret = xen_bind_pirq_msi_to_irq(dev, msidesc, map_irq.pirq,
342 (type == PCI_CAP_ID_MSI) ? nvec : 1,
343 (type == PCI_CAP_ID_MSIX) ? "msi-x" : "msi",
344 domid);
345 if (ret < 0)
346 goto out;
347 }
348 ret = 0;
349out:
350 return ret;
351}
352
353static void xen_initdom_restore_msi_irqs(struct pci_dev *dev)
354{
355 int ret = 0;
356
357 if (pci_seg_supported) {
358 struct physdev_pci_device restore_ext;
359
360 restore_ext.seg = pci_domain_nr(dev->bus);
361 restore_ext.bus = dev->bus->number;
362 restore_ext.devfn = dev->devfn;
363 ret = HYPERVISOR_physdev_op(PHYSDEVOP_restore_msi_ext,
364 &restore_ext);
365 if (ret == -ENOSYS)
366 pci_seg_supported = false;
367 WARN(ret && ret != -ENOSYS, "restore_msi_ext -> %d\n", ret);
368 }
369 if (!pci_seg_supported) {
370 struct physdev_restore_msi restore;
371
372 restore.bus = dev->bus->number;
373 restore.devfn = dev->devfn;
374 ret = HYPERVISOR_physdev_op(PHYSDEVOP_restore_msi, &restore);
375 WARN(ret && ret != -ENOSYS, "restore_msi -> %d\n", ret);
376 }
377}
378#endif
379
380static void xen_teardown_msi_irqs(struct pci_dev *dev)
381{
382 struct msi_desc *msidesc;
383
384 msidesc = first_pci_msi_entry(dev);
385 if (msidesc->msi_attrib.is_msix)
386 xen_pci_frontend_disable_msix(dev);
387 else
388 xen_pci_frontend_disable_msi(dev);
389
390 /* Free the IRQ's and the msidesc using the generic code. */
391 default_teardown_msi_irqs(dev);
392}
393
394static void xen_teardown_msi_irq(unsigned int irq)
395{
396 xen_destroy_irq(irq);
397}
398
399#endif
400
401int __init pci_xen_init(void)
402{
403 if (!xen_pv_domain() || xen_initial_domain())
404 return -ENODEV;
405
406 printk(KERN_INFO "PCI: setting up Xen PCI frontend stub\n");
407
408 pcibios_set_cache_line_size();
409
410 pcibios_enable_irq = xen_pcifront_enable_irq;
411 pcibios_disable_irq = NULL;
412
413 /* Keep ACPI out of the picture */
414 acpi_noirq_set();
415
416#ifdef CONFIG_PCI_MSI
417 x86_msi.setup_msi_irqs = xen_setup_msi_irqs;
418 x86_msi.teardown_msi_irq = xen_teardown_msi_irq;
419 x86_msi.teardown_msi_irqs = xen_teardown_msi_irqs;
420 pci_msi_ignore_mask = 1;
421#endif
422 return 0;
423}
424
425#ifdef CONFIG_PCI_MSI
426void __init xen_msi_init(void)
427{
428 if (!disable_apic) {
429 /*
430 * If hardware supports (x2)APIC virtualization (as indicated
431 * by hypervisor's leaf 4) then we don't need to use pirqs/
432 * event channels for MSI handling and instead use regular
433 * APIC processing
434 */
435 uint32_t eax = cpuid_eax(xen_cpuid_base() + 4);
436
437 if (((eax & XEN_HVM_CPUID_X2APIC_VIRT) && x2apic_mode) ||
438 ((eax & XEN_HVM_CPUID_APIC_ACCESS_VIRT) && boot_cpu_has(X86_FEATURE_APIC)))
439 return;
440 }
441
442 x86_msi.setup_msi_irqs = xen_hvm_setup_msi_irqs;
443 x86_msi.teardown_msi_irq = xen_teardown_msi_irq;
444}
445#endif
446
447int __init pci_xen_hvm_init(void)
448{
449 if (!xen_have_vector_callback || !xen_feature(XENFEAT_hvm_pirqs))
450 return 0;
451
452#ifdef CONFIG_ACPI
453 /*
454 * We don't want to change the actual ACPI delivery model,
455 * just how GSIs get registered.
456 */
457 __acpi_register_gsi = acpi_register_gsi_xen_hvm;
458 __acpi_unregister_gsi = NULL;
459#endif
460
461#ifdef CONFIG_PCI_MSI
462 /*
463 * We need to wait until after x2apic is initialized
464 * before we can set MSI IRQ ops.
465 */
466 x86_platform.apic_post_init = xen_msi_init;
467#endif
468 return 0;
469}
470
471#ifdef CONFIG_XEN_DOM0
472int __init pci_xen_initial_domain(void)
473{
474 int irq;
475
476#ifdef CONFIG_PCI_MSI
477 x86_msi.setup_msi_irqs = xen_initdom_setup_msi_irqs;
478 x86_msi.teardown_msi_irq = xen_teardown_msi_irq;
479 x86_msi.restore_msi_irqs = xen_initdom_restore_msi_irqs;
480 pci_msi_ignore_mask = 1;
481#endif
482 __acpi_register_gsi = acpi_register_gsi_xen;
483 __acpi_unregister_gsi = NULL;
484 /*
485 * Pre-allocate the legacy IRQs. Use NR_LEGACY_IRQS here
486 * because we don't have a PIC and thus nr_legacy_irqs() is zero.
487 */
488 for (irq = 0; irq < NR_IRQS_LEGACY; irq++) {
489 int trigger, polarity;
490
491 if (acpi_get_override_irq(irq, &trigger, &polarity) == -1)
492 continue;
493
494 xen_register_pirq(irq, -1 /* no GSI override */,
495 trigger ? ACPI_LEVEL_SENSITIVE : ACPI_EDGE_SENSITIVE,
496 true /* Map GSI to PIRQ */);
497 }
498 if (0 == nr_ioapics) {
499 for (irq = 0; irq < nr_legacy_irqs(); irq++)
500 xen_bind_pirq_gsi_to_irq(irq, irq, 0, "xt-pic");
501 }
502 return 0;
503}
504
505struct xen_device_domain_owner {
506 domid_t domain;
507 struct pci_dev *dev;
508 struct list_head list;
509};
510
511static DEFINE_SPINLOCK(dev_domain_list_spinlock);
512static struct list_head dev_domain_list = LIST_HEAD_INIT(dev_domain_list);
513
514static struct xen_device_domain_owner *find_device(struct pci_dev *dev)
515{
516 struct xen_device_domain_owner *owner;
517
518 list_for_each_entry(owner, &dev_domain_list, list) {
519 if (owner->dev == dev)
520 return owner;
521 }
522 return NULL;
523}
524
525int xen_find_device_domain_owner(struct pci_dev *dev)
526{
527 struct xen_device_domain_owner *owner;
528 int domain = -ENODEV;
529
530 spin_lock(&dev_domain_list_spinlock);
531 owner = find_device(dev);
532 if (owner)
533 domain = owner->domain;
534 spin_unlock(&dev_domain_list_spinlock);
535 return domain;
536}
537EXPORT_SYMBOL_GPL(xen_find_device_domain_owner);
538
539int xen_register_device_domain_owner(struct pci_dev *dev, uint16_t domain)
540{
541 struct xen_device_domain_owner *owner;
542
543 owner = kzalloc(sizeof(struct xen_device_domain_owner), GFP_KERNEL);
544 if (!owner)
545 return -ENODEV;
546
547 spin_lock(&dev_domain_list_spinlock);
548 if (find_device(dev)) {
549 spin_unlock(&dev_domain_list_spinlock);
550 kfree(owner);
551 return -EEXIST;
552 }
553 owner->domain = domain;
554 owner->dev = dev;
555 list_add_tail(&owner->list, &dev_domain_list);
556 spin_unlock(&dev_domain_list_spinlock);
557 return 0;
558}
559EXPORT_SYMBOL_GPL(xen_register_device_domain_owner);
560
561int xen_unregister_device_domain_owner(struct pci_dev *dev)
562{
563 struct xen_device_domain_owner *owner;
564
565 spin_lock(&dev_domain_list_spinlock);
566 owner = find_device(dev);
567 if (!owner) {
568 spin_unlock(&dev_domain_list_spinlock);
569 return -ENODEV;
570 }
571 list_del(&owner->list);
572 spin_unlock(&dev_domain_list_spinlock);
573 kfree(owner);
574 return 0;
575}
576EXPORT_SYMBOL_GPL(xen_unregister_device_domain_owner);
577#endif