1#include <linux/serial_sci.h>
 2#include <linux/serial_core.h>
 3#include <linux/io.h>
 4#include <cpu/serial.h>
 5
 6#define SCPCR 0xA4000116
 7#define SCPDR 0xA4000136
 8
 9static void sh770x_sci_init_pins(struct uart_port *port, unsigned int cflag)
10{
11	unsigned short data;
12
13	/* We need to set SCPCR to enable RTS/CTS */
14	data = __raw_readw(SCPCR);
15	/* Clear out SCP7MD1,0, SCP6MD1,0, SCP4MD1,0*/
16	__raw_writew(data & 0x0fcf, SCPCR);
17
18	if (!(cflag & CRTSCTS)) {
19		/* We need to set SCPCR to enable RTS/CTS */
20		data = __raw_readw(SCPCR);
21		/* Clear out SCP7MD1,0, SCP4MD1,0,
22		   Set SCP6MD1,0 = {01} (output)  */
23		__raw_writew((data & 0x0fcf) | 0x1000, SCPCR);
24
25		data = __raw_readb(SCPDR);
26		/* Set /RTS2 (bit6) = 0 */
27		__raw_writeb(data & 0xbf, SCPDR);
28	}
29}
30
31struct plat_sci_port_ops sh770x_sci_port_ops = {
32	.init_pins	= sh770x_sci_init_pins,
33};

 1// SPDX-License-Identifier: GPL-2.0
 2#include <linux/serial_sci.h>
 3#include <linux/serial_core.h>
 4#include <linux/io.h>
 5#include <cpu/serial.h>
 6
 7#define SCPCR 0xA4000116
 8#define SCPDR 0xA4000136
 9
10static void sh770x_sci_init_pins(struct uart_port *port, unsigned int cflag)
11{
12	unsigned short data;
13
14	/* We need to set SCPCR to enable RTS/CTS */
15	data = __raw_readw(SCPCR);
16	/* Clear out SCP7MD1,0, SCP6MD1,0, SCP4MD1,0*/
17	__raw_writew(data & 0x0fcf, SCPCR);
18
19	if (!(cflag & CRTSCTS)) {
20		/* We need to set SCPCR to enable RTS/CTS */
21		data = __raw_readw(SCPCR);
22		/* Clear out SCP7MD1,0, SCP4MD1,0,
23		   Set SCP6MD1,0 = {01} (output)  */
24		__raw_writew((data & 0x0fcf) | 0x1000, SCPCR);
25
26		data = __raw_readb(SCPDR);
27		/* Set /RTS2 (bit6) = 0 */
28		__raw_writeb(data & 0xbf, SCPDR);
29	}
30}
31
32struct plat_sci_port_ops sh770x_sci_port_ops = {
33	.init_pins	= sh770x_sci_init_pins,
34};