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v3.15
 
  1/*
  2 * OMAP3/OMAP4 smartreflex device file
  3 *
  4 * Author: Thara Gopinath	<thara@ti.com>
  5 *
  6 * Based originally on code from smartreflex.c
  7 * Copyright (C) 2010 Texas Instruments, Inc.
  8 * Thara Gopinath <thara@ti.com>
  9 *
 10 * Copyright (C) 2008 Nokia Corporation
 11 * Kalle Jokiniemi
 12 *
 13 * Copyright (C) 2007 Texas Instruments, Inc.
 14 * Lesly A M <x0080970@ti.com>
 15 *
 16 * This program is free software; you can redistribute it and/or modify
 17 * it under the terms of the GNU General Public License version 2 as
 18 * published by the Free Software Foundation.
 19 */
 20#include <linux/power/smartreflex.h>
 21
 22#include <linux/err.h>
 23#include <linux/slab.h>
 24#include <linux/io.h>
 25
 26#include "soc.h"
 27#include "omap_device.h"
 28#include "voltage.h"
 29#include "control.h"
 30#include "pm.h"
 31
 32static bool sr_enable_on_init;
 33
 34/* Read EFUSE values from control registers for OMAP3430 */
 35static void __init sr_set_nvalues(struct omap_volt_data *volt_data,
 36				struct omap_sr_data *sr_data)
 37{
 38	struct omap_sr_nvalue_table *nvalue_table;
 39	int i, j, count = 0;
 40
 41	sr_data->nvalue_count = 0;
 42	sr_data->nvalue_table = NULL;
 43
 44	while (volt_data[count].volt_nominal)
 45		count++;
 46
 47	nvalue_table = kzalloc(sizeof(struct omap_sr_nvalue_table)*count,
 48			GFP_KERNEL);
 49
 50	if (!nvalue_table) {
 51		pr_err("OMAP: SmartReflex: cannot allocate memory for n-value table\n");
 52		return;
 53	}
 54
 55	for (i = 0, j = 0; i < count; i++) {
 56		u32 v;
 57
 58		/*
 59		 * In OMAP4 the efuse registers are 24 bit aligned.
 60		 * A __raw_readl will fail for non-32 bit aligned address
 61		 * and hence the 8-bit read and shift.
 62		 */
 63		if (cpu_is_omap44xx()) {
 64			u16 offset = volt_data[i].sr_efuse_offs;
 65
 66			v = omap_ctrl_readb(offset) |
 67				omap_ctrl_readb(offset + 1) << 8 |
 68				omap_ctrl_readb(offset + 2) << 16;
 69		} else {
 70			v = omap_ctrl_readl(volt_data[i].sr_efuse_offs);
 71		}
 72
 73		/*
 74		 * Many OMAP SoCs don't have the eFuse values set.
 75		 * For example, pretty much all OMAP3xxx before
 76		 * ES3.something.
 77		 *
 78		 * XXX There needs to be some way for board files or
 79		 * userspace to add these in.
 80		 */
 81		if (v == 0)
 82			continue;
 83
 84		nvalue_table[j].nvalue = v;
 85		nvalue_table[j].efuse_offs = volt_data[i].sr_efuse_offs;
 86		nvalue_table[j].errminlimit = volt_data[i].sr_errminlimit;
 87		nvalue_table[j].volt_nominal = volt_data[i].volt_nominal;
 88
 89		j++;
 90	}
 91
 92	sr_data->nvalue_table = nvalue_table;
 93	sr_data->nvalue_count = j;
 94}
 95
 
 
 96static int __init sr_dev_init(struct omap_hwmod *oh, void *user)
 97{
 98	struct omap_sr_data *sr_data;
 99	struct platform_device *pdev;
100	struct omap_volt_data *volt_data;
101	struct omap_smartreflex_dev_attr *sr_dev_attr;
102	char *name = "smartreflex";
103	static int i;
104
105	sr_data = kzalloc(sizeof(struct omap_sr_data), GFP_KERNEL);
 
 
 
 
 
 
 
106	if (!sr_data) {
107		pr_err("%s: Unable to allocate memory for %s sr_data\n",
108		       __func__, oh->name);
109		return -ENOMEM;
110	}
111
112	sr_dev_attr = (struct omap_smartreflex_dev_attr *)oh->dev_attr;
113	if (!sr_dev_attr || !sr_dev_attr->sensor_voltdm_name) {
114		pr_err("%s: No voltage domain specified for %s. Cannot initialize\n",
115		       __func__, oh->name);
116		goto exit;
117	}
118
119	sr_data->name = oh->name;
120	sr_data->ip_type = oh->class->rev;
 
 
 
121	sr_data->senn_mod = 0x1;
122	sr_data->senp_mod = 0x1;
123
124	if (cpu_is_omap34xx() || cpu_is_omap44xx()) {
125		sr_data->err_weight = OMAP3430_SR_ERRWEIGHT;
126		sr_data->err_maxlimit = OMAP3430_SR_ERRMAXLIMIT;
127		sr_data->accum_data = OMAP3430_SR_ACCUMDATA;
128		if (!(strcmp(sr_data->name, "smartreflex_mpu"))) {
129			sr_data->senn_avgweight = OMAP3430_SR1_SENNAVGWEIGHT;
130			sr_data->senp_avgweight = OMAP3430_SR1_SENPAVGWEIGHT;
131		} else {
132			sr_data->senn_avgweight = OMAP3430_SR2_SENNAVGWEIGHT;
133			sr_data->senp_avgweight = OMAP3430_SR2_SENPAVGWEIGHT;
134		}
135	}
136
137	sr_data->voltdm = voltdm_lookup(sr_dev_attr->sensor_voltdm_name);
138	if (!sr_data->voltdm) {
139		pr_err("%s: Unable to get voltage domain pointer for VDD %s\n",
140			__func__, sr_dev_attr->sensor_voltdm_name);
141		goto exit;
142	}
143
144	omap_voltage_get_volttable(sr_data->voltdm, &volt_data);
145	if (!volt_data) {
146		pr_err("%s: No Voltage table registered for VDD%d\n",
147		       __func__, i + 1);
148		goto exit;
149	}
150
151	sr_set_nvalues(volt_data, sr_data);
152
153	sr_data->enable_on_init = sr_enable_on_init;
154
155	pdev = omap_device_build(name, i, oh, sr_data, sizeof(*sr_data));
156	if (IS_ERR(pdev))
157		pr_warning("%s: Could not build omap_device for %s: %s.\n\n",
158			__func__, name, oh->name);
159exit:
160	i++;
161	kfree(sr_data);
162	return 0;
163}
164
165/*
166 * API to be called from board files to enable smartreflex
167 * autocompensation at init.
168 */
169void __init omap_enable_smartreflex_on_init(void)
170{
171	sr_enable_on_init = true;
172}
173
174int __init omap_devinit_smartreflex(void)
175{
176	return omap_hwmod_for_each_by_class("smartreflex", sr_dev_init, NULL);
177}
v5.4
  1// SPDX-License-Identifier: GPL-2.0-only
  2/*
  3 * OMAP3/OMAP4 smartreflex device file
  4 *
  5 * Author: Thara Gopinath	<thara@ti.com>
  6 *
  7 * Based originally on code from smartreflex.c
  8 * Copyright (C) 2010 Texas Instruments, Inc.
  9 * Thara Gopinath <thara@ti.com>
 10 *
 11 * Copyright (C) 2008 Nokia Corporation
 12 * Kalle Jokiniemi
 13 *
 14 * Copyright (C) 2007 Texas Instruments, Inc.
 15 * Lesly A M <x0080970@ti.com>
 
 
 
 
 16 */
 17#include <linux/power/smartreflex.h>
 18
 19#include <linux/err.h>
 20#include <linux/slab.h>
 21#include <linux/io.h>
 22
 23#include "soc.h"
 24#include "omap_device.h"
 25#include "voltage.h"
 26#include "control.h"
 27#include "pm.h"
 28
 29static bool sr_enable_on_init;
 30
 31/* Read EFUSE values from control registers for OMAP3430 */
 32static void __init sr_set_nvalues(struct omap_volt_data *volt_data,
 33				struct omap_sr_data *sr_data)
 34{
 35	struct omap_sr_nvalue_table *nvalue_table;
 36	int i, j, count = 0;
 37
 38	sr_data->nvalue_count = 0;
 39	sr_data->nvalue_table = NULL;
 40
 41	while (volt_data[count].volt_nominal)
 42		count++;
 43
 44	nvalue_table = kcalloc(count, sizeof(*nvalue_table), GFP_KERNEL);
 45	if (!nvalue_table)
 
 
 
 46		return;
 
 47
 48	for (i = 0, j = 0; i < count; i++) {
 49		u32 v;
 50
 51		/*
 52		 * In OMAP4 the efuse registers are 24 bit aligned.
 53		 * A readl_relaxed will fail for non-32 bit aligned address
 54		 * and hence the 8-bit read and shift.
 55		 */
 56		if (cpu_is_omap44xx()) {
 57			u16 offset = volt_data[i].sr_efuse_offs;
 58
 59			v = omap_ctrl_readb(offset) |
 60				omap_ctrl_readb(offset + 1) << 8 |
 61				omap_ctrl_readb(offset + 2) << 16;
 62		} else {
 63			v = omap_ctrl_readl(volt_data[i].sr_efuse_offs);
 64		}
 65
 66		/*
 67		 * Many OMAP SoCs don't have the eFuse values set.
 68		 * For example, pretty much all OMAP3xxx before
 69		 * ES3.something.
 70		 *
 71		 * XXX There needs to be some way for board files or
 72		 * userspace to add these in.
 73		 */
 74		if (v == 0)
 75			continue;
 76
 77		nvalue_table[j].nvalue = v;
 78		nvalue_table[j].efuse_offs = volt_data[i].sr_efuse_offs;
 79		nvalue_table[j].errminlimit = volt_data[i].sr_errminlimit;
 80		nvalue_table[j].volt_nominal = volt_data[i].volt_nominal;
 81
 82		j++;
 83	}
 84
 85	sr_data->nvalue_table = nvalue_table;
 86	sr_data->nvalue_count = j;
 87}
 88
 89extern struct omap_sr_data omap_sr_pdata[];
 90
 91static int __init sr_dev_init(struct omap_hwmod *oh, void *user)
 92{
 93	struct omap_sr_data *sr_data = NULL;
 
 94	struct omap_volt_data *volt_data;
 95	struct omap_smartreflex_dev_attr *sr_dev_attr;
 
 96	static int i;
 97
 98	if (!strncmp(oh->name, "smartreflex_mpu_iva", 20) ||
 99	    !strncmp(oh->name, "smartreflex_mpu", 16))
100		sr_data = &omap_sr_pdata[OMAP_SR_MPU];
101	else if (!strncmp(oh->name, "smartreflex_core", 17))
102		sr_data = &omap_sr_pdata[OMAP_SR_CORE];
103	else if (!strncmp(oh->name, "smartreflex_iva", 16))
104		sr_data = &omap_sr_pdata[OMAP_SR_IVA];
105
106	if (!sr_data) {
107		pr_err("%s: Unknown instance %s\n", __func__, oh->name);
108		return -EINVAL;
 
109	}
110
111	sr_dev_attr = (struct omap_smartreflex_dev_attr *)oh->dev_attr;
112	if (!sr_dev_attr || !sr_dev_attr->sensor_voltdm_name) {
113		pr_err("%s: No voltage domain specified for %s. Cannot initialize\n",
114		       __func__, oh->name);
115		goto exit;
116	}
117
118	sr_data->name = oh->name;
119	if (cpu_is_omap343x())
120		sr_data->ip_type = 1;
121	else
122		sr_data->ip_type = 2;
123	sr_data->senn_mod = 0x1;
124	sr_data->senp_mod = 0x1;
125
126	if (cpu_is_omap34xx() || cpu_is_omap44xx()) {
127		sr_data->err_weight = OMAP3430_SR_ERRWEIGHT;
128		sr_data->err_maxlimit = OMAP3430_SR_ERRMAXLIMIT;
129		sr_data->accum_data = OMAP3430_SR_ACCUMDATA;
130		if (!(strcmp(sr_data->name, "smartreflex_mpu"))) {
131			sr_data->senn_avgweight = OMAP3430_SR1_SENNAVGWEIGHT;
132			sr_data->senp_avgweight = OMAP3430_SR1_SENPAVGWEIGHT;
133		} else {
134			sr_data->senn_avgweight = OMAP3430_SR2_SENNAVGWEIGHT;
135			sr_data->senp_avgweight = OMAP3430_SR2_SENPAVGWEIGHT;
136		}
137	}
138
139	sr_data->voltdm = voltdm_lookup(sr_dev_attr->sensor_voltdm_name);
140	if (!sr_data->voltdm) {
141		pr_err("%s: Unable to get voltage domain pointer for VDD %s\n",
142			__func__, sr_dev_attr->sensor_voltdm_name);
143		goto exit;
144	}
145
146	omap_voltage_get_volttable(sr_data->voltdm, &volt_data);
147	if (!volt_data) {
148		pr_err("%s: No Voltage table registered for VDD%d\n",
149		       __func__, i + 1);
150		goto exit;
151	}
152
153	sr_set_nvalues(volt_data, sr_data);
154
155	sr_data->enable_on_init = sr_enable_on_init;
156
 
 
 
 
157exit:
158	i++;
159
160	return 0;
161}
162
163/*
164 * API to be called from board files to enable smartreflex
165 * autocompensation at init.
166 */
167void __init omap_enable_smartreflex_on_init(void)
168{
169	sr_enable_on_init = true;
170}
171
172int __init omap_devinit_smartreflex(void)
173{
174	return omap_hwmod_for_each_by_class("smartreflex", sr_dev_init, NULL);
175}