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1/*
2 * gpio-au1300.h -- GPIO control for Au1300 GPIC and compatibles.
3 *
4 * Copyright (c) 2009-2011 Manuel Lauss <manuel.lauss@googlemail.com>
5 */
6
7#ifndef _GPIO_AU1300_H_
8#define _GPIO_AU1300_H_
9
10#include <asm/addrspace.h>
11#include <asm/io.h>
12#include <asm/mach-au1x00/au1000.h>
13
14struct gpio;
15struct gpio_chip;
16
17/* with the current GPIC design, up to 128 GPIOs are possible.
18 * The only implementation so far is in the Au1300, which has 75 externally
19 * available GPIOs.
20 */
21#define AU1300_GPIO_BASE 0
22#define AU1300_GPIO_NUM 75
23#define AU1300_GPIO_MAX (AU1300_GPIO_BASE + AU1300_GPIO_NUM - 1)
24
25#define AU1300_GPIC_ADDR \
26 (void __iomem *)KSEG1ADDR(AU1300_GPIC_PHYS_ADDR)
27
28static inline int au1300_gpio_get_value(unsigned int gpio)
29{
30 void __iomem *roff = AU1300_GPIC_ADDR;
31 int bit;
32
33 gpio -= AU1300_GPIO_BASE;
34 roff += GPIC_GPIO_BANKOFF(gpio);
35 bit = GPIC_GPIO_TO_BIT(gpio);
36 return __raw_readl(roff + AU1300_GPIC_PINVAL) & bit;
37}
38
39static inline int au1300_gpio_direction_input(unsigned int gpio)
40{
41 void __iomem *roff = AU1300_GPIC_ADDR;
42 unsigned long bit;
43
44 gpio -= AU1300_GPIO_BASE;
45
46 roff += GPIC_GPIO_BANKOFF(gpio);
47 bit = GPIC_GPIO_TO_BIT(gpio);
48 __raw_writel(bit, roff + AU1300_GPIC_DEVCLR);
49 wmb();
50
51 return 0;
52}
53
54static inline int au1300_gpio_set_value(unsigned int gpio, int v)
55{
56 void __iomem *roff = AU1300_GPIC_ADDR;
57 unsigned long bit;
58
59 gpio -= AU1300_GPIO_BASE;
60
61 roff += GPIC_GPIO_BANKOFF(gpio);
62 bit = GPIC_GPIO_TO_BIT(gpio);
63 __raw_writel(bit, roff + (v ? AU1300_GPIC_PINVAL
64 : AU1300_GPIC_PINVALCLR));
65 wmb();
66
67 return 0;
68}
69
70static inline int au1300_gpio_direction_output(unsigned int gpio, int v)
71{
72 /* hw switches to output automatically */
73 return au1300_gpio_set_value(gpio, v);
74}
75
76static inline int au1300_gpio_to_irq(unsigned int gpio)
77{
78 return AU1300_FIRST_INT + (gpio - AU1300_GPIO_BASE);
79}
80
81static inline int au1300_irq_to_gpio(unsigned int irq)
82{
83 return (irq - AU1300_FIRST_INT) + AU1300_GPIO_BASE;
84}
85
86static inline int au1300_gpio_is_valid(unsigned int gpio)
87{
88 int ret;
89
90 switch (alchemy_get_cputype()) {
91 case ALCHEMY_CPU_AU1300:
92 ret = ((gpio >= AU1300_GPIO_BASE) && (gpio <= AU1300_GPIO_MAX));
93 break;
94 default:
95 ret = 0;
96 }
97 return ret;
98}
99
100static inline int au1300_gpio_cansleep(unsigned int gpio)
101{
102 return 0;
103}
104
105/* hardware remembers gpio 0-63 levels on powerup */
106static inline int au1300_gpio_getinitlvl(unsigned int gpio)
107{
108 void __iomem *roff = AU1300_GPIC_ADDR;
109 unsigned long v;
110
111 if (unlikely(gpio > 63))
112 return 0;
113 else if (gpio > 31) {
114 gpio -= 32;
115 roff += 4;
116 }
117
118 v = __raw_readl(roff + AU1300_GPIC_RSTVAL);
119 return (v >> gpio) & 1;
120}
121
122/**********************************************************************/
123
124/* Linux gpio framework integration.
125*
126* 4 use cases of Alchemy GPIOS:
127*(1) GPIOLIB=y, ALCHEMY_GPIO_INDIRECT=y:
128* Board must register gpiochips.
129*(2) GPIOLIB=y, ALCHEMY_GPIO_INDIRECT=n:
130* A gpiochip for the 75 GPIOs is registered.
131*
132*(3) GPIOLIB=n, ALCHEMY_GPIO_INDIRECT=y:
133* the boards' gpio.h must provide the linux gpio wrapper functions,
134*
135*(4) GPIOLIB=n, ALCHEMY_GPIO_INDIRECT=n:
136* inlinable gpio functions are provided which enable access to the
137* Au1300 gpios only by using the numbers straight out of the data-
138* sheets.
139
140* Cases 1 and 3 are intended for boards which want to provide their own
141* GPIO namespace and -operations (i.e. for example you have 8 GPIOs
142* which are in part provided by spare Au1300 GPIO pins and in part by
143* an external FPGA but you still want them to be accssible in linux
144* as gpio0-7. The board can of course use the alchemy_gpioX_* functions
145* as required).
146*/
147
148#ifndef CONFIG_GPIOLIB
149
150#ifdef CONFIG_ALCHEMY_GPIOINT_AU1300
151
152#ifndef CONFIG_ALCHEMY_GPIO_INDIRECT /* case (4) */
153
154static inline int gpio_direction_input(unsigned int gpio)
155{
156 return au1300_gpio_direction_input(gpio);
157}
158
159static inline int gpio_direction_output(unsigned int gpio, int v)
160{
161 return au1300_gpio_direction_output(gpio, v);
162}
163
164static inline int gpio_get_value(unsigned int gpio)
165{
166 return au1300_gpio_get_value(gpio);
167}
168
169static inline void gpio_set_value(unsigned int gpio, int v)
170{
171 au1300_gpio_set_value(gpio, v);
172}
173
174static inline int gpio_get_value_cansleep(unsigned gpio)
175{
176 return gpio_get_value(gpio);
177}
178
179static inline void gpio_set_value_cansleep(unsigned gpio, int value)
180{
181 gpio_set_value(gpio, value);
182}
183
184static inline int gpio_is_valid(unsigned int gpio)
185{
186 return au1300_gpio_is_valid(gpio);
187}
188
189static inline int gpio_cansleep(unsigned int gpio)
190{
191 return au1300_gpio_cansleep(gpio);
192}
193
194static inline int gpio_to_irq(unsigned int gpio)
195{
196 return au1300_gpio_to_irq(gpio);
197}
198
199static inline int irq_to_gpio(unsigned int irq)
200{
201 return au1300_irq_to_gpio(irq);
202}
203
204static inline int gpio_request(unsigned int gpio, const char *label)
205{
206 return 0;
207}
208
209static inline int gpio_request_one(unsigned gpio,
210 unsigned long flags, const char *label)
211{
212 return 0;
213}
214
215static inline int gpio_request_array(struct gpio *array, size_t num)
216{
217 return 0;
218}
219
220static inline void gpio_free(unsigned gpio)
221{
222}
223
224static inline void gpio_free_array(struct gpio *array, size_t num)
225{
226}
227
228static inline int gpio_set_debounce(unsigned gpio, unsigned debounce)
229{
230 return -ENOSYS;
231}
232
233static inline void gpio_unexport(unsigned gpio)
234{
235}
236
237static inline int gpio_export(unsigned gpio, bool direction_may_change)
238{
239 return -ENOSYS;
240}
241
242static inline int gpio_sysfs_set_active_low(unsigned gpio, int value)
243{
244 return -ENOSYS;
245}
246
247static inline int gpio_export_link(struct device *dev, const char *name,
248 unsigned gpio)
249{
250 return -ENOSYS;
251}
252
253#endif /* !CONFIG_ALCHEMY_GPIO_INDIRECT */
254
255#endif /* CONFIG_ALCHEMY_GPIOINT_AU1300 */
256
257#endif /* CONFIG GPIOLIB */
258
259#endif /* _GPIO_AU1300_H_ */
1/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 * gpio-au1300.h -- GPIO control for Au1300 GPIC and compatibles.
4 *
5 * Copyright (c) 2009-2011 Manuel Lauss <manuel.lauss@googlemail.com>
6 */
7
8#ifndef _GPIO_AU1300_H_
9#define _GPIO_AU1300_H_
10
11#include <asm/addrspace.h>
12#include <asm/io.h>
13#include <asm/mach-au1x00/au1000.h>
14
15struct gpio;
16struct gpio_chip;
17
18/* with the current GPIC design, up to 128 GPIOs are possible.
19 * The only implementation so far is in the Au1300, which has 75 externally
20 * available GPIOs.
21 */
22#define AU1300_GPIO_BASE 0
23#define AU1300_GPIO_NUM 75
24#define AU1300_GPIO_MAX (AU1300_GPIO_BASE + AU1300_GPIO_NUM - 1)
25
26#define AU1300_GPIC_ADDR \
27 (void __iomem *)KSEG1ADDR(AU1300_GPIC_PHYS_ADDR)
28
29static inline int au1300_gpio_get_value(unsigned int gpio)
30{
31 void __iomem *roff = AU1300_GPIC_ADDR;
32 int bit;
33
34 gpio -= AU1300_GPIO_BASE;
35 roff += GPIC_GPIO_BANKOFF(gpio);
36 bit = GPIC_GPIO_TO_BIT(gpio);
37 return __raw_readl(roff + AU1300_GPIC_PINVAL) & bit;
38}
39
40static inline int au1300_gpio_direction_input(unsigned int gpio)
41{
42 void __iomem *roff = AU1300_GPIC_ADDR;
43 unsigned long bit;
44
45 gpio -= AU1300_GPIO_BASE;
46
47 roff += GPIC_GPIO_BANKOFF(gpio);
48 bit = GPIC_GPIO_TO_BIT(gpio);
49 __raw_writel(bit, roff + AU1300_GPIC_DEVCLR);
50 wmb();
51
52 return 0;
53}
54
55static inline int au1300_gpio_set_value(unsigned int gpio, int v)
56{
57 void __iomem *roff = AU1300_GPIC_ADDR;
58 unsigned long bit;
59
60 gpio -= AU1300_GPIO_BASE;
61
62 roff += GPIC_GPIO_BANKOFF(gpio);
63 bit = GPIC_GPIO_TO_BIT(gpio);
64 __raw_writel(bit, roff + (v ? AU1300_GPIC_PINVAL
65 : AU1300_GPIC_PINVALCLR));
66 wmb();
67
68 return 0;
69}
70
71static inline int au1300_gpio_direction_output(unsigned int gpio, int v)
72{
73 /* hw switches to output automatically */
74 return au1300_gpio_set_value(gpio, v);
75}
76
77static inline int au1300_gpio_to_irq(unsigned int gpio)
78{
79 return AU1300_FIRST_INT + (gpio - AU1300_GPIO_BASE);
80}
81
82static inline int au1300_irq_to_gpio(unsigned int irq)
83{
84 return (irq - AU1300_FIRST_INT) + AU1300_GPIO_BASE;
85}
86
87static inline int au1300_gpio_is_valid(unsigned int gpio)
88{
89 int ret;
90
91 switch (alchemy_get_cputype()) {
92 case ALCHEMY_CPU_AU1300:
93 ret = ((gpio >= AU1300_GPIO_BASE) && (gpio <= AU1300_GPIO_MAX));
94 break;
95 default:
96 ret = 0;
97 }
98 return ret;
99}
100
101static inline int au1300_gpio_cansleep(unsigned int gpio)
102{
103 return 0;
104}
105
106/* hardware remembers gpio 0-63 levels on powerup */
107static inline int au1300_gpio_getinitlvl(unsigned int gpio)
108{
109 void __iomem *roff = AU1300_GPIC_ADDR;
110 unsigned long v;
111
112 if (unlikely(gpio > 63))
113 return 0;
114 else if (gpio > 31) {
115 gpio -= 32;
116 roff += 4;
117 }
118
119 v = __raw_readl(roff + AU1300_GPIC_RSTVAL);
120 return (v >> gpio) & 1;
121}
122
123#endif /* _GPIO_AU1300_H_ */