1/*
 2 * Ralink RT305x specific CPU feature overrides
 3 *
 4 * Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org>
 5 * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
 6 *
 7 * This file was derived from: include/asm-mips/cpu-features.h
 8 *	Copyright (C) 2003, 2004 Ralf Baechle
 9 *	Copyright (C) 2004 Maciej W. Rozycki
10 *
11 * This program is free software; you can redistribute it and/or modify it
12 * under the terms of the GNU General Public License version 2 as published
13 * by the Free Software Foundation.
14 *
15 */
16#ifndef _RT305X_CPU_FEATURE_OVERRIDES_H
17#define _RT305X_CPU_FEATURE_OVERRIDES_H
18
19#define cpu_has_tlb		1
20#define cpu_has_4kex		1
21#define cpu_has_3k_cache	0
22#define cpu_has_4k_cache	1
23#define cpu_has_tx39_cache	0
24#define cpu_has_sb1_cache	0
25#define cpu_has_fpu		0
26#define cpu_has_32fpr		0
27#define cpu_has_counter		1
28#define cpu_has_watch		1
29#define cpu_has_divec		1
30
31#define cpu_has_prefetch	1
32#define cpu_has_ejtag		1
33#define cpu_has_llsc		1
34
35#define cpu_has_mips16		1
36#define cpu_has_mdmx		0
37#define cpu_has_mips3d		0
38#define cpu_has_smartmips	0
39
40#define cpu_has_mips32r1	1
41#define cpu_has_mips32r2	1
42#define cpu_has_mips64r1	0
43#define cpu_has_mips64r2	0
44
45#define cpu_has_dsp		1
46#define cpu_has_mipsmt		0
47
48#define cpu_has_64bits		0
49#define cpu_has_64bit_zero_reg	0
50#define cpu_has_64bit_gp_regs	0
51#define cpu_has_64bit_addresses	0
52
53#define cpu_dcache_line_size()	32
54#define cpu_icache_line_size()	32
55
56#endif /* _RT305X_CPU_FEATURE_OVERRIDES_H */

 1/* SPDX-License-Identifier: GPL-2.0-only */
 2/*
 3 * Ralink RT305x specific CPU feature overrides
 4 *
 5 * Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org>
 6 * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
 7 *
 8 * This file was derived from: include/asm-mips/cpu-features.h
 9 *	Copyright (C) 2003, 2004 Ralf Baechle
10 *	Copyright (C) 2004 Maciej W. Rozycki
 
 
 
 
 
11 */
12#ifndef _RT305X_CPU_FEATURE_OVERRIDES_H
13#define _RT305X_CPU_FEATURE_OVERRIDES_H
14
15#define cpu_has_tlb		1
16#define cpu_has_4kex		1
17#define cpu_has_3k_cache	0
18#define cpu_has_4k_cache	1
19#define cpu_has_tx39_cache	0
20#define cpu_has_sb1_cache	0
21#define cpu_has_fpu		0
22#define cpu_has_32fpr		0
23#define cpu_has_counter		1
24#define cpu_has_watch		1
25#define cpu_has_divec		1
26
27#define cpu_has_prefetch	1
28#define cpu_has_ejtag		1
29#define cpu_has_llsc		1
30
31#define cpu_has_mips16		1
32#define cpu_has_mdmx		0
33#define cpu_has_mips3d		0
34#define cpu_has_smartmips	0
35
36#define cpu_has_mips32r1	1
37#define cpu_has_mips32r2	1
38#define cpu_has_mips64r1	0
39#define cpu_has_mips64r2	0
40
41#define cpu_has_dsp		1
42#define cpu_has_mipsmt		0
43
44#define cpu_has_64bits		0
45#define cpu_has_64bit_zero_reg	0
46#define cpu_has_64bit_gp_regs	0
 
47
48#define cpu_dcache_line_size()	32
49#define cpu_icache_line_size()	32
50
51#endif /* _RT305X_CPU_FEATURE_OVERRIDES_H */