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v3.15
 
 1/*
 2 * Copyright 2007 Freescale Semiconductor, Inc. All Rights Reserved.
 3 * Copyright 2008 Juergen Beisert, kernel@pengutronix.de
 4 *
 5 * This program is free software; you can redistribute it and/or
 6 * modify it under the terms of the GNU General Public License
 7 * as published by the Free Software Foundation; either version 2
 8 * of the License, or (at your option) any later version.
 9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
17 * MA 02110-1301, USA.
18 */
19
20/*
21 * i.MX27 specific CPU detection code
22 */
23
24#include <linux/io.h>
 
25#include <linux/module.h>
26
27#include "hardware.h"
28
29static int mx27_cpu_rev = -1;
30static int mx27_cpu_partnumber;
31
32#define SYS_CHIP_ID             0x00    /* The offset of CHIP ID register */
 
33
34static int mx27_read_cpu_rev(void)
35{
 
 
36	u32 val;
 
 
 
 
37	/*
38	 * now we have access to the IO registers. As we need
39	 * the silicon revision very early we read it here to
40	 * avoid any further hooks
41	*/
42	val = __raw_readl(MX27_IO_ADDRESS(MX27_SYSCTRL_BASE_ADDR
43				+ SYS_CHIP_ID));
44
45	mx27_cpu_partnumber = (int)((val >> 12) & 0xFFFF);
46
47	switch (val >> 28) {
48	case 0:
49		return IMX_CHIP_REVISION_1_0;
50	case 1:
51		return IMX_CHIP_REVISION_2_0;
52	case 2:
53		return IMX_CHIP_REVISION_2_1;
54	default:
55		return IMX_CHIP_REVISION_UNKNOWN;
56	}
57}
58
59/*
60 * Returns:
61 *	the silicon revision of the cpu
62 *	-EINVAL - not a mx27
63 */
64int mx27_revision(void)
65{
66	if (mx27_cpu_rev == -1)
67		mx27_cpu_rev = mx27_read_cpu_rev();
68
69	if (mx27_cpu_partnumber != 0x8821)
70		return -EINVAL;
71
72	return mx27_cpu_rev;
73}
74EXPORT_SYMBOL(mx27_revision);
v5.14.15
 1// SPDX-License-Identifier: GPL-2.0-or-later
 2/*
 3 * Copyright 2007 Freescale Semiconductor, Inc. All Rights Reserved.
 4 * Copyright 2008 Juergen Beisert, kernel@pengutronix.de
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 5 */
 6
 7/*
 8 * i.MX27 specific CPU detection code
 9 */
10
11#include <linux/io.h>
12#include <linux/of_address.h>
13#include <linux/module.h>
14
15#include "hardware.h"
16
17static int mx27_cpu_rev = -1;
18static int mx27_cpu_partnumber;
19
20#define SYS_CHIP_ID             0x00    /* The offset of CHIP ID register */
21#define SYSCTRL_OFFSET		0x800	/* Offset from CCM base address */
22
23static int mx27_read_cpu_rev(void)
24{
25	void __iomem *ccm_base;
26	struct device_node *np;
27	u32 val;
28
29	np = of_find_compatible_node(NULL, NULL, "fsl,imx27-ccm");
30	ccm_base = of_iomap(np, 0);
31	BUG_ON(!ccm_base);
32	/*
33	 * now we have access to the IO registers. As we need
34	 * the silicon revision very early we read it here to
35	 * avoid any further hooks
36	*/
37	val = imx_readl(ccm_base + SYSCTRL_OFFSET + SYS_CHIP_ID);
 
38
39	mx27_cpu_partnumber = (int)((val >> 12) & 0xFFFF);
40
41	switch (val >> 28) {
42	case 0:
43		return IMX_CHIP_REVISION_1_0;
44	case 1:
45		return IMX_CHIP_REVISION_2_0;
46	case 2:
47		return IMX_CHIP_REVISION_2_1;
48	default:
49		return IMX_CHIP_REVISION_UNKNOWN;
50	}
51}
52
53/*
54 * Returns:
55 *	the silicon revision of the cpu
56 *	-EINVAL - not a mx27
57 */
58int mx27_revision(void)
59{
60	if (mx27_cpu_rev == -1)
61		mx27_cpu_rev = mx27_read_cpu_rev();
62
63	if (mx27_cpu_partnumber != 0x8821)
64		return -EINVAL;
65
66	return mx27_cpu_rev;
67}
68EXPORT_SYMBOL(mx27_revision);