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1/*
2 * This is the Fusion MPT base driver providing common API layer interface
3 * for access to MPT (Message Passing Technology) firmware.
4 *
5 * This code is based on drivers/scsi/mpt2sas/mpt2_base.c
6 * Copyright (C) 2007-2013 LSI Corporation
7 * (mailto:DL-MPTFusionLinux@lsi.com)
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * as published by the Free Software Foundation; either version 2
12 * of the License, or (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * NO WARRANTY
20 * THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR
21 * CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT
22 * LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,
23 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is
24 * solely responsible for determining the appropriateness of using and
25 * distributing the Program and assumes all risks associated with its
26 * exercise of rights under this Agreement, including but not limited to
27 * the risks and costs of program errors, damage to or loss of data,
28 * programs or equipment, and unavailability or interruption of operations.
29
30 * DISCLAIMER OF LIABILITY
31 * NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY
32 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
33 * DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND
34 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
35 * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
36 * USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED
37 * HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES
38
39 * You should have received a copy of the GNU General Public License
40 * along with this program; if not, write to the Free Software
41 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301,
42 * USA.
43 */
44
45#include <linux/kernel.h>
46#include <linux/module.h>
47#include <linux/errno.h>
48#include <linux/init.h>
49#include <linux/slab.h>
50#include <linux/types.h>
51#include <linux/pci.h>
52#include <linux/kdev_t.h>
53#include <linux/blkdev.h>
54#include <linux/delay.h>
55#include <linux/interrupt.h>
56#include <linux/dma-mapping.h>
57#include <linux/sort.h>
58#include <linux/io.h>
59#include <linux/time.h>
60#include <linux/kthread.h>
61#include <linux/aer.h>
62
63#include "mpt2sas_base.h"
64
65static MPT_CALLBACK mpt_callbacks[MPT_MAX_CALLBACKS];
66
67#define FAULT_POLLING_INTERVAL 1000 /* in milliseconds */
68
69#define MAX_HBA_QUEUE_DEPTH 30000
70#define MAX_CHAIN_DEPTH 100000
71static int max_queue_depth = -1;
72module_param(max_queue_depth, int, 0);
73MODULE_PARM_DESC(max_queue_depth, " max controller queue depth ");
74
75static int max_sgl_entries = -1;
76module_param(max_sgl_entries, int, 0);
77MODULE_PARM_DESC(max_sgl_entries, " max sg entries ");
78
79static int msix_disable = -1;
80module_param(msix_disable, int, 0);
81MODULE_PARM_DESC(msix_disable, " disable msix routed interrupts (default=0)");
82
83static int mpt2sas_fwfault_debug;
84MODULE_PARM_DESC(mpt2sas_fwfault_debug, " enable detection of firmware fault "
85 "and halt firmware - (default=0)");
86
87static int disable_discovery = -1;
88module_param(disable_discovery, int, 0);
89MODULE_PARM_DESC(disable_discovery, " disable discovery ");
90
91/**
92 * _scsih_set_fwfault_debug - global setting of ioc->fwfault_debug.
93 *
94 */
95static int
96_scsih_set_fwfault_debug(const char *val, struct kernel_param *kp)
97{
98 int ret = param_set_int(val, kp);
99 struct MPT2SAS_ADAPTER *ioc;
100
101 if (ret)
102 return ret;
103
104 printk(KERN_INFO "setting fwfault_debug(%d)\n", mpt2sas_fwfault_debug);
105 list_for_each_entry(ioc, &mpt2sas_ioc_list, list)
106 ioc->fwfault_debug = mpt2sas_fwfault_debug;
107 return 0;
108}
109
110module_param_call(mpt2sas_fwfault_debug, _scsih_set_fwfault_debug,
111 param_get_int, &mpt2sas_fwfault_debug, 0644);
112
113/**
114 * mpt2sas_remove_dead_ioc_func - kthread context to remove dead ioc
115 * @arg: input argument, used to derive ioc
116 *
117 * Return 0 if controller is removed from pci subsystem.
118 * Return -1 for other case.
119 */
120static int mpt2sas_remove_dead_ioc_func(void *arg)
121{
122 struct MPT2SAS_ADAPTER *ioc = (struct MPT2SAS_ADAPTER *)arg;
123 struct pci_dev *pdev;
124
125 if ((ioc == NULL))
126 return -1;
127
128 pdev = ioc->pdev;
129 if ((pdev == NULL))
130 return -1;
131 pci_stop_and_remove_bus_device_locked(pdev);
132 return 0;
133}
134
135
136/**
137 * _base_fault_reset_work - workq handling ioc fault conditions
138 * @work: input argument, used to derive ioc
139 * Context: sleep.
140 *
141 * Return nothing.
142 */
143static void
144_base_fault_reset_work(struct work_struct *work)
145{
146 struct MPT2SAS_ADAPTER *ioc =
147 container_of(work, struct MPT2SAS_ADAPTER, fault_reset_work.work);
148 unsigned long flags;
149 u32 doorbell;
150 int rc;
151 struct task_struct *p;
152
153 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
154 if (ioc->shost_recovery || ioc->pci_error_recovery)
155 goto rearm_timer;
156 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
157
158 doorbell = mpt2sas_base_get_iocstate(ioc, 0);
159 if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_MASK) {
160 printk(MPT2SAS_INFO_FMT "%s : SAS host is non-operational !!!!\n",
161 ioc->name, __func__);
162
163 /* It may be possible that EEH recovery can resolve some of
164 * pci bus failure issues rather removing the dead ioc function
165 * by considering controller is in a non-operational state. So
166 * here priority is given to the EEH recovery. If it doesn't
167 * not resolve this issue, mpt2sas driver will consider this
168 * controller to non-operational state and remove the dead ioc
169 * function.
170 */
171 if (ioc->non_operational_loop++ < 5) {
172 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock,
173 flags);
174 goto rearm_timer;
175 }
176
177 /*
178 * Call _scsih_flush_pending_cmds callback so that we flush all
179 * pending commands back to OS. This call is required to aovid
180 * deadlock at block layer. Dead IOC will fail to do diag reset,
181 * and this call is safe since dead ioc will never return any
182 * command back from HW.
183 */
184 ioc->schedule_dead_ioc_flush_running_cmds(ioc);
185 /*
186 * Set remove_host flag early since kernel thread will
187 * take some time to execute.
188 */
189 ioc->remove_host = 1;
190 /*Remove the Dead Host */
191 p = kthread_run(mpt2sas_remove_dead_ioc_func, ioc,
192 "mpt2sas_dead_ioc_%d", ioc->id);
193 if (IS_ERR(p)) {
194 printk(MPT2SAS_ERR_FMT
195 "%s: Running mpt2sas_dead_ioc thread failed !!!!\n",
196 ioc->name, __func__);
197 } else {
198 printk(MPT2SAS_ERR_FMT
199 "%s: Running mpt2sas_dead_ioc thread success !!!!\n",
200 ioc->name, __func__);
201 }
202
203 return; /* don't rearm timer */
204 }
205
206 ioc->non_operational_loop = 0;
207
208 if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) {
209 rc = mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,
210 FORCE_BIG_HAMMER);
211 printk(MPT2SAS_WARN_FMT "%s: hard reset: %s\n", ioc->name,
212 __func__, (rc == 0) ? "success" : "failed");
213 doorbell = mpt2sas_base_get_iocstate(ioc, 0);
214 if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT)
215 mpt2sas_base_fault_info(ioc, doorbell &
216 MPI2_DOORBELL_DATA_MASK);
217 }
218
219 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
220 rearm_timer:
221 if (ioc->fault_reset_work_q)
222 queue_delayed_work(ioc->fault_reset_work_q,
223 &ioc->fault_reset_work,
224 msecs_to_jiffies(FAULT_POLLING_INTERVAL));
225 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
226}
227
228/**
229 * mpt2sas_base_start_watchdog - start the fault_reset_work_q
230 * @ioc: per adapter object
231 * Context: sleep.
232 *
233 * Return nothing.
234 */
235void
236mpt2sas_base_start_watchdog(struct MPT2SAS_ADAPTER *ioc)
237{
238 unsigned long flags;
239
240 if (ioc->fault_reset_work_q)
241 return;
242
243 /* initialize fault polling */
244 INIT_DELAYED_WORK(&ioc->fault_reset_work, _base_fault_reset_work);
245 snprintf(ioc->fault_reset_work_q_name,
246 sizeof(ioc->fault_reset_work_q_name), "poll_%d_status", ioc->id);
247 ioc->fault_reset_work_q =
248 create_singlethread_workqueue(ioc->fault_reset_work_q_name);
249 if (!ioc->fault_reset_work_q) {
250 printk(MPT2SAS_ERR_FMT "%s: failed (line=%d)\n",
251 ioc->name, __func__, __LINE__);
252 return;
253 }
254 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
255 if (ioc->fault_reset_work_q)
256 queue_delayed_work(ioc->fault_reset_work_q,
257 &ioc->fault_reset_work,
258 msecs_to_jiffies(FAULT_POLLING_INTERVAL));
259 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
260}
261
262/**
263 * mpt2sas_base_stop_watchdog - stop the fault_reset_work_q
264 * @ioc: per adapter object
265 * Context: sleep.
266 *
267 * Return nothing.
268 */
269void
270mpt2sas_base_stop_watchdog(struct MPT2SAS_ADAPTER *ioc)
271{
272 unsigned long flags;
273 struct workqueue_struct *wq;
274
275 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
276 wq = ioc->fault_reset_work_q;
277 ioc->fault_reset_work_q = NULL;
278 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
279 if (wq) {
280 if (!cancel_delayed_work(&ioc->fault_reset_work))
281 flush_workqueue(wq);
282 destroy_workqueue(wq);
283 }
284}
285
286/**
287 * mpt2sas_base_fault_info - verbose translation of firmware FAULT code
288 * @ioc: per adapter object
289 * @fault_code: fault code
290 *
291 * Return nothing.
292 */
293void
294mpt2sas_base_fault_info(struct MPT2SAS_ADAPTER *ioc , u16 fault_code)
295{
296 printk(MPT2SAS_ERR_FMT "fault_state(0x%04x)!\n",
297 ioc->name, fault_code);
298}
299
300/**
301 * mpt2sas_halt_firmware - halt's mpt controller firmware
302 * @ioc: per adapter object
303 *
304 * For debugging timeout related issues. Writing 0xCOFFEE00
305 * to the doorbell register will halt controller firmware. With
306 * the purpose to stop both driver and firmware, the enduser can
307 * obtain a ring buffer from controller UART.
308 */
309void
310mpt2sas_halt_firmware(struct MPT2SAS_ADAPTER *ioc)
311{
312 u32 doorbell;
313
314 if (!ioc->fwfault_debug)
315 return;
316
317 dump_stack();
318
319 doorbell = readl(&ioc->chip->Doorbell);
320 if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT)
321 mpt2sas_base_fault_info(ioc , doorbell);
322 else {
323 writel(0xC0FFEE00, &ioc->chip->Doorbell);
324 printk(MPT2SAS_ERR_FMT "Firmware is halted due to command "
325 "timeout\n", ioc->name);
326 }
327
328 panic("panic in %s\n", __func__);
329}
330
331#ifdef CONFIG_SCSI_MPT2SAS_LOGGING
332/**
333 * _base_sas_ioc_info - verbose translation of the ioc status
334 * @ioc: per adapter object
335 * @mpi_reply: reply mf payload returned from firmware
336 * @request_hdr: request mf
337 *
338 * Return nothing.
339 */
340static void
341_base_sas_ioc_info(struct MPT2SAS_ADAPTER *ioc, MPI2DefaultReply_t *mpi_reply,
342 MPI2RequestHeader_t *request_hdr)
343{
344 u16 ioc_status = le16_to_cpu(mpi_reply->IOCStatus) &
345 MPI2_IOCSTATUS_MASK;
346 char *desc = NULL;
347 u16 frame_sz;
348 char *func_str = NULL;
349
350 /* SCSI_IO, RAID_PASS are handled from _scsih_scsi_ioc_info */
351 if (request_hdr->Function == MPI2_FUNCTION_SCSI_IO_REQUEST ||
352 request_hdr->Function == MPI2_FUNCTION_RAID_SCSI_IO_PASSTHROUGH ||
353 request_hdr->Function == MPI2_FUNCTION_EVENT_NOTIFICATION)
354 return;
355
356 if (ioc_status == MPI2_IOCSTATUS_CONFIG_INVALID_PAGE)
357 return;
358
359 switch (ioc_status) {
360
361/****************************************************************************
362* Common IOCStatus values for all replies
363****************************************************************************/
364
365 case MPI2_IOCSTATUS_INVALID_FUNCTION:
366 desc = "invalid function";
367 break;
368 case MPI2_IOCSTATUS_BUSY:
369 desc = "busy";
370 break;
371 case MPI2_IOCSTATUS_INVALID_SGL:
372 desc = "invalid sgl";
373 break;
374 case MPI2_IOCSTATUS_INTERNAL_ERROR:
375 desc = "internal error";
376 break;
377 case MPI2_IOCSTATUS_INVALID_VPID:
378 desc = "invalid vpid";
379 break;
380 case MPI2_IOCSTATUS_INSUFFICIENT_RESOURCES:
381 desc = "insufficient resources";
382 break;
383 case MPI2_IOCSTATUS_INVALID_FIELD:
384 desc = "invalid field";
385 break;
386 case MPI2_IOCSTATUS_INVALID_STATE:
387 desc = "invalid state";
388 break;
389 case MPI2_IOCSTATUS_OP_STATE_NOT_SUPPORTED:
390 desc = "op state not supported";
391 break;
392
393/****************************************************************************
394* Config IOCStatus values
395****************************************************************************/
396
397 case MPI2_IOCSTATUS_CONFIG_INVALID_ACTION:
398 desc = "config invalid action";
399 break;
400 case MPI2_IOCSTATUS_CONFIG_INVALID_TYPE:
401 desc = "config invalid type";
402 break;
403 case MPI2_IOCSTATUS_CONFIG_INVALID_PAGE:
404 desc = "config invalid page";
405 break;
406 case MPI2_IOCSTATUS_CONFIG_INVALID_DATA:
407 desc = "config invalid data";
408 break;
409 case MPI2_IOCSTATUS_CONFIG_NO_DEFAULTS:
410 desc = "config no defaults";
411 break;
412 case MPI2_IOCSTATUS_CONFIG_CANT_COMMIT:
413 desc = "config cant commit";
414 break;
415
416/****************************************************************************
417* SCSI IO Reply
418****************************************************************************/
419
420 case MPI2_IOCSTATUS_SCSI_RECOVERED_ERROR:
421 case MPI2_IOCSTATUS_SCSI_INVALID_DEVHANDLE:
422 case MPI2_IOCSTATUS_SCSI_DEVICE_NOT_THERE:
423 case MPI2_IOCSTATUS_SCSI_DATA_OVERRUN:
424 case MPI2_IOCSTATUS_SCSI_DATA_UNDERRUN:
425 case MPI2_IOCSTATUS_SCSI_IO_DATA_ERROR:
426 case MPI2_IOCSTATUS_SCSI_PROTOCOL_ERROR:
427 case MPI2_IOCSTATUS_SCSI_TASK_TERMINATED:
428 case MPI2_IOCSTATUS_SCSI_RESIDUAL_MISMATCH:
429 case MPI2_IOCSTATUS_SCSI_TASK_MGMT_FAILED:
430 case MPI2_IOCSTATUS_SCSI_IOC_TERMINATED:
431 case MPI2_IOCSTATUS_SCSI_EXT_TERMINATED:
432 break;
433
434/****************************************************************************
435* For use by SCSI Initiator and SCSI Target end-to-end data protection
436****************************************************************************/
437
438 case MPI2_IOCSTATUS_EEDP_GUARD_ERROR:
439 desc = "eedp guard error";
440 break;
441 case MPI2_IOCSTATUS_EEDP_REF_TAG_ERROR:
442 desc = "eedp ref tag error";
443 break;
444 case MPI2_IOCSTATUS_EEDP_APP_TAG_ERROR:
445 desc = "eedp app tag error";
446 break;
447
448/****************************************************************************
449* SCSI Target values
450****************************************************************************/
451
452 case MPI2_IOCSTATUS_TARGET_INVALID_IO_INDEX:
453 desc = "target invalid io index";
454 break;
455 case MPI2_IOCSTATUS_TARGET_ABORTED:
456 desc = "target aborted";
457 break;
458 case MPI2_IOCSTATUS_TARGET_NO_CONN_RETRYABLE:
459 desc = "target no conn retryable";
460 break;
461 case MPI2_IOCSTATUS_TARGET_NO_CONNECTION:
462 desc = "target no connection";
463 break;
464 case MPI2_IOCSTATUS_TARGET_XFER_COUNT_MISMATCH:
465 desc = "target xfer count mismatch";
466 break;
467 case MPI2_IOCSTATUS_TARGET_DATA_OFFSET_ERROR:
468 desc = "target data offset error";
469 break;
470 case MPI2_IOCSTATUS_TARGET_TOO_MUCH_WRITE_DATA:
471 desc = "target too much write data";
472 break;
473 case MPI2_IOCSTATUS_TARGET_IU_TOO_SHORT:
474 desc = "target iu too short";
475 break;
476 case MPI2_IOCSTATUS_TARGET_ACK_NAK_TIMEOUT:
477 desc = "target ack nak timeout";
478 break;
479 case MPI2_IOCSTATUS_TARGET_NAK_RECEIVED:
480 desc = "target nak received";
481 break;
482
483/****************************************************************************
484* Serial Attached SCSI values
485****************************************************************************/
486
487 case MPI2_IOCSTATUS_SAS_SMP_REQUEST_FAILED:
488 desc = "smp request failed";
489 break;
490 case MPI2_IOCSTATUS_SAS_SMP_DATA_OVERRUN:
491 desc = "smp data overrun";
492 break;
493
494/****************************************************************************
495* Diagnostic Buffer Post / Diagnostic Release values
496****************************************************************************/
497
498 case MPI2_IOCSTATUS_DIAGNOSTIC_RELEASED:
499 desc = "diagnostic released";
500 break;
501 default:
502 break;
503 }
504
505 if (!desc)
506 return;
507
508 switch (request_hdr->Function) {
509 case MPI2_FUNCTION_CONFIG:
510 frame_sz = sizeof(Mpi2ConfigRequest_t) + ioc->sge_size;
511 func_str = "config_page";
512 break;
513 case MPI2_FUNCTION_SCSI_TASK_MGMT:
514 frame_sz = sizeof(Mpi2SCSITaskManagementRequest_t);
515 func_str = "task_mgmt";
516 break;
517 case MPI2_FUNCTION_SAS_IO_UNIT_CONTROL:
518 frame_sz = sizeof(Mpi2SasIoUnitControlRequest_t);
519 func_str = "sas_iounit_ctl";
520 break;
521 case MPI2_FUNCTION_SCSI_ENCLOSURE_PROCESSOR:
522 frame_sz = sizeof(Mpi2SepRequest_t);
523 func_str = "enclosure";
524 break;
525 case MPI2_FUNCTION_IOC_INIT:
526 frame_sz = sizeof(Mpi2IOCInitRequest_t);
527 func_str = "ioc_init";
528 break;
529 case MPI2_FUNCTION_PORT_ENABLE:
530 frame_sz = sizeof(Mpi2PortEnableRequest_t);
531 func_str = "port_enable";
532 break;
533 case MPI2_FUNCTION_SMP_PASSTHROUGH:
534 frame_sz = sizeof(Mpi2SmpPassthroughRequest_t) + ioc->sge_size;
535 func_str = "smp_passthru";
536 break;
537 default:
538 frame_sz = 32;
539 func_str = "unknown";
540 break;
541 }
542
543 printk(MPT2SAS_WARN_FMT "ioc_status: %s(0x%04x), request(0x%p),"
544 " (%s)\n", ioc->name, desc, ioc_status, request_hdr, func_str);
545
546 _debug_dump_mf(request_hdr, frame_sz/4);
547}
548
549/**
550 * _base_display_event_data - verbose translation of firmware asyn events
551 * @ioc: per adapter object
552 * @mpi_reply: reply mf payload returned from firmware
553 *
554 * Return nothing.
555 */
556static void
557_base_display_event_data(struct MPT2SAS_ADAPTER *ioc,
558 Mpi2EventNotificationReply_t *mpi_reply)
559{
560 char *desc = NULL;
561 u16 event;
562
563 if (!(ioc->logging_level & MPT_DEBUG_EVENTS))
564 return;
565
566 event = le16_to_cpu(mpi_reply->Event);
567
568 switch (event) {
569 case MPI2_EVENT_LOG_DATA:
570 desc = "Log Data";
571 break;
572 case MPI2_EVENT_STATE_CHANGE:
573 desc = "Status Change";
574 break;
575 case MPI2_EVENT_HARD_RESET_RECEIVED:
576 desc = "Hard Reset Received";
577 break;
578 case MPI2_EVENT_EVENT_CHANGE:
579 desc = "Event Change";
580 break;
581 case MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE:
582 desc = "Device Status Change";
583 break;
584 case MPI2_EVENT_IR_OPERATION_STATUS:
585 if (!ioc->hide_ir_msg)
586 desc = "IR Operation Status";
587 break;
588 case MPI2_EVENT_SAS_DISCOVERY:
589 {
590 Mpi2EventDataSasDiscovery_t *event_data =
591 (Mpi2EventDataSasDiscovery_t *)mpi_reply->EventData;
592 printk(MPT2SAS_INFO_FMT "Discovery: (%s)", ioc->name,
593 (event_data->ReasonCode == MPI2_EVENT_SAS_DISC_RC_STARTED) ?
594 "start" : "stop");
595 if (event_data->DiscoveryStatus)
596 printk("discovery_status(0x%08x)",
597 le32_to_cpu(event_data->DiscoveryStatus));
598 printk("\n");
599 return;
600 }
601 case MPI2_EVENT_SAS_BROADCAST_PRIMITIVE:
602 desc = "SAS Broadcast Primitive";
603 break;
604 case MPI2_EVENT_SAS_INIT_DEVICE_STATUS_CHANGE:
605 desc = "SAS Init Device Status Change";
606 break;
607 case MPI2_EVENT_SAS_INIT_TABLE_OVERFLOW:
608 desc = "SAS Init Table Overflow";
609 break;
610 case MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST:
611 desc = "SAS Topology Change List";
612 break;
613 case MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE:
614 desc = "SAS Enclosure Device Status Change";
615 break;
616 case MPI2_EVENT_IR_VOLUME:
617 if (!ioc->hide_ir_msg)
618 desc = "IR Volume";
619 break;
620 case MPI2_EVENT_IR_PHYSICAL_DISK:
621 if (!ioc->hide_ir_msg)
622 desc = "IR Physical Disk";
623 break;
624 case MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST:
625 if (!ioc->hide_ir_msg)
626 desc = "IR Configuration Change List";
627 break;
628 case MPI2_EVENT_LOG_ENTRY_ADDED:
629 if (!ioc->hide_ir_msg)
630 desc = "Log Entry Added";
631 break;
632 }
633
634 if (!desc)
635 return;
636
637 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name, desc);
638}
639#endif
640
641/**
642 * _base_sas_log_info - verbose translation of firmware log info
643 * @ioc: per adapter object
644 * @log_info: log info
645 *
646 * Return nothing.
647 */
648static void
649_base_sas_log_info(struct MPT2SAS_ADAPTER *ioc , u32 log_info)
650{
651 union loginfo_type {
652 u32 loginfo;
653 struct {
654 u32 subcode:16;
655 u32 code:8;
656 u32 originator:4;
657 u32 bus_type:4;
658 } dw;
659 };
660 union loginfo_type sas_loginfo;
661 char *originator_str = NULL;
662
663 sas_loginfo.loginfo = log_info;
664 if (sas_loginfo.dw.bus_type != 3 /*SAS*/)
665 return;
666
667 /* each nexus loss loginfo */
668 if (log_info == 0x31170000)
669 return;
670
671 /* eat the loginfos associated with task aborts */
672 if (ioc->ignore_loginfos && (log_info == 0x30050000 || log_info ==
673 0x31140000 || log_info == 0x31130000))
674 return;
675
676 switch (sas_loginfo.dw.originator) {
677 case 0:
678 originator_str = "IOP";
679 break;
680 case 1:
681 originator_str = "PL";
682 break;
683 case 2:
684 if (!ioc->hide_ir_msg)
685 originator_str = "IR";
686 else
687 originator_str = "WarpDrive";
688 break;
689 }
690
691 printk(MPT2SAS_WARN_FMT "log_info(0x%08x): originator(%s), "
692 "code(0x%02x), sub_code(0x%04x)\n", ioc->name, log_info,
693 originator_str, sas_loginfo.dw.code,
694 sas_loginfo.dw.subcode);
695}
696
697/**
698 * _base_display_reply_info -
699 * @ioc: per adapter object
700 * @smid: system request message index
701 * @msix_index: MSIX table index supplied by the OS
702 * @reply: reply message frame(lower 32bit addr)
703 *
704 * Return nothing.
705 */
706static void
707_base_display_reply_info(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
708 u32 reply)
709{
710 MPI2DefaultReply_t *mpi_reply;
711 u16 ioc_status;
712
713 mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
714 if (unlikely(!mpi_reply)) {
715 printk(MPT2SAS_ERR_FMT "mpi_reply not valid at %s:%d/%s()!\n",
716 ioc->name, __FILE__, __LINE__, __func__);
717 return;
718 }
719 ioc_status = le16_to_cpu(mpi_reply->IOCStatus);
720#ifdef CONFIG_SCSI_MPT2SAS_LOGGING
721 if ((ioc_status & MPI2_IOCSTATUS_MASK) &&
722 (ioc->logging_level & MPT_DEBUG_REPLY)) {
723 _base_sas_ioc_info(ioc , mpi_reply,
724 mpt2sas_base_get_msg_frame(ioc, smid));
725 }
726#endif
727 if (ioc_status & MPI2_IOCSTATUS_FLAG_LOG_INFO_AVAILABLE)
728 _base_sas_log_info(ioc, le32_to_cpu(mpi_reply->IOCLogInfo));
729}
730
731/**
732 * mpt2sas_base_done - base internal command completion routine
733 * @ioc: per adapter object
734 * @smid: system request message index
735 * @msix_index: MSIX table index supplied by the OS
736 * @reply: reply message frame(lower 32bit addr)
737 *
738 * Return 1 meaning mf should be freed from _base_interrupt
739 * 0 means the mf is freed from this function.
740 */
741u8
742mpt2sas_base_done(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
743 u32 reply)
744{
745 MPI2DefaultReply_t *mpi_reply;
746
747 mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
748 if (mpi_reply && mpi_reply->Function == MPI2_FUNCTION_EVENT_ACK)
749 return 1;
750
751 if (ioc->base_cmds.status == MPT2_CMD_NOT_USED)
752 return 1;
753
754 ioc->base_cmds.status |= MPT2_CMD_COMPLETE;
755 if (mpi_reply) {
756 ioc->base_cmds.status |= MPT2_CMD_REPLY_VALID;
757 memcpy(ioc->base_cmds.reply, mpi_reply, mpi_reply->MsgLength*4);
758 }
759 ioc->base_cmds.status &= ~MPT2_CMD_PENDING;
760
761 complete(&ioc->base_cmds.done);
762 return 1;
763}
764
765/**
766 * _base_async_event - main callback handler for firmware asyn events
767 * @ioc: per adapter object
768 * @msix_index: MSIX table index supplied by the OS
769 * @reply: reply message frame(lower 32bit addr)
770 *
771 * Returns void.
772 */
773static void
774_base_async_event(struct MPT2SAS_ADAPTER *ioc, u8 msix_index, u32 reply)
775{
776 Mpi2EventNotificationReply_t *mpi_reply;
777 Mpi2EventAckRequest_t *ack_request;
778 u16 smid;
779
780 mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
781 if (!mpi_reply)
782 return;
783 if (mpi_reply->Function != MPI2_FUNCTION_EVENT_NOTIFICATION)
784 return;
785#ifdef CONFIG_SCSI_MPT2SAS_LOGGING
786 _base_display_event_data(ioc, mpi_reply);
787#endif
788 if (!(mpi_reply->AckRequired & MPI2_EVENT_NOTIFICATION_ACK_REQUIRED))
789 goto out;
790 smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
791 if (!smid) {
792 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
793 ioc->name, __func__);
794 goto out;
795 }
796
797 ack_request = mpt2sas_base_get_msg_frame(ioc, smid);
798 memset(ack_request, 0, sizeof(Mpi2EventAckRequest_t));
799 ack_request->Function = MPI2_FUNCTION_EVENT_ACK;
800 ack_request->Event = mpi_reply->Event;
801 ack_request->EventContext = mpi_reply->EventContext;
802 ack_request->VF_ID = 0; /* TODO */
803 ack_request->VP_ID = 0;
804 mpt2sas_base_put_smid_default(ioc, smid);
805
806 out:
807
808 /* scsih callback handler */
809 mpt2sas_scsih_event_callback(ioc, msix_index, reply);
810
811 /* ctl callback handler */
812 mpt2sas_ctl_event_callback(ioc, msix_index, reply);
813
814 return;
815}
816
817/**
818 * _base_get_cb_idx - obtain the callback index
819 * @ioc: per adapter object
820 * @smid: system request message index
821 *
822 * Return callback index.
823 */
824static u8
825_base_get_cb_idx(struct MPT2SAS_ADAPTER *ioc, u16 smid)
826{
827 int i;
828 u8 cb_idx;
829
830 if (smid < ioc->hi_priority_smid) {
831 i = smid - 1;
832 cb_idx = ioc->scsi_lookup[i].cb_idx;
833 } else if (smid < ioc->internal_smid) {
834 i = smid - ioc->hi_priority_smid;
835 cb_idx = ioc->hpr_lookup[i].cb_idx;
836 } else if (smid <= ioc->hba_queue_depth) {
837 i = smid - ioc->internal_smid;
838 cb_idx = ioc->internal_lookup[i].cb_idx;
839 } else
840 cb_idx = 0xFF;
841 return cb_idx;
842}
843
844/**
845 * _base_mask_interrupts - disable interrupts
846 * @ioc: per adapter object
847 *
848 * Disabling ResetIRQ, Reply and Doorbell Interrupts
849 *
850 * Return nothing.
851 */
852static void
853_base_mask_interrupts(struct MPT2SAS_ADAPTER *ioc)
854{
855 u32 him_register;
856
857 ioc->mask_interrupts = 1;
858 him_register = readl(&ioc->chip->HostInterruptMask);
859 him_register |= MPI2_HIM_DIM + MPI2_HIM_RIM + MPI2_HIM_RESET_IRQ_MASK;
860 writel(him_register, &ioc->chip->HostInterruptMask);
861 readl(&ioc->chip->HostInterruptMask);
862}
863
864/**
865 * _base_unmask_interrupts - enable interrupts
866 * @ioc: per adapter object
867 *
868 * Enabling only Reply Interrupts
869 *
870 * Return nothing.
871 */
872static void
873_base_unmask_interrupts(struct MPT2SAS_ADAPTER *ioc)
874{
875 u32 him_register;
876
877 him_register = readl(&ioc->chip->HostInterruptMask);
878 him_register &= ~MPI2_HIM_RIM;
879 writel(him_register, &ioc->chip->HostInterruptMask);
880 ioc->mask_interrupts = 0;
881}
882
883union reply_descriptor {
884 u64 word;
885 struct {
886 u32 low;
887 u32 high;
888 } u;
889};
890
891/**
892 * _base_interrupt - MPT adapter (IOC) specific interrupt handler.
893 * @irq: irq number (not used)
894 * @bus_id: bus identifier cookie == pointer to MPT_ADAPTER structure
895 * @r: pt_regs pointer (not used)
896 *
897 * Return IRQ_HANDLE if processed, else IRQ_NONE.
898 */
899static irqreturn_t
900_base_interrupt(int irq, void *bus_id)
901{
902 struct adapter_reply_queue *reply_q = bus_id;
903 union reply_descriptor rd;
904 u32 completed_cmds;
905 u8 request_desript_type;
906 u16 smid;
907 u8 cb_idx;
908 u32 reply;
909 u8 msix_index = reply_q->msix_index;
910 struct MPT2SAS_ADAPTER *ioc = reply_q->ioc;
911 Mpi2ReplyDescriptorsUnion_t *rpf;
912 u8 rc;
913
914 if (ioc->mask_interrupts)
915 return IRQ_NONE;
916
917 if (!atomic_add_unless(&reply_q->busy, 1, 1))
918 return IRQ_NONE;
919
920 rpf = &reply_q->reply_post_free[reply_q->reply_post_host_index];
921 request_desript_type = rpf->Default.ReplyFlags
922 & MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK;
923 if (request_desript_type == MPI2_RPY_DESCRIPT_FLAGS_UNUSED) {
924 atomic_dec(&reply_q->busy);
925 return IRQ_NONE;
926 }
927
928 completed_cmds = 0;
929 cb_idx = 0xFF;
930 do {
931 rd.word = le64_to_cpu(rpf->Words);
932 if (rd.u.low == UINT_MAX || rd.u.high == UINT_MAX)
933 goto out;
934 reply = 0;
935 smid = le16_to_cpu(rpf->Default.DescriptorTypeDependent1);
936 if (request_desript_type ==
937 MPI2_RPY_DESCRIPT_FLAGS_ADDRESS_REPLY) {
938 reply = le32_to_cpu
939 (rpf->AddressReply.ReplyFrameAddress);
940 if (reply > ioc->reply_dma_max_address ||
941 reply < ioc->reply_dma_min_address)
942 reply = 0;
943 } else if (request_desript_type ==
944 MPI2_RPY_DESCRIPT_FLAGS_TARGET_COMMAND_BUFFER)
945 goto next;
946 else if (request_desript_type ==
947 MPI2_RPY_DESCRIPT_FLAGS_TARGETASSIST_SUCCESS)
948 goto next;
949 if (smid) {
950 cb_idx = _base_get_cb_idx(ioc, smid);
951 if ((likely(cb_idx < MPT_MAX_CALLBACKS))
952 && (likely(mpt_callbacks[cb_idx] != NULL))) {
953 rc = mpt_callbacks[cb_idx](ioc, smid,
954 msix_index, reply);
955 if (reply)
956 _base_display_reply_info(ioc, smid,
957 msix_index, reply);
958 if (rc)
959 mpt2sas_base_free_smid(ioc, smid);
960 }
961 }
962 if (!smid)
963 _base_async_event(ioc, msix_index, reply);
964
965 /* reply free queue handling */
966 if (reply) {
967 ioc->reply_free_host_index =
968 (ioc->reply_free_host_index ==
969 (ioc->reply_free_queue_depth - 1)) ?
970 0 : ioc->reply_free_host_index + 1;
971 ioc->reply_free[ioc->reply_free_host_index] =
972 cpu_to_le32(reply);
973 wmb();
974 writel(ioc->reply_free_host_index,
975 &ioc->chip->ReplyFreeHostIndex);
976 }
977
978 next:
979
980 rpf->Words = cpu_to_le64(ULLONG_MAX);
981 reply_q->reply_post_host_index =
982 (reply_q->reply_post_host_index ==
983 (ioc->reply_post_queue_depth - 1)) ? 0 :
984 reply_q->reply_post_host_index + 1;
985 request_desript_type =
986 reply_q->reply_post_free[reply_q->reply_post_host_index].
987 Default.ReplyFlags & MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK;
988 completed_cmds++;
989 if (request_desript_type == MPI2_RPY_DESCRIPT_FLAGS_UNUSED)
990 goto out;
991 if (!reply_q->reply_post_host_index)
992 rpf = reply_q->reply_post_free;
993 else
994 rpf++;
995 } while (1);
996
997 out:
998
999 if (!completed_cmds) {
1000 atomic_dec(&reply_q->busy);
1001 return IRQ_NONE;
1002 }
1003 wmb();
1004 if (ioc->is_warpdrive) {
1005 writel(reply_q->reply_post_host_index,
1006 ioc->reply_post_host_index[msix_index]);
1007 atomic_dec(&reply_q->busy);
1008 return IRQ_HANDLED;
1009 }
1010 writel(reply_q->reply_post_host_index | (msix_index <<
1011 MPI2_RPHI_MSIX_INDEX_SHIFT), &ioc->chip->ReplyPostHostIndex);
1012 atomic_dec(&reply_q->busy);
1013 return IRQ_HANDLED;
1014}
1015
1016/**
1017 * _base_is_controller_msix_enabled - is controller support muli-reply queues
1018 * @ioc: per adapter object
1019 *
1020 */
1021static inline int
1022_base_is_controller_msix_enabled(struct MPT2SAS_ADAPTER *ioc)
1023{
1024 return (ioc->facts.IOCCapabilities &
1025 MPI2_IOCFACTS_CAPABILITY_MSI_X_INDEX) && ioc->msix_enable;
1026}
1027
1028/**
1029 * mpt2sas_base_flush_reply_queues - flushing the MSIX reply queues
1030 * @ioc: per adapter object
1031 * Context: ISR conext
1032 *
1033 * Called when a Task Management request has completed. We want
1034 * to flush the other reply queues so all the outstanding IO has been
1035 * completed back to OS before we process the TM completetion.
1036 *
1037 * Return nothing.
1038 */
1039void
1040mpt2sas_base_flush_reply_queues(struct MPT2SAS_ADAPTER *ioc)
1041{
1042 struct adapter_reply_queue *reply_q;
1043
1044 /* If MSIX capability is turned off
1045 * then multi-queues are not enabled
1046 */
1047 if (!_base_is_controller_msix_enabled(ioc))
1048 return;
1049
1050 list_for_each_entry(reply_q, &ioc->reply_queue_list, list) {
1051 if (ioc->shost_recovery)
1052 return;
1053 /* TMs are on msix_index == 0 */
1054 if (reply_q->msix_index == 0)
1055 continue;
1056 _base_interrupt(reply_q->vector, (void *)reply_q);
1057 }
1058}
1059
1060/**
1061 * mpt2sas_base_release_callback_handler - clear interrupt callback handler
1062 * @cb_idx: callback index
1063 *
1064 * Return nothing.
1065 */
1066void
1067mpt2sas_base_release_callback_handler(u8 cb_idx)
1068{
1069 mpt_callbacks[cb_idx] = NULL;
1070}
1071
1072/**
1073 * mpt2sas_base_register_callback_handler - obtain index for the interrupt callback handler
1074 * @cb_func: callback function
1075 *
1076 * Returns cb_func.
1077 */
1078u8
1079mpt2sas_base_register_callback_handler(MPT_CALLBACK cb_func)
1080{
1081 u8 cb_idx;
1082
1083 for (cb_idx = MPT_MAX_CALLBACKS-1; cb_idx; cb_idx--)
1084 if (mpt_callbacks[cb_idx] == NULL)
1085 break;
1086
1087 mpt_callbacks[cb_idx] = cb_func;
1088 return cb_idx;
1089}
1090
1091/**
1092 * mpt2sas_base_initialize_callback_handler - initialize the interrupt callback handler
1093 *
1094 * Return nothing.
1095 */
1096void
1097mpt2sas_base_initialize_callback_handler(void)
1098{
1099 u8 cb_idx;
1100
1101 for (cb_idx = 0; cb_idx < MPT_MAX_CALLBACKS; cb_idx++)
1102 mpt2sas_base_release_callback_handler(cb_idx);
1103}
1104
1105/**
1106 * mpt2sas_base_build_zero_len_sge - build zero length sg entry
1107 * @ioc: per adapter object
1108 * @paddr: virtual address for SGE
1109 *
1110 * Create a zero length scatter gather entry to insure the IOCs hardware has
1111 * something to use if the target device goes brain dead and tries
1112 * to send data even when none is asked for.
1113 *
1114 * Return nothing.
1115 */
1116void
1117mpt2sas_base_build_zero_len_sge(struct MPT2SAS_ADAPTER *ioc, void *paddr)
1118{
1119 u32 flags_length = (u32)((MPI2_SGE_FLAGS_LAST_ELEMENT |
1120 MPI2_SGE_FLAGS_END_OF_BUFFER | MPI2_SGE_FLAGS_END_OF_LIST |
1121 MPI2_SGE_FLAGS_SIMPLE_ELEMENT) <<
1122 MPI2_SGE_FLAGS_SHIFT);
1123 ioc->base_add_sg_single(paddr, flags_length, -1);
1124}
1125
1126/**
1127 * _base_add_sg_single_32 - Place a simple 32 bit SGE at address pAddr.
1128 * @paddr: virtual address for SGE
1129 * @flags_length: SGE flags and data transfer length
1130 * @dma_addr: Physical address
1131 *
1132 * Return nothing.
1133 */
1134static void
1135_base_add_sg_single_32(void *paddr, u32 flags_length, dma_addr_t dma_addr)
1136{
1137 Mpi2SGESimple32_t *sgel = paddr;
1138
1139 flags_length |= (MPI2_SGE_FLAGS_32_BIT_ADDRESSING |
1140 MPI2_SGE_FLAGS_SYSTEM_ADDRESS) << MPI2_SGE_FLAGS_SHIFT;
1141 sgel->FlagsLength = cpu_to_le32(flags_length);
1142 sgel->Address = cpu_to_le32(dma_addr);
1143}
1144
1145
1146/**
1147 * _base_add_sg_single_64 - Place a simple 64 bit SGE at address pAddr.
1148 * @paddr: virtual address for SGE
1149 * @flags_length: SGE flags and data transfer length
1150 * @dma_addr: Physical address
1151 *
1152 * Return nothing.
1153 */
1154static void
1155_base_add_sg_single_64(void *paddr, u32 flags_length, dma_addr_t dma_addr)
1156{
1157 Mpi2SGESimple64_t *sgel = paddr;
1158
1159 flags_length |= (MPI2_SGE_FLAGS_64_BIT_ADDRESSING |
1160 MPI2_SGE_FLAGS_SYSTEM_ADDRESS) << MPI2_SGE_FLAGS_SHIFT;
1161 sgel->FlagsLength = cpu_to_le32(flags_length);
1162 sgel->Address = cpu_to_le64(dma_addr);
1163}
1164
1165#define convert_to_kb(x) ((x) << (PAGE_SHIFT - 10))
1166
1167/**
1168 * _base_config_dma_addressing - set dma addressing
1169 * @ioc: per adapter object
1170 * @pdev: PCI device struct
1171 *
1172 * Returns 0 for success, non-zero for failure.
1173 */
1174static int
1175_base_config_dma_addressing(struct MPT2SAS_ADAPTER *ioc, struct pci_dev *pdev)
1176{
1177 struct sysinfo s;
1178 char *desc = NULL;
1179
1180 if (sizeof(dma_addr_t) > 4) {
1181 const uint64_t required_mask =
1182 dma_get_required_mask(&pdev->dev);
1183 if ((required_mask > DMA_BIT_MASK(32)) && !pci_set_dma_mask(pdev,
1184 DMA_BIT_MASK(64)) && !pci_set_consistent_dma_mask(pdev,
1185 DMA_BIT_MASK(64))) {
1186 ioc->base_add_sg_single = &_base_add_sg_single_64;
1187 ioc->sge_size = sizeof(Mpi2SGESimple64_t);
1188 desc = "64";
1189 goto out;
1190 }
1191 }
1192
1193 if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))
1194 && !pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32))) {
1195 ioc->base_add_sg_single = &_base_add_sg_single_32;
1196 ioc->sge_size = sizeof(Mpi2SGESimple32_t);
1197 desc = "32";
1198 } else
1199 return -ENODEV;
1200
1201 out:
1202 si_meminfo(&s);
1203 printk(MPT2SAS_INFO_FMT "%s BIT PCI BUS DMA ADDRESSING SUPPORTED, "
1204 "total mem (%ld kB)\n", ioc->name, desc, convert_to_kb(s.totalram));
1205
1206 return 0;
1207}
1208
1209/**
1210 * _base_check_enable_msix - checks MSIX capabable.
1211 * @ioc: per adapter object
1212 *
1213 * Check to see if card is capable of MSIX, and set number
1214 * of available msix vectors
1215 */
1216static int
1217_base_check_enable_msix(struct MPT2SAS_ADAPTER *ioc)
1218{
1219 int base;
1220 u16 message_control;
1221
1222
1223 /* Check whether controller SAS2008 B0 controller,
1224 if it is SAS2008 B0 controller use IO-APIC instead of MSIX */
1225 if (ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2008 &&
1226 ioc->pdev->revision == 0x01) {
1227 return -EINVAL;
1228 }
1229
1230 base = pci_find_capability(ioc->pdev, PCI_CAP_ID_MSIX);
1231 if (!base) {
1232 dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "msix not "
1233 "supported\n", ioc->name));
1234 return -EINVAL;
1235 }
1236
1237 /* get msix vector count */
1238 /* NUMA_IO not supported for older controllers */
1239 if (ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2004 ||
1240 ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2008 ||
1241 ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2108_1 ||
1242 ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2108_2 ||
1243 ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2108_3 ||
1244 ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2116_1 ||
1245 ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2116_2)
1246 ioc->msix_vector_count = 1;
1247 else {
1248 pci_read_config_word(ioc->pdev, base + 2, &message_control);
1249 ioc->msix_vector_count = (message_control & 0x3FF) + 1;
1250 }
1251 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "msix is supported, "
1252 "vector_count(%d)\n", ioc->name, ioc->msix_vector_count));
1253
1254 return 0;
1255}
1256
1257/**
1258 * _base_free_irq - free irq
1259 * @ioc: per adapter object
1260 *
1261 * Freeing respective reply_queue from the list.
1262 */
1263static void
1264_base_free_irq(struct MPT2SAS_ADAPTER *ioc)
1265{
1266 struct adapter_reply_queue *reply_q, *next;
1267
1268 if (list_empty(&ioc->reply_queue_list))
1269 return;
1270
1271 list_for_each_entry_safe(reply_q, next, &ioc->reply_queue_list, list) {
1272 list_del(&reply_q->list);
1273 synchronize_irq(reply_q->vector);
1274 free_irq(reply_q->vector, reply_q);
1275 kfree(reply_q);
1276 }
1277}
1278
1279/**
1280 * _base_request_irq - request irq
1281 * @ioc: per adapter object
1282 * @index: msix index into vector table
1283 * @vector: irq vector
1284 *
1285 * Inserting respective reply_queue into the list.
1286 */
1287static int
1288_base_request_irq(struct MPT2SAS_ADAPTER *ioc, u8 index, u32 vector)
1289{
1290 struct adapter_reply_queue *reply_q;
1291 int r;
1292
1293 reply_q = kzalloc(sizeof(struct adapter_reply_queue), GFP_KERNEL);
1294 if (!reply_q) {
1295 printk(MPT2SAS_ERR_FMT "unable to allocate memory %d!\n",
1296 ioc->name, (int)sizeof(struct adapter_reply_queue));
1297 return -ENOMEM;
1298 }
1299 reply_q->ioc = ioc;
1300 reply_q->msix_index = index;
1301 reply_q->vector = vector;
1302 atomic_set(&reply_q->busy, 0);
1303 if (ioc->msix_enable)
1304 snprintf(reply_q->name, MPT_NAME_LENGTH, "%s%d-msix%d",
1305 MPT2SAS_DRIVER_NAME, ioc->id, index);
1306 else
1307 snprintf(reply_q->name, MPT_NAME_LENGTH, "%s%d",
1308 MPT2SAS_DRIVER_NAME, ioc->id);
1309 r = request_irq(vector, _base_interrupt, IRQF_SHARED, reply_q->name,
1310 reply_q);
1311 if (r) {
1312 printk(MPT2SAS_ERR_FMT "unable to allocate interrupt %d!\n",
1313 reply_q->name, vector);
1314 kfree(reply_q);
1315 return -EBUSY;
1316 }
1317
1318 INIT_LIST_HEAD(&reply_q->list);
1319 list_add_tail(&reply_q->list, &ioc->reply_queue_list);
1320 return 0;
1321}
1322
1323/**
1324 * _base_assign_reply_queues - assigning msix index for each cpu
1325 * @ioc: per adapter object
1326 *
1327 * The enduser would need to set the affinity via /proc/irq/#/smp_affinity
1328 *
1329 * It would nice if we could call irq_set_affinity, however it is not
1330 * an exported symbol
1331 */
1332static void
1333_base_assign_reply_queues(struct MPT2SAS_ADAPTER *ioc)
1334{
1335 struct adapter_reply_queue *reply_q;
1336 int cpu_id;
1337 int cpu_grouping, loop, grouping, grouping_mod;
1338
1339 if (!_base_is_controller_msix_enabled(ioc))
1340 return;
1341
1342 memset(ioc->cpu_msix_table, 0, ioc->cpu_msix_table_sz);
1343 /* when there are more cpus than available msix vectors,
1344 * then group cpus togeather on same irq
1345 */
1346 if (ioc->cpu_count > ioc->msix_vector_count) {
1347 grouping = ioc->cpu_count / ioc->msix_vector_count;
1348 grouping_mod = ioc->cpu_count % ioc->msix_vector_count;
1349 if (grouping < 2 || (grouping == 2 && !grouping_mod))
1350 cpu_grouping = 2;
1351 else if (grouping < 4 || (grouping == 4 && !grouping_mod))
1352 cpu_grouping = 4;
1353 else if (grouping < 8 || (grouping == 8 && !grouping_mod))
1354 cpu_grouping = 8;
1355 else
1356 cpu_grouping = 16;
1357 } else
1358 cpu_grouping = 0;
1359
1360 loop = 0;
1361 reply_q = list_entry(ioc->reply_queue_list.next,
1362 struct adapter_reply_queue, list);
1363 for_each_online_cpu(cpu_id) {
1364 if (!cpu_grouping) {
1365 ioc->cpu_msix_table[cpu_id] = reply_q->msix_index;
1366 reply_q = list_entry(reply_q->list.next,
1367 struct adapter_reply_queue, list);
1368 } else {
1369 if (loop < cpu_grouping) {
1370 ioc->cpu_msix_table[cpu_id] =
1371 reply_q->msix_index;
1372 loop++;
1373 } else {
1374 reply_q = list_entry(reply_q->list.next,
1375 struct adapter_reply_queue, list);
1376 ioc->cpu_msix_table[cpu_id] =
1377 reply_q->msix_index;
1378 loop = 1;
1379 }
1380 }
1381 }
1382}
1383
1384/**
1385 * _base_disable_msix - disables msix
1386 * @ioc: per adapter object
1387 *
1388 */
1389static void
1390_base_disable_msix(struct MPT2SAS_ADAPTER *ioc)
1391{
1392 if (ioc->msix_enable) {
1393 pci_disable_msix(ioc->pdev);
1394 ioc->msix_enable = 0;
1395 }
1396}
1397
1398/**
1399 * _base_enable_msix - enables msix, failback to io_apic
1400 * @ioc: per adapter object
1401 *
1402 */
1403static int
1404_base_enable_msix(struct MPT2SAS_ADAPTER *ioc)
1405{
1406 struct msix_entry *entries, *a;
1407 int r;
1408 int i;
1409 u8 try_msix = 0;
1410
1411 if (msix_disable == -1 || msix_disable == 0)
1412 try_msix = 1;
1413
1414 if (!try_msix)
1415 goto try_ioapic;
1416
1417 if (_base_check_enable_msix(ioc) != 0)
1418 goto try_ioapic;
1419
1420 ioc->reply_queue_count = min_t(int, ioc->cpu_count,
1421 ioc->msix_vector_count);
1422
1423 entries = kcalloc(ioc->reply_queue_count, sizeof(struct msix_entry),
1424 GFP_KERNEL);
1425 if (!entries) {
1426 dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "kcalloc "
1427 "failed @ at %s:%d/%s() !!!\n", ioc->name, __FILE__,
1428 __LINE__, __func__));
1429 goto try_ioapic;
1430 }
1431
1432 for (i = 0, a = entries; i < ioc->reply_queue_count; i++, a++)
1433 a->entry = i;
1434
1435 r = pci_enable_msix(ioc->pdev, entries, ioc->reply_queue_count);
1436 if (r) {
1437 dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "pci_enable_msix "
1438 "failed (r=%d) !!!\n", ioc->name, r));
1439 kfree(entries);
1440 goto try_ioapic;
1441 }
1442
1443 ioc->msix_enable = 1;
1444 for (i = 0, a = entries; i < ioc->reply_queue_count; i++, a++) {
1445 r = _base_request_irq(ioc, i, a->vector);
1446 if (r) {
1447 _base_free_irq(ioc);
1448 _base_disable_msix(ioc);
1449 kfree(entries);
1450 goto try_ioapic;
1451 }
1452 }
1453
1454 kfree(entries);
1455 return 0;
1456
1457/* failback to io_apic interrupt routing */
1458 try_ioapic:
1459
1460 r = _base_request_irq(ioc, 0, ioc->pdev->irq);
1461
1462 return r;
1463}
1464
1465/**
1466 * mpt2sas_base_map_resources - map in controller resources (io/irq/memap)
1467 * @ioc: per adapter object
1468 *
1469 * Returns 0 for success, non-zero for failure.
1470 */
1471int
1472mpt2sas_base_map_resources(struct MPT2SAS_ADAPTER *ioc)
1473{
1474 struct pci_dev *pdev = ioc->pdev;
1475 u32 memap_sz;
1476 u32 pio_sz;
1477 int i, r = 0;
1478 u64 pio_chip = 0;
1479 u64 chip_phys = 0;
1480 struct adapter_reply_queue *reply_q;
1481
1482 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n",
1483 ioc->name, __func__));
1484
1485 ioc->bars = pci_select_bars(pdev, IORESOURCE_MEM);
1486 if (pci_enable_device_mem(pdev)) {
1487 printk(MPT2SAS_WARN_FMT "pci_enable_device_mem: "
1488 "failed\n", ioc->name);
1489 ioc->bars = 0;
1490 return -ENODEV;
1491 }
1492
1493
1494 if (pci_request_selected_regions(pdev, ioc->bars,
1495 MPT2SAS_DRIVER_NAME)) {
1496 printk(MPT2SAS_WARN_FMT "pci_request_selected_regions: "
1497 "failed\n", ioc->name);
1498 ioc->bars = 0;
1499 r = -ENODEV;
1500 goto out_fail;
1501 }
1502
1503 /* AER (Advanced Error Reporting) hooks */
1504 pci_enable_pcie_error_reporting(pdev);
1505
1506 pci_set_master(pdev);
1507
1508 if (_base_config_dma_addressing(ioc, pdev) != 0) {
1509 printk(MPT2SAS_WARN_FMT "no suitable DMA mask for %s\n",
1510 ioc->name, pci_name(pdev));
1511 r = -ENODEV;
1512 goto out_fail;
1513 }
1514
1515 for (i = 0, memap_sz = 0, pio_sz = 0 ; i < DEVICE_COUNT_RESOURCE; i++) {
1516 if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
1517 if (pio_sz)
1518 continue;
1519 pio_chip = (u64)pci_resource_start(pdev, i);
1520 pio_sz = pci_resource_len(pdev, i);
1521 } else {
1522 if (memap_sz)
1523 continue;
1524 /* verify memory resource is valid before using */
1525 if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
1526 ioc->chip_phys = pci_resource_start(pdev, i);
1527 chip_phys = (u64)ioc->chip_phys;
1528 memap_sz = pci_resource_len(pdev, i);
1529 ioc->chip = ioremap(ioc->chip_phys, memap_sz);
1530 if (ioc->chip == NULL) {
1531 printk(MPT2SAS_ERR_FMT "unable to map "
1532 "adapter memory!\n", ioc->name);
1533 r = -EINVAL;
1534 goto out_fail;
1535 }
1536 }
1537 }
1538 }
1539
1540 _base_mask_interrupts(ioc);
1541 r = _base_enable_msix(ioc);
1542 if (r)
1543 goto out_fail;
1544
1545 list_for_each_entry(reply_q, &ioc->reply_queue_list, list)
1546 printk(MPT2SAS_INFO_FMT "%s: IRQ %d\n",
1547 reply_q->name, ((ioc->msix_enable) ? "PCI-MSI-X enabled" :
1548 "IO-APIC enabled"), reply_q->vector);
1549
1550 printk(MPT2SAS_INFO_FMT "iomem(0x%016llx), mapped(0x%p), size(%d)\n",
1551 ioc->name, (unsigned long long)chip_phys, ioc->chip, memap_sz);
1552 printk(MPT2SAS_INFO_FMT "ioport(0x%016llx), size(%d)\n",
1553 ioc->name, (unsigned long long)pio_chip, pio_sz);
1554
1555 /* Save PCI configuration state for recovery from PCI AER/EEH errors */
1556 pci_save_state(pdev);
1557
1558 return 0;
1559
1560 out_fail:
1561 if (ioc->chip_phys)
1562 iounmap(ioc->chip);
1563 ioc->chip_phys = 0;
1564 pci_release_selected_regions(ioc->pdev, ioc->bars);
1565 pci_disable_pcie_error_reporting(pdev);
1566 pci_disable_device(pdev);
1567 return r;
1568}
1569
1570/**
1571 * mpt2sas_base_get_msg_frame - obtain request mf pointer
1572 * @ioc: per adapter object
1573 * @smid: system request message index(smid zero is invalid)
1574 *
1575 * Returns virt pointer to message frame.
1576 */
1577void *
1578mpt2sas_base_get_msg_frame(struct MPT2SAS_ADAPTER *ioc, u16 smid)
1579{
1580 return (void *)(ioc->request + (smid * ioc->request_sz));
1581}
1582
1583/**
1584 * mpt2sas_base_get_sense_buffer - obtain a sense buffer assigned to a mf request
1585 * @ioc: per adapter object
1586 * @smid: system request message index
1587 *
1588 * Returns virt pointer to sense buffer.
1589 */
1590void *
1591mpt2sas_base_get_sense_buffer(struct MPT2SAS_ADAPTER *ioc, u16 smid)
1592{
1593 return (void *)(ioc->sense + ((smid - 1) * SCSI_SENSE_BUFFERSIZE));
1594}
1595
1596/**
1597 * mpt2sas_base_get_sense_buffer_dma - obtain a sense buffer assigned to a mf request
1598 * @ioc: per adapter object
1599 * @smid: system request message index
1600 *
1601 * Returns phys pointer to the low 32bit address of the sense buffer.
1602 */
1603__le32
1604mpt2sas_base_get_sense_buffer_dma(struct MPT2SAS_ADAPTER *ioc, u16 smid)
1605{
1606 return cpu_to_le32(ioc->sense_dma +
1607 ((smid - 1) * SCSI_SENSE_BUFFERSIZE));
1608}
1609
1610/**
1611 * mpt2sas_base_get_reply_virt_addr - obtain reply frames virt address
1612 * @ioc: per adapter object
1613 * @phys_addr: lower 32 physical addr of the reply
1614 *
1615 * Converts 32bit lower physical addr into a virt address.
1616 */
1617void *
1618mpt2sas_base_get_reply_virt_addr(struct MPT2SAS_ADAPTER *ioc, u32 phys_addr)
1619{
1620 if (!phys_addr)
1621 return NULL;
1622 return ioc->reply + (phys_addr - (u32)ioc->reply_dma);
1623}
1624
1625/**
1626 * mpt2sas_base_get_smid - obtain a free smid from internal queue
1627 * @ioc: per adapter object
1628 * @cb_idx: callback index
1629 *
1630 * Returns smid (zero is invalid)
1631 */
1632u16
1633mpt2sas_base_get_smid(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx)
1634{
1635 unsigned long flags;
1636 struct request_tracker *request;
1637 u16 smid;
1638
1639 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
1640 if (list_empty(&ioc->internal_free_list)) {
1641 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
1642 printk(MPT2SAS_ERR_FMT "%s: smid not available\n",
1643 ioc->name, __func__);
1644 return 0;
1645 }
1646
1647 request = list_entry(ioc->internal_free_list.next,
1648 struct request_tracker, tracker_list);
1649 request->cb_idx = cb_idx;
1650 smid = request->smid;
1651 list_del(&request->tracker_list);
1652 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
1653 return smid;
1654}
1655
1656/**
1657 * mpt2sas_base_get_smid_scsiio - obtain a free smid from scsiio queue
1658 * @ioc: per adapter object
1659 * @cb_idx: callback index
1660 * @scmd: pointer to scsi command object
1661 *
1662 * Returns smid (zero is invalid)
1663 */
1664u16
1665mpt2sas_base_get_smid_scsiio(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx,
1666 struct scsi_cmnd *scmd)
1667{
1668 unsigned long flags;
1669 struct scsiio_tracker *request;
1670 u16 smid;
1671
1672 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
1673 if (list_empty(&ioc->free_list)) {
1674 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
1675 printk(MPT2SAS_ERR_FMT "%s: smid not available\n",
1676 ioc->name, __func__);
1677 return 0;
1678 }
1679
1680 request = list_entry(ioc->free_list.next,
1681 struct scsiio_tracker, tracker_list);
1682 request->scmd = scmd;
1683 request->cb_idx = cb_idx;
1684 smid = request->smid;
1685 list_del(&request->tracker_list);
1686 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
1687 return smid;
1688}
1689
1690/**
1691 * mpt2sas_base_get_smid_hpr - obtain a free smid from hi-priority queue
1692 * @ioc: per adapter object
1693 * @cb_idx: callback index
1694 *
1695 * Returns smid (zero is invalid)
1696 */
1697u16
1698mpt2sas_base_get_smid_hpr(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx)
1699{
1700 unsigned long flags;
1701 struct request_tracker *request;
1702 u16 smid;
1703
1704 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
1705 if (list_empty(&ioc->hpr_free_list)) {
1706 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
1707 return 0;
1708 }
1709
1710 request = list_entry(ioc->hpr_free_list.next,
1711 struct request_tracker, tracker_list);
1712 request->cb_idx = cb_idx;
1713 smid = request->smid;
1714 list_del(&request->tracker_list);
1715 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
1716 return smid;
1717}
1718
1719
1720/**
1721 * mpt2sas_base_free_smid - put smid back on free_list
1722 * @ioc: per adapter object
1723 * @smid: system request message index
1724 *
1725 * Return nothing.
1726 */
1727void
1728mpt2sas_base_free_smid(struct MPT2SAS_ADAPTER *ioc, u16 smid)
1729{
1730 unsigned long flags;
1731 int i;
1732 struct chain_tracker *chain_req, *next;
1733
1734 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
1735 if (smid < ioc->hi_priority_smid) {
1736 /* scsiio queue */
1737 i = smid - 1;
1738 if (!list_empty(&ioc->scsi_lookup[i].chain_list)) {
1739 list_for_each_entry_safe(chain_req, next,
1740 &ioc->scsi_lookup[i].chain_list, tracker_list) {
1741 list_del_init(&chain_req->tracker_list);
1742 list_add_tail(&chain_req->tracker_list,
1743 &ioc->free_chain_list);
1744 }
1745 }
1746 ioc->scsi_lookup[i].cb_idx = 0xFF;
1747 ioc->scsi_lookup[i].scmd = NULL;
1748 ioc->scsi_lookup[i].direct_io = 0;
1749 list_add_tail(&ioc->scsi_lookup[i].tracker_list,
1750 &ioc->free_list);
1751 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
1752
1753 /*
1754 * See _wait_for_commands_to_complete() call with regards
1755 * to this code.
1756 */
1757 if (ioc->shost_recovery && ioc->pending_io_count) {
1758 if (ioc->pending_io_count == 1)
1759 wake_up(&ioc->reset_wq);
1760 ioc->pending_io_count--;
1761 }
1762 return;
1763 } else if (smid < ioc->internal_smid) {
1764 /* hi-priority */
1765 i = smid - ioc->hi_priority_smid;
1766 ioc->hpr_lookup[i].cb_idx = 0xFF;
1767 list_add_tail(&ioc->hpr_lookup[i].tracker_list,
1768 &ioc->hpr_free_list);
1769 } else if (smid <= ioc->hba_queue_depth) {
1770 /* internal queue */
1771 i = smid - ioc->internal_smid;
1772 ioc->internal_lookup[i].cb_idx = 0xFF;
1773 list_add_tail(&ioc->internal_lookup[i].tracker_list,
1774 &ioc->internal_free_list);
1775 }
1776 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
1777}
1778
1779/**
1780 * _base_writeq - 64 bit write to MMIO
1781 * @ioc: per adapter object
1782 * @b: data payload
1783 * @addr: address in MMIO space
1784 * @writeq_lock: spin lock
1785 *
1786 * Glue for handling an atomic 64 bit word to MMIO. This special handling takes
1787 * care of 32 bit environment where its not quarenteed to send the entire word
1788 * in one transfer.
1789 */
1790#ifndef writeq
1791static inline void _base_writeq(__u64 b, volatile void __iomem *addr,
1792 spinlock_t *writeq_lock)
1793{
1794 unsigned long flags;
1795 __u64 data_out = cpu_to_le64(b);
1796
1797 spin_lock_irqsave(writeq_lock, flags);
1798 writel((u32)(data_out), addr);
1799 writel((u32)(data_out >> 32), (addr + 4));
1800 spin_unlock_irqrestore(writeq_lock, flags);
1801}
1802#else
1803static inline void _base_writeq(__u64 b, volatile void __iomem *addr,
1804 spinlock_t *writeq_lock)
1805{
1806 writeq(cpu_to_le64(b), addr);
1807}
1808#endif
1809
1810static inline u8
1811_base_get_msix_index(struct MPT2SAS_ADAPTER *ioc)
1812{
1813 return ioc->cpu_msix_table[raw_smp_processor_id()];
1814}
1815
1816/**
1817 * mpt2sas_base_put_smid_scsi_io - send SCSI_IO request to firmware
1818 * @ioc: per adapter object
1819 * @smid: system request message index
1820 * @handle: device handle
1821 *
1822 * Return nothing.
1823 */
1824void
1825mpt2sas_base_put_smid_scsi_io(struct MPT2SAS_ADAPTER *ioc, u16 smid, u16 handle)
1826{
1827 Mpi2RequestDescriptorUnion_t descriptor;
1828 u64 *request = (u64 *)&descriptor;
1829
1830
1831 descriptor.SCSIIO.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_SCSI_IO;
1832 descriptor.SCSIIO.MSIxIndex = _base_get_msix_index(ioc);
1833 descriptor.SCSIIO.SMID = cpu_to_le16(smid);
1834 descriptor.SCSIIO.DevHandle = cpu_to_le16(handle);
1835 descriptor.SCSIIO.LMID = 0;
1836 _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
1837 &ioc->scsi_lookup_lock);
1838}
1839
1840
1841/**
1842 * mpt2sas_base_put_smid_hi_priority - send Task Management request to firmware
1843 * @ioc: per adapter object
1844 * @smid: system request message index
1845 *
1846 * Return nothing.
1847 */
1848void
1849mpt2sas_base_put_smid_hi_priority(struct MPT2SAS_ADAPTER *ioc, u16 smid)
1850{
1851 Mpi2RequestDescriptorUnion_t descriptor;
1852 u64 *request = (u64 *)&descriptor;
1853
1854 descriptor.HighPriority.RequestFlags =
1855 MPI2_REQ_DESCRIPT_FLAGS_HIGH_PRIORITY;
1856 descriptor.HighPriority.MSIxIndex = 0;
1857 descriptor.HighPriority.SMID = cpu_to_le16(smid);
1858 descriptor.HighPriority.LMID = 0;
1859 descriptor.HighPriority.Reserved1 = 0;
1860 _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
1861 &ioc->scsi_lookup_lock);
1862}
1863
1864/**
1865 * mpt2sas_base_put_smid_default - Default, primarily used for config pages
1866 * @ioc: per adapter object
1867 * @smid: system request message index
1868 *
1869 * Return nothing.
1870 */
1871void
1872mpt2sas_base_put_smid_default(struct MPT2SAS_ADAPTER *ioc, u16 smid)
1873{
1874 Mpi2RequestDescriptorUnion_t descriptor;
1875 u64 *request = (u64 *)&descriptor;
1876
1877 descriptor.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE;
1878 descriptor.Default.MSIxIndex = _base_get_msix_index(ioc);
1879 descriptor.Default.SMID = cpu_to_le16(smid);
1880 descriptor.Default.LMID = 0;
1881 descriptor.Default.DescriptorTypeDependent = 0;
1882 _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
1883 &ioc->scsi_lookup_lock);
1884}
1885
1886/**
1887 * mpt2sas_base_put_smid_target_assist - send Target Assist/Status to firmware
1888 * @ioc: per adapter object
1889 * @smid: system request message index
1890 * @io_index: value used to track the IO
1891 *
1892 * Return nothing.
1893 */
1894void
1895mpt2sas_base_put_smid_target_assist(struct MPT2SAS_ADAPTER *ioc, u16 smid,
1896 u16 io_index)
1897{
1898 Mpi2RequestDescriptorUnion_t descriptor;
1899 u64 *request = (u64 *)&descriptor;
1900
1901 descriptor.SCSITarget.RequestFlags =
1902 MPI2_REQ_DESCRIPT_FLAGS_SCSI_TARGET;
1903 descriptor.SCSITarget.MSIxIndex = _base_get_msix_index(ioc);
1904 descriptor.SCSITarget.SMID = cpu_to_le16(smid);
1905 descriptor.SCSITarget.LMID = 0;
1906 descriptor.SCSITarget.IoIndex = cpu_to_le16(io_index);
1907 _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
1908 &ioc->scsi_lookup_lock);
1909}
1910
1911/**
1912 * _base_display_dell_branding - Disply branding string
1913 * @ioc: per adapter object
1914 *
1915 * Return nothing.
1916 */
1917static void
1918_base_display_dell_branding(struct MPT2SAS_ADAPTER *ioc)
1919{
1920 char dell_branding[MPT2SAS_DELL_BRANDING_SIZE];
1921
1922 if (ioc->pdev->subsystem_vendor != PCI_VENDOR_ID_DELL)
1923 return;
1924
1925 memset(dell_branding, 0, MPT2SAS_DELL_BRANDING_SIZE);
1926 switch (ioc->pdev->subsystem_device) {
1927 case MPT2SAS_DELL_6GBPS_SAS_HBA_SSDID:
1928 strncpy(dell_branding, MPT2SAS_DELL_6GBPS_SAS_HBA_BRANDING,
1929 MPT2SAS_DELL_BRANDING_SIZE - 1);
1930 break;
1931 case MPT2SAS_DELL_PERC_H200_ADAPTER_SSDID:
1932 strncpy(dell_branding, MPT2SAS_DELL_PERC_H200_ADAPTER_BRANDING,
1933 MPT2SAS_DELL_BRANDING_SIZE - 1);
1934 break;
1935 case MPT2SAS_DELL_PERC_H200_INTEGRATED_SSDID:
1936 strncpy(dell_branding,
1937 MPT2SAS_DELL_PERC_H200_INTEGRATED_BRANDING,
1938 MPT2SAS_DELL_BRANDING_SIZE - 1);
1939 break;
1940 case MPT2SAS_DELL_PERC_H200_MODULAR_SSDID:
1941 strncpy(dell_branding,
1942 MPT2SAS_DELL_PERC_H200_MODULAR_BRANDING,
1943 MPT2SAS_DELL_BRANDING_SIZE - 1);
1944 break;
1945 case MPT2SAS_DELL_PERC_H200_EMBEDDED_SSDID:
1946 strncpy(dell_branding,
1947 MPT2SAS_DELL_PERC_H200_EMBEDDED_BRANDING,
1948 MPT2SAS_DELL_BRANDING_SIZE - 1);
1949 break;
1950 case MPT2SAS_DELL_PERC_H200_SSDID:
1951 strncpy(dell_branding, MPT2SAS_DELL_PERC_H200_BRANDING,
1952 MPT2SAS_DELL_BRANDING_SIZE - 1);
1953 break;
1954 case MPT2SAS_DELL_6GBPS_SAS_SSDID:
1955 strncpy(dell_branding, MPT2SAS_DELL_6GBPS_SAS_BRANDING,
1956 MPT2SAS_DELL_BRANDING_SIZE - 1);
1957 break;
1958 default:
1959 sprintf(dell_branding, "0x%4X", ioc->pdev->subsystem_device);
1960 break;
1961 }
1962
1963 printk(MPT2SAS_INFO_FMT "%s: Vendor(0x%04X), Device(0x%04X),"
1964 " SSVID(0x%04X), SSDID(0x%04X)\n", ioc->name, dell_branding,
1965 ioc->pdev->vendor, ioc->pdev->device, ioc->pdev->subsystem_vendor,
1966 ioc->pdev->subsystem_device);
1967}
1968
1969/**
1970 * _base_display_intel_branding - Display branding string
1971 * @ioc: per adapter object
1972 *
1973 * Return nothing.
1974 */
1975static void
1976_base_display_intel_branding(struct MPT2SAS_ADAPTER *ioc)
1977{
1978 if (ioc->pdev->subsystem_vendor != PCI_VENDOR_ID_INTEL)
1979 return;
1980
1981 switch (ioc->pdev->device) {
1982 case MPI2_MFGPAGE_DEVID_SAS2008:
1983 switch (ioc->pdev->subsystem_device) {
1984 case MPT2SAS_INTEL_RMS2LL080_SSDID:
1985 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
1986 MPT2SAS_INTEL_RMS2LL080_BRANDING);
1987 break;
1988 case MPT2SAS_INTEL_RMS2LL040_SSDID:
1989 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
1990 MPT2SAS_INTEL_RMS2LL040_BRANDING);
1991 break;
1992 case MPT2SAS_INTEL_SSD910_SSDID:
1993 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
1994 MPT2SAS_INTEL_SSD910_BRANDING);
1995 break;
1996 default:
1997 break;
1998 }
1999 case MPI2_MFGPAGE_DEVID_SAS2308_2:
2000 switch (ioc->pdev->subsystem_device) {
2001 case MPT2SAS_INTEL_RS25GB008_SSDID:
2002 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
2003 MPT2SAS_INTEL_RS25GB008_BRANDING);
2004 break;
2005 case MPT2SAS_INTEL_RMS25JB080_SSDID:
2006 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
2007 MPT2SAS_INTEL_RMS25JB080_BRANDING);
2008 break;
2009 case MPT2SAS_INTEL_RMS25JB040_SSDID:
2010 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
2011 MPT2SAS_INTEL_RMS25JB040_BRANDING);
2012 break;
2013 case MPT2SAS_INTEL_RMS25KB080_SSDID:
2014 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
2015 MPT2SAS_INTEL_RMS25KB080_BRANDING);
2016 break;
2017 case MPT2SAS_INTEL_RMS25KB040_SSDID:
2018 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
2019 MPT2SAS_INTEL_RMS25KB040_BRANDING);
2020 break;
2021 case MPT2SAS_INTEL_RMS25LB040_SSDID:
2022 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
2023 MPT2SAS_INTEL_RMS25LB040_BRANDING);
2024 break;
2025 case MPT2SAS_INTEL_RMS25LB080_SSDID:
2026 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
2027 MPT2SAS_INTEL_RMS25LB080_BRANDING);
2028 break;
2029 default:
2030 break;
2031 }
2032 default:
2033 break;
2034 }
2035}
2036
2037/**
2038 * _base_display_hp_branding - Display branding string
2039 * @ioc: per adapter object
2040 *
2041 * Return nothing.
2042 */
2043static void
2044_base_display_hp_branding(struct MPT2SAS_ADAPTER *ioc)
2045{
2046 if (ioc->pdev->subsystem_vendor != MPT2SAS_HP_3PAR_SSVID)
2047 return;
2048
2049 switch (ioc->pdev->device) {
2050 case MPI2_MFGPAGE_DEVID_SAS2004:
2051 switch (ioc->pdev->subsystem_device) {
2052 case MPT2SAS_HP_DAUGHTER_2_4_INTERNAL_SSDID:
2053 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
2054 MPT2SAS_HP_DAUGHTER_2_4_INTERNAL_BRANDING);
2055 break;
2056 default:
2057 break;
2058 }
2059 case MPI2_MFGPAGE_DEVID_SAS2308_2:
2060 switch (ioc->pdev->subsystem_device) {
2061 case MPT2SAS_HP_2_4_INTERNAL_SSDID:
2062 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
2063 MPT2SAS_HP_2_4_INTERNAL_BRANDING);
2064 break;
2065 case MPT2SAS_HP_2_4_EXTERNAL_SSDID:
2066 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
2067 MPT2SAS_HP_2_4_EXTERNAL_BRANDING);
2068 break;
2069 case MPT2SAS_HP_1_4_INTERNAL_1_4_EXTERNAL_SSDID:
2070 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
2071 MPT2SAS_HP_1_4_INTERNAL_1_4_EXTERNAL_BRANDING);
2072 break;
2073 case MPT2SAS_HP_EMBEDDED_2_4_INTERNAL_SSDID:
2074 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
2075 MPT2SAS_HP_EMBEDDED_2_4_INTERNAL_BRANDING);
2076 break;
2077 default:
2078 break;
2079 }
2080 default:
2081 break;
2082 }
2083}
2084
2085/**
2086 * _base_display_ioc_capabilities - Disply IOC's capabilities.
2087 * @ioc: per adapter object
2088 *
2089 * Return nothing.
2090 */
2091static void
2092_base_display_ioc_capabilities(struct MPT2SAS_ADAPTER *ioc)
2093{
2094 int i = 0;
2095 char desc[16];
2096 u32 iounit_pg1_flags;
2097 u32 bios_version;
2098
2099 bios_version = le32_to_cpu(ioc->bios_pg3.BiosVersion);
2100 strncpy(desc, ioc->manu_pg0.ChipName, 16);
2101 printk(MPT2SAS_INFO_FMT "%s: FWVersion(%02d.%02d.%02d.%02d), "
2102 "ChipRevision(0x%02x), BiosVersion(%02d.%02d.%02d.%02d)\n",
2103 ioc->name, desc,
2104 (ioc->facts.FWVersion.Word & 0xFF000000) >> 24,
2105 (ioc->facts.FWVersion.Word & 0x00FF0000) >> 16,
2106 (ioc->facts.FWVersion.Word & 0x0000FF00) >> 8,
2107 ioc->facts.FWVersion.Word & 0x000000FF,
2108 ioc->pdev->revision,
2109 (bios_version & 0xFF000000) >> 24,
2110 (bios_version & 0x00FF0000) >> 16,
2111 (bios_version & 0x0000FF00) >> 8,
2112 bios_version & 0x000000FF);
2113
2114 _base_display_dell_branding(ioc);
2115 _base_display_intel_branding(ioc);
2116 _base_display_hp_branding(ioc);
2117
2118 printk(MPT2SAS_INFO_FMT "Protocol=(", ioc->name);
2119
2120 if (ioc->facts.ProtocolFlags & MPI2_IOCFACTS_PROTOCOL_SCSI_INITIATOR) {
2121 printk("Initiator");
2122 i++;
2123 }
2124
2125 if (ioc->facts.ProtocolFlags & MPI2_IOCFACTS_PROTOCOL_SCSI_TARGET) {
2126 printk("%sTarget", i ? "," : "");
2127 i++;
2128 }
2129
2130 i = 0;
2131 printk("), ");
2132 printk("Capabilities=(");
2133
2134 if (!ioc->hide_ir_msg) {
2135 if (ioc->facts.IOCCapabilities &
2136 MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID) {
2137 printk("Raid");
2138 i++;
2139 }
2140 }
2141
2142 if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_TLR) {
2143 printk("%sTLR", i ? "," : "");
2144 i++;
2145 }
2146
2147 if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_MULTICAST) {
2148 printk("%sMulticast", i ? "," : "");
2149 i++;
2150 }
2151
2152 if (ioc->facts.IOCCapabilities &
2153 MPI2_IOCFACTS_CAPABILITY_BIDIRECTIONAL_TARGET) {
2154 printk("%sBIDI Target", i ? "," : "");
2155 i++;
2156 }
2157
2158 if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_EEDP) {
2159 printk("%sEEDP", i ? "," : "");
2160 i++;
2161 }
2162
2163 if (ioc->facts.IOCCapabilities &
2164 MPI2_IOCFACTS_CAPABILITY_SNAPSHOT_BUFFER) {
2165 printk("%sSnapshot Buffer", i ? "," : "");
2166 i++;
2167 }
2168
2169 if (ioc->facts.IOCCapabilities &
2170 MPI2_IOCFACTS_CAPABILITY_DIAG_TRACE_BUFFER) {
2171 printk("%sDiag Trace Buffer", i ? "," : "");
2172 i++;
2173 }
2174
2175 if (ioc->facts.IOCCapabilities &
2176 MPI2_IOCFACTS_CAPABILITY_EXTENDED_BUFFER) {
2177 printk(KERN_INFO "%sDiag Extended Buffer", i ? "," : "");
2178 i++;
2179 }
2180
2181 if (ioc->facts.IOCCapabilities &
2182 MPI2_IOCFACTS_CAPABILITY_TASK_SET_FULL_HANDLING) {
2183 printk("%sTask Set Full", i ? "," : "");
2184 i++;
2185 }
2186
2187 iounit_pg1_flags = le32_to_cpu(ioc->iounit_pg1.Flags);
2188 if (!(iounit_pg1_flags & MPI2_IOUNITPAGE1_NATIVE_COMMAND_Q_DISABLE)) {
2189 printk("%sNCQ", i ? "," : "");
2190 i++;
2191 }
2192
2193 printk(")\n");
2194}
2195
2196/**
2197 * mpt2sas_base_update_missing_delay - change the missing delay timers
2198 * @ioc: per adapter object
2199 * @device_missing_delay: amount of time till device is reported missing
2200 * @io_missing_delay: interval IO is returned when there is a missing device
2201 *
2202 * Return nothing.
2203 *
2204 * Passed on the command line, this function will modify the device missing
2205 * delay, as well as the io missing delay. This should be called at driver
2206 * load time.
2207 */
2208void
2209mpt2sas_base_update_missing_delay(struct MPT2SAS_ADAPTER *ioc,
2210 u16 device_missing_delay, u8 io_missing_delay)
2211{
2212 u16 dmd, dmd_new, dmd_orignal;
2213 u8 io_missing_delay_original;
2214 u16 sz;
2215 Mpi2SasIOUnitPage1_t *sas_iounit_pg1 = NULL;
2216 Mpi2ConfigReply_t mpi_reply;
2217 u8 num_phys = 0;
2218 u16 ioc_status;
2219
2220 mpt2sas_config_get_number_hba_phys(ioc, &num_phys);
2221 if (!num_phys)
2222 return;
2223
2224 sz = offsetof(Mpi2SasIOUnitPage1_t, PhyData) + (num_phys *
2225 sizeof(Mpi2SasIOUnit1PhyData_t));
2226 sas_iounit_pg1 = kzalloc(sz, GFP_KERNEL);
2227 if (!sas_iounit_pg1) {
2228 printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",
2229 ioc->name, __FILE__, __LINE__, __func__);
2230 goto out;
2231 }
2232 if ((mpt2sas_config_get_sas_iounit_pg1(ioc, &mpi_reply,
2233 sas_iounit_pg1, sz))) {
2234 printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",
2235 ioc->name, __FILE__, __LINE__, __func__);
2236 goto out;
2237 }
2238 ioc_status = le16_to_cpu(mpi_reply.IOCStatus) &
2239 MPI2_IOCSTATUS_MASK;
2240 if (ioc_status != MPI2_IOCSTATUS_SUCCESS) {
2241 printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",
2242 ioc->name, __FILE__, __LINE__, __func__);
2243 goto out;
2244 }
2245
2246 /* device missing delay */
2247 dmd = sas_iounit_pg1->ReportDeviceMissingDelay;
2248 if (dmd & MPI2_SASIOUNIT1_REPORT_MISSING_UNIT_16)
2249 dmd = (dmd & MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK) * 16;
2250 else
2251 dmd = dmd & MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK;
2252 dmd_orignal = dmd;
2253 if (device_missing_delay > 0x7F) {
2254 dmd = (device_missing_delay > 0x7F0) ? 0x7F0 :
2255 device_missing_delay;
2256 dmd = dmd / 16;
2257 dmd |= MPI2_SASIOUNIT1_REPORT_MISSING_UNIT_16;
2258 } else
2259 dmd = device_missing_delay;
2260 sas_iounit_pg1->ReportDeviceMissingDelay = dmd;
2261
2262 /* io missing delay */
2263 io_missing_delay_original = sas_iounit_pg1->IODeviceMissingDelay;
2264 sas_iounit_pg1->IODeviceMissingDelay = io_missing_delay;
2265
2266 if (!mpt2sas_config_set_sas_iounit_pg1(ioc, &mpi_reply, sas_iounit_pg1,
2267 sz)) {
2268 if (dmd & MPI2_SASIOUNIT1_REPORT_MISSING_UNIT_16)
2269 dmd_new = (dmd &
2270 MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK) * 16;
2271 else
2272 dmd_new =
2273 dmd & MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK;
2274 printk(MPT2SAS_INFO_FMT "device_missing_delay: old(%d), "
2275 "new(%d)\n", ioc->name, dmd_orignal, dmd_new);
2276 printk(MPT2SAS_INFO_FMT "ioc_missing_delay: old(%d), "
2277 "new(%d)\n", ioc->name, io_missing_delay_original,
2278 io_missing_delay);
2279 ioc->device_missing_delay = dmd_new;
2280 ioc->io_missing_delay = io_missing_delay;
2281 }
2282
2283out:
2284 kfree(sas_iounit_pg1);
2285}
2286
2287/**
2288 * _base_static_config_pages - static start of day config pages
2289 * @ioc: per adapter object
2290 *
2291 * Return nothing.
2292 */
2293static void
2294_base_static_config_pages(struct MPT2SAS_ADAPTER *ioc)
2295{
2296 Mpi2ConfigReply_t mpi_reply;
2297 u32 iounit_pg1_flags;
2298
2299 mpt2sas_config_get_manufacturing_pg0(ioc, &mpi_reply, &ioc->manu_pg0);
2300 if (ioc->ir_firmware)
2301 mpt2sas_config_get_manufacturing_pg10(ioc, &mpi_reply,
2302 &ioc->manu_pg10);
2303 mpt2sas_config_get_bios_pg2(ioc, &mpi_reply, &ioc->bios_pg2);
2304 mpt2sas_config_get_bios_pg3(ioc, &mpi_reply, &ioc->bios_pg3);
2305 mpt2sas_config_get_ioc_pg8(ioc, &mpi_reply, &ioc->ioc_pg8);
2306 mpt2sas_config_get_iounit_pg0(ioc, &mpi_reply, &ioc->iounit_pg0);
2307 mpt2sas_config_get_iounit_pg1(ioc, &mpi_reply, &ioc->iounit_pg1);
2308 _base_display_ioc_capabilities(ioc);
2309
2310 /*
2311 * Enable task_set_full handling in iounit_pg1 when the
2312 * facts capabilities indicate that its supported.
2313 */
2314 iounit_pg1_flags = le32_to_cpu(ioc->iounit_pg1.Flags);
2315 if ((ioc->facts.IOCCapabilities &
2316 MPI2_IOCFACTS_CAPABILITY_TASK_SET_FULL_HANDLING))
2317 iounit_pg1_flags &=
2318 ~MPI2_IOUNITPAGE1_DISABLE_TASK_SET_FULL_HANDLING;
2319 else
2320 iounit_pg1_flags |=
2321 MPI2_IOUNITPAGE1_DISABLE_TASK_SET_FULL_HANDLING;
2322 ioc->iounit_pg1.Flags = cpu_to_le32(iounit_pg1_flags);
2323 mpt2sas_config_set_iounit_pg1(ioc, &mpi_reply, &ioc->iounit_pg1);
2324
2325}
2326
2327/**
2328 * _base_release_memory_pools - release memory
2329 * @ioc: per adapter object
2330 *
2331 * Free memory allocated from _base_allocate_memory_pools.
2332 *
2333 * Return nothing.
2334 */
2335static void
2336_base_release_memory_pools(struct MPT2SAS_ADAPTER *ioc)
2337{
2338 int i;
2339
2340 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
2341 __func__));
2342
2343 if (ioc->request) {
2344 pci_free_consistent(ioc->pdev, ioc->request_dma_sz,
2345 ioc->request, ioc->request_dma);
2346 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "request_pool(0x%p)"
2347 ": free\n", ioc->name, ioc->request));
2348 ioc->request = NULL;
2349 }
2350
2351 if (ioc->sense) {
2352 pci_pool_free(ioc->sense_dma_pool, ioc->sense, ioc->sense_dma);
2353 if (ioc->sense_dma_pool)
2354 pci_pool_destroy(ioc->sense_dma_pool);
2355 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "sense_pool(0x%p)"
2356 ": free\n", ioc->name, ioc->sense));
2357 ioc->sense = NULL;
2358 }
2359
2360 if (ioc->reply) {
2361 pci_pool_free(ioc->reply_dma_pool, ioc->reply, ioc->reply_dma);
2362 if (ioc->reply_dma_pool)
2363 pci_pool_destroy(ioc->reply_dma_pool);
2364 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_pool(0x%p)"
2365 ": free\n", ioc->name, ioc->reply));
2366 ioc->reply = NULL;
2367 }
2368
2369 if (ioc->reply_free) {
2370 pci_pool_free(ioc->reply_free_dma_pool, ioc->reply_free,
2371 ioc->reply_free_dma);
2372 if (ioc->reply_free_dma_pool)
2373 pci_pool_destroy(ioc->reply_free_dma_pool);
2374 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free_pool"
2375 "(0x%p): free\n", ioc->name, ioc->reply_free));
2376 ioc->reply_free = NULL;
2377 }
2378
2379 if (ioc->reply_post_free) {
2380 pci_pool_free(ioc->reply_post_free_dma_pool,
2381 ioc->reply_post_free, ioc->reply_post_free_dma);
2382 if (ioc->reply_post_free_dma_pool)
2383 pci_pool_destroy(ioc->reply_post_free_dma_pool);
2384 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT
2385 "reply_post_free_pool(0x%p): free\n", ioc->name,
2386 ioc->reply_post_free));
2387 ioc->reply_post_free = NULL;
2388 }
2389
2390 if (ioc->config_page) {
2391 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT
2392 "config_page(0x%p): free\n", ioc->name,
2393 ioc->config_page));
2394 pci_free_consistent(ioc->pdev, ioc->config_page_sz,
2395 ioc->config_page, ioc->config_page_dma);
2396 }
2397
2398 if (ioc->scsi_lookup) {
2399 free_pages((ulong)ioc->scsi_lookup, ioc->scsi_lookup_pages);
2400 ioc->scsi_lookup = NULL;
2401 }
2402 kfree(ioc->hpr_lookup);
2403 kfree(ioc->internal_lookup);
2404 if (ioc->chain_lookup) {
2405 for (i = 0; i < ioc->chain_depth; i++) {
2406 if (ioc->chain_lookup[i].chain_buffer)
2407 pci_pool_free(ioc->chain_dma_pool,
2408 ioc->chain_lookup[i].chain_buffer,
2409 ioc->chain_lookup[i].chain_buffer_dma);
2410 }
2411 if (ioc->chain_dma_pool)
2412 pci_pool_destroy(ioc->chain_dma_pool);
2413 free_pages((ulong)ioc->chain_lookup, ioc->chain_pages);
2414 ioc->chain_lookup = NULL;
2415 }
2416}
2417
2418
2419/**
2420 * _base_allocate_memory_pools - allocate start of day memory pools
2421 * @ioc: per adapter object
2422 * @sleep_flag: CAN_SLEEP or NO_SLEEP
2423 *
2424 * Returns 0 success, anything else error
2425 */
2426static int
2427_base_allocate_memory_pools(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
2428{
2429 struct mpt2sas_facts *facts;
2430 u16 max_sge_elements;
2431 u16 chains_needed_per_io;
2432 u32 sz, total_sz, reply_post_free_sz;
2433 u32 retry_sz;
2434 u16 max_request_credit;
2435 int i;
2436
2437 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
2438 __func__));
2439
2440 retry_sz = 0;
2441 facts = &ioc->facts;
2442
2443 /* command line tunables for max sgl entries */
2444 if (max_sgl_entries != -1) {
2445 ioc->shost->sg_tablesize = (max_sgl_entries <
2446 MPT2SAS_SG_DEPTH) ? max_sgl_entries :
2447 MPT2SAS_SG_DEPTH;
2448 } else {
2449 ioc->shost->sg_tablesize = MPT2SAS_SG_DEPTH;
2450 }
2451
2452 /* command line tunables for max controller queue depth */
2453 if (max_queue_depth != -1 && max_queue_depth != 0) {
2454 max_request_credit = min_t(u16, max_queue_depth +
2455 ioc->hi_priority_depth + ioc->internal_depth,
2456 facts->RequestCredit);
2457 if (max_request_credit > MAX_HBA_QUEUE_DEPTH)
2458 max_request_credit = MAX_HBA_QUEUE_DEPTH;
2459 } else
2460 max_request_credit = min_t(u16, facts->RequestCredit,
2461 MAX_HBA_QUEUE_DEPTH);
2462
2463 ioc->hba_queue_depth = max_request_credit;
2464 ioc->hi_priority_depth = facts->HighPriorityCredit;
2465 ioc->internal_depth = ioc->hi_priority_depth + 5;
2466
2467 /* request frame size */
2468 ioc->request_sz = facts->IOCRequestFrameSize * 4;
2469
2470 /* reply frame size */
2471 ioc->reply_sz = facts->ReplyFrameSize * 4;
2472
2473 retry_allocation:
2474 total_sz = 0;
2475 /* calculate number of sg elements left over in the 1st frame */
2476 max_sge_elements = ioc->request_sz - ((sizeof(Mpi2SCSIIORequest_t) -
2477 sizeof(Mpi2SGEIOUnion_t)) + ioc->sge_size);
2478 ioc->max_sges_in_main_message = max_sge_elements/ioc->sge_size;
2479
2480 /* now do the same for a chain buffer */
2481 max_sge_elements = ioc->request_sz - ioc->sge_size;
2482 ioc->max_sges_in_chain_message = max_sge_elements/ioc->sge_size;
2483
2484 ioc->chain_offset_value_for_main_message =
2485 ((sizeof(Mpi2SCSIIORequest_t) - sizeof(Mpi2SGEIOUnion_t)) +
2486 (ioc->max_sges_in_chain_message * ioc->sge_size)) / 4;
2487
2488 /*
2489 * MPT2SAS_SG_DEPTH = CONFIG_FUSION_MAX_SGE
2490 */
2491 chains_needed_per_io = ((ioc->shost->sg_tablesize -
2492 ioc->max_sges_in_main_message)/ioc->max_sges_in_chain_message)
2493 + 1;
2494 if (chains_needed_per_io > facts->MaxChainDepth) {
2495 chains_needed_per_io = facts->MaxChainDepth;
2496 ioc->shost->sg_tablesize = min_t(u16,
2497 ioc->max_sges_in_main_message + (ioc->max_sges_in_chain_message
2498 * chains_needed_per_io), ioc->shost->sg_tablesize);
2499 }
2500 ioc->chains_needed_per_io = chains_needed_per_io;
2501
2502 /* reply free queue sizing - taking into account for 64 FW events */
2503 ioc->reply_free_queue_depth = ioc->hba_queue_depth + 64;
2504
2505 /* calculate reply descriptor post queue depth */
2506 ioc->reply_post_queue_depth = ioc->hba_queue_depth +
2507 ioc->reply_free_queue_depth + 1;
2508 /* align the reply post queue on the next 16 count boundary */
2509 if (ioc->reply_post_queue_depth % 16)
2510 ioc->reply_post_queue_depth += 16 -
2511 (ioc->reply_post_queue_depth % 16);
2512
2513
2514 if (ioc->reply_post_queue_depth >
2515 facts->MaxReplyDescriptorPostQueueDepth) {
2516 ioc->reply_post_queue_depth =
2517 facts->MaxReplyDescriptorPostQueueDepth -
2518 (facts->MaxReplyDescriptorPostQueueDepth % 16);
2519 ioc->hba_queue_depth =
2520 ((ioc->reply_post_queue_depth - 64) / 2) - 1;
2521 ioc->reply_free_queue_depth = ioc->hba_queue_depth + 64;
2522 }
2523
2524 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scatter gather: "
2525 "sge_in_main_msg(%d), sge_per_chain(%d), sge_per_io(%d), "
2526 "chains_per_io(%d)\n", ioc->name, ioc->max_sges_in_main_message,
2527 ioc->max_sges_in_chain_message, ioc->shost->sg_tablesize,
2528 ioc->chains_needed_per_io));
2529
2530 ioc->scsiio_depth = ioc->hba_queue_depth -
2531 ioc->hi_priority_depth - ioc->internal_depth;
2532
2533 /* set the scsi host can_queue depth
2534 * with some internal commands that could be outstanding
2535 */
2536 ioc->shost->can_queue = ioc->scsiio_depth;
2537 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scsi host: "
2538 "can_queue depth (%d)\n", ioc->name, ioc->shost->can_queue));
2539
2540 /* contiguous pool for request and chains, 16 byte align, one extra "
2541 * "frame for smid=0
2542 */
2543 ioc->chain_depth = ioc->chains_needed_per_io * ioc->scsiio_depth;
2544 sz = ((ioc->scsiio_depth + 1) * ioc->request_sz);
2545
2546 /* hi-priority queue */
2547 sz += (ioc->hi_priority_depth * ioc->request_sz);
2548
2549 /* internal queue */
2550 sz += (ioc->internal_depth * ioc->request_sz);
2551
2552 ioc->request_dma_sz = sz;
2553 ioc->request = pci_alloc_consistent(ioc->pdev, sz, &ioc->request_dma);
2554 if (!ioc->request) {
2555 printk(MPT2SAS_ERR_FMT "request pool: pci_alloc_consistent "
2556 "failed: hba_depth(%d), chains_per_io(%d), frame_sz(%d), "
2557 "total(%d kB)\n", ioc->name, ioc->hba_queue_depth,
2558 ioc->chains_needed_per_io, ioc->request_sz, sz/1024);
2559 if (ioc->scsiio_depth < MPT2SAS_SAS_QUEUE_DEPTH)
2560 goto out;
2561 retry_sz += 64;
2562 ioc->hba_queue_depth = max_request_credit - retry_sz;
2563 goto retry_allocation;
2564 }
2565
2566 if (retry_sz)
2567 printk(MPT2SAS_ERR_FMT "request pool: pci_alloc_consistent "
2568 "succeed: hba_depth(%d), chains_per_io(%d), frame_sz(%d), "
2569 "total(%d kb)\n", ioc->name, ioc->hba_queue_depth,
2570 ioc->chains_needed_per_io, ioc->request_sz, sz/1024);
2571
2572
2573 /* hi-priority queue */
2574 ioc->hi_priority = ioc->request + ((ioc->scsiio_depth + 1) *
2575 ioc->request_sz);
2576 ioc->hi_priority_dma = ioc->request_dma + ((ioc->scsiio_depth + 1) *
2577 ioc->request_sz);
2578
2579 /* internal queue */
2580 ioc->internal = ioc->hi_priority + (ioc->hi_priority_depth *
2581 ioc->request_sz);
2582 ioc->internal_dma = ioc->hi_priority_dma + (ioc->hi_priority_depth *
2583 ioc->request_sz);
2584
2585
2586 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request pool(0x%p): "
2587 "depth(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name,
2588 ioc->request, ioc->hba_queue_depth, ioc->request_sz,
2589 (ioc->hba_queue_depth * ioc->request_sz)/1024));
2590 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request pool: dma(0x%llx)\n",
2591 ioc->name, (unsigned long long) ioc->request_dma));
2592 total_sz += sz;
2593
2594 sz = ioc->scsiio_depth * sizeof(struct scsiio_tracker);
2595 ioc->scsi_lookup_pages = get_order(sz);
2596 ioc->scsi_lookup = (struct scsiio_tracker *)__get_free_pages(
2597 GFP_KERNEL, ioc->scsi_lookup_pages);
2598 if (!ioc->scsi_lookup) {
2599 printk(MPT2SAS_ERR_FMT "scsi_lookup: get_free_pages failed, "
2600 "sz(%d)\n", ioc->name, (int)sz);
2601 goto out;
2602 }
2603
2604 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scsiio(0x%p): "
2605 "depth(%d)\n", ioc->name, ioc->request,
2606 ioc->scsiio_depth));
2607
2608 ioc->chain_depth = min_t(u32, ioc->chain_depth, MAX_CHAIN_DEPTH);
2609 sz = ioc->chain_depth * sizeof(struct chain_tracker);
2610 ioc->chain_pages = get_order(sz);
2611
2612 ioc->chain_lookup = (struct chain_tracker *)__get_free_pages(
2613 GFP_KERNEL, ioc->chain_pages);
2614 if (!ioc->chain_lookup) {
2615 printk(MPT2SAS_ERR_FMT "chain_lookup: get_free_pages failed, "
2616 "sz(%d)\n", ioc->name, (int)sz);
2617 goto out;
2618 }
2619 ioc->chain_dma_pool = pci_pool_create("chain pool", ioc->pdev,
2620 ioc->request_sz, 16, 0);
2621 if (!ioc->chain_dma_pool) {
2622 printk(MPT2SAS_ERR_FMT "chain_dma_pool: pci_pool_create "
2623 "failed\n", ioc->name);
2624 goto out;
2625 }
2626 for (i = 0; i < ioc->chain_depth; i++) {
2627 ioc->chain_lookup[i].chain_buffer = pci_pool_alloc(
2628 ioc->chain_dma_pool , GFP_KERNEL,
2629 &ioc->chain_lookup[i].chain_buffer_dma);
2630 if (!ioc->chain_lookup[i].chain_buffer) {
2631 ioc->chain_depth = i;
2632 goto chain_done;
2633 }
2634 total_sz += ioc->request_sz;
2635 }
2636chain_done:
2637 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "chain pool depth"
2638 "(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name,
2639 ioc->chain_depth, ioc->request_sz, ((ioc->chain_depth *
2640 ioc->request_sz))/1024));
2641
2642 /* initialize hi-priority queue smid's */
2643 ioc->hpr_lookup = kcalloc(ioc->hi_priority_depth,
2644 sizeof(struct request_tracker), GFP_KERNEL);
2645 if (!ioc->hpr_lookup) {
2646 printk(MPT2SAS_ERR_FMT "hpr_lookup: kcalloc failed\n",
2647 ioc->name);
2648 goto out;
2649 }
2650 ioc->hi_priority_smid = ioc->scsiio_depth + 1;
2651 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "hi_priority(0x%p): "
2652 "depth(%d), start smid(%d)\n", ioc->name, ioc->hi_priority,
2653 ioc->hi_priority_depth, ioc->hi_priority_smid));
2654
2655 /* initialize internal queue smid's */
2656 ioc->internal_lookup = kcalloc(ioc->internal_depth,
2657 sizeof(struct request_tracker), GFP_KERNEL);
2658 if (!ioc->internal_lookup) {
2659 printk(MPT2SAS_ERR_FMT "internal_lookup: kcalloc failed\n",
2660 ioc->name);
2661 goto out;
2662 }
2663 ioc->internal_smid = ioc->hi_priority_smid + ioc->hi_priority_depth;
2664 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "internal(0x%p): "
2665 "depth(%d), start smid(%d)\n", ioc->name, ioc->internal,
2666 ioc->internal_depth, ioc->internal_smid));
2667
2668 /* sense buffers, 4 byte align */
2669 sz = ioc->scsiio_depth * SCSI_SENSE_BUFFERSIZE;
2670 ioc->sense_dma_pool = pci_pool_create("sense pool", ioc->pdev, sz, 4,
2671 0);
2672 if (!ioc->sense_dma_pool) {
2673 printk(MPT2SAS_ERR_FMT "sense pool: pci_pool_create failed\n",
2674 ioc->name);
2675 goto out;
2676 }
2677 ioc->sense = pci_pool_alloc(ioc->sense_dma_pool , GFP_KERNEL,
2678 &ioc->sense_dma);
2679 if (!ioc->sense) {
2680 printk(MPT2SAS_ERR_FMT "sense pool: pci_pool_alloc failed\n",
2681 ioc->name);
2682 goto out;
2683 }
2684 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT
2685 "sense pool(0x%p): depth(%d), element_size(%d), pool_size"
2686 "(%d kB)\n", ioc->name, ioc->sense, ioc->scsiio_depth,
2687 SCSI_SENSE_BUFFERSIZE, sz/1024));
2688 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "sense_dma(0x%llx)\n",
2689 ioc->name, (unsigned long long)ioc->sense_dma));
2690 total_sz += sz;
2691
2692 /* reply pool, 4 byte align */
2693 sz = ioc->reply_free_queue_depth * ioc->reply_sz;
2694 ioc->reply_dma_pool = pci_pool_create("reply pool", ioc->pdev, sz, 4,
2695 0);
2696 if (!ioc->reply_dma_pool) {
2697 printk(MPT2SAS_ERR_FMT "reply pool: pci_pool_create failed\n",
2698 ioc->name);
2699 goto out;
2700 }
2701 ioc->reply = pci_pool_alloc(ioc->reply_dma_pool , GFP_KERNEL,
2702 &ioc->reply_dma);
2703 if (!ioc->reply) {
2704 printk(MPT2SAS_ERR_FMT "reply pool: pci_pool_alloc failed\n",
2705 ioc->name);
2706 goto out;
2707 }
2708 ioc->reply_dma_min_address = (u32)(ioc->reply_dma);
2709 ioc->reply_dma_max_address = (u32)(ioc->reply_dma) + sz;
2710 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply pool(0x%p): depth"
2711 "(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name, ioc->reply,
2712 ioc->reply_free_queue_depth, ioc->reply_sz, sz/1024));
2713 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_dma(0x%llx)\n",
2714 ioc->name, (unsigned long long)ioc->reply_dma));
2715 total_sz += sz;
2716
2717 /* reply free queue, 16 byte align */
2718 sz = ioc->reply_free_queue_depth * 4;
2719 ioc->reply_free_dma_pool = pci_pool_create("reply_free pool",
2720 ioc->pdev, sz, 16, 0);
2721 if (!ioc->reply_free_dma_pool) {
2722 printk(MPT2SAS_ERR_FMT "reply_free pool: pci_pool_create "
2723 "failed\n", ioc->name);
2724 goto out;
2725 }
2726 ioc->reply_free = pci_pool_alloc(ioc->reply_free_dma_pool , GFP_KERNEL,
2727 &ioc->reply_free_dma);
2728 if (!ioc->reply_free) {
2729 printk(MPT2SAS_ERR_FMT "reply_free pool: pci_pool_alloc "
2730 "failed\n", ioc->name);
2731 goto out;
2732 }
2733 memset(ioc->reply_free, 0, sz);
2734 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free pool(0x%p): "
2735 "depth(%d), element_size(%d), pool_size(%d kB)\n", ioc->name,
2736 ioc->reply_free, ioc->reply_free_queue_depth, 4, sz/1024));
2737 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free_dma"
2738 "(0x%llx)\n", ioc->name, (unsigned long long)ioc->reply_free_dma));
2739 total_sz += sz;
2740
2741 /* reply post queue, 16 byte align */
2742 reply_post_free_sz = ioc->reply_post_queue_depth *
2743 sizeof(Mpi2DefaultReplyDescriptor_t);
2744 if (_base_is_controller_msix_enabled(ioc))
2745 sz = reply_post_free_sz * ioc->reply_queue_count;
2746 else
2747 sz = reply_post_free_sz;
2748 ioc->reply_post_free_dma_pool = pci_pool_create("reply_post_free pool",
2749 ioc->pdev, sz, 16, 0);
2750 if (!ioc->reply_post_free_dma_pool) {
2751 printk(MPT2SAS_ERR_FMT "reply_post_free pool: pci_pool_create "
2752 "failed\n", ioc->name);
2753 goto out;
2754 }
2755 ioc->reply_post_free = pci_pool_alloc(ioc->reply_post_free_dma_pool ,
2756 GFP_KERNEL, &ioc->reply_post_free_dma);
2757 if (!ioc->reply_post_free) {
2758 printk(MPT2SAS_ERR_FMT "reply_post_free pool: pci_pool_alloc "
2759 "failed\n", ioc->name);
2760 goto out;
2761 }
2762 memset(ioc->reply_post_free, 0, sz);
2763 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply post free pool"
2764 "(0x%p): depth(%d), element_size(%d), pool_size(%d kB)\n",
2765 ioc->name, ioc->reply_post_free, ioc->reply_post_queue_depth, 8,
2766 sz/1024));
2767 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_post_free_dma = "
2768 "(0x%llx)\n", ioc->name, (unsigned long long)
2769 ioc->reply_post_free_dma));
2770 total_sz += sz;
2771
2772 ioc->config_page_sz = 512;
2773 ioc->config_page = pci_alloc_consistent(ioc->pdev,
2774 ioc->config_page_sz, &ioc->config_page_dma);
2775 if (!ioc->config_page) {
2776 printk(MPT2SAS_ERR_FMT "config page: pci_pool_alloc "
2777 "failed\n", ioc->name);
2778 goto out;
2779 }
2780 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "config page(0x%p): size"
2781 "(%d)\n", ioc->name, ioc->config_page, ioc->config_page_sz));
2782 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "config_page_dma"
2783 "(0x%llx)\n", ioc->name, (unsigned long long)ioc->config_page_dma));
2784 total_sz += ioc->config_page_sz;
2785
2786 printk(MPT2SAS_INFO_FMT "Allocated physical memory: size(%d kB)\n",
2787 ioc->name, total_sz/1024);
2788 printk(MPT2SAS_INFO_FMT "Current Controller Queue Depth(%d), "
2789 "Max Controller Queue Depth(%d)\n",
2790 ioc->name, ioc->shost->can_queue, facts->RequestCredit);
2791 printk(MPT2SAS_INFO_FMT "Scatter Gather Elements per IO(%d)\n",
2792 ioc->name, ioc->shost->sg_tablesize);
2793 return 0;
2794
2795 out:
2796 return -ENOMEM;
2797}
2798
2799
2800/**
2801 * mpt2sas_base_get_iocstate - Get the current state of a MPT adapter.
2802 * @ioc: Pointer to MPT_ADAPTER structure
2803 * @cooked: Request raw or cooked IOC state
2804 *
2805 * Returns all IOC Doorbell register bits if cooked==0, else just the
2806 * Doorbell bits in MPI_IOC_STATE_MASK.
2807 */
2808u32
2809mpt2sas_base_get_iocstate(struct MPT2SAS_ADAPTER *ioc, int cooked)
2810{
2811 u32 s, sc;
2812
2813 s = readl(&ioc->chip->Doorbell);
2814 sc = s & MPI2_IOC_STATE_MASK;
2815 return cooked ? sc : s;
2816}
2817
2818/**
2819 * _base_wait_on_iocstate - waiting on a particular ioc state
2820 * @ioc_state: controller state { READY, OPERATIONAL, or RESET }
2821 * @timeout: timeout in second
2822 * @sleep_flag: CAN_SLEEP or NO_SLEEP
2823 *
2824 * Returns 0 for success, non-zero for failure.
2825 */
2826static int
2827_base_wait_on_iocstate(struct MPT2SAS_ADAPTER *ioc, u32 ioc_state, int timeout,
2828 int sleep_flag)
2829{
2830 u32 count, cntdn;
2831 u32 current_state;
2832
2833 count = 0;
2834 cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
2835 do {
2836 current_state = mpt2sas_base_get_iocstate(ioc, 1);
2837 if (current_state == ioc_state)
2838 return 0;
2839 if (count && current_state == MPI2_IOC_STATE_FAULT)
2840 break;
2841 if (sleep_flag == CAN_SLEEP)
2842 msleep(1);
2843 else
2844 udelay(500);
2845 count++;
2846 } while (--cntdn);
2847
2848 return current_state;
2849}
2850
2851/**
2852 * _base_wait_for_doorbell_int - waiting for controller interrupt(generated by
2853 * a write to the doorbell)
2854 * @ioc: per adapter object
2855 * @timeout: timeout in second
2856 * @sleep_flag: CAN_SLEEP or NO_SLEEP
2857 *
2858 * Returns 0 for success, non-zero for failure.
2859 *
2860 * Notes: MPI2_HIS_IOC2SYS_DB_STATUS - set to one when IOC writes to doorbell.
2861 */
2862static int
2863_base_wait_for_doorbell_int(struct MPT2SAS_ADAPTER *ioc, int timeout,
2864 int sleep_flag)
2865{
2866 u32 cntdn, count;
2867 u32 int_status;
2868
2869 count = 0;
2870 cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
2871 do {
2872 int_status = readl(&ioc->chip->HostInterruptStatus);
2873 if (int_status & MPI2_HIS_IOC2SYS_DB_STATUS) {
2874 dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
2875 "successful count(%d), timeout(%d)\n", ioc->name,
2876 __func__, count, timeout));
2877 return 0;
2878 }
2879 if (sleep_flag == CAN_SLEEP)
2880 msleep(1);
2881 else
2882 udelay(500);
2883 count++;
2884 } while (--cntdn);
2885
2886 printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), "
2887 "int_status(%x)!\n", ioc->name, __func__, count, int_status);
2888 return -EFAULT;
2889}
2890
2891/**
2892 * _base_wait_for_doorbell_ack - waiting for controller to read the doorbell.
2893 * @ioc: per adapter object
2894 * @timeout: timeout in second
2895 * @sleep_flag: CAN_SLEEP or NO_SLEEP
2896 *
2897 * Returns 0 for success, non-zero for failure.
2898 *
2899 * Notes: MPI2_HIS_SYS2IOC_DB_STATUS - set to one when host writes to
2900 * doorbell.
2901 */
2902static int
2903_base_wait_for_doorbell_ack(struct MPT2SAS_ADAPTER *ioc, int timeout,
2904 int sleep_flag)
2905{
2906 u32 cntdn, count;
2907 u32 int_status;
2908 u32 doorbell;
2909
2910 count = 0;
2911 cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
2912 do {
2913 int_status = readl(&ioc->chip->HostInterruptStatus);
2914 if (!(int_status & MPI2_HIS_SYS2IOC_DB_STATUS)) {
2915 dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
2916 "successful count(%d), timeout(%d)\n", ioc->name,
2917 __func__, count, timeout));
2918 return 0;
2919 } else if (int_status & MPI2_HIS_IOC2SYS_DB_STATUS) {
2920 doorbell = readl(&ioc->chip->Doorbell);
2921 if ((doorbell & MPI2_IOC_STATE_MASK) ==
2922 MPI2_IOC_STATE_FAULT) {
2923 mpt2sas_base_fault_info(ioc , doorbell);
2924 return -EFAULT;
2925 }
2926 } else if (int_status == 0xFFFFFFFF)
2927 goto out;
2928
2929 if (sleep_flag == CAN_SLEEP)
2930 msleep(1);
2931 else
2932 udelay(500);
2933 count++;
2934 } while (--cntdn);
2935
2936 out:
2937 printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), "
2938 "int_status(%x)!\n", ioc->name, __func__, count, int_status);
2939 return -EFAULT;
2940}
2941
2942/**
2943 * _base_wait_for_doorbell_not_used - waiting for doorbell to not be in use
2944 * @ioc: per adapter object
2945 * @timeout: timeout in second
2946 * @sleep_flag: CAN_SLEEP or NO_SLEEP
2947 *
2948 * Returns 0 for success, non-zero for failure.
2949 *
2950 */
2951static int
2952_base_wait_for_doorbell_not_used(struct MPT2SAS_ADAPTER *ioc, int timeout,
2953 int sleep_flag)
2954{
2955 u32 cntdn, count;
2956 u32 doorbell_reg;
2957
2958 count = 0;
2959 cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
2960 do {
2961 doorbell_reg = readl(&ioc->chip->Doorbell);
2962 if (!(doorbell_reg & MPI2_DOORBELL_USED)) {
2963 dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
2964 "successful count(%d), timeout(%d)\n", ioc->name,
2965 __func__, count, timeout));
2966 return 0;
2967 }
2968 if (sleep_flag == CAN_SLEEP)
2969 msleep(1);
2970 else
2971 udelay(500);
2972 count++;
2973 } while (--cntdn);
2974
2975 printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), "
2976 "doorbell_reg(%x)!\n", ioc->name, __func__, count, doorbell_reg);
2977 return -EFAULT;
2978}
2979
2980/**
2981 * _base_send_ioc_reset - send doorbell reset
2982 * @ioc: per adapter object
2983 * @reset_type: currently only supports: MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET
2984 * @timeout: timeout in second
2985 * @sleep_flag: CAN_SLEEP or NO_SLEEP
2986 *
2987 * Returns 0 for success, non-zero for failure.
2988 */
2989static int
2990_base_send_ioc_reset(struct MPT2SAS_ADAPTER *ioc, u8 reset_type, int timeout,
2991 int sleep_flag)
2992{
2993 u32 ioc_state;
2994 int r = 0;
2995
2996 if (reset_type != MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET) {
2997 printk(MPT2SAS_ERR_FMT "%s: unknown reset_type\n",
2998 ioc->name, __func__);
2999 return -EFAULT;
3000 }
3001
3002 if (!(ioc->facts.IOCCapabilities &
3003 MPI2_IOCFACTS_CAPABILITY_EVENT_REPLAY))
3004 return -EFAULT;
3005
3006 printk(MPT2SAS_INFO_FMT "sending message unit reset !!\n", ioc->name);
3007
3008 writel(reset_type << MPI2_DOORBELL_FUNCTION_SHIFT,
3009 &ioc->chip->Doorbell);
3010 if ((_base_wait_for_doorbell_ack(ioc, 15, sleep_flag))) {
3011 r = -EFAULT;
3012 goto out;
3013 }
3014 ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_READY,
3015 timeout, sleep_flag);
3016 if (ioc_state) {
3017 printk(MPT2SAS_ERR_FMT "%s: failed going to ready state "
3018 " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state);
3019 r = -EFAULT;
3020 goto out;
3021 }
3022 out:
3023 printk(MPT2SAS_INFO_FMT "message unit reset: %s\n",
3024 ioc->name, ((r == 0) ? "SUCCESS" : "FAILED"));
3025 return r;
3026}
3027
3028/**
3029 * _base_handshake_req_reply_wait - send request thru doorbell interface
3030 * @ioc: per adapter object
3031 * @request_bytes: request length
3032 * @request: pointer having request payload
3033 * @reply_bytes: reply length
3034 * @reply: pointer to reply payload
3035 * @timeout: timeout in second
3036 * @sleep_flag: CAN_SLEEP or NO_SLEEP
3037 *
3038 * Returns 0 for success, non-zero for failure.
3039 */
3040static int
3041_base_handshake_req_reply_wait(struct MPT2SAS_ADAPTER *ioc, int request_bytes,
3042 u32 *request, int reply_bytes, u16 *reply, int timeout, int sleep_flag)
3043{
3044 MPI2DefaultReply_t *default_reply = (MPI2DefaultReply_t *)reply;
3045 int i;
3046 u8 failed;
3047 u16 dummy;
3048 __le32 *mfp;
3049
3050 /* make sure doorbell is not in use */
3051 if ((readl(&ioc->chip->Doorbell) & MPI2_DOORBELL_USED)) {
3052 printk(MPT2SAS_ERR_FMT "doorbell is in use "
3053 " (line=%d)\n", ioc->name, __LINE__);
3054 return -EFAULT;
3055 }
3056
3057 /* clear pending doorbell interrupts from previous state changes */
3058 if (readl(&ioc->chip->HostInterruptStatus) &
3059 MPI2_HIS_IOC2SYS_DB_STATUS)
3060 writel(0, &ioc->chip->HostInterruptStatus);
3061
3062 /* send message to ioc */
3063 writel(((MPI2_FUNCTION_HANDSHAKE<<MPI2_DOORBELL_FUNCTION_SHIFT) |
3064 ((request_bytes/4)<<MPI2_DOORBELL_ADD_DWORDS_SHIFT)),
3065 &ioc->chip->Doorbell);
3066
3067 if ((_base_wait_for_doorbell_int(ioc, 5, NO_SLEEP))) {
3068 printk(MPT2SAS_ERR_FMT "doorbell handshake "
3069 "int failed (line=%d)\n", ioc->name, __LINE__);
3070 return -EFAULT;
3071 }
3072 writel(0, &ioc->chip->HostInterruptStatus);
3073
3074 if ((_base_wait_for_doorbell_ack(ioc, 5, sleep_flag))) {
3075 printk(MPT2SAS_ERR_FMT "doorbell handshake "
3076 "ack failed (line=%d)\n", ioc->name, __LINE__);
3077 return -EFAULT;
3078 }
3079
3080 /* send message 32-bits at a time */
3081 for (i = 0, failed = 0; i < request_bytes/4 && !failed; i++) {
3082 writel(cpu_to_le32(request[i]), &ioc->chip->Doorbell);
3083 if ((_base_wait_for_doorbell_ack(ioc, 5, sleep_flag)))
3084 failed = 1;
3085 }
3086
3087 if (failed) {
3088 printk(MPT2SAS_ERR_FMT "doorbell handshake "
3089 "sending request failed (line=%d)\n", ioc->name, __LINE__);
3090 return -EFAULT;
3091 }
3092
3093 /* now wait for the reply */
3094 if ((_base_wait_for_doorbell_int(ioc, timeout, sleep_flag))) {
3095 printk(MPT2SAS_ERR_FMT "doorbell handshake "
3096 "int failed (line=%d)\n", ioc->name, __LINE__);
3097 return -EFAULT;
3098 }
3099
3100 /* read the first two 16-bits, it gives the total length of the reply */
3101 reply[0] = le16_to_cpu(readl(&ioc->chip->Doorbell)
3102 & MPI2_DOORBELL_DATA_MASK);
3103 writel(0, &ioc->chip->HostInterruptStatus);
3104 if ((_base_wait_for_doorbell_int(ioc, 5, sleep_flag))) {
3105 printk(MPT2SAS_ERR_FMT "doorbell handshake "
3106 "int failed (line=%d)\n", ioc->name, __LINE__);
3107 return -EFAULT;
3108 }
3109 reply[1] = le16_to_cpu(readl(&ioc->chip->Doorbell)
3110 & MPI2_DOORBELL_DATA_MASK);
3111 writel(0, &ioc->chip->HostInterruptStatus);
3112
3113 for (i = 2; i < default_reply->MsgLength * 2; i++) {
3114 if ((_base_wait_for_doorbell_int(ioc, 5, sleep_flag))) {
3115 printk(MPT2SAS_ERR_FMT "doorbell "
3116 "handshake int failed (line=%d)\n", ioc->name,
3117 __LINE__);
3118 return -EFAULT;
3119 }
3120 if (i >= reply_bytes/2) /* overflow case */
3121 dummy = readl(&ioc->chip->Doorbell);
3122 else
3123 reply[i] = le16_to_cpu(readl(&ioc->chip->Doorbell)
3124 & MPI2_DOORBELL_DATA_MASK);
3125 writel(0, &ioc->chip->HostInterruptStatus);
3126 }
3127
3128 _base_wait_for_doorbell_int(ioc, 5, sleep_flag);
3129 if (_base_wait_for_doorbell_not_used(ioc, 5, sleep_flag) != 0) {
3130 dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "doorbell is in use "
3131 " (line=%d)\n", ioc->name, __LINE__));
3132 }
3133 writel(0, &ioc->chip->HostInterruptStatus);
3134
3135 if (ioc->logging_level & MPT_DEBUG_INIT) {
3136 mfp = (__le32 *)reply;
3137 printk(KERN_INFO "\toffset:data\n");
3138 for (i = 0; i < reply_bytes/4; i++)
3139 printk(KERN_INFO "\t[0x%02x]:%08x\n", i*4,
3140 le32_to_cpu(mfp[i]));
3141 }
3142 return 0;
3143}
3144
3145/**
3146 * mpt2sas_base_sas_iounit_control - send sas iounit control to FW
3147 * @ioc: per adapter object
3148 * @mpi_reply: the reply payload from FW
3149 * @mpi_request: the request payload sent to FW
3150 *
3151 * The SAS IO Unit Control Request message allows the host to perform low-level
3152 * operations, such as resets on the PHYs of the IO Unit, also allows the host
3153 * to obtain the IOC assigned device handles for a device if it has other
3154 * identifying information about the device, in addition allows the host to
3155 * remove IOC resources associated with the device.
3156 *
3157 * Returns 0 for success, non-zero for failure.
3158 */
3159int
3160mpt2sas_base_sas_iounit_control(struct MPT2SAS_ADAPTER *ioc,
3161 Mpi2SasIoUnitControlReply_t *mpi_reply,
3162 Mpi2SasIoUnitControlRequest_t *mpi_request)
3163{
3164 u16 smid;
3165 u32 ioc_state;
3166 unsigned long timeleft;
3167 u8 issue_reset;
3168 int rc;
3169 void *request;
3170 u16 wait_state_count;
3171
3172 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
3173 __func__));
3174
3175 mutex_lock(&ioc->base_cmds.mutex);
3176
3177 if (ioc->base_cmds.status != MPT2_CMD_NOT_USED) {
3178 printk(MPT2SAS_ERR_FMT "%s: base_cmd in use\n",
3179 ioc->name, __func__);
3180 rc = -EAGAIN;
3181 goto out;
3182 }
3183
3184 wait_state_count = 0;
3185 ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
3186 while (ioc_state != MPI2_IOC_STATE_OPERATIONAL) {
3187 if (wait_state_count++ == 10) {
3188 printk(MPT2SAS_ERR_FMT
3189 "%s: failed due to ioc not operational\n",
3190 ioc->name, __func__);
3191 rc = -EFAULT;
3192 goto out;
3193 }
3194 ssleep(1);
3195 ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
3196 printk(MPT2SAS_INFO_FMT "%s: waiting for "
3197 "operational state(count=%d)\n", ioc->name,
3198 __func__, wait_state_count);
3199 }
3200
3201 smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
3202 if (!smid) {
3203 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
3204 ioc->name, __func__);
3205 rc = -EAGAIN;
3206 goto out;
3207 }
3208
3209 rc = 0;
3210 ioc->base_cmds.status = MPT2_CMD_PENDING;
3211 request = mpt2sas_base_get_msg_frame(ioc, smid);
3212 ioc->base_cmds.smid = smid;
3213 memcpy(request, mpi_request, sizeof(Mpi2SasIoUnitControlRequest_t));
3214 if (mpi_request->Operation == MPI2_SAS_OP_PHY_HARD_RESET ||
3215 mpi_request->Operation == MPI2_SAS_OP_PHY_LINK_RESET)
3216 ioc->ioc_link_reset_in_progress = 1;
3217 init_completion(&ioc->base_cmds.done);
3218 mpt2sas_base_put_smid_default(ioc, smid);
3219 timeleft = wait_for_completion_timeout(&ioc->base_cmds.done,
3220 msecs_to_jiffies(10000));
3221 if ((mpi_request->Operation == MPI2_SAS_OP_PHY_HARD_RESET ||
3222 mpi_request->Operation == MPI2_SAS_OP_PHY_LINK_RESET) &&
3223 ioc->ioc_link_reset_in_progress)
3224 ioc->ioc_link_reset_in_progress = 0;
3225 if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
3226 printk(MPT2SAS_ERR_FMT "%s: timeout\n",
3227 ioc->name, __func__);
3228 _debug_dump_mf(mpi_request,
3229 sizeof(Mpi2SasIoUnitControlRequest_t)/4);
3230 if (!(ioc->base_cmds.status & MPT2_CMD_RESET))
3231 issue_reset = 1;
3232 goto issue_host_reset;
3233 }
3234 if (ioc->base_cmds.status & MPT2_CMD_REPLY_VALID)
3235 memcpy(mpi_reply, ioc->base_cmds.reply,
3236 sizeof(Mpi2SasIoUnitControlReply_t));
3237 else
3238 memset(mpi_reply, 0, sizeof(Mpi2SasIoUnitControlReply_t));
3239 ioc->base_cmds.status = MPT2_CMD_NOT_USED;
3240 goto out;
3241
3242 issue_host_reset:
3243 if (issue_reset)
3244 mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,
3245 FORCE_BIG_HAMMER);
3246 ioc->base_cmds.status = MPT2_CMD_NOT_USED;
3247 rc = -EFAULT;
3248 out:
3249 mutex_unlock(&ioc->base_cmds.mutex);
3250 return rc;
3251}
3252
3253
3254/**
3255 * mpt2sas_base_scsi_enclosure_processor - sending request to sep device
3256 * @ioc: per adapter object
3257 * @mpi_reply: the reply payload from FW
3258 * @mpi_request: the request payload sent to FW
3259 *
3260 * The SCSI Enclosure Processor request message causes the IOC to
3261 * communicate with SES devices to control LED status signals.
3262 *
3263 * Returns 0 for success, non-zero for failure.
3264 */
3265int
3266mpt2sas_base_scsi_enclosure_processor(struct MPT2SAS_ADAPTER *ioc,
3267 Mpi2SepReply_t *mpi_reply, Mpi2SepRequest_t *mpi_request)
3268{
3269 u16 smid;
3270 u32 ioc_state;
3271 unsigned long timeleft;
3272 u8 issue_reset;
3273 int rc;
3274 void *request;
3275 u16 wait_state_count;
3276
3277 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
3278 __func__));
3279
3280 mutex_lock(&ioc->base_cmds.mutex);
3281
3282 if (ioc->base_cmds.status != MPT2_CMD_NOT_USED) {
3283 printk(MPT2SAS_ERR_FMT "%s: base_cmd in use\n",
3284 ioc->name, __func__);
3285 rc = -EAGAIN;
3286 goto out;
3287 }
3288
3289 wait_state_count = 0;
3290 ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
3291 while (ioc_state != MPI2_IOC_STATE_OPERATIONAL) {
3292 if (wait_state_count++ == 10) {
3293 printk(MPT2SAS_ERR_FMT
3294 "%s: failed due to ioc not operational\n",
3295 ioc->name, __func__);
3296 rc = -EFAULT;
3297 goto out;
3298 }
3299 ssleep(1);
3300 ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
3301 printk(MPT2SAS_INFO_FMT "%s: waiting for "
3302 "operational state(count=%d)\n", ioc->name,
3303 __func__, wait_state_count);
3304 }
3305
3306 smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
3307 if (!smid) {
3308 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
3309 ioc->name, __func__);
3310 rc = -EAGAIN;
3311 goto out;
3312 }
3313
3314 rc = 0;
3315 ioc->base_cmds.status = MPT2_CMD_PENDING;
3316 request = mpt2sas_base_get_msg_frame(ioc, smid);
3317 ioc->base_cmds.smid = smid;
3318 memcpy(request, mpi_request, sizeof(Mpi2SepReply_t));
3319 init_completion(&ioc->base_cmds.done);
3320 mpt2sas_base_put_smid_default(ioc, smid);
3321 timeleft = wait_for_completion_timeout(&ioc->base_cmds.done,
3322 msecs_to_jiffies(10000));
3323 if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
3324 printk(MPT2SAS_ERR_FMT "%s: timeout\n",
3325 ioc->name, __func__);
3326 _debug_dump_mf(mpi_request,
3327 sizeof(Mpi2SepRequest_t)/4);
3328 if (!(ioc->base_cmds.status & MPT2_CMD_RESET))
3329 issue_reset = 1;
3330 goto issue_host_reset;
3331 }
3332 if (ioc->base_cmds.status & MPT2_CMD_REPLY_VALID)
3333 memcpy(mpi_reply, ioc->base_cmds.reply,
3334 sizeof(Mpi2SepReply_t));
3335 else
3336 memset(mpi_reply, 0, sizeof(Mpi2SepReply_t));
3337 ioc->base_cmds.status = MPT2_CMD_NOT_USED;
3338 goto out;
3339
3340 issue_host_reset:
3341 if (issue_reset)
3342 mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,
3343 FORCE_BIG_HAMMER);
3344 ioc->base_cmds.status = MPT2_CMD_NOT_USED;
3345 rc = -EFAULT;
3346 out:
3347 mutex_unlock(&ioc->base_cmds.mutex);
3348 return rc;
3349}
3350
3351/**
3352 * _base_get_port_facts - obtain port facts reply and save in ioc
3353 * @ioc: per adapter object
3354 * @sleep_flag: CAN_SLEEP or NO_SLEEP
3355 *
3356 * Returns 0 for success, non-zero for failure.
3357 */
3358static int
3359_base_get_port_facts(struct MPT2SAS_ADAPTER *ioc, int port, int sleep_flag)
3360{
3361 Mpi2PortFactsRequest_t mpi_request;
3362 Mpi2PortFactsReply_t mpi_reply;
3363 struct mpt2sas_port_facts *pfacts;
3364 int mpi_reply_sz, mpi_request_sz, r;
3365
3366 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
3367 __func__));
3368
3369 mpi_reply_sz = sizeof(Mpi2PortFactsReply_t);
3370 mpi_request_sz = sizeof(Mpi2PortFactsRequest_t);
3371 memset(&mpi_request, 0, mpi_request_sz);
3372 mpi_request.Function = MPI2_FUNCTION_PORT_FACTS;
3373 mpi_request.PortNumber = port;
3374 r = _base_handshake_req_reply_wait(ioc, mpi_request_sz,
3375 (u32 *)&mpi_request, mpi_reply_sz, (u16 *)&mpi_reply, 5, CAN_SLEEP);
3376
3377 if (r != 0) {
3378 printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n",
3379 ioc->name, __func__, r);
3380 return r;
3381 }
3382
3383 pfacts = &ioc->pfacts[port];
3384 memset(pfacts, 0, sizeof(struct mpt2sas_port_facts));
3385 pfacts->PortNumber = mpi_reply.PortNumber;
3386 pfacts->VP_ID = mpi_reply.VP_ID;
3387 pfacts->VF_ID = mpi_reply.VF_ID;
3388 pfacts->MaxPostedCmdBuffers =
3389 le16_to_cpu(mpi_reply.MaxPostedCmdBuffers);
3390
3391 return 0;
3392}
3393
3394/**
3395 * _base_get_ioc_facts - obtain ioc facts reply and save in ioc
3396 * @ioc: per adapter object
3397 * @sleep_flag: CAN_SLEEP or NO_SLEEP
3398 *
3399 * Returns 0 for success, non-zero for failure.
3400 */
3401static int
3402_base_get_ioc_facts(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
3403{
3404 Mpi2IOCFactsRequest_t mpi_request;
3405 Mpi2IOCFactsReply_t mpi_reply;
3406 struct mpt2sas_facts *facts;
3407 int mpi_reply_sz, mpi_request_sz, r;
3408
3409 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
3410 __func__));
3411
3412 mpi_reply_sz = sizeof(Mpi2IOCFactsReply_t);
3413 mpi_request_sz = sizeof(Mpi2IOCFactsRequest_t);
3414 memset(&mpi_request, 0, mpi_request_sz);
3415 mpi_request.Function = MPI2_FUNCTION_IOC_FACTS;
3416 r = _base_handshake_req_reply_wait(ioc, mpi_request_sz,
3417 (u32 *)&mpi_request, mpi_reply_sz, (u16 *)&mpi_reply, 5, CAN_SLEEP);
3418
3419 if (r != 0) {
3420 printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n",
3421 ioc->name, __func__, r);
3422 return r;
3423 }
3424
3425 facts = &ioc->facts;
3426 memset(facts, 0, sizeof(struct mpt2sas_facts));
3427 facts->MsgVersion = le16_to_cpu(mpi_reply.MsgVersion);
3428 facts->HeaderVersion = le16_to_cpu(mpi_reply.HeaderVersion);
3429 facts->VP_ID = mpi_reply.VP_ID;
3430 facts->VF_ID = mpi_reply.VF_ID;
3431 facts->IOCExceptions = le16_to_cpu(mpi_reply.IOCExceptions);
3432 facts->MaxChainDepth = mpi_reply.MaxChainDepth;
3433 facts->WhoInit = mpi_reply.WhoInit;
3434 facts->NumberOfPorts = mpi_reply.NumberOfPorts;
3435 facts->MaxMSIxVectors = mpi_reply.MaxMSIxVectors;
3436 facts->RequestCredit = le16_to_cpu(mpi_reply.RequestCredit);
3437 facts->MaxReplyDescriptorPostQueueDepth =
3438 le16_to_cpu(mpi_reply.MaxReplyDescriptorPostQueueDepth);
3439 facts->ProductID = le16_to_cpu(mpi_reply.ProductID);
3440 facts->IOCCapabilities = le32_to_cpu(mpi_reply.IOCCapabilities);
3441 if ((facts->IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID))
3442 ioc->ir_firmware = 1;
3443 facts->FWVersion.Word = le32_to_cpu(mpi_reply.FWVersion.Word);
3444 facts->IOCRequestFrameSize =
3445 le16_to_cpu(mpi_reply.IOCRequestFrameSize);
3446 facts->MaxInitiators = le16_to_cpu(mpi_reply.MaxInitiators);
3447 facts->MaxTargets = le16_to_cpu(mpi_reply.MaxTargets);
3448 ioc->shost->max_id = -1;
3449 facts->MaxSasExpanders = le16_to_cpu(mpi_reply.MaxSasExpanders);
3450 facts->MaxEnclosures = le16_to_cpu(mpi_reply.MaxEnclosures);
3451 facts->ProtocolFlags = le16_to_cpu(mpi_reply.ProtocolFlags);
3452 facts->HighPriorityCredit =
3453 le16_to_cpu(mpi_reply.HighPriorityCredit);
3454 facts->ReplyFrameSize = mpi_reply.ReplyFrameSize;
3455 facts->MaxDevHandle = le16_to_cpu(mpi_reply.MaxDevHandle);
3456
3457 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "hba queue depth(%d), "
3458 "max chains per io(%d)\n", ioc->name, facts->RequestCredit,
3459 facts->MaxChainDepth));
3460 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request frame size(%d), "
3461 "reply frame size(%d)\n", ioc->name,
3462 facts->IOCRequestFrameSize * 4, facts->ReplyFrameSize * 4));
3463 return 0;
3464}
3465
3466/**
3467 * _base_send_ioc_init - send ioc_init to firmware
3468 * @ioc: per adapter object
3469 * @sleep_flag: CAN_SLEEP or NO_SLEEP
3470 *
3471 * Returns 0 for success, non-zero for failure.
3472 */
3473static int
3474_base_send_ioc_init(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
3475{
3476 Mpi2IOCInitRequest_t mpi_request;
3477 Mpi2IOCInitReply_t mpi_reply;
3478 int r;
3479 struct timeval current_time;
3480 u16 ioc_status;
3481
3482 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
3483 __func__));
3484
3485 memset(&mpi_request, 0, sizeof(Mpi2IOCInitRequest_t));
3486 mpi_request.Function = MPI2_FUNCTION_IOC_INIT;
3487 mpi_request.WhoInit = MPI2_WHOINIT_HOST_DRIVER;
3488 mpi_request.VF_ID = 0; /* TODO */
3489 mpi_request.VP_ID = 0;
3490 mpi_request.MsgVersion = cpu_to_le16(MPI2_VERSION);
3491 mpi_request.HeaderVersion = cpu_to_le16(MPI2_HEADER_VERSION);
3492
3493 if (_base_is_controller_msix_enabled(ioc))
3494 mpi_request.HostMSIxVectors = ioc->reply_queue_count;
3495 mpi_request.SystemRequestFrameSize = cpu_to_le16(ioc->request_sz/4);
3496 mpi_request.ReplyDescriptorPostQueueDepth =
3497 cpu_to_le16(ioc->reply_post_queue_depth);
3498 mpi_request.ReplyFreeQueueDepth =
3499 cpu_to_le16(ioc->reply_free_queue_depth);
3500
3501 mpi_request.SenseBufferAddressHigh =
3502 cpu_to_le32((u64)ioc->sense_dma >> 32);
3503 mpi_request.SystemReplyAddressHigh =
3504 cpu_to_le32((u64)ioc->reply_dma >> 32);
3505 mpi_request.SystemRequestFrameBaseAddress =
3506 cpu_to_le64((u64)ioc->request_dma);
3507 mpi_request.ReplyFreeQueueAddress =
3508 cpu_to_le64((u64)ioc->reply_free_dma);
3509 mpi_request.ReplyDescriptorPostQueueAddress =
3510 cpu_to_le64((u64)ioc->reply_post_free_dma);
3511
3512
3513 /* This time stamp specifies number of milliseconds
3514 * since epoch ~ midnight January 1, 1970.
3515 */
3516 do_gettimeofday(¤t_time);
3517 mpi_request.TimeStamp = cpu_to_le64((u64)current_time.tv_sec * 1000 +
3518 (current_time.tv_usec / 1000));
3519
3520 if (ioc->logging_level & MPT_DEBUG_INIT) {
3521 __le32 *mfp;
3522 int i;
3523
3524 mfp = (__le32 *)&mpi_request;
3525 printk(KERN_INFO "\toffset:data\n");
3526 for (i = 0; i < sizeof(Mpi2IOCInitRequest_t)/4; i++)
3527 printk(KERN_INFO "\t[0x%02x]:%08x\n", i*4,
3528 le32_to_cpu(mfp[i]));
3529 }
3530
3531 r = _base_handshake_req_reply_wait(ioc,
3532 sizeof(Mpi2IOCInitRequest_t), (u32 *)&mpi_request,
3533 sizeof(Mpi2IOCInitReply_t), (u16 *)&mpi_reply, 10,
3534 sleep_flag);
3535
3536 if (r != 0) {
3537 printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n",
3538 ioc->name, __func__, r);
3539 return r;
3540 }
3541
3542 ioc_status = le16_to_cpu(mpi_reply.IOCStatus) & MPI2_IOCSTATUS_MASK;
3543 if (ioc_status != MPI2_IOCSTATUS_SUCCESS ||
3544 mpi_reply.IOCLogInfo) {
3545 printk(MPT2SAS_ERR_FMT "%s: failed\n", ioc->name, __func__);
3546 r = -EIO;
3547 }
3548
3549 return 0;
3550}
3551
3552/**
3553 * mpt2sas_port_enable_done - command completion routine for port enable
3554 * @ioc: per adapter object
3555 * @smid: system request message index
3556 * @msix_index: MSIX table index supplied by the OS
3557 * @reply: reply message frame(lower 32bit addr)
3558 *
3559 * Return 1 meaning mf should be freed from _base_interrupt
3560 * 0 means the mf is freed from this function.
3561 */
3562u8
3563mpt2sas_port_enable_done(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
3564 u32 reply)
3565{
3566 MPI2DefaultReply_t *mpi_reply;
3567 u16 ioc_status;
3568
3569 mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
3570 if (mpi_reply && mpi_reply->Function == MPI2_FUNCTION_EVENT_ACK)
3571 return 1;
3572
3573 if (ioc->port_enable_cmds.status == MPT2_CMD_NOT_USED)
3574 return 1;
3575
3576 ioc->port_enable_cmds.status |= MPT2_CMD_COMPLETE;
3577 if (mpi_reply) {
3578 ioc->port_enable_cmds.status |= MPT2_CMD_REPLY_VALID;
3579 memcpy(ioc->port_enable_cmds.reply, mpi_reply,
3580 mpi_reply->MsgLength*4);
3581 }
3582 ioc->port_enable_cmds.status &= ~MPT2_CMD_PENDING;
3583
3584 ioc_status = le16_to_cpu(mpi_reply->IOCStatus) & MPI2_IOCSTATUS_MASK;
3585
3586 if (ioc_status != MPI2_IOCSTATUS_SUCCESS)
3587 ioc->port_enable_failed = 1;
3588
3589 if (ioc->is_driver_loading) {
3590 if (ioc_status == MPI2_IOCSTATUS_SUCCESS) {
3591 mpt2sas_port_enable_complete(ioc);
3592 return 1;
3593 } else {
3594 ioc->start_scan_failed = ioc_status;
3595 ioc->start_scan = 0;
3596 return 1;
3597 }
3598 }
3599 complete(&ioc->port_enable_cmds.done);
3600 return 1;
3601}
3602
3603
3604/**
3605 * _base_send_port_enable - send port_enable(discovery stuff) to firmware
3606 * @ioc: per adapter object
3607 * @sleep_flag: CAN_SLEEP or NO_SLEEP
3608 *
3609 * Returns 0 for success, non-zero for failure.
3610 */
3611static int
3612_base_send_port_enable(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
3613{
3614 Mpi2PortEnableRequest_t *mpi_request;
3615 Mpi2PortEnableReply_t *mpi_reply;
3616 unsigned long timeleft;
3617 int r = 0;
3618 u16 smid;
3619 u16 ioc_status;
3620
3621 printk(MPT2SAS_INFO_FMT "sending port enable !!\n", ioc->name);
3622
3623 if (ioc->port_enable_cmds.status & MPT2_CMD_PENDING) {
3624 printk(MPT2SAS_ERR_FMT "%s: internal command already in use\n",
3625 ioc->name, __func__);
3626 return -EAGAIN;
3627 }
3628
3629 smid = mpt2sas_base_get_smid(ioc, ioc->port_enable_cb_idx);
3630 if (!smid) {
3631 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
3632 ioc->name, __func__);
3633 return -EAGAIN;
3634 }
3635
3636 ioc->port_enable_cmds.status = MPT2_CMD_PENDING;
3637 mpi_request = mpt2sas_base_get_msg_frame(ioc, smid);
3638 ioc->port_enable_cmds.smid = smid;
3639 memset(mpi_request, 0, sizeof(Mpi2PortEnableRequest_t));
3640 mpi_request->Function = MPI2_FUNCTION_PORT_ENABLE;
3641
3642 init_completion(&ioc->port_enable_cmds.done);
3643 mpt2sas_base_put_smid_default(ioc, smid);
3644 timeleft = wait_for_completion_timeout(&ioc->port_enable_cmds.done,
3645 300*HZ);
3646 if (!(ioc->port_enable_cmds.status & MPT2_CMD_COMPLETE)) {
3647 printk(MPT2SAS_ERR_FMT "%s: timeout\n",
3648 ioc->name, __func__);
3649 _debug_dump_mf(mpi_request,
3650 sizeof(Mpi2PortEnableRequest_t)/4);
3651 if (ioc->port_enable_cmds.status & MPT2_CMD_RESET)
3652 r = -EFAULT;
3653 else
3654 r = -ETIME;
3655 goto out;
3656 }
3657 mpi_reply = ioc->port_enable_cmds.reply;
3658
3659 ioc_status = le16_to_cpu(mpi_reply->IOCStatus) & MPI2_IOCSTATUS_MASK;
3660 if (ioc_status != MPI2_IOCSTATUS_SUCCESS) {
3661 printk(MPT2SAS_ERR_FMT "%s: failed with (ioc_status=0x%08x)\n",
3662 ioc->name, __func__, ioc_status);
3663 r = -EFAULT;
3664 goto out;
3665 }
3666 out:
3667 ioc->port_enable_cmds.status = MPT2_CMD_NOT_USED;
3668 printk(MPT2SAS_INFO_FMT "port enable: %s\n", ioc->name, ((r == 0) ?
3669 "SUCCESS" : "FAILED"));
3670 return r;
3671}
3672
3673/**
3674 * mpt2sas_port_enable - initiate firmware discovery (don't wait for reply)
3675 * @ioc: per adapter object
3676 *
3677 * Returns 0 for success, non-zero for failure.
3678 */
3679int
3680mpt2sas_port_enable(struct MPT2SAS_ADAPTER *ioc)
3681{
3682 Mpi2PortEnableRequest_t *mpi_request;
3683 u16 smid;
3684
3685 printk(MPT2SAS_INFO_FMT "sending port enable !!\n", ioc->name);
3686
3687 if (ioc->port_enable_cmds.status & MPT2_CMD_PENDING) {
3688 printk(MPT2SAS_ERR_FMT "%s: internal command already in use\n",
3689 ioc->name, __func__);
3690 return -EAGAIN;
3691 }
3692
3693 smid = mpt2sas_base_get_smid(ioc, ioc->port_enable_cb_idx);
3694 if (!smid) {
3695 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
3696 ioc->name, __func__);
3697 return -EAGAIN;
3698 }
3699
3700 ioc->port_enable_cmds.status = MPT2_CMD_PENDING;
3701 mpi_request = mpt2sas_base_get_msg_frame(ioc, smid);
3702 ioc->port_enable_cmds.smid = smid;
3703 memset(mpi_request, 0, sizeof(Mpi2PortEnableRequest_t));
3704 mpi_request->Function = MPI2_FUNCTION_PORT_ENABLE;
3705
3706 mpt2sas_base_put_smid_default(ioc, smid);
3707 return 0;
3708}
3709
3710/**
3711 * _base_determine_wait_on_discovery - desposition
3712 * @ioc: per adapter object
3713 *
3714 * Decide whether to wait on discovery to complete. Used to either
3715 * locate boot device, or report volumes ahead of physical devices.
3716 *
3717 * Returns 1 for wait, 0 for don't wait
3718 */
3719static int
3720_base_determine_wait_on_discovery(struct MPT2SAS_ADAPTER *ioc)
3721{
3722 /* We wait for discovery to complete if IR firmware is loaded.
3723 * The sas topology events arrive before PD events, so we need time to
3724 * turn on the bit in ioc->pd_handles to indicate PD
3725 * Also, it maybe required to report Volumes ahead of physical
3726 * devices when MPI2_IOCPAGE8_IRFLAGS_LOW_VOLUME_MAPPING is set.
3727 */
3728 if (ioc->ir_firmware)
3729 return 1;
3730
3731 /* if no Bios, then we don't need to wait */
3732 if (!ioc->bios_pg3.BiosVersion)
3733 return 0;
3734
3735 /* Bios is present, then we drop down here.
3736 *
3737 * If there any entries in the Bios Page 2, then we wait
3738 * for discovery to complete.
3739 */
3740
3741 /* Current Boot Device */
3742 if ((ioc->bios_pg2.CurrentBootDeviceForm &
3743 MPI2_BIOSPAGE2_FORM_MASK) ==
3744 MPI2_BIOSPAGE2_FORM_NO_DEVICE_SPECIFIED &&
3745 /* Request Boot Device */
3746 (ioc->bios_pg2.ReqBootDeviceForm &
3747 MPI2_BIOSPAGE2_FORM_MASK) ==
3748 MPI2_BIOSPAGE2_FORM_NO_DEVICE_SPECIFIED &&
3749 /* Alternate Request Boot Device */
3750 (ioc->bios_pg2.ReqAltBootDeviceForm &
3751 MPI2_BIOSPAGE2_FORM_MASK) ==
3752 MPI2_BIOSPAGE2_FORM_NO_DEVICE_SPECIFIED)
3753 return 0;
3754
3755 return 1;
3756}
3757
3758
3759/**
3760 * _base_unmask_events - turn on notification for this event
3761 * @ioc: per adapter object
3762 * @event: firmware event
3763 *
3764 * The mask is stored in ioc->event_masks.
3765 */
3766static void
3767_base_unmask_events(struct MPT2SAS_ADAPTER *ioc, u16 event)
3768{
3769 u32 desired_event;
3770
3771 if (event >= 128)
3772 return;
3773
3774 desired_event = (1 << (event % 32));
3775
3776 if (event < 32)
3777 ioc->event_masks[0] &= ~desired_event;
3778 else if (event < 64)
3779 ioc->event_masks[1] &= ~desired_event;
3780 else if (event < 96)
3781 ioc->event_masks[2] &= ~desired_event;
3782 else if (event < 128)
3783 ioc->event_masks[3] &= ~desired_event;
3784}
3785
3786/**
3787 * _base_event_notification - send event notification
3788 * @ioc: per adapter object
3789 * @sleep_flag: CAN_SLEEP or NO_SLEEP
3790 *
3791 * Returns 0 for success, non-zero for failure.
3792 */
3793static int
3794_base_event_notification(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
3795{
3796 Mpi2EventNotificationRequest_t *mpi_request;
3797 unsigned long timeleft;
3798 u16 smid;
3799 int r = 0;
3800 int i;
3801
3802 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
3803 __func__));
3804
3805 if (ioc->base_cmds.status & MPT2_CMD_PENDING) {
3806 printk(MPT2SAS_ERR_FMT "%s: internal command already in use\n",
3807 ioc->name, __func__);
3808 return -EAGAIN;
3809 }
3810
3811 smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
3812 if (!smid) {
3813 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
3814 ioc->name, __func__);
3815 return -EAGAIN;
3816 }
3817 ioc->base_cmds.status = MPT2_CMD_PENDING;
3818 mpi_request = mpt2sas_base_get_msg_frame(ioc, smid);
3819 ioc->base_cmds.smid = smid;
3820 memset(mpi_request, 0, sizeof(Mpi2EventNotificationRequest_t));
3821 mpi_request->Function = MPI2_FUNCTION_EVENT_NOTIFICATION;
3822 mpi_request->VF_ID = 0; /* TODO */
3823 mpi_request->VP_ID = 0;
3824 for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++)
3825 mpi_request->EventMasks[i] =
3826 cpu_to_le32(ioc->event_masks[i]);
3827 init_completion(&ioc->base_cmds.done);
3828 mpt2sas_base_put_smid_default(ioc, smid);
3829 timeleft = wait_for_completion_timeout(&ioc->base_cmds.done, 30*HZ);
3830 if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
3831 printk(MPT2SAS_ERR_FMT "%s: timeout\n",
3832 ioc->name, __func__);
3833 _debug_dump_mf(mpi_request,
3834 sizeof(Mpi2EventNotificationRequest_t)/4);
3835 if (ioc->base_cmds.status & MPT2_CMD_RESET)
3836 r = -EFAULT;
3837 else
3838 r = -ETIME;
3839 } else
3840 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: complete\n",
3841 ioc->name, __func__));
3842 ioc->base_cmds.status = MPT2_CMD_NOT_USED;
3843 return r;
3844}
3845
3846/**
3847 * mpt2sas_base_validate_event_type - validating event types
3848 * @ioc: per adapter object
3849 * @event: firmware event
3850 *
3851 * This will turn on firmware event notification when application
3852 * ask for that event. We don't mask events that are already enabled.
3853 */
3854void
3855mpt2sas_base_validate_event_type(struct MPT2SAS_ADAPTER *ioc, u32 *event_type)
3856{
3857 int i, j;
3858 u32 event_mask, desired_event;
3859 u8 send_update_to_fw;
3860
3861 for (i = 0, send_update_to_fw = 0; i <
3862 MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++) {
3863 event_mask = ~event_type[i];
3864 desired_event = 1;
3865 for (j = 0; j < 32; j++) {
3866 if (!(event_mask & desired_event) &&
3867 (ioc->event_masks[i] & desired_event)) {
3868 ioc->event_masks[i] &= ~desired_event;
3869 send_update_to_fw = 1;
3870 }
3871 desired_event = (desired_event << 1);
3872 }
3873 }
3874
3875 if (!send_update_to_fw)
3876 return;
3877
3878 mutex_lock(&ioc->base_cmds.mutex);
3879 _base_event_notification(ioc, CAN_SLEEP);
3880 mutex_unlock(&ioc->base_cmds.mutex);
3881}
3882
3883/**
3884 * _base_diag_reset - the "big hammer" start of day reset
3885 * @ioc: per adapter object
3886 * @sleep_flag: CAN_SLEEP or NO_SLEEP
3887 *
3888 * Returns 0 for success, non-zero for failure.
3889 */
3890static int
3891_base_diag_reset(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
3892{
3893 u32 host_diagnostic;
3894 u32 ioc_state;
3895 u32 count;
3896 u32 hcb_size;
3897
3898 printk(MPT2SAS_INFO_FMT "sending diag reset !!\n", ioc->name);
3899 drsprintk(ioc, printk(MPT2SAS_INFO_FMT "clear interrupts\n",
3900 ioc->name));
3901
3902 count = 0;
3903 do {
3904 /* Write magic sequence to WriteSequence register
3905 * Loop until in diagnostic mode
3906 */
3907 drsprintk(ioc, printk(MPT2SAS_INFO_FMT "write magic "
3908 "sequence\n", ioc->name));
3909 writel(MPI2_WRSEQ_FLUSH_KEY_VALUE, &ioc->chip->WriteSequence);
3910 writel(MPI2_WRSEQ_1ST_KEY_VALUE, &ioc->chip->WriteSequence);
3911 writel(MPI2_WRSEQ_2ND_KEY_VALUE, &ioc->chip->WriteSequence);
3912 writel(MPI2_WRSEQ_3RD_KEY_VALUE, &ioc->chip->WriteSequence);
3913 writel(MPI2_WRSEQ_4TH_KEY_VALUE, &ioc->chip->WriteSequence);
3914 writel(MPI2_WRSEQ_5TH_KEY_VALUE, &ioc->chip->WriteSequence);
3915 writel(MPI2_WRSEQ_6TH_KEY_VALUE, &ioc->chip->WriteSequence);
3916
3917 /* wait 100 msec */
3918 if (sleep_flag == CAN_SLEEP)
3919 msleep(100);
3920 else
3921 mdelay(100);
3922
3923 if (count++ > 20)
3924 goto out;
3925
3926 host_diagnostic = readl(&ioc->chip->HostDiagnostic);
3927 drsprintk(ioc, printk(MPT2SAS_INFO_FMT "wrote magic "
3928 "sequence: count(%d), host_diagnostic(0x%08x)\n",
3929 ioc->name, count, host_diagnostic));
3930
3931 } while ((host_diagnostic & MPI2_DIAG_DIAG_WRITE_ENABLE) == 0);
3932
3933 hcb_size = readl(&ioc->chip->HCBSize);
3934
3935 drsprintk(ioc, printk(MPT2SAS_INFO_FMT "diag reset: issued\n",
3936 ioc->name));
3937 writel(host_diagnostic | MPI2_DIAG_RESET_ADAPTER,
3938 &ioc->chip->HostDiagnostic);
3939
3940 /* This delay allows the chip PCIe hardware time to finish reset tasks*/
3941 if (sleep_flag == CAN_SLEEP)
3942 msleep(MPI2_HARD_RESET_PCIE_FIRST_READ_DELAY_MICRO_SEC/1000);
3943 else
3944 mdelay(MPI2_HARD_RESET_PCIE_FIRST_READ_DELAY_MICRO_SEC/1000);
3945
3946 /* Approximately 300 second max wait */
3947 for (count = 0; count < (300000000 /
3948 MPI2_HARD_RESET_PCIE_SECOND_READ_DELAY_MICRO_SEC); count++) {
3949
3950 host_diagnostic = readl(&ioc->chip->HostDiagnostic);
3951
3952 if (host_diagnostic == 0xFFFFFFFF)
3953 goto out;
3954 if (!(host_diagnostic & MPI2_DIAG_RESET_ADAPTER))
3955 break;
3956
3957 /* Wait to pass the second read delay window */
3958 if (sleep_flag == CAN_SLEEP)
3959 msleep(MPI2_HARD_RESET_PCIE_SECOND_READ_DELAY_MICRO_SEC
3960 /1000);
3961 else
3962 mdelay(MPI2_HARD_RESET_PCIE_SECOND_READ_DELAY_MICRO_SEC
3963 /1000);
3964 }
3965
3966 if (host_diagnostic & MPI2_DIAG_HCB_MODE) {
3967
3968 drsprintk(ioc, printk(MPT2SAS_INFO_FMT "restart the adapter "
3969 "assuming the HCB Address points to good F/W\n",
3970 ioc->name));
3971 host_diagnostic &= ~MPI2_DIAG_BOOT_DEVICE_SELECT_MASK;
3972 host_diagnostic |= MPI2_DIAG_BOOT_DEVICE_SELECT_HCDW;
3973 writel(host_diagnostic, &ioc->chip->HostDiagnostic);
3974
3975 drsprintk(ioc, printk(MPT2SAS_INFO_FMT
3976 "re-enable the HCDW\n", ioc->name));
3977 writel(hcb_size | MPI2_HCB_SIZE_HCB_ENABLE,
3978 &ioc->chip->HCBSize);
3979 }
3980
3981 drsprintk(ioc, printk(MPT2SAS_INFO_FMT "restart the adapter\n",
3982 ioc->name));
3983 writel(host_diagnostic & ~MPI2_DIAG_HOLD_IOC_RESET,
3984 &ioc->chip->HostDiagnostic);
3985
3986 drsprintk(ioc, printk(MPT2SAS_INFO_FMT "disable writes to the "
3987 "diagnostic register\n", ioc->name));
3988 writel(MPI2_WRSEQ_FLUSH_KEY_VALUE, &ioc->chip->WriteSequence);
3989
3990 drsprintk(ioc, printk(MPT2SAS_INFO_FMT "Wait for FW to go to the "
3991 "READY state\n", ioc->name));
3992 ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_READY, 20,
3993 sleep_flag);
3994 if (ioc_state) {
3995 printk(MPT2SAS_ERR_FMT "%s: failed going to ready state "
3996 " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state);
3997 goto out;
3998 }
3999
4000 printk(MPT2SAS_INFO_FMT "diag reset: SUCCESS\n", ioc->name);
4001 return 0;
4002
4003 out:
4004 printk(MPT2SAS_ERR_FMT "diag reset: FAILED\n", ioc->name);
4005 return -EFAULT;
4006}
4007
4008/**
4009 * _base_make_ioc_ready - put controller in READY state
4010 * @ioc: per adapter object
4011 * @sleep_flag: CAN_SLEEP or NO_SLEEP
4012 * @type: FORCE_BIG_HAMMER or SOFT_RESET
4013 *
4014 * Returns 0 for success, non-zero for failure.
4015 */
4016static int
4017_base_make_ioc_ready(struct MPT2SAS_ADAPTER *ioc, int sleep_flag,
4018 enum reset_type type)
4019{
4020 u32 ioc_state;
4021 int rc;
4022
4023 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
4024 __func__));
4025
4026 if (ioc->pci_error_recovery)
4027 return 0;
4028
4029 ioc_state = mpt2sas_base_get_iocstate(ioc, 0);
4030 dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: ioc_state(0x%08x)\n",
4031 ioc->name, __func__, ioc_state));
4032
4033 if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_READY)
4034 return 0;
4035
4036 if (ioc_state & MPI2_DOORBELL_USED) {
4037 dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "unexpected doorbell "
4038 "active!\n", ioc->name));
4039 goto issue_diag_reset;
4040 }
4041
4042 if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) {
4043 mpt2sas_base_fault_info(ioc, ioc_state &
4044 MPI2_DOORBELL_DATA_MASK);
4045 goto issue_diag_reset;
4046 }
4047
4048 if (type == FORCE_BIG_HAMMER)
4049 goto issue_diag_reset;
4050
4051 if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_OPERATIONAL)
4052 if (!(_base_send_ioc_reset(ioc,
4053 MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET, 15, CAN_SLEEP))) {
4054 ioc->ioc_reset_count++;
4055 return 0;
4056 }
4057
4058 issue_diag_reset:
4059 rc = _base_diag_reset(ioc, CAN_SLEEP);
4060 ioc->ioc_reset_count++;
4061 return rc;
4062}
4063
4064/**
4065 * _base_make_ioc_operational - put controller in OPERATIONAL state
4066 * @ioc: per adapter object
4067 * @sleep_flag: CAN_SLEEP or NO_SLEEP
4068 *
4069 * Returns 0 for success, non-zero for failure.
4070 */
4071static int
4072_base_make_ioc_operational(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
4073{
4074 int r, i;
4075 unsigned long flags;
4076 u32 reply_address;
4077 u16 smid;
4078 struct _tr_list *delayed_tr, *delayed_tr_next;
4079 u8 hide_flag;
4080 struct adapter_reply_queue *reply_q;
4081 long reply_post_free;
4082 u32 reply_post_free_sz;
4083
4084 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
4085 __func__));
4086
4087 /* clean the delayed target reset list */
4088 list_for_each_entry_safe(delayed_tr, delayed_tr_next,
4089 &ioc->delayed_tr_list, list) {
4090 list_del(&delayed_tr->list);
4091 kfree(delayed_tr);
4092 }
4093
4094 list_for_each_entry_safe(delayed_tr, delayed_tr_next,
4095 &ioc->delayed_tr_volume_list, list) {
4096 list_del(&delayed_tr->list);
4097 kfree(delayed_tr);
4098 }
4099
4100 /* initialize the scsi lookup free list */
4101 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
4102 INIT_LIST_HEAD(&ioc->free_list);
4103 smid = 1;
4104 for (i = 0; i < ioc->scsiio_depth; i++, smid++) {
4105 INIT_LIST_HEAD(&ioc->scsi_lookup[i].chain_list);
4106 ioc->scsi_lookup[i].cb_idx = 0xFF;
4107 ioc->scsi_lookup[i].smid = smid;
4108 ioc->scsi_lookup[i].scmd = NULL;
4109 ioc->scsi_lookup[i].direct_io = 0;
4110 list_add_tail(&ioc->scsi_lookup[i].tracker_list,
4111 &ioc->free_list);
4112 }
4113
4114 /* hi-priority queue */
4115 INIT_LIST_HEAD(&ioc->hpr_free_list);
4116 smid = ioc->hi_priority_smid;
4117 for (i = 0; i < ioc->hi_priority_depth; i++, smid++) {
4118 ioc->hpr_lookup[i].cb_idx = 0xFF;
4119 ioc->hpr_lookup[i].smid = smid;
4120 list_add_tail(&ioc->hpr_lookup[i].tracker_list,
4121 &ioc->hpr_free_list);
4122 }
4123
4124 /* internal queue */
4125 INIT_LIST_HEAD(&ioc->internal_free_list);
4126 smid = ioc->internal_smid;
4127 for (i = 0; i < ioc->internal_depth; i++, smid++) {
4128 ioc->internal_lookup[i].cb_idx = 0xFF;
4129 ioc->internal_lookup[i].smid = smid;
4130 list_add_tail(&ioc->internal_lookup[i].tracker_list,
4131 &ioc->internal_free_list);
4132 }
4133
4134 /* chain pool */
4135 INIT_LIST_HEAD(&ioc->free_chain_list);
4136 for (i = 0; i < ioc->chain_depth; i++)
4137 list_add_tail(&ioc->chain_lookup[i].tracker_list,
4138 &ioc->free_chain_list);
4139
4140 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
4141
4142 /* initialize Reply Free Queue */
4143 for (i = 0, reply_address = (u32)ioc->reply_dma ;
4144 i < ioc->reply_free_queue_depth ; i++, reply_address +=
4145 ioc->reply_sz)
4146 ioc->reply_free[i] = cpu_to_le32(reply_address);
4147
4148 /* initialize reply queues */
4149 if (ioc->is_driver_loading)
4150 _base_assign_reply_queues(ioc);
4151
4152 /* initialize Reply Post Free Queue */
4153 reply_post_free = (long)ioc->reply_post_free;
4154 reply_post_free_sz = ioc->reply_post_queue_depth *
4155 sizeof(Mpi2DefaultReplyDescriptor_t);
4156 list_for_each_entry(reply_q, &ioc->reply_queue_list, list) {
4157 reply_q->reply_post_host_index = 0;
4158 reply_q->reply_post_free = (Mpi2ReplyDescriptorsUnion_t *)
4159 reply_post_free;
4160 for (i = 0; i < ioc->reply_post_queue_depth; i++)
4161 reply_q->reply_post_free[i].Words =
4162 cpu_to_le64(ULLONG_MAX);
4163 if (!_base_is_controller_msix_enabled(ioc))
4164 goto skip_init_reply_post_free_queue;
4165 reply_post_free += reply_post_free_sz;
4166 }
4167 skip_init_reply_post_free_queue:
4168
4169 r = _base_send_ioc_init(ioc, sleep_flag);
4170 if (r)
4171 return r;
4172
4173 /* initialize reply free host index */
4174 ioc->reply_free_host_index = ioc->reply_free_queue_depth - 1;
4175 writel(ioc->reply_free_host_index, &ioc->chip->ReplyFreeHostIndex);
4176
4177 /* initialize reply post host index */
4178 list_for_each_entry(reply_q, &ioc->reply_queue_list, list) {
4179 writel(reply_q->msix_index << MPI2_RPHI_MSIX_INDEX_SHIFT,
4180 &ioc->chip->ReplyPostHostIndex);
4181 if (!_base_is_controller_msix_enabled(ioc))
4182 goto skip_init_reply_post_host_index;
4183 }
4184
4185 skip_init_reply_post_host_index:
4186
4187 _base_unmask_interrupts(ioc);
4188
4189 r = _base_event_notification(ioc, sleep_flag);
4190 if (r)
4191 return r;
4192
4193 if (sleep_flag == CAN_SLEEP)
4194 _base_static_config_pages(ioc);
4195
4196
4197 if (ioc->is_driver_loading) {
4198 if (ioc->is_warpdrive && ioc->manu_pg10.OEMIdentifier
4199 == 0x80) {
4200 hide_flag = (u8) (
4201 le32_to_cpu(ioc->manu_pg10.OEMSpecificFlags0) &
4202 MFG_PAGE10_HIDE_SSDS_MASK);
4203 if (hide_flag != MFG_PAGE10_HIDE_SSDS_MASK)
4204 ioc->mfg_pg10_hide_flag = hide_flag;
4205 }
4206 ioc->wait_for_discovery_to_complete =
4207 _base_determine_wait_on_discovery(ioc);
4208 return r; /* scan_start and scan_finished support */
4209 }
4210 r = _base_send_port_enable(ioc, sleep_flag);
4211 if (r)
4212 return r;
4213
4214 return r;
4215}
4216
4217/**
4218 * mpt2sas_base_free_resources - free resources controller resources (io/irq/memap)
4219 * @ioc: per adapter object
4220 *
4221 * Return nothing.
4222 */
4223void
4224mpt2sas_base_free_resources(struct MPT2SAS_ADAPTER *ioc)
4225{
4226 struct pci_dev *pdev = ioc->pdev;
4227
4228 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
4229 __func__));
4230
4231 if (ioc->chip_phys && ioc->chip) {
4232 _base_mask_interrupts(ioc);
4233 ioc->shost_recovery = 1;
4234 _base_make_ioc_ready(ioc, CAN_SLEEP, SOFT_RESET);
4235 ioc->shost_recovery = 0;
4236 }
4237
4238 _base_free_irq(ioc);
4239 _base_disable_msix(ioc);
4240
4241 if (ioc->chip_phys && ioc->chip)
4242 iounmap(ioc->chip);
4243 ioc->chip_phys = 0;
4244
4245 if (pci_is_enabled(pdev)) {
4246 pci_release_selected_regions(ioc->pdev, ioc->bars);
4247 pci_disable_pcie_error_reporting(pdev);
4248 pci_disable_device(pdev);
4249 }
4250 return;
4251}
4252
4253/**
4254 * mpt2sas_base_attach - attach controller instance
4255 * @ioc: per adapter object
4256 *
4257 * Returns 0 for success, non-zero for failure.
4258 */
4259int
4260mpt2sas_base_attach(struct MPT2SAS_ADAPTER *ioc)
4261{
4262 int r, i;
4263 int cpu_id, last_cpu_id = 0;
4264
4265 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
4266 __func__));
4267
4268 /* setup cpu_msix_table */
4269 ioc->cpu_count = num_online_cpus();
4270 for_each_online_cpu(cpu_id)
4271 last_cpu_id = cpu_id;
4272 ioc->cpu_msix_table_sz = last_cpu_id + 1;
4273 ioc->cpu_msix_table = kzalloc(ioc->cpu_msix_table_sz, GFP_KERNEL);
4274 ioc->reply_queue_count = 1;
4275 if (!ioc->cpu_msix_table) {
4276 dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "allocation for "
4277 "cpu_msix_table failed!!!\n", ioc->name));
4278 r = -ENOMEM;
4279 goto out_free_resources;
4280 }
4281
4282 if (ioc->is_warpdrive) {
4283 ioc->reply_post_host_index = kcalloc(ioc->cpu_msix_table_sz,
4284 sizeof(resource_size_t *), GFP_KERNEL);
4285 if (!ioc->reply_post_host_index) {
4286 dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "allocation "
4287 "for cpu_msix_table failed!!!\n", ioc->name));
4288 r = -ENOMEM;
4289 goto out_free_resources;
4290 }
4291 }
4292
4293 r = mpt2sas_base_map_resources(ioc);
4294 if (r)
4295 goto out_free_resources;
4296
4297 if (ioc->is_warpdrive) {
4298 ioc->reply_post_host_index[0] =
4299 (resource_size_t *)&ioc->chip->ReplyPostHostIndex;
4300
4301 for (i = 1; i < ioc->cpu_msix_table_sz; i++)
4302 ioc->reply_post_host_index[i] = (resource_size_t *)
4303 ((u8 *)&ioc->chip->Doorbell + (0x4000 + ((i - 1)
4304 * 4)));
4305 }
4306
4307 pci_set_drvdata(ioc->pdev, ioc->shost);
4308 r = _base_get_ioc_facts(ioc, CAN_SLEEP);
4309 if (r)
4310 goto out_free_resources;
4311
4312 r = _base_make_ioc_ready(ioc, CAN_SLEEP, SOFT_RESET);
4313 if (r)
4314 goto out_free_resources;
4315
4316 ioc->pfacts = kcalloc(ioc->facts.NumberOfPorts,
4317 sizeof(struct mpt2sas_port_facts), GFP_KERNEL);
4318 if (!ioc->pfacts) {
4319 r = -ENOMEM;
4320 goto out_free_resources;
4321 }
4322
4323 for (i = 0 ; i < ioc->facts.NumberOfPorts; i++) {
4324 r = _base_get_port_facts(ioc, i, CAN_SLEEP);
4325 if (r)
4326 goto out_free_resources;
4327 }
4328
4329 r = _base_allocate_memory_pools(ioc, CAN_SLEEP);
4330 if (r)
4331 goto out_free_resources;
4332
4333 init_waitqueue_head(&ioc->reset_wq);
4334 /* allocate memory pd handle bitmask list */
4335 ioc->pd_handles_sz = (ioc->facts.MaxDevHandle / 8);
4336 if (ioc->facts.MaxDevHandle % 8)
4337 ioc->pd_handles_sz++;
4338 ioc->pd_handles = kzalloc(ioc->pd_handles_sz,
4339 GFP_KERNEL);
4340 if (!ioc->pd_handles) {
4341 r = -ENOMEM;
4342 goto out_free_resources;
4343 }
4344 ioc->blocking_handles = kzalloc(ioc->pd_handles_sz,
4345 GFP_KERNEL);
4346 if (!ioc->blocking_handles) {
4347 r = -ENOMEM;
4348 goto out_free_resources;
4349 }
4350 ioc->fwfault_debug = mpt2sas_fwfault_debug;
4351
4352 /* base internal command bits */
4353 mutex_init(&ioc->base_cmds.mutex);
4354 ioc->base_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
4355 ioc->base_cmds.status = MPT2_CMD_NOT_USED;
4356
4357 /* port_enable command bits */
4358 ioc->port_enable_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
4359 ioc->port_enable_cmds.status = MPT2_CMD_NOT_USED;
4360
4361 /* transport internal command bits */
4362 ioc->transport_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
4363 ioc->transport_cmds.status = MPT2_CMD_NOT_USED;
4364 mutex_init(&ioc->transport_cmds.mutex);
4365
4366 /* scsih internal command bits */
4367 ioc->scsih_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
4368 ioc->scsih_cmds.status = MPT2_CMD_NOT_USED;
4369 mutex_init(&ioc->scsih_cmds.mutex);
4370
4371 /* task management internal command bits */
4372 ioc->tm_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
4373 ioc->tm_cmds.status = MPT2_CMD_NOT_USED;
4374 mutex_init(&ioc->tm_cmds.mutex);
4375
4376 /* config page internal command bits */
4377 ioc->config_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
4378 ioc->config_cmds.status = MPT2_CMD_NOT_USED;
4379 mutex_init(&ioc->config_cmds.mutex);
4380
4381 /* ctl module internal command bits */
4382 ioc->ctl_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
4383 ioc->ctl_cmds.sense = kzalloc(SCSI_SENSE_BUFFERSIZE, GFP_KERNEL);
4384 ioc->ctl_cmds.status = MPT2_CMD_NOT_USED;
4385 mutex_init(&ioc->ctl_cmds.mutex);
4386
4387 if (!ioc->base_cmds.reply || !ioc->transport_cmds.reply ||
4388 !ioc->scsih_cmds.reply || !ioc->tm_cmds.reply ||
4389 !ioc->config_cmds.reply || !ioc->ctl_cmds.reply ||
4390 !ioc->ctl_cmds.sense) {
4391 r = -ENOMEM;
4392 goto out_free_resources;
4393 }
4394
4395 if (!ioc->base_cmds.reply || !ioc->transport_cmds.reply ||
4396 !ioc->scsih_cmds.reply || !ioc->tm_cmds.reply ||
4397 !ioc->config_cmds.reply || !ioc->ctl_cmds.reply) {
4398 r = -ENOMEM;
4399 goto out_free_resources;
4400 }
4401
4402 for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++)
4403 ioc->event_masks[i] = -1;
4404
4405 /* here we enable the events we care about */
4406 _base_unmask_events(ioc, MPI2_EVENT_SAS_DISCOVERY);
4407 _base_unmask_events(ioc, MPI2_EVENT_SAS_BROADCAST_PRIMITIVE);
4408 _base_unmask_events(ioc, MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST);
4409 _base_unmask_events(ioc, MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE);
4410 _base_unmask_events(ioc, MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE);
4411 _base_unmask_events(ioc, MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST);
4412 _base_unmask_events(ioc, MPI2_EVENT_IR_VOLUME);
4413 _base_unmask_events(ioc, MPI2_EVENT_IR_PHYSICAL_DISK);
4414 _base_unmask_events(ioc, MPI2_EVENT_IR_OPERATION_STATUS);
4415 _base_unmask_events(ioc, MPI2_EVENT_LOG_ENTRY_ADDED);
4416 r = _base_make_ioc_operational(ioc, CAN_SLEEP);
4417 if (r)
4418 goto out_free_resources;
4419
4420 ioc->non_operational_loop = 0;
4421
4422 return 0;
4423
4424 out_free_resources:
4425
4426 ioc->remove_host = 1;
4427 mpt2sas_base_free_resources(ioc);
4428 _base_release_memory_pools(ioc);
4429 pci_set_drvdata(ioc->pdev, NULL);
4430 kfree(ioc->cpu_msix_table);
4431 if (ioc->is_warpdrive)
4432 kfree(ioc->reply_post_host_index);
4433 kfree(ioc->pd_handles);
4434 kfree(ioc->blocking_handles);
4435 kfree(ioc->tm_cmds.reply);
4436 kfree(ioc->transport_cmds.reply);
4437 kfree(ioc->scsih_cmds.reply);
4438 kfree(ioc->config_cmds.reply);
4439 kfree(ioc->base_cmds.reply);
4440 kfree(ioc->port_enable_cmds.reply);
4441 kfree(ioc->ctl_cmds.reply);
4442 kfree(ioc->ctl_cmds.sense);
4443 kfree(ioc->pfacts);
4444 ioc->ctl_cmds.reply = NULL;
4445 ioc->base_cmds.reply = NULL;
4446 ioc->tm_cmds.reply = NULL;
4447 ioc->scsih_cmds.reply = NULL;
4448 ioc->transport_cmds.reply = NULL;
4449 ioc->config_cmds.reply = NULL;
4450 ioc->pfacts = NULL;
4451 return r;
4452}
4453
4454
4455/**
4456 * mpt2sas_base_detach - remove controller instance
4457 * @ioc: per adapter object
4458 *
4459 * Return nothing.
4460 */
4461void
4462mpt2sas_base_detach(struct MPT2SAS_ADAPTER *ioc)
4463{
4464
4465 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
4466 __func__));
4467
4468 mpt2sas_base_stop_watchdog(ioc);
4469 mpt2sas_base_free_resources(ioc);
4470 _base_release_memory_pools(ioc);
4471 pci_set_drvdata(ioc->pdev, NULL);
4472 kfree(ioc->cpu_msix_table);
4473 if (ioc->is_warpdrive)
4474 kfree(ioc->reply_post_host_index);
4475 kfree(ioc->pd_handles);
4476 kfree(ioc->blocking_handles);
4477 kfree(ioc->pfacts);
4478 kfree(ioc->ctl_cmds.reply);
4479 kfree(ioc->ctl_cmds.sense);
4480 kfree(ioc->base_cmds.reply);
4481 kfree(ioc->port_enable_cmds.reply);
4482 kfree(ioc->tm_cmds.reply);
4483 kfree(ioc->transport_cmds.reply);
4484 kfree(ioc->scsih_cmds.reply);
4485 kfree(ioc->config_cmds.reply);
4486}
4487
4488/**
4489 * _base_reset_handler - reset callback handler (for base)
4490 * @ioc: per adapter object
4491 * @reset_phase: phase
4492 *
4493 * The handler for doing any required cleanup or initialization.
4494 *
4495 * The reset phase can be MPT2_IOC_PRE_RESET, MPT2_IOC_AFTER_RESET,
4496 * MPT2_IOC_DONE_RESET
4497 *
4498 * Return nothing.
4499 */
4500static void
4501_base_reset_handler(struct MPT2SAS_ADAPTER *ioc, int reset_phase)
4502{
4503 mpt2sas_scsih_reset_handler(ioc, reset_phase);
4504 mpt2sas_ctl_reset_handler(ioc, reset_phase);
4505 switch (reset_phase) {
4506 case MPT2_IOC_PRE_RESET:
4507 dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
4508 "MPT2_IOC_PRE_RESET\n", ioc->name, __func__));
4509 break;
4510 case MPT2_IOC_AFTER_RESET:
4511 dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
4512 "MPT2_IOC_AFTER_RESET\n", ioc->name, __func__));
4513 if (ioc->transport_cmds.status & MPT2_CMD_PENDING) {
4514 ioc->transport_cmds.status |= MPT2_CMD_RESET;
4515 mpt2sas_base_free_smid(ioc, ioc->transport_cmds.smid);
4516 complete(&ioc->transport_cmds.done);
4517 }
4518 if (ioc->base_cmds.status & MPT2_CMD_PENDING) {
4519 ioc->base_cmds.status |= MPT2_CMD_RESET;
4520 mpt2sas_base_free_smid(ioc, ioc->base_cmds.smid);
4521 complete(&ioc->base_cmds.done);
4522 }
4523 if (ioc->port_enable_cmds.status & MPT2_CMD_PENDING) {
4524 ioc->port_enable_failed = 1;
4525 ioc->port_enable_cmds.status |= MPT2_CMD_RESET;
4526 mpt2sas_base_free_smid(ioc, ioc->port_enable_cmds.smid);
4527 if (ioc->is_driver_loading) {
4528 ioc->start_scan_failed =
4529 MPI2_IOCSTATUS_INTERNAL_ERROR;
4530 ioc->start_scan = 0;
4531 ioc->port_enable_cmds.status =
4532 MPT2_CMD_NOT_USED;
4533 } else
4534 complete(&ioc->port_enable_cmds.done);
4535
4536 }
4537 if (ioc->config_cmds.status & MPT2_CMD_PENDING) {
4538 ioc->config_cmds.status |= MPT2_CMD_RESET;
4539 mpt2sas_base_free_smid(ioc, ioc->config_cmds.smid);
4540 ioc->config_cmds.smid = USHRT_MAX;
4541 complete(&ioc->config_cmds.done);
4542 }
4543 break;
4544 case MPT2_IOC_DONE_RESET:
4545 dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
4546 "MPT2_IOC_DONE_RESET\n", ioc->name, __func__));
4547 break;
4548 }
4549}
4550
4551/**
4552 * _wait_for_commands_to_complete - reset controller
4553 * @ioc: Pointer to MPT_ADAPTER structure
4554 * @sleep_flag: CAN_SLEEP or NO_SLEEP
4555 *
4556 * This function waiting(3s) for all pending commands to complete
4557 * prior to putting controller in reset.
4558 */
4559static void
4560_wait_for_commands_to_complete(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
4561{
4562 u32 ioc_state;
4563 unsigned long flags;
4564 u16 i;
4565
4566 ioc->pending_io_count = 0;
4567 if (sleep_flag != CAN_SLEEP)
4568 return;
4569
4570 ioc_state = mpt2sas_base_get_iocstate(ioc, 0);
4571 if ((ioc_state & MPI2_IOC_STATE_MASK) != MPI2_IOC_STATE_OPERATIONAL)
4572 return;
4573
4574 /* pending command count */
4575 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
4576 for (i = 0; i < ioc->scsiio_depth; i++)
4577 if (ioc->scsi_lookup[i].cb_idx != 0xFF)
4578 ioc->pending_io_count++;
4579 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
4580
4581 if (!ioc->pending_io_count)
4582 return;
4583
4584 /* wait for pending commands to complete */
4585 wait_event_timeout(ioc->reset_wq, ioc->pending_io_count == 0, 10 * HZ);
4586}
4587
4588/**
4589 * mpt2sas_base_hard_reset_handler - reset controller
4590 * @ioc: Pointer to MPT_ADAPTER structure
4591 * @sleep_flag: CAN_SLEEP or NO_SLEEP
4592 * @type: FORCE_BIG_HAMMER or SOFT_RESET
4593 *
4594 * Returns 0 for success, non-zero for failure.
4595 */
4596int
4597mpt2sas_base_hard_reset_handler(struct MPT2SAS_ADAPTER *ioc, int sleep_flag,
4598 enum reset_type type)
4599{
4600 int r;
4601 unsigned long flags;
4602
4603 dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: enter\n", ioc->name,
4604 __func__));
4605
4606 if (ioc->pci_error_recovery) {
4607 printk(MPT2SAS_ERR_FMT "%s: pci error recovery reset\n",
4608 ioc->name, __func__);
4609 r = 0;
4610 goto out_unlocked;
4611 }
4612
4613 if (mpt2sas_fwfault_debug)
4614 mpt2sas_halt_firmware(ioc);
4615
4616 /* TODO - What we really should be doing is pulling
4617 * out all the code associated with NO_SLEEP; its never used.
4618 * That is legacy code from mpt fusion driver, ported over.
4619 * I will leave this BUG_ON here for now till its been resolved.
4620 */
4621 BUG_ON(sleep_flag == NO_SLEEP);
4622
4623 /* wait for an active reset in progress to complete */
4624 if (!mutex_trylock(&ioc->reset_in_progress_mutex)) {
4625 do {
4626 ssleep(1);
4627 } while (ioc->shost_recovery == 1);
4628 dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: exit\n", ioc->name,
4629 __func__));
4630 return ioc->ioc_reset_in_progress_status;
4631 }
4632
4633 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
4634 ioc->shost_recovery = 1;
4635 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
4636
4637 _base_reset_handler(ioc, MPT2_IOC_PRE_RESET);
4638 _wait_for_commands_to_complete(ioc, sleep_flag);
4639 _base_mask_interrupts(ioc);
4640 r = _base_make_ioc_ready(ioc, sleep_flag, type);
4641 if (r)
4642 goto out;
4643 _base_reset_handler(ioc, MPT2_IOC_AFTER_RESET);
4644
4645 /* If this hard reset is called while port enable is active, then
4646 * there is no reason to call make_ioc_operational
4647 */
4648 if (ioc->is_driver_loading && ioc->port_enable_failed) {
4649 ioc->remove_host = 1;
4650 r = -EFAULT;
4651 goto out;
4652 }
4653 r = _base_make_ioc_operational(ioc, sleep_flag);
4654 if (!r)
4655 _base_reset_handler(ioc, MPT2_IOC_DONE_RESET);
4656 out:
4657 dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: %s\n",
4658 ioc->name, __func__, ((r == 0) ? "SUCCESS" : "FAILED")));
4659
4660 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
4661 ioc->ioc_reset_in_progress_status = r;
4662 ioc->shost_recovery = 0;
4663 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
4664 mutex_unlock(&ioc->reset_in_progress_mutex);
4665
4666 out_unlocked:
4667 dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: exit\n", ioc->name,
4668 __func__));
4669 return r;
4670}