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1/*
2 * AT86RF230/RF231 driver
3 *
4 * Copyright (C) 2009-2012 Siemens AG
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2
8 * as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License along
16 * with this program; if not, write to the Free Software Foundation, Inc.,
17 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Written by:
20 * Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>
21 * Alexander Smirnov <alex.bluesman.smirnov@gmail.com>
22 */
23#include <linux/kernel.h>
24#include <linux/module.h>
25#include <linux/interrupt.h>
26#include <linux/gpio.h>
27#include <linux/delay.h>
28#include <linux/mutex.h>
29#include <linux/workqueue.h>
30#include <linux/spinlock.h>
31#include <linux/spi/spi.h>
32#include <linux/spi/at86rf230.h>
33#include <linux/skbuff.h>
34#include <linux/of_gpio.h>
35
36#include <net/mac802154.h>
37#include <net/wpan-phy.h>
38
39struct at86rf230_local {
40 struct spi_device *spi;
41
42 u8 part;
43 u8 vers;
44
45 u8 buf[2];
46 struct mutex bmux;
47
48 struct work_struct irqwork;
49 struct completion tx_complete;
50
51 struct ieee802154_dev *dev;
52
53 spinlock_t lock;
54 bool irq_busy;
55 bool is_tx;
56 bool tx_aret;
57
58 int rssi_base_val;
59};
60
61static bool is_rf212(struct at86rf230_local *local)
62{
63 return local->part == 7;
64}
65
66#define RG_TRX_STATUS (0x01)
67#define SR_TRX_STATUS 0x01, 0x1f, 0
68#define SR_RESERVED_01_3 0x01, 0x20, 5
69#define SR_CCA_STATUS 0x01, 0x40, 6
70#define SR_CCA_DONE 0x01, 0x80, 7
71#define RG_TRX_STATE (0x02)
72#define SR_TRX_CMD 0x02, 0x1f, 0
73#define SR_TRAC_STATUS 0x02, 0xe0, 5
74#define RG_TRX_CTRL_0 (0x03)
75#define SR_CLKM_CTRL 0x03, 0x07, 0
76#define SR_CLKM_SHA_SEL 0x03, 0x08, 3
77#define SR_PAD_IO_CLKM 0x03, 0x30, 4
78#define SR_PAD_IO 0x03, 0xc0, 6
79#define RG_TRX_CTRL_1 (0x04)
80#define SR_IRQ_POLARITY 0x04, 0x01, 0
81#define SR_IRQ_MASK_MODE 0x04, 0x02, 1
82#define SR_SPI_CMD_MODE 0x04, 0x0c, 2
83#define SR_RX_BL_CTRL 0x04, 0x10, 4
84#define SR_TX_AUTO_CRC_ON 0x04, 0x20, 5
85#define SR_IRQ_2_EXT_EN 0x04, 0x40, 6
86#define SR_PA_EXT_EN 0x04, 0x80, 7
87#define RG_PHY_TX_PWR (0x05)
88#define SR_TX_PWR 0x05, 0x0f, 0
89#define SR_PA_LT 0x05, 0x30, 4
90#define SR_PA_BUF_LT 0x05, 0xc0, 6
91#define RG_PHY_RSSI (0x06)
92#define SR_RSSI 0x06, 0x1f, 0
93#define SR_RND_VALUE 0x06, 0x60, 5
94#define SR_RX_CRC_VALID 0x06, 0x80, 7
95#define RG_PHY_ED_LEVEL (0x07)
96#define SR_ED_LEVEL 0x07, 0xff, 0
97#define RG_PHY_CC_CCA (0x08)
98#define SR_CHANNEL 0x08, 0x1f, 0
99#define SR_CCA_MODE 0x08, 0x60, 5
100#define SR_CCA_REQUEST 0x08, 0x80, 7
101#define RG_CCA_THRES (0x09)
102#define SR_CCA_ED_THRES 0x09, 0x0f, 0
103#define SR_RESERVED_09_1 0x09, 0xf0, 4
104#define RG_RX_CTRL (0x0a)
105#define SR_PDT_THRES 0x0a, 0x0f, 0
106#define SR_RESERVED_0a_1 0x0a, 0xf0, 4
107#define RG_SFD_VALUE (0x0b)
108#define SR_SFD_VALUE 0x0b, 0xff, 0
109#define RG_TRX_CTRL_2 (0x0c)
110#define SR_OQPSK_DATA_RATE 0x0c, 0x03, 0
111#define SR_SUB_MODE 0x0c, 0x04, 2
112#define SR_BPSK_QPSK 0x0c, 0x08, 3
113#define SR_OQPSK_SUB1_RC_EN 0x0c, 0x10, 4
114#define SR_RESERVED_0c_5 0x0c, 0x60, 5
115#define SR_RX_SAFE_MODE 0x0c, 0x80, 7
116#define RG_ANT_DIV (0x0d)
117#define SR_ANT_CTRL 0x0d, 0x03, 0
118#define SR_ANT_EXT_SW_EN 0x0d, 0x04, 2
119#define SR_ANT_DIV_EN 0x0d, 0x08, 3
120#define SR_RESERVED_0d_2 0x0d, 0x70, 4
121#define SR_ANT_SEL 0x0d, 0x80, 7
122#define RG_IRQ_MASK (0x0e)
123#define SR_IRQ_MASK 0x0e, 0xff, 0
124#define RG_IRQ_STATUS (0x0f)
125#define SR_IRQ_0_PLL_LOCK 0x0f, 0x01, 0
126#define SR_IRQ_1_PLL_UNLOCK 0x0f, 0x02, 1
127#define SR_IRQ_2_RX_START 0x0f, 0x04, 2
128#define SR_IRQ_3_TRX_END 0x0f, 0x08, 3
129#define SR_IRQ_4_CCA_ED_DONE 0x0f, 0x10, 4
130#define SR_IRQ_5_AMI 0x0f, 0x20, 5
131#define SR_IRQ_6_TRX_UR 0x0f, 0x40, 6
132#define SR_IRQ_7_BAT_LOW 0x0f, 0x80, 7
133#define RG_VREG_CTRL (0x10)
134#define SR_RESERVED_10_6 0x10, 0x03, 0
135#define SR_DVDD_OK 0x10, 0x04, 2
136#define SR_DVREG_EXT 0x10, 0x08, 3
137#define SR_RESERVED_10_3 0x10, 0x30, 4
138#define SR_AVDD_OK 0x10, 0x40, 6
139#define SR_AVREG_EXT 0x10, 0x80, 7
140#define RG_BATMON (0x11)
141#define SR_BATMON_VTH 0x11, 0x0f, 0
142#define SR_BATMON_HR 0x11, 0x10, 4
143#define SR_BATMON_OK 0x11, 0x20, 5
144#define SR_RESERVED_11_1 0x11, 0xc0, 6
145#define RG_XOSC_CTRL (0x12)
146#define SR_XTAL_TRIM 0x12, 0x0f, 0
147#define SR_XTAL_MODE 0x12, 0xf0, 4
148#define RG_RX_SYN (0x15)
149#define SR_RX_PDT_LEVEL 0x15, 0x0f, 0
150#define SR_RESERVED_15_2 0x15, 0x70, 4
151#define SR_RX_PDT_DIS 0x15, 0x80, 7
152#define RG_XAH_CTRL_1 (0x17)
153#define SR_RESERVED_17_8 0x17, 0x01, 0
154#define SR_AACK_PROM_MODE 0x17, 0x02, 1
155#define SR_AACK_ACK_TIME 0x17, 0x04, 2
156#define SR_RESERVED_17_5 0x17, 0x08, 3
157#define SR_AACK_UPLD_RES_FT 0x17, 0x10, 4
158#define SR_AACK_FLTR_RES_FT 0x17, 0x20, 5
159#define SR_CSMA_LBT_MODE 0x17, 0x40, 6
160#define SR_RESERVED_17_1 0x17, 0x80, 7
161#define RG_FTN_CTRL (0x18)
162#define SR_RESERVED_18_2 0x18, 0x7f, 0
163#define SR_FTN_START 0x18, 0x80, 7
164#define RG_PLL_CF (0x1a)
165#define SR_RESERVED_1a_2 0x1a, 0x7f, 0
166#define SR_PLL_CF_START 0x1a, 0x80, 7
167#define RG_PLL_DCU (0x1b)
168#define SR_RESERVED_1b_3 0x1b, 0x3f, 0
169#define SR_RESERVED_1b_2 0x1b, 0x40, 6
170#define SR_PLL_DCU_START 0x1b, 0x80, 7
171#define RG_PART_NUM (0x1c)
172#define SR_PART_NUM 0x1c, 0xff, 0
173#define RG_VERSION_NUM (0x1d)
174#define SR_VERSION_NUM 0x1d, 0xff, 0
175#define RG_MAN_ID_0 (0x1e)
176#define SR_MAN_ID_0 0x1e, 0xff, 0
177#define RG_MAN_ID_1 (0x1f)
178#define SR_MAN_ID_1 0x1f, 0xff, 0
179#define RG_SHORT_ADDR_0 (0x20)
180#define SR_SHORT_ADDR_0 0x20, 0xff, 0
181#define RG_SHORT_ADDR_1 (0x21)
182#define SR_SHORT_ADDR_1 0x21, 0xff, 0
183#define RG_PAN_ID_0 (0x22)
184#define SR_PAN_ID_0 0x22, 0xff, 0
185#define RG_PAN_ID_1 (0x23)
186#define SR_PAN_ID_1 0x23, 0xff, 0
187#define RG_IEEE_ADDR_0 (0x24)
188#define SR_IEEE_ADDR_0 0x24, 0xff, 0
189#define RG_IEEE_ADDR_1 (0x25)
190#define SR_IEEE_ADDR_1 0x25, 0xff, 0
191#define RG_IEEE_ADDR_2 (0x26)
192#define SR_IEEE_ADDR_2 0x26, 0xff, 0
193#define RG_IEEE_ADDR_3 (0x27)
194#define SR_IEEE_ADDR_3 0x27, 0xff, 0
195#define RG_IEEE_ADDR_4 (0x28)
196#define SR_IEEE_ADDR_4 0x28, 0xff, 0
197#define RG_IEEE_ADDR_5 (0x29)
198#define SR_IEEE_ADDR_5 0x29, 0xff, 0
199#define RG_IEEE_ADDR_6 (0x2a)
200#define SR_IEEE_ADDR_6 0x2a, 0xff, 0
201#define RG_IEEE_ADDR_7 (0x2b)
202#define SR_IEEE_ADDR_7 0x2b, 0xff, 0
203#define RG_XAH_CTRL_0 (0x2c)
204#define SR_SLOTTED_OPERATION 0x2c, 0x01, 0
205#define SR_MAX_CSMA_RETRIES 0x2c, 0x0e, 1
206#define SR_MAX_FRAME_RETRIES 0x2c, 0xf0, 4
207#define RG_CSMA_SEED_0 (0x2d)
208#define SR_CSMA_SEED_0 0x2d, 0xff, 0
209#define RG_CSMA_SEED_1 (0x2e)
210#define SR_CSMA_SEED_1 0x2e, 0x07, 0
211#define SR_AACK_I_AM_COORD 0x2e, 0x08, 3
212#define SR_AACK_DIS_ACK 0x2e, 0x10, 4
213#define SR_AACK_SET_PD 0x2e, 0x20, 5
214#define SR_AACK_FVN_MODE 0x2e, 0xc0, 6
215#define RG_CSMA_BE (0x2f)
216#define SR_MIN_BE 0x2f, 0x0f, 0
217#define SR_MAX_BE 0x2f, 0xf0, 4
218
219#define CMD_REG 0x80
220#define CMD_REG_MASK 0x3f
221#define CMD_WRITE 0x40
222#define CMD_FB 0x20
223
224#define IRQ_BAT_LOW (1 << 7)
225#define IRQ_TRX_UR (1 << 6)
226#define IRQ_AMI (1 << 5)
227#define IRQ_CCA_ED (1 << 4)
228#define IRQ_TRX_END (1 << 3)
229#define IRQ_RX_START (1 << 2)
230#define IRQ_PLL_UNL (1 << 1)
231#define IRQ_PLL_LOCK (1 << 0)
232
233#define IRQ_ACTIVE_HIGH 0
234#define IRQ_ACTIVE_LOW 1
235
236#define STATE_P_ON 0x00 /* BUSY */
237#define STATE_BUSY_RX 0x01
238#define STATE_BUSY_TX 0x02
239#define STATE_FORCE_TRX_OFF 0x03
240#define STATE_FORCE_TX_ON 0x04 /* IDLE */
241/* 0x05 */ /* INVALID_PARAMETER */
242#define STATE_RX_ON 0x06
243/* 0x07 */ /* SUCCESS */
244#define STATE_TRX_OFF 0x08
245#define STATE_TX_ON 0x09
246/* 0x0a - 0x0e */ /* 0x0a - UNSUPPORTED_ATTRIBUTE */
247#define STATE_SLEEP 0x0F
248#define STATE_PREP_DEEP_SLEEP 0x10
249#define STATE_BUSY_RX_AACK 0x11
250#define STATE_BUSY_TX_ARET 0x12
251#define STATE_RX_AACK_ON 0x16
252#define STATE_TX_ARET_ON 0x19
253#define STATE_RX_ON_NOCLK 0x1C
254#define STATE_RX_AACK_ON_NOCLK 0x1D
255#define STATE_BUSY_RX_AACK_NOCLK 0x1E
256#define STATE_TRANSITION_IN_PROGRESS 0x1F
257
258static int
259__at86rf230_detect_device(struct spi_device *spi, u16 *man_id, u8 *part,
260 u8 *version)
261{
262 u8 data[4];
263 u8 *buf = kmalloc(2, GFP_KERNEL);
264 int status;
265 struct spi_message msg;
266 struct spi_transfer xfer = {
267 .len = 2,
268 .tx_buf = buf,
269 .rx_buf = buf,
270 };
271 u8 reg;
272
273 if (!buf)
274 return -ENOMEM;
275
276 for (reg = RG_PART_NUM; reg <= RG_MAN_ID_1; reg++) {
277 buf[0] = (reg & CMD_REG_MASK) | CMD_REG;
278 buf[1] = 0xff;
279 dev_vdbg(&spi->dev, "buf[0] = %02x\n", buf[0]);
280 spi_message_init(&msg);
281 spi_message_add_tail(&xfer, &msg);
282
283 status = spi_sync(spi, &msg);
284 dev_vdbg(&spi->dev, "status = %d\n", status);
285 if (msg.status)
286 status = msg.status;
287
288 dev_vdbg(&spi->dev, "status = %d\n", status);
289 dev_vdbg(&spi->dev, "buf[0] = %02x\n", buf[0]);
290 dev_vdbg(&spi->dev, "buf[1] = %02x\n", buf[1]);
291
292 if (status == 0)
293 data[reg - RG_PART_NUM] = buf[1];
294 else
295 break;
296 }
297
298 if (status == 0) {
299 *part = data[0];
300 *version = data[1];
301 *man_id = (data[3] << 8) | data[2];
302 }
303
304 kfree(buf);
305
306 return status;
307}
308
309static int
310__at86rf230_write(struct at86rf230_local *lp, u8 addr, u8 data)
311{
312 u8 *buf = lp->buf;
313 int status;
314 struct spi_message msg;
315 struct spi_transfer xfer = {
316 .len = 2,
317 .tx_buf = buf,
318 };
319
320 buf[0] = (addr & CMD_REG_MASK) | CMD_REG | CMD_WRITE;
321 buf[1] = data;
322 dev_vdbg(&lp->spi->dev, "buf[0] = %02x\n", buf[0]);
323 dev_vdbg(&lp->spi->dev, "buf[1] = %02x\n", buf[1]);
324 spi_message_init(&msg);
325 spi_message_add_tail(&xfer, &msg);
326
327 status = spi_sync(lp->spi, &msg);
328 dev_vdbg(&lp->spi->dev, "status = %d\n", status);
329 if (msg.status)
330 status = msg.status;
331
332 dev_vdbg(&lp->spi->dev, "status = %d\n", status);
333 dev_vdbg(&lp->spi->dev, "buf[0] = %02x\n", buf[0]);
334 dev_vdbg(&lp->spi->dev, "buf[1] = %02x\n", buf[1]);
335
336 return status;
337}
338
339static int
340__at86rf230_read_subreg(struct at86rf230_local *lp,
341 u8 addr, u8 mask, int shift, u8 *data)
342{
343 u8 *buf = lp->buf;
344 int status;
345 struct spi_message msg;
346 struct spi_transfer xfer = {
347 .len = 2,
348 .tx_buf = buf,
349 .rx_buf = buf,
350 };
351
352 buf[0] = (addr & CMD_REG_MASK) | CMD_REG;
353 buf[1] = 0xff;
354 dev_vdbg(&lp->spi->dev, "buf[0] = %02x\n", buf[0]);
355 spi_message_init(&msg);
356 spi_message_add_tail(&xfer, &msg);
357
358 status = spi_sync(lp->spi, &msg);
359 dev_vdbg(&lp->spi->dev, "status = %d\n", status);
360 if (msg.status)
361 status = msg.status;
362
363 dev_vdbg(&lp->spi->dev, "status = %d\n", status);
364 dev_vdbg(&lp->spi->dev, "buf[0] = %02x\n", buf[0]);
365 dev_vdbg(&lp->spi->dev, "buf[1] = %02x\n", buf[1]);
366
367 if (status == 0)
368 *data = (buf[1] & mask) >> shift;
369
370 return status;
371}
372
373static int
374at86rf230_read_subreg(struct at86rf230_local *lp,
375 u8 addr, u8 mask, int shift, u8 *data)
376{
377 int status;
378
379 mutex_lock(&lp->bmux);
380 status = __at86rf230_read_subreg(lp, addr, mask, shift, data);
381 mutex_unlock(&lp->bmux);
382
383 return status;
384}
385
386static int
387at86rf230_write_subreg(struct at86rf230_local *lp,
388 u8 addr, u8 mask, int shift, u8 data)
389{
390 int status;
391 u8 val;
392
393 mutex_lock(&lp->bmux);
394 status = __at86rf230_read_subreg(lp, addr, 0xff, 0, &val);
395 if (status)
396 goto out;
397
398 val &= ~mask;
399 val |= (data << shift) & mask;
400
401 status = __at86rf230_write(lp, addr, val);
402out:
403 mutex_unlock(&lp->bmux);
404
405 return status;
406}
407
408static int
409at86rf230_write_fbuf(struct at86rf230_local *lp, u8 *data, u8 len)
410{
411 u8 *buf = lp->buf;
412 int status;
413 struct spi_message msg;
414 struct spi_transfer xfer_head = {
415 .len = 2,
416 .tx_buf = buf,
417
418 };
419 struct spi_transfer xfer_buf = {
420 .len = len,
421 .tx_buf = data,
422 };
423
424 mutex_lock(&lp->bmux);
425 buf[0] = CMD_WRITE | CMD_FB;
426 buf[1] = len + 2; /* 2 bytes for CRC that isn't written */
427
428 dev_vdbg(&lp->spi->dev, "buf[0] = %02x\n", buf[0]);
429 dev_vdbg(&lp->spi->dev, "buf[1] = %02x\n", buf[1]);
430
431 spi_message_init(&msg);
432 spi_message_add_tail(&xfer_head, &msg);
433 spi_message_add_tail(&xfer_buf, &msg);
434
435 status = spi_sync(lp->spi, &msg);
436 dev_vdbg(&lp->spi->dev, "status = %d\n", status);
437 if (msg.status)
438 status = msg.status;
439
440 dev_vdbg(&lp->spi->dev, "status = %d\n", status);
441 dev_vdbg(&lp->spi->dev, "buf[0] = %02x\n", buf[0]);
442 dev_vdbg(&lp->spi->dev, "buf[1] = %02x\n", buf[1]);
443
444 mutex_unlock(&lp->bmux);
445 return status;
446}
447
448static int
449at86rf230_read_fbuf(struct at86rf230_local *lp, u8 *data, u8 *len, u8 *lqi)
450{
451 u8 *buf = lp->buf;
452 int status;
453 struct spi_message msg;
454 struct spi_transfer xfer_head = {
455 .len = 2,
456 .tx_buf = buf,
457 .rx_buf = buf,
458 };
459 struct spi_transfer xfer_head1 = {
460 .len = 2,
461 .tx_buf = buf,
462 .rx_buf = buf,
463 };
464 struct spi_transfer xfer_buf = {
465 .len = 0,
466 .rx_buf = data,
467 };
468
469 mutex_lock(&lp->bmux);
470
471 buf[0] = CMD_FB;
472 buf[1] = 0x00;
473
474 spi_message_init(&msg);
475 spi_message_add_tail(&xfer_head, &msg);
476
477 status = spi_sync(lp->spi, &msg);
478 dev_vdbg(&lp->spi->dev, "status = %d\n", status);
479
480 xfer_buf.len = *(buf + 1) + 1;
481 *len = buf[1];
482
483 buf[0] = CMD_FB;
484 buf[1] = 0x00;
485
486 spi_message_init(&msg);
487 spi_message_add_tail(&xfer_head1, &msg);
488 spi_message_add_tail(&xfer_buf, &msg);
489
490 status = spi_sync(lp->spi, &msg);
491
492 if (msg.status)
493 status = msg.status;
494
495 dev_vdbg(&lp->spi->dev, "status = %d\n", status);
496 dev_vdbg(&lp->spi->dev, "buf[0] = %02x\n", buf[0]);
497 dev_vdbg(&lp->spi->dev, "buf[1] = %02x\n", buf[1]);
498
499 if (status) {
500 if (lqi && (*len > lp->buf[1]))
501 *lqi = data[lp->buf[1]];
502 }
503 mutex_unlock(&lp->bmux);
504
505 return status;
506}
507
508static int
509at86rf230_ed(struct ieee802154_dev *dev, u8 *level)
510{
511 might_sleep();
512 BUG_ON(!level);
513 *level = 0xbe;
514 return 0;
515}
516
517static int
518at86rf230_state(struct ieee802154_dev *dev, int state)
519{
520 struct at86rf230_local *lp = dev->priv;
521 int rc;
522 u8 val;
523 u8 desired_status;
524
525 might_sleep();
526
527 if (state == STATE_FORCE_TX_ON)
528 desired_status = STATE_TX_ON;
529 else if (state == STATE_FORCE_TRX_OFF)
530 desired_status = STATE_TRX_OFF;
531 else
532 desired_status = state;
533
534 do {
535 rc = at86rf230_read_subreg(lp, SR_TRX_STATUS, &val);
536 if (rc)
537 goto err;
538 } while (val == STATE_TRANSITION_IN_PROGRESS);
539
540 if (val == desired_status)
541 return 0;
542
543 /* state is equal to phy states */
544 rc = at86rf230_write_subreg(lp, SR_TRX_CMD, state);
545 if (rc)
546 goto err;
547
548 do {
549 rc = at86rf230_read_subreg(lp, SR_TRX_STATUS, &val);
550 if (rc)
551 goto err;
552 } while (val == STATE_TRANSITION_IN_PROGRESS);
553
554
555 if (val == desired_status ||
556 (desired_status == STATE_RX_ON && val == STATE_BUSY_RX) ||
557 (desired_status == STATE_RX_AACK_ON && val == STATE_BUSY_RX_AACK))
558 return 0;
559
560 pr_err("unexpected state change: %d, asked for %d\n", val, state);
561 return -EBUSY;
562
563err:
564 pr_err("error: %d\n", rc);
565 return rc;
566}
567
568static int
569at86rf230_start(struct ieee802154_dev *dev)
570{
571 struct at86rf230_local *lp = dev->priv;
572 u8 rc;
573
574 rc = at86rf230_write_subreg(lp, SR_RX_SAFE_MODE, 1);
575 if (rc)
576 return rc;
577
578 rc = at86rf230_state(dev, STATE_TX_ON);
579 if (rc)
580 return rc;
581
582 return at86rf230_state(dev, STATE_RX_AACK_ON);
583}
584
585static void
586at86rf230_stop(struct ieee802154_dev *dev)
587{
588 at86rf230_state(dev, STATE_FORCE_TRX_OFF);
589}
590
591static int
592at86rf230_set_channel(struct at86rf230_local *lp, int page, int channel)
593{
594 lp->rssi_base_val = -91;
595
596 return at86rf230_write_subreg(lp, SR_CHANNEL, channel);
597}
598
599static int
600at86rf212_set_channel(struct at86rf230_local *lp, int page, int channel)
601{
602 int rc;
603
604 if (channel == 0)
605 rc = at86rf230_write_subreg(lp, SR_SUB_MODE, 0);
606 else
607 rc = at86rf230_write_subreg(lp, SR_SUB_MODE, 1);
608 if (rc < 0)
609 return rc;
610
611 if (page == 0) {
612 rc = at86rf230_write_subreg(lp, SR_BPSK_QPSK, 0);
613 lp->rssi_base_val = -100;
614 } else {
615 rc = at86rf230_write_subreg(lp, SR_BPSK_QPSK, 1);
616 lp->rssi_base_val = -98;
617 }
618 if (rc < 0)
619 return rc;
620
621 return at86rf230_write_subreg(lp, SR_CHANNEL, channel);
622}
623
624static int
625at86rf230_channel(struct ieee802154_dev *dev, int page, int channel)
626{
627 struct at86rf230_local *lp = dev->priv;
628 int rc;
629
630 might_sleep();
631
632 if (page < 0 || page > 31 ||
633 !(lp->dev->phy->channels_supported[page] & BIT(channel))) {
634 WARN_ON(1);
635 return -EINVAL;
636 }
637
638 if (is_rf212(lp))
639 rc = at86rf212_set_channel(lp, page, channel);
640 else
641 rc = at86rf230_set_channel(lp, page, channel);
642 if (rc < 0)
643 return rc;
644
645 msleep(1); /* Wait for PLL */
646 dev->phy->current_channel = channel;
647 dev->phy->current_page = page;
648
649 return 0;
650}
651
652static int
653at86rf230_xmit(struct ieee802154_dev *dev, struct sk_buff *skb)
654{
655 struct at86rf230_local *lp = dev->priv;
656 int rc;
657 unsigned long flags;
658
659 spin_lock_irqsave(&lp->lock, flags);
660 if (lp->irq_busy) {
661 spin_unlock_irqrestore(&lp->lock, flags);
662 return -EBUSY;
663 }
664 spin_unlock_irqrestore(&lp->lock, flags);
665
666 might_sleep();
667
668 rc = at86rf230_state(dev, STATE_FORCE_TX_ON);
669 if (rc)
670 goto err;
671
672 spin_lock_irqsave(&lp->lock, flags);
673 lp->is_tx = 1;
674 reinit_completion(&lp->tx_complete);
675 spin_unlock_irqrestore(&lp->lock, flags);
676
677 rc = at86rf230_write_fbuf(lp, skb->data, skb->len);
678 if (rc)
679 goto err_rx;
680
681 if (lp->tx_aret) {
682 rc = at86rf230_write_subreg(lp, SR_TRX_CMD, STATE_TX_ARET_ON);
683 if (rc)
684 goto err_rx;
685 }
686
687 rc = at86rf230_write_subreg(lp, SR_TRX_CMD, STATE_BUSY_TX);
688 if (rc)
689 goto err_rx;
690
691 rc = wait_for_completion_interruptible(&lp->tx_complete);
692 if (rc < 0)
693 goto err_rx;
694
695 rc = at86rf230_start(dev);
696
697 return rc;
698
699err_rx:
700 at86rf230_start(dev);
701err:
702 pr_err("error: %d\n", rc);
703
704 spin_lock_irqsave(&lp->lock, flags);
705 lp->is_tx = 0;
706 spin_unlock_irqrestore(&lp->lock, flags);
707
708 return rc;
709}
710
711static int at86rf230_rx(struct at86rf230_local *lp)
712{
713 u8 len = 128, lqi = 0;
714 struct sk_buff *skb;
715
716 skb = alloc_skb(len, GFP_KERNEL);
717
718 if (!skb)
719 return -ENOMEM;
720
721 if (at86rf230_read_fbuf(lp, skb_put(skb, len), &len, &lqi))
722 goto err;
723
724 if (len < 2)
725 goto err;
726
727 skb_trim(skb, len - 2); /* We do not put CRC into the frame */
728
729 ieee802154_rx_irqsafe(lp->dev, skb, lqi);
730
731 dev_dbg(&lp->spi->dev, "READ_FBUF: %d %x\n", len, lqi);
732
733 return 0;
734err:
735 pr_debug("received frame is too small\n");
736
737 kfree_skb(skb);
738 return -EINVAL;
739}
740
741static int
742at86rf230_set_hw_addr_filt(struct ieee802154_dev *dev,
743 struct ieee802154_hw_addr_filt *filt,
744 unsigned long changed)
745{
746 struct at86rf230_local *lp = dev->priv;
747
748 if (changed & IEEE802515_AFILT_SADDR_CHANGED) {
749 u16 addr = le16_to_cpu(filt->short_addr);
750
751 dev_vdbg(&lp->spi->dev,
752 "at86rf230_set_hw_addr_filt called for saddr\n");
753 __at86rf230_write(lp, RG_SHORT_ADDR_0, addr);
754 __at86rf230_write(lp, RG_SHORT_ADDR_1, addr >> 8);
755 }
756
757 if (changed & IEEE802515_AFILT_PANID_CHANGED) {
758 u16 pan = le16_to_cpu(filt->pan_id);
759
760 dev_vdbg(&lp->spi->dev,
761 "at86rf230_set_hw_addr_filt called for pan id\n");
762 __at86rf230_write(lp, RG_PAN_ID_0, pan);
763 __at86rf230_write(lp, RG_PAN_ID_1, pan >> 8);
764 }
765
766 if (changed & IEEE802515_AFILT_IEEEADDR_CHANGED) {
767 u8 i, addr[8];
768
769 memcpy(addr, &filt->ieee_addr, 8);
770 dev_vdbg(&lp->spi->dev,
771 "at86rf230_set_hw_addr_filt called for IEEE addr\n");
772 for (i = 0; i < 8; i++)
773 __at86rf230_write(lp, RG_IEEE_ADDR_0 + i, addr[i]);
774 }
775
776 if (changed & IEEE802515_AFILT_PANC_CHANGED) {
777 dev_vdbg(&lp->spi->dev,
778 "at86rf230_set_hw_addr_filt called for panc change\n");
779 if (filt->pan_coord)
780 at86rf230_write_subreg(lp, SR_AACK_I_AM_COORD, 1);
781 else
782 at86rf230_write_subreg(lp, SR_AACK_I_AM_COORD, 0);
783 }
784
785 return 0;
786}
787
788static int
789at86rf212_set_txpower(struct ieee802154_dev *dev, int db)
790{
791 struct at86rf230_local *lp = dev->priv;
792
793 /* typical maximum output is 5dBm with RG_PHY_TX_PWR 0x60, lower five
794 * bits decrease power in 1dB steps. 0x60 represents extra PA gain of
795 * 0dB.
796 * thus, supported values for db range from -26 to 5, for 31dB of
797 * reduction to 0dB of reduction.
798 */
799 if (db > 5 || db < -26)
800 return -EINVAL;
801
802 db = -(db - 5);
803
804 return __at86rf230_write(lp, RG_PHY_TX_PWR, 0x60 | db);
805}
806
807static int
808at86rf212_set_lbt(struct ieee802154_dev *dev, bool on)
809{
810 struct at86rf230_local *lp = dev->priv;
811
812 return at86rf230_write_subreg(lp, SR_CSMA_LBT_MODE, on);
813}
814
815static int
816at86rf212_set_cca_mode(struct ieee802154_dev *dev, u8 mode)
817{
818 struct at86rf230_local *lp = dev->priv;
819
820 return at86rf230_write_subreg(lp, SR_CCA_MODE, mode);
821}
822
823static int
824at86rf212_set_cca_ed_level(struct ieee802154_dev *dev, s32 level)
825{
826 struct at86rf230_local *lp = dev->priv;
827 int desens_steps;
828
829 if (level < lp->rssi_base_val || level > 30)
830 return -EINVAL;
831
832 desens_steps = (level - lp->rssi_base_val) * 100 / 207;
833
834 return at86rf230_write_subreg(lp, SR_CCA_ED_THRES, desens_steps);
835}
836
837static int
838at86rf212_set_csma_params(struct ieee802154_dev *dev, u8 min_be, u8 max_be,
839 u8 retries)
840{
841 struct at86rf230_local *lp = dev->priv;
842 int rc;
843
844 if (min_be > max_be || max_be > 8 || retries > 5)
845 return -EINVAL;
846
847 rc = at86rf230_write_subreg(lp, SR_MIN_BE, min_be);
848 if (rc)
849 return rc;
850
851 rc = at86rf230_write_subreg(lp, SR_MAX_BE, max_be);
852 if (rc)
853 return rc;
854
855 return at86rf230_write_subreg(lp, SR_MAX_CSMA_RETRIES, retries);
856}
857
858static int
859at86rf212_set_frame_retries(struct ieee802154_dev *dev, s8 retries)
860{
861 struct at86rf230_local *lp = dev->priv;
862 int rc = 0;
863
864 if (retries < -1 || retries > 15)
865 return -EINVAL;
866
867 lp->tx_aret = retries >= 0;
868
869 if (retries >= 0)
870 rc = at86rf230_write_subreg(lp, SR_MAX_FRAME_RETRIES, retries);
871
872 return rc;
873}
874
875static struct ieee802154_ops at86rf230_ops = {
876 .owner = THIS_MODULE,
877 .xmit = at86rf230_xmit,
878 .ed = at86rf230_ed,
879 .set_channel = at86rf230_channel,
880 .start = at86rf230_start,
881 .stop = at86rf230_stop,
882 .set_hw_addr_filt = at86rf230_set_hw_addr_filt,
883};
884
885static struct ieee802154_ops at86rf212_ops = {
886 .owner = THIS_MODULE,
887 .xmit = at86rf230_xmit,
888 .ed = at86rf230_ed,
889 .set_channel = at86rf230_channel,
890 .start = at86rf230_start,
891 .stop = at86rf230_stop,
892 .set_hw_addr_filt = at86rf230_set_hw_addr_filt,
893 .set_txpower = at86rf212_set_txpower,
894 .set_lbt = at86rf212_set_lbt,
895 .set_cca_mode = at86rf212_set_cca_mode,
896 .set_cca_ed_level = at86rf212_set_cca_ed_level,
897 .set_csma_params = at86rf212_set_csma_params,
898 .set_frame_retries = at86rf212_set_frame_retries,
899};
900
901static void at86rf230_irqwork(struct work_struct *work)
902{
903 struct at86rf230_local *lp =
904 container_of(work, struct at86rf230_local, irqwork);
905 u8 status = 0, val;
906 int rc;
907 unsigned long flags;
908
909 rc = at86rf230_read_subreg(lp, RG_IRQ_STATUS, 0xff, 0, &val);
910 status |= val;
911
912 status &= ~IRQ_PLL_LOCK; /* ignore */
913 status &= ~IRQ_RX_START; /* ignore */
914 status &= ~IRQ_AMI; /* ignore */
915 status &= ~IRQ_TRX_UR; /* FIXME: possibly handle ???*/
916
917 if (status & IRQ_TRX_END) {
918 status &= ~IRQ_TRX_END;
919 spin_lock_irqsave(&lp->lock, flags);
920 if (lp->is_tx) {
921 lp->is_tx = 0;
922 spin_unlock_irqrestore(&lp->lock, flags);
923 complete(&lp->tx_complete);
924 } else {
925 spin_unlock_irqrestore(&lp->lock, flags);
926 at86rf230_rx(lp);
927 }
928 }
929
930 spin_lock_irqsave(&lp->lock, flags);
931 lp->irq_busy = 0;
932 spin_unlock_irqrestore(&lp->lock, flags);
933}
934
935static void at86rf230_irqwork_level(struct work_struct *work)
936{
937 struct at86rf230_local *lp =
938 container_of(work, struct at86rf230_local, irqwork);
939
940 at86rf230_irqwork(work);
941
942 enable_irq(lp->spi->irq);
943}
944
945static irqreturn_t at86rf230_isr(int irq, void *data)
946{
947 struct at86rf230_local *lp = data;
948 unsigned long flags;
949
950 spin_lock_irqsave(&lp->lock, flags);
951 lp->irq_busy = 1;
952 spin_unlock_irqrestore(&lp->lock, flags);
953
954 schedule_work(&lp->irqwork);
955
956 return IRQ_HANDLED;
957}
958
959static irqreturn_t at86rf230_isr_level(int irq, void *data)
960{
961 disable_irq_nosync(irq);
962
963 return at86rf230_isr(irq, data);
964}
965
966static int at86rf230_irq_polarity(struct at86rf230_local *lp, int pol)
967{
968 return at86rf230_write_subreg(lp, SR_IRQ_POLARITY, pol);
969}
970
971static int at86rf230_hw_init(struct at86rf230_local *lp)
972{
973 struct at86rf230_platform_data *pdata = lp->spi->dev.platform_data;
974 int rc, irq_pol;
975 u8 status;
976 u8 csma_seed[2];
977
978 rc = at86rf230_read_subreg(lp, SR_TRX_STATUS, &status);
979 if (rc)
980 return rc;
981
982 rc = at86rf230_write_subreg(lp, SR_TRX_CMD, STATE_FORCE_TRX_OFF);
983 if (rc)
984 return rc;
985
986 /* configure irq polarity, defaults to high active */
987 if (pdata->irq_type & (IRQF_TRIGGER_FALLING | IRQF_TRIGGER_LOW))
988 irq_pol = IRQ_ACTIVE_LOW;
989 else
990 irq_pol = IRQ_ACTIVE_HIGH;
991
992 rc = at86rf230_irq_polarity(lp, irq_pol);
993 if (rc)
994 return rc;
995
996 rc = at86rf230_write_subreg(lp, SR_IRQ_MASK, IRQ_TRX_END);
997 if (rc)
998 return rc;
999
1000 get_random_bytes(csma_seed, ARRAY_SIZE(csma_seed));
1001 rc = at86rf230_write_subreg(lp, SR_CSMA_SEED_0, csma_seed[0]);
1002 if (rc)
1003 return rc;
1004 rc = at86rf230_write_subreg(lp, SR_CSMA_SEED_1, csma_seed[1]);
1005 if (rc)
1006 return rc;
1007
1008 /* CLKM changes are applied immediately */
1009 rc = at86rf230_write_subreg(lp, SR_CLKM_SHA_SEL, 0x00);
1010 if (rc)
1011 return rc;
1012
1013 /* Turn CLKM Off */
1014 rc = at86rf230_write_subreg(lp, SR_CLKM_CTRL, 0x00);
1015 if (rc)
1016 return rc;
1017 /* Wait the next SLEEP cycle */
1018 msleep(100);
1019
1020 rc = at86rf230_read_subreg(lp, SR_DVDD_OK, &status);
1021 if (rc)
1022 return rc;
1023 if (!status) {
1024 dev_err(&lp->spi->dev, "DVDD error\n");
1025 return -EINVAL;
1026 }
1027
1028 return 0;
1029}
1030
1031static struct at86rf230_platform_data *
1032at86rf230_get_pdata(struct spi_device *spi)
1033{
1034 struct at86rf230_platform_data *pdata;
1035 const char *irq_type;
1036
1037 if (!IS_ENABLED(CONFIG_OF) || !spi->dev.of_node)
1038 return spi->dev.platform_data;
1039
1040 pdata = devm_kzalloc(&spi->dev, sizeof(*pdata), GFP_KERNEL);
1041 if (!pdata)
1042 goto done;
1043
1044 pdata->rstn = of_get_named_gpio(spi->dev.of_node, "reset-gpio", 0);
1045 pdata->slp_tr = of_get_named_gpio(spi->dev.of_node, "sleep-gpio", 0);
1046
1047 pdata->irq_type = IRQF_TRIGGER_RISING;
1048 of_property_read_string(spi->dev.of_node, "irq-type", &irq_type);
1049 if (!strcmp(irq_type, "level-high"))
1050 pdata->irq_type = IRQF_TRIGGER_HIGH;
1051 else if (!strcmp(irq_type, "level-low"))
1052 pdata->irq_type = IRQF_TRIGGER_LOW;
1053 else if (!strcmp(irq_type, "edge-rising"))
1054 pdata->irq_type = IRQF_TRIGGER_RISING;
1055 else if (!strcmp(irq_type, "edge-falling"))
1056 pdata->irq_type = IRQF_TRIGGER_FALLING;
1057 else
1058 dev_warn(&spi->dev, "wrong irq-type specified using edge-rising\n");
1059
1060 spi->dev.platform_data = pdata;
1061done:
1062 return pdata;
1063}
1064
1065static int at86rf230_probe(struct spi_device *spi)
1066{
1067 struct at86rf230_platform_data *pdata;
1068 struct ieee802154_dev *dev;
1069 struct at86rf230_local *lp;
1070 u16 man_id = 0;
1071 u8 part = 0, version = 0, status;
1072 irq_handler_t irq_handler;
1073 work_func_t irq_worker;
1074 int rc;
1075 const char *chip;
1076 struct ieee802154_ops *ops = NULL;
1077
1078 if (!spi->irq) {
1079 dev_err(&spi->dev, "no IRQ specified\n");
1080 return -EINVAL;
1081 }
1082
1083 pdata = at86rf230_get_pdata(spi);
1084 if (!pdata) {
1085 dev_err(&spi->dev, "no platform_data\n");
1086 return -EINVAL;
1087 }
1088
1089 if (gpio_is_valid(pdata->rstn)) {
1090 rc = gpio_request(pdata->rstn, "rstn");
1091 if (rc)
1092 return rc;
1093 }
1094
1095 if (gpio_is_valid(pdata->slp_tr)) {
1096 rc = gpio_request(pdata->slp_tr, "slp_tr");
1097 if (rc)
1098 goto err_slp_tr;
1099 }
1100
1101 if (gpio_is_valid(pdata->rstn)) {
1102 rc = gpio_direction_output(pdata->rstn, 1);
1103 if (rc)
1104 goto err_gpio_dir;
1105 }
1106
1107 if (gpio_is_valid(pdata->slp_tr)) {
1108 rc = gpio_direction_output(pdata->slp_tr, 0);
1109 if (rc)
1110 goto err_gpio_dir;
1111 }
1112
1113 /* Reset */
1114 if (gpio_is_valid(pdata->rstn)) {
1115 udelay(1);
1116 gpio_set_value(pdata->rstn, 0);
1117 udelay(1);
1118 gpio_set_value(pdata->rstn, 1);
1119 usleep_range(120, 240);
1120 }
1121
1122 rc = __at86rf230_detect_device(spi, &man_id, &part, &version);
1123 if (rc < 0)
1124 goto err_gpio_dir;
1125
1126 if (man_id != 0x001f) {
1127 dev_err(&spi->dev, "Non-Atmel dev found (MAN_ID %02x %02x)\n",
1128 man_id >> 8, man_id & 0xFF);
1129 rc = -EINVAL;
1130 goto err_gpio_dir;
1131 }
1132
1133 switch (part) {
1134 case 2:
1135 chip = "at86rf230";
1136 /* FIXME: should be easy to support; */
1137 break;
1138 case 3:
1139 chip = "at86rf231";
1140 ops = &at86rf230_ops;
1141 break;
1142 case 7:
1143 chip = "at86rf212";
1144 if (version == 1)
1145 ops = &at86rf212_ops;
1146 break;
1147 case 11:
1148 chip = "at86rf233";
1149 ops = &at86rf230_ops;
1150 break;
1151 default:
1152 chip = "UNKNOWN";
1153 break;
1154 }
1155
1156 dev_info(&spi->dev, "Detected %s chip version %d\n", chip, version);
1157 if (!ops) {
1158 rc = -ENOTSUPP;
1159 goto err_gpio_dir;
1160 }
1161
1162 dev = ieee802154_alloc_device(sizeof(*lp), ops);
1163 if (!dev) {
1164 rc = -ENOMEM;
1165 goto err_gpio_dir;
1166 }
1167
1168 lp = dev->priv;
1169 lp->dev = dev;
1170 lp->part = part;
1171 lp->vers = version;
1172
1173 lp->spi = spi;
1174
1175 dev->parent = &spi->dev;
1176 dev->extra_tx_headroom = 0;
1177 dev->flags = IEEE802154_HW_OMIT_CKSUM | IEEE802154_HW_AACK;
1178
1179 if (pdata->irq_type & (IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING)) {
1180 irq_worker = at86rf230_irqwork;
1181 irq_handler = at86rf230_isr;
1182 } else {
1183 irq_worker = at86rf230_irqwork_level;
1184 irq_handler = at86rf230_isr_level;
1185 }
1186
1187 mutex_init(&lp->bmux);
1188 INIT_WORK(&lp->irqwork, irq_worker);
1189 spin_lock_init(&lp->lock);
1190 init_completion(&lp->tx_complete);
1191
1192 spi_set_drvdata(spi, lp);
1193
1194 if (is_rf212(lp)) {
1195 dev->phy->channels_supported[0] = 0x00007FF;
1196 dev->phy->channels_supported[2] = 0x00007FF;
1197 } else {
1198 dev->phy->channels_supported[0] = 0x7FFF800;
1199 }
1200
1201 rc = at86rf230_hw_init(lp);
1202 if (rc)
1203 goto err_hw_init;
1204
1205 rc = request_irq(spi->irq, irq_handler,
1206 IRQF_SHARED | pdata->irq_type,
1207 dev_name(&spi->dev), lp);
1208 if (rc)
1209 goto err_hw_init;
1210
1211 /* Read irq status register to reset irq line */
1212 rc = at86rf230_read_subreg(lp, RG_IRQ_STATUS, 0xff, 0, &status);
1213 if (rc)
1214 goto err_irq;
1215
1216 rc = ieee802154_register_device(lp->dev);
1217 if (rc)
1218 goto err_irq;
1219
1220 return rc;
1221
1222err_irq:
1223 free_irq(spi->irq, lp);
1224err_hw_init:
1225 flush_work(&lp->irqwork);
1226 spi_set_drvdata(spi, NULL);
1227 mutex_destroy(&lp->bmux);
1228 ieee802154_free_device(lp->dev);
1229
1230err_gpio_dir:
1231 if (gpio_is_valid(pdata->slp_tr))
1232 gpio_free(pdata->slp_tr);
1233err_slp_tr:
1234 if (gpio_is_valid(pdata->rstn))
1235 gpio_free(pdata->rstn);
1236 return rc;
1237}
1238
1239static int at86rf230_remove(struct spi_device *spi)
1240{
1241 struct at86rf230_local *lp = spi_get_drvdata(spi);
1242 struct at86rf230_platform_data *pdata = spi->dev.platform_data;
1243
1244 /* mask all at86rf230 irq's */
1245 at86rf230_write_subreg(lp, SR_IRQ_MASK, 0);
1246 ieee802154_unregister_device(lp->dev);
1247
1248 free_irq(spi->irq, lp);
1249 flush_work(&lp->irqwork);
1250
1251 if (gpio_is_valid(pdata->slp_tr))
1252 gpio_free(pdata->slp_tr);
1253 if (gpio_is_valid(pdata->rstn))
1254 gpio_free(pdata->rstn);
1255
1256 mutex_destroy(&lp->bmux);
1257 ieee802154_free_device(lp->dev);
1258
1259 dev_dbg(&spi->dev, "unregistered at86rf230\n");
1260 return 0;
1261}
1262
1263#if IS_ENABLED(CONFIG_OF)
1264static struct of_device_id at86rf230_of_match[] = {
1265 { .compatible = "atmel,at86rf230", },
1266 { .compatible = "atmel,at86rf231", },
1267 { .compatible = "atmel,at86rf233", },
1268 { .compatible = "atmel,at86rf212", },
1269 { },
1270};
1271#endif
1272
1273static struct spi_driver at86rf230_driver = {
1274 .driver = {
1275 .of_match_table = of_match_ptr(at86rf230_of_match),
1276 .name = "at86rf230",
1277 .owner = THIS_MODULE,
1278 },
1279 .probe = at86rf230_probe,
1280 .remove = at86rf230_remove,
1281};
1282
1283module_spi_driver(at86rf230_driver);
1284
1285MODULE_DESCRIPTION("AT86RF230 Transceiver Driver");
1286MODULE_LICENSE("GPL v2");
1/*
2 * AT86RF230/RF231 driver
3 *
4 * Copyright (C) 2009-2012 Siemens AG
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2
8 * as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * Written by:
16 * Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>
17 * Alexander Smirnov <alex.bluesman.smirnov@gmail.com>
18 * Alexander Aring <aar@pengutronix.de>
19 */
20#include <linux/kernel.h>
21#include <linux/module.h>
22#include <linux/hrtimer.h>
23#include <linux/jiffies.h>
24#include <linux/interrupt.h>
25#include <linux/irq.h>
26#include <linux/gpio.h>
27#include <linux/delay.h>
28#include <linux/spi/spi.h>
29#include <linux/spi/at86rf230.h>
30#include <linux/regmap.h>
31#include <linux/skbuff.h>
32#include <linux/of_gpio.h>
33#include <linux/ieee802154.h>
34#include <linux/debugfs.h>
35
36#include <net/mac802154.h>
37#include <net/cfg802154.h>
38
39#include "at86rf230.h"
40
41struct at86rf230_local;
42/* at86rf2xx chip depend data.
43 * All timings are in us.
44 */
45struct at86rf2xx_chip_data {
46 u16 t_sleep_cycle;
47 u16 t_channel_switch;
48 u16 t_reset_to_off;
49 u16 t_off_to_aack;
50 u16 t_off_to_tx_on;
51 u16 t_off_to_sleep;
52 u16 t_sleep_to_off;
53 u16 t_frame;
54 u16 t_p_ack;
55 int rssi_base_val;
56
57 int (*set_channel)(struct at86rf230_local *, u8, u8);
58 int (*set_txpower)(struct at86rf230_local *, s32);
59};
60
61#define AT86RF2XX_MAX_BUF (127 + 3)
62/* tx retries to access the TX_ON state
63 * if it's above then force change will be started.
64 *
65 * We assume the max_frame_retries (7) value of 802.15.4 here.
66 */
67#define AT86RF2XX_MAX_TX_RETRIES 7
68/* We use the recommended 5 minutes timeout to recalibrate */
69#define AT86RF2XX_CAL_LOOP_TIMEOUT (5 * 60 * HZ)
70
71struct at86rf230_state_change {
72 struct at86rf230_local *lp;
73 int irq;
74
75 struct hrtimer timer;
76 struct spi_message msg;
77 struct spi_transfer trx;
78 u8 buf[AT86RF2XX_MAX_BUF];
79
80 void (*complete)(void *context);
81 u8 from_state;
82 u8 to_state;
83
84 bool free;
85};
86
87struct at86rf230_trac {
88 u64 success;
89 u64 success_data_pending;
90 u64 success_wait_for_ack;
91 u64 channel_access_failure;
92 u64 no_ack;
93 u64 invalid;
94};
95
96struct at86rf230_local {
97 struct spi_device *spi;
98
99 struct ieee802154_hw *hw;
100 struct at86rf2xx_chip_data *data;
101 struct regmap *regmap;
102 int slp_tr;
103 bool sleep;
104
105 struct completion state_complete;
106 struct at86rf230_state_change state;
107
108 unsigned long cal_timeout;
109 bool is_tx;
110 bool is_tx_from_off;
111 u8 tx_retry;
112 struct sk_buff *tx_skb;
113 struct at86rf230_state_change tx;
114
115 struct at86rf230_trac trac;
116};
117
118#define AT86RF2XX_NUMREGS 0x3F
119
120static void
121at86rf230_async_state_change(struct at86rf230_local *lp,
122 struct at86rf230_state_change *ctx,
123 const u8 state, void (*complete)(void *context));
124
125static inline void
126at86rf230_sleep(struct at86rf230_local *lp)
127{
128 if (gpio_is_valid(lp->slp_tr)) {
129 gpio_set_value(lp->slp_tr, 1);
130 usleep_range(lp->data->t_off_to_sleep,
131 lp->data->t_off_to_sleep + 10);
132 lp->sleep = true;
133 }
134}
135
136static inline void
137at86rf230_awake(struct at86rf230_local *lp)
138{
139 if (gpio_is_valid(lp->slp_tr)) {
140 gpio_set_value(lp->slp_tr, 0);
141 usleep_range(lp->data->t_sleep_to_off,
142 lp->data->t_sleep_to_off + 100);
143 lp->sleep = false;
144 }
145}
146
147static inline int
148__at86rf230_write(struct at86rf230_local *lp,
149 unsigned int addr, unsigned int data)
150{
151 bool sleep = lp->sleep;
152 int ret;
153
154 /* awake for register setting if sleep */
155 if (sleep)
156 at86rf230_awake(lp);
157
158 ret = regmap_write(lp->regmap, addr, data);
159
160 /* sleep again if was sleeping */
161 if (sleep)
162 at86rf230_sleep(lp);
163
164 return ret;
165}
166
167static inline int
168__at86rf230_read(struct at86rf230_local *lp,
169 unsigned int addr, unsigned int *data)
170{
171 bool sleep = lp->sleep;
172 int ret;
173
174 /* awake for register setting if sleep */
175 if (sleep)
176 at86rf230_awake(lp);
177
178 ret = regmap_read(lp->regmap, addr, data);
179
180 /* sleep again if was sleeping */
181 if (sleep)
182 at86rf230_sleep(lp);
183
184 return ret;
185}
186
187static inline int
188at86rf230_read_subreg(struct at86rf230_local *lp,
189 unsigned int addr, unsigned int mask,
190 unsigned int shift, unsigned int *data)
191{
192 int rc;
193
194 rc = __at86rf230_read(lp, addr, data);
195 if (!rc)
196 *data = (*data & mask) >> shift;
197
198 return rc;
199}
200
201static inline int
202at86rf230_write_subreg(struct at86rf230_local *lp,
203 unsigned int addr, unsigned int mask,
204 unsigned int shift, unsigned int data)
205{
206 bool sleep = lp->sleep;
207 int ret;
208
209 /* awake for register setting if sleep */
210 if (sleep)
211 at86rf230_awake(lp);
212
213 ret = regmap_update_bits(lp->regmap, addr, mask, data << shift);
214
215 /* sleep again if was sleeping */
216 if (sleep)
217 at86rf230_sleep(lp);
218
219 return ret;
220}
221
222static inline void
223at86rf230_slp_tr_rising_edge(struct at86rf230_local *lp)
224{
225 gpio_set_value(lp->slp_tr, 1);
226 udelay(1);
227 gpio_set_value(lp->slp_tr, 0);
228}
229
230static bool
231at86rf230_reg_writeable(struct device *dev, unsigned int reg)
232{
233 switch (reg) {
234 case RG_TRX_STATE:
235 case RG_TRX_CTRL_0:
236 case RG_TRX_CTRL_1:
237 case RG_PHY_TX_PWR:
238 case RG_PHY_ED_LEVEL:
239 case RG_PHY_CC_CCA:
240 case RG_CCA_THRES:
241 case RG_RX_CTRL:
242 case RG_SFD_VALUE:
243 case RG_TRX_CTRL_2:
244 case RG_ANT_DIV:
245 case RG_IRQ_MASK:
246 case RG_VREG_CTRL:
247 case RG_BATMON:
248 case RG_XOSC_CTRL:
249 case RG_RX_SYN:
250 case RG_XAH_CTRL_1:
251 case RG_FTN_CTRL:
252 case RG_PLL_CF:
253 case RG_PLL_DCU:
254 case RG_SHORT_ADDR_0:
255 case RG_SHORT_ADDR_1:
256 case RG_PAN_ID_0:
257 case RG_PAN_ID_1:
258 case RG_IEEE_ADDR_0:
259 case RG_IEEE_ADDR_1:
260 case RG_IEEE_ADDR_2:
261 case RG_IEEE_ADDR_3:
262 case RG_IEEE_ADDR_4:
263 case RG_IEEE_ADDR_5:
264 case RG_IEEE_ADDR_6:
265 case RG_IEEE_ADDR_7:
266 case RG_XAH_CTRL_0:
267 case RG_CSMA_SEED_0:
268 case RG_CSMA_SEED_1:
269 case RG_CSMA_BE:
270 return true;
271 default:
272 return false;
273 }
274}
275
276static bool
277at86rf230_reg_readable(struct device *dev, unsigned int reg)
278{
279 bool rc;
280
281 /* all writeable are also readable */
282 rc = at86rf230_reg_writeable(dev, reg);
283 if (rc)
284 return rc;
285
286 /* readonly regs */
287 switch (reg) {
288 case RG_TRX_STATUS:
289 case RG_PHY_RSSI:
290 case RG_IRQ_STATUS:
291 case RG_PART_NUM:
292 case RG_VERSION_NUM:
293 case RG_MAN_ID_1:
294 case RG_MAN_ID_0:
295 return true;
296 default:
297 return false;
298 }
299}
300
301static bool
302at86rf230_reg_volatile(struct device *dev, unsigned int reg)
303{
304 /* can be changed during runtime */
305 switch (reg) {
306 case RG_TRX_STATUS:
307 case RG_TRX_STATE:
308 case RG_PHY_RSSI:
309 case RG_PHY_ED_LEVEL:
310 case RG_IRQ_STATUS:
311 case RG_VREG_CTRL:
312 case RG_PLL_CF:
313 case RG_PLL_DCU:
314 return true;
315 default:
316 return false;
317 }
318}
319
320static bool
321at86rf230_reg_precious(struct device *dev, unsigned int reg)
322{
323 /* don't clear irq line on read */
324 switch (reg) {
325 case RG_IRQ_STATUS:
326 return true;
327 default:
328 return false;
329 }
330}
331
332static const struct regmap_config at86rf230_regmap_spi_config = {
333 .reg_bits = 8,
334 .val_bits = 8,
335 .write_flag_mask = CMD_REG | CMD_WRITE,
336 .read_flag_mask = CMD_REG,
337 .cache_type = REGCACHE_RBTREE,
338 .max_register = AT86RF2XX_NUMREGS,
339 .writeable_reg = at86rf230_reg_writeable,
340 .readable_reg = at86rf230_reg_readable,
341 .volatile_reg = at86rf230_reg_volatile,
342 .precious_reg = at86rf230_reg_precious,
343};
344
345static void
346at86rf230_async_error_recover_complete(void *context)
347{
348 struct at86rf230_state_change *ctx = context;
349 struct at86rf230_local *lp = ctx->lp;
350
351 if (ctx->free)
352 kfree(ctx);
353
354 ieee802154_wake_queue(lp->hw);
355}
356
357static void
358at86rf230_async_error_recover(void *context)
359{
360 struct at86rf230_state_change *ctx = context;
361 struct at86rf230_local *lp = ctx->lp;
362
363 lp->is_tx = 0;
364 at86rf230_async_state_change(lp, ctx, STATE_RX_AACK_ON,
365 at86rf230_async_error_recover_complete);
366}
367
368static inline void
369at86rf230_async_error(struct at86rf230_local *lp,
370 struct at86rf230_state_change *ctx, int rc)
371{
372 dev_err(&lp->spi->dev, "spi_async error %d\n", rc);
373
374 at86rf230_async_state_change(lp, ctx, STATE_FORCE_TRX_OFF,
375 at86rf230_async_error_recover);
376}
377
378/* Generic function to get some register value in async mode */
379static void
380at86rf230_async_read_reg(struct at86rf230_local *lp, u8 reg,
381 struct at86rf230_state_change *ctx,
382 void (*complete)(void *context))
383{
384 int rc;
385
386 u8 *tx_buf = ctx->buf;
387
388 tx_buf[0] = (reg & CMD_REG_MASK) | CMD_REG;
389 ctx->msg.complete = complete;
390 rc = spi_async(lp->spi, &ctx->msg);
391 if (rc)
392 at86rf230_async_error(lp, ctx, rc);
393}
394
395static void
396at86rf230_async_write_reg(struct at86rf230_local *lp, u8 reg, u8 val,
397 struct at86rf230_state_change *ctx,
398 void (*complete)(void *context))
399{
400 int rc;
401
402 ctx->buf[0] = (reg & CMD_REG_MASK) | CMD_REG | CMD_WRITE;
403 ctx->buf[1] = val;
404 ctx->msg.complete = complete;
405 rc = spi_async(lp->spi, &ctx->msg);
406 if (rc)
407 at86rf230_async_error(lp, ctx, rc);
408}
409
410static void
411at86rf230_async_state_assert(void *context)
412{
413 struct at86rf230_state_change *ctx = context;
414 struct at86rf230_local *lp = ctx->lp;
415 const u8 *buf = ctx->buf;
416 const u8 trx_state = buf[1] & TRX_STATE_MASK;
417
418 /* Assert state change */
419 if (trx_state != ctx->to_state) {
420 /* Special handling if transceiver state is in
421 * STATE_BUSY_RX_AACK and a SHR was detected.
422 */
423 if (trx_state == STATE_BUSY_RX_AACK) {
424 /* Undocumented race condition. If we send a state
425 * change to STATE_RX_AACK_ON the transceiver could
426 * change his state automatically to STATE_BUSY_RX_AACK
427 * if a SHR was detected. This is not an error, but we
428 * can't assert this.
429 */
430 if (ctx->to_state == STATE_RX_AACK_ON)
431 goto done;
432
433 /* If we change to STATE_TX_ON without forcing and
434 * transceiver state is STATE_BUSY_RX_AACK, we wait
435 * 'tFrame + tPAck' receiving time. In this time the
436 * PDU should be received. If the transceiver is still
437 * in STATE_BUSY_RX_AACK, we run a force state change
438 * to STATE_TX_ON. This is a timeout handling, if the
439 * transceiver stucks in STATE_BUSY_RX_AACK.
440 *
441 * Additional we do several retries to try to get into
442 * TX_ON state without forcing. If the retries are
443 * higher or equal than AT86RF2XX_MAX_TX_RETRIES we
444 * will do a force change.
445 */
446 if (ctx->to_state == STATE_TX_ON ||
447 ctx->to_state == STATE_TRX_OFF) {
448 u8 state = ctx->to_state;
449
450 if (lp->tx_retry >= AT86RF2XX_MAX_TX_RETRIES)
451 state = STATE_FORCE_TRX_OFF;
452 lp->tx_retry++;
453
454 at86rf230_async_state_change(lp, ctx, state,
455 ctx->complete);
456 return;
457 }
458 }
459
460 dev_warn(&lp->spi->dev, "unexcept state change from 0x%02x to 0x%02x. Actual state: 0x%02x\n",
461 ctx->from_state, ctx->to_state, trx_state);
462 }
463
464done:
465 if (ctx->complete)
466 ctx->complete(context);
467}
468
469static enum hrtimer_restart at86rf230_async_state_timer(struct hrtimer *timer)
470{
471 struct at86rf230_state_change *ctx =
472 container_of(timer, struct at86rf230_state_change, timer);
473 struct at86rf230_local *lp = ctx->lp;
474
475 at86rf230_async_read_reg(lp, RG_TRX_STATUS, ctx,
476 at86rf230_async_state_assert);
477
478 return HRTIMER_NORESTART;
479}
480
481/* Do state change timing delay. */
482static void
483at86rf230_async_state_delay(void *context)
484{
485 struct at86rf230_state_change *ctx = context;
486 struct at86rf230_local *lp = ctx->lp;
487 struct at86rf2xx_chip_data *c = lp->data;
488 bool force = false;
489 ktime_t tim;
490
491 /* The force state changes are will show as normal states in the
492 * state status subregister. We change the to_state to the
493 * corresponding one and remember if it was a force change, this
494 * differs if we do a state change from STATE_BUSY_RX_AACK.
495 */
496 switch (ctx->to_state) {
497 case STATE_FORCE_TX_ON:
498 ctx->to_state = STATE_TX_ON;
499 force = true;
500 break;
501 case STATE_FORCE_TRX_OFF:
502 ctx->to_state = STATE_TRX_OFF;
503 force = true;
504 break;
505 default:
506 break;
507 }
508
509 switch (ctx->from_state) {
510 case STATE_TRX_OFF:
511 switch (ctx->to_state) {
512 case STATE_RX_AACK_ON:
513 tim = ktime_set(0, c->t_off_to_aack * NSEC_PER_USEC);
514 /* state change from TRX_OFF to RX_AACK_ON to do a
515 * calibration, we need to reset the timeout for the
516 * next one.
517 */
518 lp->cal_timeout = jiffies + AT86RF2XX_CAL_LOOP_TIMEOUT;
519 goto change;
520 case STATE_TX_ARET_ON:
521 case STATE_TX_ON:
522 tim = ktime_set(0, c->t_off_to_tx_on * NSEC_PER_USEC);
523 /* state change from TRX_OFF to TX_ON or ARET_ON to do
524 * a calibration, we need to reset the timeout for the
525 * next one.
526 */
527 lp->cal_timeout = jiffies + AT86RF2XX_CAL_LOOP_TIMEOUT;
528 goto change;
529 default:
530 break;
531 }
532 break;
533 case STATE_BUSY_RX_AACK:
534 switch (ctx->to_state) {
535 case STATE_TRX_OFF:
536 case STATE_TX_ON:
537 /* Wait for worst case receiving time if we
538 * didn't make a force change from BUSY_RX_AACK
539 * to TX_ON or TRX_OFF.
540 */
541 if (!force) {
542 tim = ktime_set(0, (c->t_frame + c->t_p_ack) *
543 NSEC_PER_USEC);
544 goto change;
545 }
546 break;
547 default:
548 break;
549 }
550 break;
551 /* Default value, means RESET state */
552 case STATE_P_ON:
553 switch (ctx->to_state) {
554 case STATE_TRX_OFF:
555 tim = ktime_set(0, c->t_reset_to_off * NSEC_PER_USEC);
556 goto change;
557 default:
558 break;
559 }
560 break;
561 default:
562 break;
563 }
564
565 /* Default delay is 1us in the most cases */
566 udelay(1);
567 at86rf230_async_state_timer(&ctx->timer);
568 return;
569
570change:
571 hrtimer_start(&ctx->timer, tim, HRTIMER_MODE_REL);
572}
573
574static void
575at86rf230_async_state_change_start(void *context)
576{
577 struct at86rf230_state_change *ctx = context;
578 struct at86rf230_local *lp = ctx->lp;
579 u8 *buf = ctx->buf;
580 const u8 trx_state = buf[1] & TRX_STATE_MASK;
581
582 /* Check for "possible" STATE_TRANSITION_IN_PROGRESS */
583 if (trx_state == STATE_TRANSITION_IN_PROGRESS) {
584 udelay(1);
585 at86rf230_async_read_reg(lp, RG_TRX_STATUS, ctx,
586 at86rf230_async_state_change_start);
587 return;
588 }
589
590 /* Check if we already are in the state which we change in */
591 if (trx_state == ctx->to_state) {
592 if (ctx->complete)
593 ctx->complete(context);
594 return;
595 }
596
597 /* Set current state to the context of state change */
598 ctx->from_state = trx_state;
599
600 /* Going into the next step for a state change which do a timing
601 * relevant delay.
602 */
603 at86rf230_async_write_reg(lp, RG_TRX_STATE, ctx->to_state, ctx,
604 at86rf230_async_state_delay);
605}
606
607static void
608at86rf230_async_state_change(struct at86rf230_local *lp,
609 struct at86rf230_state_change *ctx,
610 const u8 state, void (*complete)(void *context))
611{
612 /* Initialization for the state change context */
613 ctx->to_state = state;
614 ctx->complete = complete;
615 at86rf230_async_read_reg(lp, RG_TRX_STATUS, ctx,
616 at86rf230_async_state_change_start);
617}
618
619static void
620at86rf230_sync_state_change_complete(void *context)
621{
622 struct at86rf230_state_change *ctx = context;
623 struct at86rf230_local *lp = ctx->lp;
624
625 complete(&lp->state_complete);
626}
627
628/* This function do a sync framework above the async state change.
629 * Some callbacks of the IEEE 802.15.4 driver interface need to be
630 * handled synchronously.
631 */
632static int
633at86rf230_sync_state_change(struct at86rf230_local *lp, unsigned int state)
634{
635 unsigned long rc;
636
637 at86rf230_async_state_change(lp, &lp->state, state,
638 at86rf230_sync_state_change_complete);
639
640 rc = wait_for_completion_timeout(&lp->state_complete,
641 msecs_to_jiffies(100));
642 if (!rc) {
643 at86rf230_async_error(lp, &lp->state, -ETIMEDOUT);
644 return -ETIMEDOUT;
645 }
646
647 return 0;
648}
649
650static void
651at86rf230_tx_complete(void *context)
652{
653 struct at86rf230_state_change *ctx = context;
654 struct at86rf230_local *lp = ctx->lp;
655
656 ieee802154_xmit_complete(lp->hw, lp->tx_skb, false);
657 kfree(ctx);
658}
659
660static void
661at86rf230_tx_on(void *context)
662{
663 struct at86rf230_state_change *ctx = context;
664 struct at86rf230_local *lp = ctx->lp;
665
666 at86rf230_async_state_change(lp, ctx, STATE_RX_AACK_ON,
667 at86rf230_tx_complete);
668}
669
670static void
671at86rf230_tx_trac_check(void *context)
672{
673 struct at86rf230_state_change *ctx = context;
674 struct at86rf230_local *lp = ctx->lp;
675
676 if (IS_ENABLED(CONFIG_IEEE802154_AT86RF230_DEBUGFS)) {
677 u8 trac = TRAC_MASK(ctx->buf[1]);
678
679 switch (trac) {
680 case TRAC_SUCCESS:
681 lp->trac.success++;
682 break;
683 case TRAC_SUCCESS_DATA_PENDING:
684 lp->trac.success_data_pending++;
685 break;
686 case TRAC_CHANNEL_ACCESS_FAILURE:
687 lp->trac.channel_access_failure++;
688 break;
689 case TRAC_NO_ACK:
690 lp->trac.no_ack++;
691 break;
692 case TRAC_INVALID:
693 lp->trac.invalid++;
694 break;
695 default:
696 WARN_ONCE(1, "received tx trac status %d\n", trac);
697 break;
698 }
699 }
700
701 at86rf230_async_state_change(lp, ctx, STATE_TX_ON, at86rf230_tx_on);
702}
703
704static void
705at86rf230_rx_read_frame_complete(void *context)
706{
707 struct at86rf230_state_change *ctx = context;
708 struct at86rf230_local *lp = ctx->lp;
709 const u8 *buf = ctx->buf;
710 struct sk_buff *skb;
711 u8 len, lqi;
712
713 len = buf[1];
714 if (!ieee802154_is_valid_psdu_len(len)) {
715 dev_vdbg(&lp->spi->dev, "corrupted frame received\n");
716 len = IEEE802154_MTU;
717 }
718 lqi = buf[2 + len];
719
720 skb = dev_alloc_skb(IEEE802154_MTU);
721 if (!skb) {
722 dev_vdbg(&lp->spi->dev, "failed to allocate sk_buff\n");
723 kfree(ctx);
724 return;
725 }
726
727 memcpy(skb_put(skb, len), buf + 2, len);
728 ieee802154_rx_irqsafe(lp->hw, skb, lqi);
729 kfree(ctx);
730}
731
732static void
733at86rf230_rx_trac_check(void *context)
734{
735 struct at86rf230_state_change *ctx = context;
736 struct at86rf230_local *lp = ctx->lp;
737 u8 *buf = ctx->buf;
738 int rc;
739
740 if (IS_ENABLED(CONFIG_IEEE802154_AT86RF230_DEBUGFS)) {
741 u8 trac = TRAC_MASK(buf[1]);
742
743 switch (trac) {
744 case TRAC_SUCCESS:
745 lp->trac.success++;
746 break;
747 case TRAC_SUCCESS_WAIT_FOR_ACK:
748 lp->trac.success_wait_for_ack++;
749 break;
750 case TRAC_INVALID:
751 lp->trac.invalid++;
752 break;
753 default:
754 WARN_ONCE(1, "received rx trac status %d\n", trac);
755 break;
756 }
757 }
758
759 buf[0] = CMD_FB;
760 ctx->trx.len = AT86RF2XX_MAX_BUF;
761 ctx->msg.complete = at86rf230_rx_read_frame_complete;
762 rc = spi_async(lp->spi, &ctx->msg);
763 if (rc) {
764 ctx->trx.len = 2;
765 at86rf230_async_error(lp, ctx, rc);
766 }
767}
768
769static void
770at86rf230_irq_trx_end(void *context)
771{
772 struct at86rf230_state_change *ctx = context;
773 struct at86rf230_local *lp = ctx->lp;
774
775 if (lp->is_tx) {
776 lp->is_tx = 0;
777 at86rf230_async_read_reg(lp, RG_TRX_STATE, ctx,
778 at86rf230_tx_trac_check);
779 } else {
780 at86rf230_async_read_reg(lp, RG_TRX_STATE, ctx,
781 at86rf230_rx_trac_check);
782 }
783}
784
785static void
786at86rf230_irq_status(void *context)
787{
788 struct at86rf230_state_change *ctx = context;
789 struct at86rf230_local *lp = ctx->lp;
790 const u8 *buf = ctx->buf;
791 u8 irq = buf[1];
792
793 enable_irq(lp->spi->irq);
794
795 if (irq & IRQ_TRX_END) {
796 at86rf230_irq_trx_end(ctx);
797 } else {
798 dev_err(&lp->spi->dev, "not supported irq %02x received\n",
799 irq);
800 kfree(ctx);
801 }
802}
803
804static void
805at86rf230_setup_spi_messages(struct at86rf230_local *lp,
806 struct at86rf230_state_change *state)
807{
808 state->lp = lp;
809 state->irq = lp->spi->irq;
810 spi_message_init(&state->msg);
811 state->msg.context = state;
812 state->trx.len = 2;
813 state->trx.tx_buf = state->buf;
814 state->trx.rx_buf = state->buf;
815 spi_message_add_tail(&state->trx, &state->msg);
816 hrtimer_init(&state->timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
817 state->timer.function = at86rf230_async_state_timer;
818}
819
820static irqreturn_t at86rf230_isr(int irq, void *data)
821{
822 struct at86rf230_local *lp = data;
823 struct at86rf230_state_change *ctx;
824 int rc;
825
826 disable_irq_nosync(irq);
827
828 ctx = kzalloc(sizeof(*ctx), GFP_ATOMIC);
829 if (!ctx) {
830 enable_irq(irq);
831 return IRQ_NONE;
832 }
833
834 at86rf230_setup_spi_messages(lp, ctx);
835 /* tell on error handling to free ctx */
836 ctx->free = true;
837
838 ctx->buf[0] = (RG_IRQ_STATUS & CMD_REG_MASK) | CMD_REG;
839 ctx->msg.complete = at86rf230_irq_status;
840 rc = spi_async(lp->spi, &ctx->msg);
841 if (rc) {
842 at86rf230_async_error(lp, ctx, rc);
843 enable_irq(irq);
844 return IRQ_NONE;
845 }
846
847 return IRQ_HANDLED;
848}
849
850static void
851at86rf230_write_frame_complete(void *context)
852{
853 struct at86rf230_state_change *ctx = context;
854 struct at86rf230_local *lp = ctx->lp;
855
856 ctx->trx.len = 2;
857
858 if (gpio_is_valid(lp->slp_tr))
859 at86rf230_slp_tr_rising_edge(lp);
860 else
861 at86rf230_async_write_reg(lp, RG_TRX_STATE, STATE_BUSY_TX, ctx,
862 NULL);
863}
864
865static void
866at86rf230_write_frame(void *context)
867{
868 struct at86rf230_state_change *ctx = context;
869 struct at86rf230_local *lp = ctx->lp;
870 struct sk_buff *skb = lp->tx_skb;
871 u8 *buf = ctx->buf;
872 int rc;
873
874 lp->is_tx = 1;
875
876 buf[0] = CMD_FB | CMD_WRITE;
877 buf[1] = skb->len + 2;
878 memcpy(buf + 2, skb->data, skb->len);
879 ctx->trx.len = skb->len + 2;
880 ctx->msg.complete = at86rf230_write_frame_complete;
881 rc = spi_async(lp->spi, &ctx->msg);
882 if (rc) {
883 ctx->trx.len = 2;
884 at86rf230_async_error(lp, ctx, rc);
885 }
886}
887
888static void
889at86rf230_xmit_tx_on(void *context)
890{
891 struct at86rf230_state_change *ctx = context;
892 struct at86rf230_local *lp = ctx->lp;
893
894 at86rf230_async_state_change(lp, ctx, STATE_TX_ARET_ON,
895 at86rf230_write_frame);
896}
897
898static void
899at86rf230_xmit_start(void *context)
900{
901 struct at86rf230_state_change *ctx = context;
902 struct at86rf230_local *lp = ctx->lp;
903
904 /* check if we change from off state */
905 if (lp->is_tx_from_off)
906 at86rf230_async_state_change(lp, ctx, STATE_TX_ARET_ON,
907 at86rf230_write_frame);
908 else
909 at86rf230_async_state_change(lp, ctx, STATE_TX_ON,
910 at86rf230_xmit_tx_on);
911}
912
913static int
914at86rf230_xmit(struct ieee802154_hw *hw, struct sk_buff *skb)
915{
916 struct at86rf230_local *lp = hw->priv;
917 struct at86rf230_state_change *ctx = &lp->tx;
918
919 lp->tx_skb = skb;
920 lp->tx_retry = 0;
921
922 /* After 5 minutes in PLL and the same frequency we run again the
923 * calibration loops which is recommended by at86rf2xx datasheets.
924 *
925 * The calibration is initiate by a state change from TRX_OFF
926 * to TX_ON, the lp->cal_timeout should be reinit by state_delay
927 * function then to start in the next 5 minutes.
928 */
929 if (time_is_before_jiffies(lp->cal_timeout)) {
930 lp->is_tx_from_off = true;
931 at86rf230_async_state_change(lp, ctx, STATE_TRX_OFF,
932 at86rf230_xmit_start);
933 } else {
934 lp->is_tx_from_off = false;
935 at86rf230_xmit_start(ctx);
936 }
937
938 return 0;
939}
940
941static int
942at86rf230_ed(struct ieee802154_hw *hw, u8 *level)
943{
944 BUG_ON(!level);
945 *level = 0xbe;
946 return 0;
947}
948
949static int
950at86rf230_start(struct ieee802154_hw *hw)
951{
952 struct at86rf230_local *lp = hw->priv;
953
954 /* reset trac stats on start */
955 if (IS_ENABLED(CONFIG_IEEE802154_AT86RF230_DEBUGFS))
956 memset(&lp->trac, 0, sizeof(struct at86rf230_trac));
957
958 at86rf230_awake(lp);
959 enable_irq(lp->spi->irq);
960
961 return at86rf230_sync_state_change(lp, STATE_RX_AACK_ON);
962}
963
964static void
965at86rf230_stop(struct ieee802154_hw *hw)
966{
967 struct at86rf230_local *lp = hw->priv;
968 u8 csma_seed[2];
969
970 at86rf230_sync_state_change(lp, STATE_FORCE_TRX_OFF);
971
972 disable_irq(lp->spi->irq);
973
974 /* It's recommended to set random new csma_seeds before sleep state.
975 * Makes only sense in the stop callback, not doing this inside of
976 * at86rf230_sleep, this is also used when we don't transmit afterwards
977 * when calling start callback again.
978 */
979 get_random_bytes(csma_seed, ARRAY_SIZE(csma_seed));
980 at86rf230_write_subreg(lp, SR_CSMA_SEED_0, csma_seed[0]);
981 at86rf230_write_subreg(lp, SR_CSMA_SEED_1, csma_seed[1]);
982
983 at86rf230_sleep(lp);
984}
985
986static int
987at86rf23x_set_channel(struct at86rf230_local *lp, u8 page, u8 channel)
988{
989 return at86rf230_write_subreg(lp, SR_CHANNEL, channel);
990}
991
992#define AT86RF2XX_MAX_ED_LEVELS 0xF
993static const s32 at86rf23x_ed_levels[AT86RF2XX_MAX_ED_LEVELS + 1] = {
994 -9100, -8900, -8700, -8500, -8300, -8100, -7900, -7700, -7500, -7300,
995 -7100, -6900, -6700, -6500, -6300, -6100,
996};
997
998static const s32 at86rf212_ed_levels_100[AT86RF2XX_MAX_ED_LEVELS + 1] = {
999 -10000, -9800, -9600, -9400, -9200, -9000, -8800, -8600, -8400, -8200,
1000 -8000, -7800, -7600, -7400, -7200, -7000,
1001};
1002
1003static const s32 at86rf212_ed_levels_98[AT86RF2XX_MAX_ED_LEVELS + 1] = {
1004 -9800, -9600, -9400, -9200, -9000, -8800, -8600, -8400, -8200, -8000,
1005 -7800, -7600, -7400, -7200, -7000, -6800,
1006};
1007
1008static inline int
1009at86rf212_update_cca_ed_level(struct at86rf230_local *lp, int rssi_base_val)
1010{
1011 unsigned int cca_ed_thres;
1012 int rc;
1013
1014 rc = at86rf230_read_subreg(lp, SR_CCA_ED_THRES, &cca_ed_thres);
1015 if (rc < 0)
1016 return rc;
1017
1018 switch (rssi_base_val) {
1019 case -98:
1020 lp->hw->phy->supported.cca_ed_levels = at86rf212_ed_levels_98;
1021 lp->hw->phy->supported.cca_ed_levels_size = ARRAY_SIZE(at86rf212_ed_levels_98);
1022 lp->hw->phy->cca_ed_level = at86rf212_ed_levels_98[cca_ed_thres];
1023 break;
1024 case -100:
1025 lp->hw->phy->supported.cca_ed_levels = at86rf212_ed_levels_100;
1026 lp->hw->phy->supported.cca_ed_levels_size = ARRAY_SIZE(at86rf212_ed_levels_100);
1027 lp->hw->phy->cca_ed_level = at86rf212_ed_levels_100[cca_ed_thres];
1028 break;
1029 default:
1030 WARN_ON(1);
1031 }
1032
1033 return 0;
1034}
1035
1036static int
1037at86rf212_set_channel(struct at86rf230_local *lp, u8 page, u8 channel)
1038{
1039 int rc;
1040
1041 if (channel == 0)
1042 rc = at86rf230_write_subreg(lp, SR_SUB_MODE, 0);
1043 else
1044 rc = at86rf230_write_subreg(lp, SR_SUB_MODE, 1);
1045 if (rc < 0)
1046 return rc;
1047
1048 if (page == 0) {
1049 rc = at86rf230_write_subreg(lp, SR_BPSK_QPSK, 0);
1050 lp->data->rssi_base_val = -100;
1051 } else {
1052 rc = at86rf230_write_subreg(lp, SR_BPSK_QPSK, 1);
1053 lp->data->rssi_base_val = -98;
1054 }
1055 if (rc < 0)
1056 return rc;
1057
1058 rc = at86rf212_update_cca_ed_level(lp, lp->data->rssi_base_val);
1059 if (rc < 0)
1060 return rc;
1061
1062 /* This sets the symbol_duration according frequency on the 212.
1063 * TODO move this handling while set channel and page in cfg802154.
1064 * We can do that, this timings are according 802.15.4 standard.
1065 * If we do that in cfg802154, this is a more generic calculation.
1066 *
1067 * This should also protected from ifs_timer. Means cancel timer and
1068 * init with a new value. For now, this is okay.
1069 */
1070 if (channel == 0) {
1071 if (page == 0) {
1072 /* SUB:0 and BPSK:0 -> BPSK-20 */
1073 lp->hw->phy->symbol_duration = 50;
1074 } else {
1075 /* SUB:1 and BPSK:0 -> BPSK-40 */
1076 lp->hw->phy->symbol_duration = 25;
1077 }
1078 } else {
1079 if (page == 0)
1080 /* SUB:0 and BPSK:1 -> OQPSK-100/200/400 */
1081 lp->hw->phy->symbol_duration = 40;
1082 else
1083 /* SUB:1 and BPSK:1 -> OQPSK-250/500/1000 */
1084 lp->hw->phy->symbol_duration = 16;
1085 }
1086
1087 lp->hw->phy->lifs_period = IEEE802154_LIFS_PERIOD *
1088 lp->hw->phy->symbol_duration;
1089 lp->hw->phy->sifs_period = IEEE802154_SIFS_PERIOD *
1090 lp->hw->phy->symbol_duration;
1091
1092 return at86rf230_write_subreg(lp, SR_CHANNEL, channel);
1093}
1094
1095static int
1096at86rf230_channel(struct ieee802154_hw *hw, u8 page, u8 channel)
1097{
1098 struct at86rf230_local *lp = hw->priv;
1099 int rc;
1100
1101 rc = lp->data->set_channel(lp, page, channel);
1102 /* Wait for PLL */
1103 usleep_range(lp->data->t_channel_switch,
1104 lp->data->t_channel_switch + 10);
1105
1106 lp->cal_timeout = jiffies + AT86RF2XX_CAL_LOOP_TIMEOUT;
1107 return rc;
1108}
1109
1110static int
1111at86rf230_set_hw_addr_filt(struct ieee802154_hw *hw,
1112 struct ieee802154_hw_addr_filt *filt,
1113 unsigned long changed)
1114{
1115 struct at86rf230_local *lp = hw->priv;
1116
1117 if (changed & IEEE802154_AFILT_SADDR_CHANGED) {
1118 u16 addr = le16_to_cpu(filt->short_addr);
1119
1120 dev_vdbg(&lp->spi->dev,
1121 "at86rf230_set_hw_addr_filt called for saddr\n");
1122 __at86rf230_write(lp, RG_SHORT_ADDR_0, addr);
1123 __at86rf230_write(lp, RG_SHORT_ADDR_1, addr >> 8);
1124 }
1125
1126 if (changed & IEEE802154_AFILT_PANID_CHANGED) {
1127 u16 pan = le16_to_cpu(filt->pan_id);
1128
1129 dev_vdbg(&lp->spi->dev,
1130 "at86rf230_set_hw_addr_filt called for pan id\n");
1131 __at86rf230_write(lp, RG_PAN_ID_0, pan);
1132 __at86rf230_write(lp, RG_PAN_ID_1, pan >> 8);
1133 }
1134
1135 if (changed & IEEE802154_AFILT_IEEEADDR_CHANGED) {
1136 u8 i, addr[8];
1137
1138 memcpy(addr, &filt->ieee_addr, 8);
1139 dev_vdbg(&lp->spi->dev,
1140 "at86rf230_set_hw_addr_filt called for IEEE addr\n");
1141 for (i = 0; i < 8; i++)
1142 __at86rf230_write(lp, RG_IEEE_ADDR_0 + i, addr[i]);
1143 }
1144
1145 if (changed & IEEE802154_AFILT_PANC_CHANGED) {
1146 dev_vdbg(&lp->spi->dev,
1147 "at86rf230_set_hw_addr_filt called for panc change\n");
1148 if (filt->pan_coord)
1149 at86rf230_write_subreg(lp, SR_AACK_I_AM_COORD, 1);
1150 else
1151 at86rf230_write_subreg(lp, SR_AACK_I_AM_COORD, 0);
1152 }
1153
1154 return 0;
1155}
1156
1157#define AT86RF23X_MAX_TX_POWERS 0xF
1158static const s32 at86rf233_powers[AT86RF23X_MAX_TX_POWERS + 1] = {
1159 400, 370, 340, 300, 250, 200, 100, 0, -100, -200, -300, -400, -600,
1160 -800, -1200, -1700,
1161};
1162
1163static const s32 at86rf231_powers[AT86RF23X_MAX_TX_POWERS + 1] = {
1164 300, 280, 230, 180, 130, 70, 0, -100, -200, -300, -400, -500, -700,
1165 -900, -1200, -1700,
1166};
1167
1168#define AT86RF212_MAX_TX_POWERS 0x1F
1169static const s32 at86rf212_powers[AT86RF212_MAX_TX_POWERS + 1] = {
1170 500, 400, 300, 200, 100, 0, -100, -200, -300, -400, -500, -600, -700,
1171 -800, -900, -1000, -1100, -1200, -1300, -1400, -1500, -1600, -1700,
1172 -1800, -1900, -2000, -2100, -2200, -2300, -2400, -2500, -2600,
1173};
1174
1175static int
1176at86rf23x_set_txpower(struct at86rf230_local *lp, s32 mbm)
1177{
1178 u32 i;
1179
1180 for (i = 0; i < lp->hw->phy->supported.tx_powers_size; i++) {
1181 if (lp->hw->phy->supported.tx_powers[i] == mbm)
1182 return at86rf230_write_subreg(lp, SR_TX_PWR_23X, i);
1183 }
1184
1185 return -EINVAL;
1186}
1187
1188static int
1189at86rf212_set_txpower(struct at86rf230_local *lp, s32 mbm)
1190{
1191 u32 i;
1192
1193 for (i = 0; i < lp->hw->phy->supported.tx_powers_size; i++) {
1194 if (lp->hw->phy->supported.tx_powers[i] == mbm)
1195 return at86rf230_write_subreg(lp, SR_TX_PWR_212, i);
1196 }
1197
1198 return -EINVAL;
1199}
1200
1201static int
1202at86rf230_set_txpower(struct ieee802154_hw *hw, s32 mbm)
1203{
1204 struct at86rf230_local *lp = hw->priv;
1205
1206 return lp->data->set_txpower(lp, mbm);
1207}
1208
1209static int
1210at86rf230_set_lbt(struct ieee802154_hw *hw, bool on)
1211{
1212 struct at86rf230_local *lp = hw->priv;
1213
1214 return at86rf230_write_subreg(lp, SR_CSMA_LBT_MODE, on);
1215}
1216
1217static int
1218at86rf230_set_cca_mode(struct ieee802154_hw *hw,
1219 const struct wpan_phy_cca *cca)
1220{
1221 struct at86rf230_local *lp = hw->priv;
1222 u8 val;
1223
1224 /* mapping 802.15.4 to driver spec */
1225 switch (cca->mode) {
1226 case NL802154_CCA_ENERGY:
1227 val = 1;
1228 break;
1229 case NL802154_CCA_CARRIER:
1230 val = 2;
1231 break;
1232 case NL802154_CCA_ENERGY_CARRIER:
1233 switch (cca->opt) {
1234 case NL802154_CCA_OPT_ENERGY_CARRIER_AND:
1235 val = 3;
1236 break;
1237 case NL802154_CCA_OPT_ENERGY_CARRIER_OR:
1238 val = 0;
1239 break;
1240 default:
1241 return -EINVAL;
1242 }
1243 break;
1244 default:
1245 return -EINVAL;
1246 }
1247
1248 return at86rf230_write_subreg(lp, SR_CCA_MODE, val);
1249}
1250
1251
1252static int
1253at86rf230_set_cca_ed_level(struct ieee802154_hw *hw, s32 mbm)
1254{
1255 struct at86rf230_local *lp = hw->priv;
1256 u32 i;
1257
1258 for (i = 0; i < hw->phy->supported.cca_ed_levels_size; i++) {
1259 if (hw->phy->supported.cca_ed_levels[i] == mbm)
1260 return at86rf230_write_subreg(lp, SR_CCA_ED_THRES, i);
1261 }
1262
1263 return -EINVAL;
1264}
1265
1266static int
1267at86rf230_set_csma_params(struct ieee802154_hw *hw, u8 min_be, u8 max_be,
1268 u8 retries)
1269{
1270 struct at86rf230_local *lp = hw->priv;
1271 int rc;
1272
1273 rc = at86rf230_write_subreg(lp, SR_MIN_BE, min_be);
1274 if (rc)
1275 return rc;
1276
1277 rc = at86rf230_write_subreg(lp, SR_MAX_BE, max_be);
1278 if (rc)
1279 return rc;
1280
1281 return at86rf230_write_subreg(lp, SR_MAX_CSMA_RETRIES, retries);
1282}
1283
1284static int
1285at86rf230_set_frame_retries(struct ieee802154_hw *hw, s8 retries)
1286{
1287 struct at86rf230_local *lp = hw->priv;
1288
1289 return at86rf230_write_subreg(lp, SR_MAX_FRAME_RETRIES, retries);
1290}
1291
1292static int
1293at86rf230_set_promiscuous_mode(struct ieee802154_hw *hw, const bool on)
1294{
1295 struct at86rf230_local *lp = hw->priv;
1296 int rc;
1297
1298 if (on) {
1299 rc = at86rf230_write_subreg(lp, SR_AACK_DIS_ACK, 1);
1300 if (rc < 0)
1301 return rc;
1302
1303 rc = at86rf230_write_subreg(lp, SR_AACK_PROM_MODE, 1);
1304 if (rc < 0)
1305 return rc;
1306 } else {
1307 rc = at86rf230_write_subreg(lp, SR_AACK_PROM_MODE, 0);
1308 if (rc < 0)
1309 return rc;
1310
1311 rc = at86rf230_write_subreg(lp, SR_AACK_DIS_ACK, 0);
1312 if (rc < 0)
1313 return rc;
1314 }
1315
1316 return 0;
1317}
1318
1319static const struct ieee802154_ops at86rf230_ops = {
1320 .owner = THIS_MODULE,
1321 .xmit_async = at86rf230_xmit,
1322 .ed = at86rf230_ed,
1323 .set_channel = at86rf230_channel,
1324 .start = at86rf230_start,
1325 .stop = at86rf230_stop,
1326 .set_hw_addr_filt = at86rf230_set_hw_addr_filt,
1327 .set_txpower = at86rf230_set_txpower,
1328 .set_lbt = at86rf230_set_lbt,
1329 .set_cca_mode = at86rf230_set_cca_mode,
1330 .set_cca_ed_level = at86rf230_set_cca_ed_level,
1331 .set_csma_params = at86rf230_set_csma_params,
1332 .set_frame_retries = at86rf230_set_frame_retries,
1333 .set_promiscuous_mode = at86rf230_set_promiscuous_mode,
1334};
1335
1336static struct at86rf2xx_chip_data at86rf233_data = {
1337 .t_sleep_cycle = 330,
1338 .t_channel_switch = 11,
1339 .t_reset_to_off = 26,
1340 .t_off_to_aack = 80,
1341 .t_off_to_tx_on = 80,
1342 .t_off_to_sleep = 35,
1343 .t_sleep_to_off = 210,
1344 .t_frame = 4096,
1345 .t_p_ack = 545,
1346 .rssi_base_val = -91,
1347 .set_channel = at86rf23x_set_channel,
1348 .set_txpower = at86rf23x_set_txpower,
1349};
1350
1351static struct at86rf2xx_chip_data at86rf231_data = {
1352 .t_sleep_cycle = 330,
1353 .t_channel_switch = 24,
1354 .t_reset_to_off = 37,
1355 .t_off_to_aack = 110,
1356 .t_off_to_tx_on = 110,
1357 .t_off_to_sleep = 35,
1358 .t_sleep_to_off = 380,
1359 .t_frame = 4096,
1360 .t_p_ack = 545,
1361 .rssi_base_val = -91,
1362 .set_channel = at86rf23x_set_channel,
1363 .set_txpower = at86rf23x_set_txpower,
1364};
1365
1366static struct at86rf2xx_chip_data at86rf212_data = {
1367 .t_sleep_cycle = 330,
1368 .t_channel_switch = 11,
1369 .t_reset_to_off = 26,
1370 .t_off_to_aack = 200,
1371 .t_off_to_tx_on = 200,
1372 .t_off_to_sleep = 35,
1373 .t_sleep_to_off = 380,
1374 .t_frame = 4096,
1375 .t_p_ack = 545,
1376 .rssi_base_val = -100,
1377 .set_channel = at86rf212_set_channel,
1378 .set_txpower = at86rf212_set_txpower,
1379};
1380
1381static int at86rf230_hw_init(struct at86rf230_local *lp, u8 xtal_trim)
1382{
1383 int rc, irq_type, irq_pol = IRQ_ACTIVE_HIGH;
1384 unsigned int dvdd;
1385 u8 csma_seed[2];
1386
1387 rc = at86rf230_sync_state_change(lp, STATE_FORCE_TRX_OFF);
1388 if (rc)
1389 return rc;
1390
1391 irq_type = irq_get_trigger_type(lp->spi->irq);
1392 if (irq_type == IRQ_TYPE_EDGE_FALLING ||
1393 irq_type == IRQ_TYPE_LEVEL_LOW)
1394 irq_pol = IRQ_ACTIVE_LOW;
1395
1396 rc = at86rf230_write_subreg(lp, SR_IRQ_POLARITY, irq_pol);
1397 if (rc)
1398 return rc;
1399
1400 rc = at86rf230_write_subreg(lp, SR_RX_SAFE_MODE, 1);
1401 if (rc)
1402 return rc;
1403
1404 rc = at86rf230_write_subreg(lp, SR_IRQ_MASK, IRQ_TRX_END);
1405 if (rc)
1406 return rc;
1407
1408 /* reset values differs in at86rf231 and at86rf233 */
1409 rc = at86rf230_write_subreg(lp, SR_IRQ_MASK_MODE, 0);
1410 if (rc)
1411 return rc;
1412
1413 get_random_bytes(csma_seed, ARRAY_SIZE(csma_seed));
1414 rc = at86rf230_write_subreg(lp, SR_CSMA_SEED_0, csma_seed[0]);
1415 if (rc)
1416 return rc;
1417 rc = at86rf230_write_subreg(lp, SR_CSMA_SEED_1, csma_seed[1]);
1418 if (rc)
1419 return rc;
1420
1421 /* CLKM changes are applied immediately */
1422 rc = at86rf230_write_subreg(lp, SR_CLKM_SHA_SEL, 0x00);
1423 if (rc)
1424 return rc;
1425
1426 /* Turn CLKM Off */
1427 rc = at86rf230_write_subreg(lp, SR_CLKM_CTRL, 0x00);
1428 if (rc)
1429 return rc;
1430 /* Wait the next SLEEP cycle */
1431 usleep_range(lp->data->t_sleep_cycle,
1432 lp->data->t_sleep_cycle + 100);
1433
1434 /* xtal_trim value is calculated by:
1435 * CL = 0.5 * (CX + CTRIM + CPAR)
1436 *
1437 * whereas:
1438 * CL = capacitor of used crystal
1439 * CX = connected capacitors at xtal pins
1440 * CPAR = in all at86rf2xx datasheets this is a constant value 3 pF,
1441 * but this is different on each board setup. You need to fine
1442 * tuning this value via CTRIM.
1443 * CTRIM = variable capacitor setting. Resolution is 0.3 pF range is
1444 * 0 pF upto 4.5 pF.
1445 *
1446 * Examples:
1447 * atben transceiver:
1448 *
1449 * CL = 8 pF
1450 * CX = 12 pF
1451 * CPAR = 3 pF (We assume the magic constant from datasheet)
1452 * CTRIM = 0.9 pF
1453 *
1454 * (12+0.9+3)/2 = 7.95 which is nearly at 8 pF
1455 *
1456 * xtal_trim = 0x3
1457 *
1458 * openlabs transceiver:
1459 *
1460 * CL = 16 pF
1461 * CX = 22 pF
1462 * CPAR = 3 pF (We assume the magic constant from datasheet)
1463 * CTRIM = 4.5 pF
1464 *
1465 * (22+4.5+3)/2 = 14.75 which is the nearest value to 16 pF
1466 *
1467 * xtal_trim = 0xf
1468 */
1469 rc = at86rf230_write_subreg(lp, SR_XTAL_TRIM, xtal_trim);
1470 if (rc)
1471 return rc;
1472
1473 rc = at86rf230_read_subreg(lp, SR_DVDD_OK, &dvdd);
1474 if (rc)
1475 return rc;
1476 if (!dvdd) {
1477 dev_err(&lp->spi->dev, "DVDD error\n");
1478 return -EINVAL;
1479 }
1480
1481 /* Force setting slotted operation bit to 0. Sometimes the atben
1482 * sets this bit and I don't know why. We set this always force
1483 * to zero while probing.
1484 */
1485 return at86rf230_write_subreg(lp, SR_SLOTTED_OPERATION, 0);
1486}
1487
1488static int
1489at86rf230_get_pdata(struct spi_device *spi, int *rstn, int *slp_tr,
1490 u8 *xtal_trim)
1491{
1492 struct at86rf230_platform_data *pdata = spi->dev.platform_data;
1493 int ret;
1494
1495 if (!IS_ENABLED(CONFIG_OF) || !spi->dev.of_node) {
1496 if (!pdata)
1497 return -ENOENT;
1498
1499 *rstn = pdata->rstn;
1500 *slp_tr = pdata->slp_tr;
1501 *xtal_trim = pdata->xtal_trim;
1502 return 0;
1503 }
1504
1505 *rstn = of_get_named_gpio(spi->dev.of_node, "reset-gpio", 0);
1506 *slp_tr = of_get_named_gpio(spi->dev.of_node, "sleep-gpio", 0);
1507 ret = of_property_read_u8(spi->dev.of_node, "xtal-trim", xtal_trim);
1508 if (ret < 0 && ret != -EINVAL)
1509 return ret;
1510
1511 return 0;
1512}
1513
1514static int
1515at86rf230_detect_device(struct at86rf230_local *lp)
1516{
1517 unsigned int part, version, val;
1518 u16 man_id = 0;
1519 const char *chip;
1520 int rc;
1521
1522 rc = __at86rf230_read(lp, RG_MAN_ID_0, &val);
1523 if (rc)
1524 return rc;
1525 man_id |= val;
1526
1527 rc = __at86rf230_read(lp, RG_MAN_ID_1, &val);
1528 if (rc)
1529 return rc;
1530 man_id |= (val << 8);
1531
1532 rc = __at86rf230_read(lp, RG_PART_NUM, &part);
1533 if (rc)
1534 return rc;
1535
1536 rc = __at86rf230_read(lp, RG_VERSION_NUM, &version);
1537 if (rc)
1538 return rc;
1539
1540 if (man_id != 0x001f) {
1541 dev_err(&lp->spi->dev, "Non-Atmel dev found (MAN_ID %02x %02x)\n",
1542 man_id >> 8, man_id & 0xFF);
1543 return -EINVAL;
1544 }
1545
1546 lp->hw->flags = IEEE802154_HW_TX_OMIT_CKSUM |
1547 IEEE802154_HW_CSMA_PARAMS |
1548 IEEE802154_HW_FRAME_RETRIES | IEEE802154_HW_AFILT |
1549 IEEE802154_HW_PROMISCUOUS;
1550
1551 lp->hw->phy->flags = WPAN_PHY_FLAG_TXPOWER |
1552 WPAN_PHY_FLAG_CCA_ED_LEVEL |
1553 WPAN_PHY_FLAG_CCA_MODE;
1554
1555 lp->hw->phy->supported.cca_modes = BIT(NL802154_CCA_ENERGY) |
1556 BIT(NL802154_CCA_CARRIER) | BIT(NL802154_CCA_ENERGY_CARRIER);
1557 lp->hw->phy->supported.cca_opts = BIT(NL802154_CCA_OPT_ENERGY_CARRIER_AND) |
1558 BIT(NL802154_CCA_OPT_ENERGY_CARRIER_OR);
1559
1560 lp->hw->phy->supported.cca_ed_levels = at86rf23x_ed_levels;
1561 lp->hw->phy->supported.cca_ed_levels_size = ARRAY_SIZE(at86rf23x_ed_levels);
1562
1563 lp->hw->phy->cca.mode = NL802154_CCA_ENERGY;
1564
1565 switch (part) {
1566 case 2:
1567 chip = "at86rf230";
1568 rc = -ENOTSUPP;
1569 goto not_supp;
1570 case 3:
1571 chip = "at86rf231";
1572 lp->data = &at86rf231_data;
1573 lp->hw->phy->supported.channels[0] = 0x7FFF800;
1574 lp->hw->phy->current_channel = 11;
1575 lp->hw->phy->symbol_duration = 16;
1576 lp->hw->phy->supported.tx_powers = at86rf231_powers;
1577 lp->hw->phy->supported.tx_powers_size = ARRAY_SIZE(at86rf231_powers);
1578 break;
1579 case 7:
1580 chip = "at86rf212";
1581 lp->data = &at86rf212_data;
1582 lp->hw->flags |= IEEE802154_HW_LBT;
1583 lp->hw->phy->supported.channels[0] = 0x00007FF;
1584 lp->hw->phy->supported.channels[2] = 0x00007FF;
1585 lp->hw->phy->current_channel = 5;
1586 lp->hw->phy->symbol_duration = 25;
1587 lp->hw->phy->supported.lbt = NL802154_SUPPORTED_BOOL_BOTH;
1588 lp->hw->phy->supported.tx_powers = at86rf212_powers;
1589 lp->hw->phy->supported.tx_powers_size = ARRAY_SIZE(at86rf212_powers);
1590 lp->hw->phy->supported.cca_ed_levels = at86rf212_ed_levels_100;
1591 lp->hw->phy->supported.cca_ed_levels_size = ARRAY_SIZE(at86rf212_ed_levels_100);
1592 break;
1593 case 11:
1594 chip = "at86rf233";
1595 lp->data = &at86rf233_data;
1596 lp->hw->phy->supported.channels[0] = 0x7FFF800;
1597 lp->hw->phy->current_channel = 13;
1598 lp->hw->phy->symbol_duration = 16;
1599 lp->hw->phy->supported.tx_powers = at86rf233_powers;
1600 lp->hw->phy->supported.tx_powers_size = ARRAY_SIZE(at86rf233_powers);
1601 break;
1602 default:
1603 chip = "unknown";
1604 rc = -ENOTSUPP;
1605 goto not_supp;
1606 }
1607
1608 lp->hw->phy->cca_ed_level = lp->hw->phy->supported.cca_ed_levels[7];
1609 lp->hw->phy->transmit_power = lp->hw->phy->supported.tx_powers[0];
1610
1611not_supp:
1612 dev_info(&lp->spi->dev, "Detected %s chip version %d\n", chip, version);
1613
1614 return rc;
1615}
1616
1617#ifdef CONFIG_IEEE802154_AT86RF230_DEBUGFS
1618static struct dentry *at86rf230_debugfs_root;
1619
1620static int at86rf230_stats_show(struct seq_file *file, void *offset)
1621{
1622 struct at86rf230_local *lp = file->private;
1623
1624 seq_printf(file, "SUCCESS:\t\t%8llu\n", lp->trac.success);
1625 seq_printf(file, "SUCCESS_DATA_PENDING:\t%8llu\n",
1626 lp->trac.success_data_pending);
1627 seq_printf(file, "SUCCESS_WAIT_FOR_ACK:\t%8llu\n",
1628 lp->trac.success_wait_for_ack);
1629 seq_printf(file, "CHANNEL_ACCESS_FAILURE:\t%8llu\n",
1630 lp->trac.channel_access_failure);
1631 seq_printf(file, "NO_ACK:\t\t\t%8llu\n", lp->trac.no_ack);
1632 seq_printf(file, "INVALID:\t\t%8llu\n", lp->trac.invalid);
1633 return 0;
1634}
1635
1636static int at86rf230_stats_open(struct inode *inode, struct file *file)
1637{
1638 return single_open(file, at86rf230_stats_show, inode->i_private);
1639}
1640
1641static const struct file_operations at86rf230_stats_fops = {
1642 .open = at86rf230_stats_open,
1643 .read = seq_read,
1644 .llseek = seq_lseek,
1645 .release = single_release,
1646};
1647
1648static int at86rf230_debugfs_init(struct at86rf230_local *lp)
1649{
1650 char debugfs_dir_name[DNAME_INLINE_LEN + 1] = "at86rf230-";
1651 struct dentry *stats;
1652
1653 strncat(debugfs_dir_name, dev_name(&lp->spi->dev), DNAME_INLINE_LEN);
1654
1655 at86rf230_debugfs_root = debugfs_create_dir(debugfs_dir_name, NULL);
1656 if (!at86rf230_debugfs_root)
1657 return -ENOMEM;
1658
1659 stats = debugfs_create_file("trac_stats", S_IRUGO,
1660 at86rf230_debugfs_root, lp,
1661 &at86rf230_stats_fops);
1662 if (!stats)
1663 return -ENOMEM;
1664
1665 return 0;
1666}
1667
1668static void at86rf230_debugfs_remove(void)
1669{
1670 debugfs_remove_recursive(at86rf230_debugfs_root);
1671}
1672#else
1673static int at86rf230_debugfs_init(struct at86rf230_local *lp) { return 0; }
1674static void at86rf230_debugfs_remove(void) { }
1675#endif
1676
1677static int at86rf230_probe(struct spi_device *spi)
1678{
1679 struct ieee802154_hw *hw;
1680 struct at86rf230_local *lp;
1681 unsigned int status;
1682 int rc, irq_type, rstn, slp_tr;
1683 u8 xtal_trim = 0;
1684
1685 if (!spi->irq) {
1686 dev_err(&spi->dev, "no IRQ specified\n");
1687 return -EINVAL;
1688 }
1689
1690 rc = at86rf230_get_pdata(spi, &rstn, &slp_tr, &xtal_trim);
1691 if (rc < 0) {
1692 dev_err(&spi->dev, "failed to parse platform_data: %d\n", rc);
1693 return rc;
1694 }
1695
1696 if (gpio_is_valid(rstn)) {
1697 rc = devm_gpio_request_one(&spi->dev, rstn,
1698 GPIOF_OUT_INIT_HIGH, "rstn");
1699 if (rc)
1700 return rc;
1701 }
1702
1703 if (gpio_is_valid(slp_tr)) {
1704 rc = devm_gpio_request_one(&spi->dev, slp_tr,
1705 GPIOF_OUT_INIT_LOW, "slp_tr");
1706 if (rc)
1707 return rc;
1708 }
1709
1710 /* Reset */
1711 if (gpio_is_valid(rstn)) {
1712 udelay(1);
1713 gpio_set_value(rstn, 0);
1714 udelay(1);
1715 gpio_set_value(rstn, 1);
1716 usleep_range(120, 240);
1717 }
1718
1719 hw = ieee802154_alloc_hw(sizeof(*lp), &at86rf230_ops);
1720 if (!hw)
1721 return -ENOMEM;
1722
1723 lp = hw->priv;
1724 lp->hw = hw;
1725 lp->spi = spi;
1726 lp->slp_tr = slp_tr;
1727 hw->parent = &spi->dev;
1728 ieee802154_random_extended_addr(&hw->phy->perm_extended_addr);
1729
1730 lp->regmap = devm_regmap_init_spi(spi, &at86rf230_regmap_spi_config);
1731 if (IS_ERR(lp->regmap)) {
1732 rc = PTR_ERR(lp->regmap);
1733 dev_err(&spi->dev, "Failed to allocate register map: %d\n",
1734 rc);
1735 goto free_dev;
1736 }
1737
1738 at86rf230_setup_spi_messages(lp, &lp->state);
1739 at86rf230_setup_spi_messages(lp, &lp->tx);
1740
1741 rc = at86rf230_detect_device(lp);
1742 if (rc < 0)
1743 goto free_dev;
1744
1745 init_completion(&lp->state_complete);
1746
1747 spi_set_drvdata(spi, lp);
1748
1749 rc = at86rf230_hw_init(lp, xtal_trim);
1750 if (rc)
1751 goto free_dev;
1752
1753 /* Read irq status register to reset irq line */
1754 rc = at86rf230_read_subreg(lp, RG_IRQ_STATUS, 0xff, 0, &status);
1755 if (rc)
1756 goto free_dev;
1757
1758 irq_type = irq_get_trigger_type(spi->irq);
1759 if (!irq_type)
1760 irq_type = IRQF_TRIGGER_HIGH;
1761
1762 rc = devm_request_irq(&spi->dev, spi->irq, at86rf230_isr,
1763 IRQF_SHARED | irq_type, dev_name(&spi->dev), lp);
1764 if (rc)
1765 goto free_dev;
1766
1767 /* disable_irq by default and wait for starting hardware */
1768 disable_irq(spi->irq);
1769
1770 /* going into sleep by default */
1771 at86rf230_sleep(lp);
1772
1773 rc = at86rf230_debugfs_init(lp);
1774 if (rc)
1775 goto free_dev;
1776
1777 rc = ieee802154_register_hw(lp->hw);
1778 if (rc)
1779 goto free_debugfs;
1780
1781 return rc;
1782
1783free_debugfs:
1784 at86rf230_debugfs_remove();
1785free_dev:
1786 ieee802154_free_hw(lp->hw);
1787
1788 return rc;
1789}
1790
1791static int at86rf230_remove(struct spi_device *spi)
1792{
1793 struct at86rf230_local *lp = spi_get_drvdata(spi);
1794
1795 /* mask all at86rf230 irq's */
1796 at86rf230_write_subreg(lp, SR_IRQ_MASK, 0);
1797 ieee802154_unregister_hw(lp->hw);
1798 ieee802154_free_hw(lp->hw);
1799 at86rf230_debugfs_remove();
1800 dev_dbg(&spi->dev, "unregistered at86rf230\n");
1801
1802 return 0;
1803}
1804
1805static const struct of_device_id at86rf230_of_match[] = {
1806 { .compatible = "atmel,at86rf230", },
1807 { .compatible = "atmel,at86rf231", },
1808 { .compatible = "atmel,at86rf233", },
1809 { .compatible = "atmel,at86rf212", },
1810 { },
1811};
1812MODULE_DEVICE_TABLE(of, at86rf230_of_match);
1813
1814static const struct spi_device_id at86rf230_device_id[] = {
1815 { .name = "at86rf230", },
1816 { .name = "at86rf231", },
1817 { .name = "at86rf233", },
1818 { .name = "at86rf212", },
1819 { },
1820};
1821MODULE_DEVICE_TABLE(spi, at86rf230_device_id);
1822
1823static struct spi_driver at86rf230_driver = {
1824 .id_table = at86rf230_device_id,
1825 .driver = {
1826 .of_match_table = of_match_ptr(at86rf230_of_match),
1827 .name = "at86rf230",
1828 },
1829 .probe = at86rf230_probe,
1830 .remove = at86rf230_remove,
1831};
1832
1833module_spi_driver(at86rf230_driver);
1834
1835MODULE_DESCRIPTION("AT86RF230 Transceiver Driver");
1836MODULE_LICENSE("GPL v2");