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1/*
2 * ad525x_dpot: Driver for the Analog Devices digital potentiometers
3 * Copyright (c) 2009-2010 Analog Devices, Inc.
4 * Author: Michael Hennerich <hennerich@blackfin.uclinux.org>
5 *
6 * DEVID #Wipers #Positions Resistor Options (kOhm)
7 * AD5258 1 64 1, 10, 50, 100
8 * AD5259 1 256 5, 10, 50, 100
9 * AD5251 2 64 1, 10, 50, 100
10 * AD5252 2 256 1, 10, 50, 100
11 * AD5255 3 512 25, 250
12 * AD5253 4 64 1, 10, 50, 100
13 * AD5254 4 256 1, 10, 50, 100
14 * AD5160 1 256 5, 10, 50, 100
15 * AD5161 1 256 5, 10, 50, 100
16 * AD5162 2 256 2.5, 10, 50, 100
17 * AD5165 1 256 100
18 * AD5200 1 256 10, 50
19 * AD5201 1 33 10, 50
20 * AD5203 4 64 10, 100
21 * AD5204 4 256 10, 50, 100
22 * AD5206 6 256 10, 50, 100
23 * AD5207 2 256 10, 50, 100
24 * AD5231 1 1024 10, 50, 100
25 * AD5232 2 256 10, 50, 100
26 * AD5233 4 64 10, 50, 100
27 * AD5235 2 1024 25, 250
28 * AD5260 1 256 20, 50, 200
29 * AD5262 2 256 20, 50, 200
30 * AD5263 4 256 20, 50, 200
31 * AD5290 1 256 10, 50, 100
32 * AD5291 1 256 20, 50, 100 (20-TP)
33 * AD5292 1 1024 20, 50, 100 (20-TP)
34 * AD5293 1 1024 20, 50, 100
35 * AD7376 1 128 10, 50, 100, 1M
36 * AD8400 1 256 1, 10, 50, 100
37 * AD8402 2 256 1, 10, 50, 100
38 * AD8403 4 256 1, 10, 50, 100
39 * ADN2850 3 512 25, 250
40 * AD5241 1 256 10, 100, 1M
41 * AD5246 1 128 5, 10, 50, 100
42 * AD5247 1 128 5, 10, 50, 100
43 * AD5245 1 256 5, 10, 50, 100
44 * AD5243 2 256 2.5, 10, 50, 100
45 * AD5248 2 256 2.5, 10, 50, 100
46 * AD5242 2 256 20, 50, 200
47 * AD5280 1 256 20, 50, 200
48 * AD5282 2 256 20, 50, 200
49 * ADN2860 3 512 25, 250
50 * AD5273 1 64 1, 10, 50, 100 (OTP)
51 * AD5171 1 64 5, 10, 50, 100 (OTP)
52 * AD5170 1 256 2.5, 10, 50, 100 (OTP)
53 * AD5172 2 256 2.5, 10, 50, 100 (OTP)
54 * AD5173 2 256 2.5, 10, 50, 100 (OTP)
55 * AD5270 1 1024 20, 50, 100 (50-TP)
56 * AD5271 1 256 20, 50, 100 (50-TP)
57 * AD5272 1 1024 20, 50, 100 (50-TP)
58 * AD5274 1 256 20, 50, 100 (50-TP)
59 *
60 * See Documentation/misc-devices/ad525x_dpot.txt for more info.
61 *
62 * derived from ad5258.c
63 * Copyright (c) 2009 Cyber Switching, Inc.
64 * Author: Chris Verges <chrisv@cyberswitching.com>
65 *
66 * derived from ad5252.c
67 * Copyright (c) 2006-2011 Michael Hennerich <hennerich@blackfin.uclinux.org>
68 *
69 * Licensed under the GPL-2 or later.
70 */
71
72#include <linux/module.h>
73#include <linux/device.h>
74#include <linux/kernel.h>
75#include <linux/delay.h>
76#include <linux/slab.h>
77
78#include "ad525x_dpot.h"
79
80/*
81 * Client data (each client gets its own)
82 */
83
84struct dpot_data {
85 struct ad_dpot_bus_data bdata;
86 struct mutex update_lock;
87 unsigned rdac_mask;
88 unsigned max_pos;
89 unsigned long devid;
90 unsigned uid;
91 unsigned feat;
92 unsigned wipers;
93 u16 rdac_cache[MAX_RDACS];
94 DECLARE_BITMAP(otp_en_mask, MAX_RDACS);
95};
96
97static inline int dpot_read_d8(struct dpot_data *dpot)
98{
99 return dpot->bdata.bops->read_d8(dpot->bdata.client);
100}
101
102static inline int dpot_read_r8d8(struct dpot_data *dpot, u8 reg)
103{
104 return dpot->bdata.bops->read_r8d8(dpot->bdata.client, reg);
105}
106
107static inline int dpot_read_r8d16(struct dpot_data *dpot, u8 reg)
108{
109 return dpot->bdata.bops->read_r8d16(dpot->bdata.client, reg);
110}
111
112static inline int dpot_write_d8(struct dpot_data *dpot, u8 val)
113{
114 return dpot->bdata.bops->write_d8(dpot->bdata.client, val);
115}
116
117static inline int dpot_write_r8d8(struct dpot_data *dpot, u8 reg, u16 val)
118{
119 return dpot->bdata.bops->write_r8d8(dpot->bdata.client, reg, val);
120}
121
122static inline int dpot_write_r8d16(struct dpot_data *dpot, u8 reg, u16 val)
123{
124 return dpot->bdata.bops->write_r8d16(dpot->bdata.client, reg, val);
125}
126
127static s32 dpot_read_spi(struct dpot_data *dpot, u8 reg)
128{
129 unsigned ctrl = 0;
130 int value;
131
132 if (!(reg & (DPOT_ADDR_EEPROM | DPOT_ADDR_CMD))) {
133
134 if (dpot->feat & F_RDACS_WONLY)
135 return dpot->rdac_cache[reg & DPOT_RDAC_MASK];
136 if (dpot->uid == DPOT_UID(AD5291_ID) ||
137 dpot->uid == DPOT_UID(AD5292_ID) ||
138 dpot->uid == DPOT_UID(AD5293_ID)) {
139
140 value = dpot_read_r8d8(dpot,
141 DPOT_AD5291_READ_RDAC << 2);
142
143 if (dpot->uid == DPOT_UID(AD5291_ID))
144 value = value >> 2;
145
146 return value;
147 } else if (dpot->uid == DPOT_UID(AD5270_ID) ||
148 dpot->uid == DPOT_UID(AD5271_ID)) {
149
150 value = dpot_read_r8d8(dpot,
151 DPOT_AD5270_1_2_4_READ_RDAC << 2);
152
153 if (value < 0)
154 return value;
155
156 if (dpot->uid == DPOT_UID(AD5271_ID))
157 value = value >> 2;
158
159 return value;
160 }
161
162 ctrl = DPOT_SPI_READ_RDAC;
163 } else if (reg & DPOT_ADDR_EEPROM) {
164 ctrl = DPOT_SPI_READ_EEPROM;
165 }
166
167 if (dpot->feat & F_SPI_16BIT)
168 return dpot_read_r8d8(dpot, ctrl);
169 else if (dpot->feat & F_SPI_24BIT)
170 return dpot_read_r8d16(dpot, ctrl);
171
172 return -EFAULT;
173}
174
175static s32 dpot_read_i2c(struct dpot_data *dpot, u8 reg)
176{
177 int value;
178 unsigned ctrl = 0;
179 switch (dpot->uid) {
180 case DPOT_UID(AD5246_ID):
181 case DPOT_UID(AD5247_ID):
182 return dpot_read_d8(dpot);
183 case DPOT_UID(AD5245_ID):
184 case DPOT_UID(AD5241_ID):
185 case DPOT_UID(AD5242_ID):
186 case DPOT_UID(AD5243_ID):
187 case DPOT_UID(AD5248_ID):
188 case DPOT_UID(AD5280_ID):
189 case DPOT_UID(AD5282_ID):
190 ctrl = ((reg & DPOT_RDAC_MASK) == DPOT_RDAC0) ?
191 0 : DPOT_AD5282_RDAC_AB;
192 return dpot_read_r8d8(dpot, ctrl);
193 case DPOT_UID(AD5170_ID):
194 case DPOT_UID(AD5171_ID):
195 case DPOT_UID(AD5273_ID):
196 return dpot_read_d8(dpot);
197 case DPOT_UID(AD5172_ID):
198 case DPOT_UID(AD5173_ID):
199 ctrl = ((reg & DPOT_RDAC_MASK) == DPOT_RDAC0) ?
200 0 : DPOT_AD5172_3_A0;
201 return dpot_read_r8d8(dpot, ctrl);
202 case DPOT_UID(AD5272_ID):
203 case DPOT_UID(AD5274_ID):
204 dpot_write_r8d8(dpot,
205 (DPOT_AD5270_1_2_4_READ_RDAC << 2), 0);
206
207 value = dpot_read_r8d16(dpot,
208 DPOT_AD5270_1_2_4_RDAC << 2);
209
210 if (value < 0)
211 return value;
212 /*
213 * AD5272/AD5274 returns high byte first, however
214 * underling smbus expects low byte first.
215 */
216 value = swab16(value);
217
218 if (dpot->uid == DPOT_UID(AD5271_ID))
219 value = value >> 2;
220 return value;
221 default:
222 if ((reg & DPOT_REG_TOL) || (dpot->max_pos > 256))
223 return dpot_read_r8d16(dpot, (reg & 0xF8) |
224 ((reg & 0x7) << 1));
225 else
226 return dpot_read_r8d8(dpot, reg);
227 }
228}
229
230static s32 dpot_read(struct dpot_data *dpot, u8 reg)
231{
232 if (dpot->feat & F_SPI)
233 return dpot_read_spi(dpot, reg);
234 else
235 return dpot_read_i2c(dpot, reg);
236}
237
238static s32 dpot_write_spi(struct dpot_data *dpot, u8 reg, u16 value)
239{
240 unsigned val = 0;
241
242 if (!(reg & (DPOT_ADDR_EEPROM | DPOT_ADDR_CMD | DPOT_ADDR_OTP))) {
243 if (dpot->feat & F_RDACS_WONLY)
244 dpot->rdac_cache[reg & DPOT_RDAC_MASK] = value;
245
246 if (dpot->feat & F_AD_APPDATA) {
247 if (dpot->feat & F_SPI_8BIT) {
248 val = ((reg & DPOT_RDAC_MASK) <<
249 DPOT_MAX_POS(dpot->devid)) |
250 value;
251 return dpot_write_d8(dpot, val);
252 } else if (dpot->feat & F_SPI_16BIT) {
253 val = ((reg & DPOT_RDAC_MASK) <<
254 DPOT_MAX_POS(dpot->devid)) |
255 value;
256 return dpot_write_r8d8(dpot, val >> 8,
257 val & 0xFF);
258 } else
259 BUG();
260 } else {
261 if (dpot->uid == DPOT_UID(AD5291_ID) ||
262 dpot->uid == DPOT_UID(AD5292_ID) ||
263 dpot->uid == DPOT_UID(AD5293_ID)) {
264
265 dpot_write_r8d8(dpot, DPOT_AD5291_CTRLREG << 2,
266 DPOT_AD5291_UNLOCK_CMD);
267
268 if (dpot->uid == DPOT_UID(AD5291_ID))
269 value = value << 2;
270
271 return dpot_write_r8d8(dpot,
272 (DPOT_AD5291_RDAC << 2) |
273 (value >> 8), value & 0xFF);
274 } else if (dpot->uid == DPOT_UID(AD5270_ID) ||
275 dpot->uid == DPOT_UID(AD5271_ID)) {
276 dpot_write_r8d8(dpot,
277 DPOT_AD5270_1_2_4_CTRLREG << 2,
278 DPOT_AD5270_1_2_4_UNLOCK_CMD);
279
280 if (dpot->uid == DPOT_UID(AD5271_ID))
281 value = value << 2;
282
283 return dpot_write_r8d8(dpot,
284 (DPOT_AD5270_1_2_4_RDAC << 2) |
285 (value >> 8), value & 0xFF);
286 }
287 val = DPOT_SPI_RDAC | (reg & DPOT_RDAC_MASK);
288 }
289 } else if (reg & DPOT_ADDR_EEPROM) {
290 val = DPOT_SPI_EEPROM | (reg & DPOT_RDAC_MASK);
291 } else if (reg & DPOT_ADDR_CMD) {
292 switch (reg) {
293 case DPOT_DEC_ALL_6DB:
294 val = DPOT_SPI_DEC_ALL_6DB;
295 break;
296 case DPOT_INC_ALL_6DB:
297 val = DPOT_SPI_INC_ALL_6DB;
298 break;
299 case DPOT_DEC_ALL:
300 val = DPOT_SPI_DEC_ALL;
301 break;
302 case DPOT_INC_ALL:
303 val = DPOT_SPI_INC_ALL;
304 break;
305 }
306 } else if (reg & DPOT_ADDR_OTP) {
307 if (dpot->uid == DPOT_UID(AD5291_ID) ||
308 dpot->uid == DPOT_UID(AD5292_ID)) {
309 return dpot_write_r8d8(dpot,
310 DPOT_AD5291_STORE_XTPM << 2, 0);
311 } else if (dpot->uid == DPOT_UID(AD5270_ID) ||
312 dpot->uid == DPOT_UID(AD5271_ID)) {
313 return dpot_write_r8d8(dpot,
314 DPOT_AD5270_1_2_4_STORE_XTPM << 2, 0);
315 }
316 } else
317 BUG();
318
319 if (dpot->feat & F_SPI_16BIT)
320 return dpot_write_r8d8(dpot, val, value);
321 else if (dpot->feat & F_SPI_24BIT)
322 return dpot_write_r8d16(dpot, val, value);
323
324 return -EFAULT;
325}
326
327static s32 dpot_write_i2c(struct dpot_data *dpot, u8 reg, u16 value)
328{
329 /* Only write the instruction byte for certain commands */
330 unsigned tmp = 0, ctrl = 0;
331
332 switch (dpot->uid) {
333 case DPOT_UID(AD5246_ID):
334 case DPOT_UID(AD5247_ID):
335 return dpot_write_d8(dpot, value);
336 break;
337
338 case DPOT_UID(AD5245_ID):
339 case DPOT_UID(AD5241_ID):
340 case DPOT_UID(AD5242_ID):
341 case DPOT_UID(AD5243_ID):
342 case DPOT_UID(AD5248_ID):
343 case DPOT_UID(AD5280_ID):
344 case DPOT_UID(AD5282_ID):
345 ctrl = ((reg & DPOT_RDAC_MASK) == DPOT_RDAC0) ?
346 0 : DPOT_AD5282_RDAC_AB;
347 return dpot_write_r8d8(dpot, ctrl, value);
348 break;
349 case DPOT_UID(AD5171_ID):
350 case DPOT_UID(AD5273_ID):
351 if (reg & DPOT_ADDR_OTP) {
352 tmp = dpot_read_d8(dpot);
353 if (tmp >> 6) /* Ready to Program? */
354 return -EFAULT;
355 ctrl = DPOT_AD5273_FUSE;
356 }
357 return dpot_write_r8d8(dpot, ctrl, value);
358 break;
359 case DPOT_UID(AD5172_ID):
360 case DPOT_UID(AD5173_ID):
361 ctrl = ((reg & DPOT_RDAC_MASK) == DPOT_RDAC0) ?
362 0 : DPOT_AD5172_3_A0;
363 if (reg & DPOT_ADDR_OTP) {
364 tmp = dpot_read_r8d16(dpot, ctrl);
365 if (tmp >> 14) /* Ready to Program? */
366 return -EFAULT;
367 ctrl |= DPOT_AD5170_2_3_FUSE;
368 }
369 return dpot_write_r8d8(dpot, ctrl, value);
370 break;
371 case DPOT_UID(AD5170_ID):
372 if (reg & DPOT_ADDR_OTP) {
373 tmp = dpot_read_r8d16(dpot, tmp);
374 if (tmp >> 14) /* Ready to Program? */
375 return -EFAULT;
376 ctrl = DPOT_AD5170_2_3_FUSE;
377 }
378 return dpot_write_r8d8(dpot, ctrl, value);
379 break;
380 case DPOT_UID(AD5272_ID):
381 case DPOT_UID(AD5274_ID):
382 dpot_write_r8d8(dpot, DPOT_AD5270_1_2_4_CTRLREG << 2,
383 DPOT_AD5270_1_2_4_UNLOCK_CMD);
384
385 if (reg & DPOT_ADDR_OTP)
386 return dpot_write_r8d8(dpot,
387 DPOT_AD5270_1_2_4_STORE_XTPM << 2, 0);
388
389 if (dpot->uid == DPOT_UID(AD5274_ID))
390 value = value << 2;
391
392 return dpot_write_r8d8(dpot, (DPOT_AD5270_1_2_4_RDAC << 2) |
393 (value >> 8), value & 0xFF);
394 break;
395 default:
396 if (reg & DPOT_ADDR_CMD)
397 return dpot_write_d8(dpot, reg);
398
399 if (dpot->max_pos > 256)
400 return dpot_write_r8d16(dpot, (reg & 0xF8) |
401 ((reg & 0x7) << 1), value);
402 else
403 /* All other registers require instruction + data bytes */
404 return dpot_write_r8d8(dpot, reg, value);
405 }
406}
407
408static s32 dpot_write(struct dpot_data *dpot, u8 reg, u16 value)
409{
410 if (dpot->feat & F_SPI)
411 return dpot_write_spi(dpot, reg, value);
412 else
413 return dpot_write_i2c(dpot, reg, value);
414}
415
416/* sysfs functions */
417
418static ssize_t sysfs_show_reg(struct device *dev,
419 struct device_attribute *attr,
420 char *buf, u32 reg)
421{
422 struct dpot_data *data = dev_get_drvdata(dev);
423 s32 value;
424
425 if (reg & DPOT_ADDR_OTP_EN)
426 return sprintf(buf, "%s\n",
427 test_bit(DPOT_RDAC_MASK & reg, data->otp_en_mask) ?
428 "enabled" : "disabled");
429
430
431 mutex_lock(&data->update_lock);
432 value = dpot_read(data, reg);
433 mutex_unlock(&data->update_lock);
434
435 if (value < 0)
436 return -EINVAL;
437 /*
438 * Let someone else deal with converting this ...
439 * the tolerance is a two-byte value where the MSB
440 * is a sign + integer value, and the LSB is a
441 * decimal value. See page 18 of the AD5258
442 * datasheet (Rev. A) for more details.
443 */
444
445 if (reg & DPOT_REG_TOL)
446 return sprintf(buf, "0x%04x\n", value & 0xFFFF);
447 else
448 return sprintf(buf, "%u\n", value & data->rdac_mask);
449}
450
451static ssize_t sysfs_set_reg(struct device *dev,
452 struct device_attribute *attr,
453 const char *buf, size_t count, u32 reg)
454{
455 struct dpot_data *data = dev_get_drvdata(dev);
456 unsigned long value;
457 int err;
458
459 if (reg & DPOT_ADDR_OTP_EN) {
460 if (!strncmp(buf, "enabled", sizeof("enabled")))
461 set_bit(DPOT_RDAC_MASK & reg, data->otp_en_mask);
462 else
463 clear_bit(DPOT_RDAC_MASK & reg, data->otp_en_mask);
464
465 return count;
466 }
467
468 if ((reg & DPOT_ADDR_OTP) &&
469 !test_bit(DPOT_RDAC_MASK & reg, data->otp_en_mask))
470 return -EPERM;
471
472 err = kstrtoul(buf, 10, &value);
473 if (err)
474 return err;
475
476 if (value > data->rdac_mask)
477 value = data->rdac_mask;
478
479 mutex_lock(&data->update_lock);
480 dpot_write(data, reg, value);
481 if (reg & DPOT_ADDR_EEPROM)
482 msleep(26); /* Sleep while the EEPROM updates */
483 else if (reg & DPOT_ADDR_OTP)
484 msleep(400); /* Sleep while the OTP updates */
485 mutex_unlock(&data->update_lock);
486
487 return count;
488}
489
490static ssize_t sysfs_do_cmd(struct device *dev,
491 struct device_attribute *attr,
492 const char *buf, size_t count, u32 reg)
493{
494 struct dpot_data *data = dev_get_drvdata(dev);
495
496 mutex_lock(&data->update_lock);
497 dpot_write(data, reg, 0);
498 mutex_unlock(&data->update_lock);
499
500 return count;
501}
502
503/* ------------------------------------------------------------------------- */
504
505#define DPOT_DEVICE_SHOW(_name, _reg) static ssize_t \
506show_##_name(struct device *dev, \
507 struct device_attribute *attr, char *buf) \
508{ \
509 return sysfs_show_reg(dev, attr, buf, _reg); \
510}
511
512#define DPOT_DEVICE_SET(_name, _reg) static ssize_t \
513set_##_name(struct device *dev, \
514 struct device_attribute *attr, \
515 const char *buf, size_t count) \
516{ \
517 return sysfs_set_reg(dev, attr, buf, count, _reg); \
518}
519
520#define DPOT_DEVICE_SHOW_SET(name, reg) \
521DPOT_DEVICE_SHOW(name, reg) \
522DPOT_DEVICE_SET(name, reg) \
523static DEVICE_ATTR(name, S_IWUSR | S_IRUGO, show_##name, set_##name);
524
525#define DPOT_DEVICE_SHOW_ONLY(name, reg) \
526DPOT_DEVICE_SHOW(name, reg) \
527static DEVICE_ATTR(name, S_IWUSR | S_IRUGO, show_##name, NULL);
528
529DPOT_DEVICE_SHOW_SET(rdac0, DPOT_ADDR_RDAC | DPOT_RDAC0);
530DPOT_DEVICE_SHOW_SET(eeprom0, DPOT_ADDR_EEPROM | DPOT_RDAC0);
531DPOT_DEVICE_SHOW_ONLY(tolerance0, DPOT_ADDR_EEPROM | DPOT_TOL_RDAC0);
532DPOT_DEVICE_SHOW_SET(otp0, DPOT_ADDR_OTP | DPOT_RDAC0);
533DPOT_DEVICE_SHOW_SET(otp0en, DPOT_ADDR_OTP_EN | DPOT_RDAC0);
534
535DPOT_DEVICE_SHOW_SET(rdac1, DPOT_ADDR_RDAC | DPOT_RDAC1);
536DPOT_DEVICE_SHOW_SET(eeprom1, DPOT_ADDR_EEPROM | DPOT_RDAC1);
537DPOT_DEVICE_SHOW_ONLY(tolerance1, DPOT_ADDR_EEPROM | DPOT_TOL_RDAC1);
538DPOT_DEVICE_SHOW_SET(otp1, DPOT_ADDR_OTP | DPOT_RDAC1);
539DPOT_DEVICE_SHOW_SET(otp1en, DPOT_ADDR_OTP_EN | DPOT_RDAC1);
540
541DPOT_DEVICE_SHOW_SET(rdac2, DPOT_ADDR_RDAC | DPOT_RDAC2);
542DPOT_DEVICE_SHOW_SET(eeprom2, DPOT_ADDR_EEPROM | DPOT_RDAC2);
543DPOT_DEVICE_SHOW_ONLY(tolerance2, DPOT_ADDR_EEPROM | DPOT_TOL_RDAC2);
544DPOT_DEVICE_SHOW_SET(otp2, DPOT_ADDR_OTP | DPOT_RDAC2);
545DPOT_DEVICE_SHOW_SET(otp2en, DPOT_ADDR_OTP_EN | DPOT_RDAC2);
546
547DPOT_DEVICE_SHOW_SET(rdac3, DPOT_ADDR_RDAC | DPOT_RDAC3);
548DPOT_DEVICE_SHOW_SET(eeprom3, DPOT_ADDR_EEPROM | DPOT_RDAC3);
549DPOT_DEVICE_SHOW_ONLY(tolerance3, DPOT_ADDR_EEPROM | DPOT_TOL_RDAC3);
550DPOT_DEVICE_SHOW_SET(otp3, DPOT_ADDR_OTP | DPOT_RDAC3);
551DPOT_DEVICE_SHOW_SET(otp3en, DPOT_ADDR_OTP_EN | DPOT_RDAC3);
552
553DPOT_DEVICE_SHOW_SET(rdac4, DPOT_ADDR_RDAC | DPOT_RDAC4);
554DPOT_DEVICE_SHOW_SET(eeprom4, DPOT_ADDR_EEPROM | DPOT_RDAC4);
555DPOT_DEVICE_SHOW_ONLY(tolerance4, DPOT_ADDR_EEPROM | DPOT_TOL_RDAC4);
556DPOT_DEVICE_SHOW_SET(otp4, DPOT_ADDR_OTP | DPOT_RDAC4);
557DPOT_DEVICE_SHOW_SET(otp4en, DPOT_ADDR_OTP_EN | DPOT_RDAC4);
558
559DPOT_DEVICE_SHOW_SET(rdac5, DPOT_ADDR_RDAC | DPOT_RDAC5);
560DPOT_DEVICE_SHOW_SET(eeprom5, DPOT_ADDR_EEPROM | DPOT_RDAC5);
561DPOT_DEVICE_SHOW_ONLY(tolerance5, DPOT_ADDR_EEPROM | DPOT_TOL_RDAC5);
562DPOT_DEVICE_SHOW_SET(otp5, DPOT_ADDR_OTP | DPOT_RDAC5);
563DPOT_DEVICE_SHOW_SET(otp5en, DPOT_ADDR_OTP_EN | DPOT_RDAC5);
564
565static const struct attribute *dpot_attrib_wipers[] = {
566 &dev_attr_rdac0.attr,
567 &dev_attr_rdac1.attr,
568 &dev_attr_rdac2.attr,
569 &dev_attr_rdac3.attr,
570 &dev_attr_rdac4.attr,
571 &dev_attr_rdac5.attr,
572 NULL
573};
574
575static const struct attribute *dpot_attrib_eeprom[] = {
576 &dev_attr_eeprom0.attr,
577 &dev_attr_eeprom1.attr,
578 &dev_attr_eeprom2.attr,
579 &dev_attr_eeprom3.attr,
580 &dev_attr_eeprom4.attr,
581 &dev_attr_eeprom5.attr,
582 NULL
583};
584
585static const struct attribute *dpot_attrib_otp[] = {
586 &dev_attr_otp0.attr,
587 &dev_attr_otp1.attr,
588 &dev_attr_otp2.attr,
589 &dev_attr_otp3.attr,
590 &dev_attr_otp4.attr,
591 &dev_attr_otp5.attr,
592 NULL
593};
594
595static const struct attribute *dpot_attrib_otp_en[] = {
596 &dev_attr_otp0en.attr,
597 &dev_attr_otp1en.attr,
598 &dev_attr_otp2en.attr,
599 &dev_attr_otp3en.attr,
600 &dev_attr_otp4en.attr,
601 &dev_attr_otp5en.attr,
602 NULL
603};
604
605static const struct attribute *dpot_attrib_tolerance[] = {
606 &dev_attr_tolerance0.attr,
607 &dev_attr_tolerance1.attr,
608 &dev_attr_tolerance2.attr,
609 &dev_attr_tolerance3.attr,
610 &dev_attr_tolerance4.attr,
611 &dev_attr_tolerance5.attr,
612 NULL
613};
614
615/* ------------------------------------------------------------------------- */
616
617#define DPOT_DEVICE_DO_CMD(_name, _cmd) static ssize_t \
618set_##_name(struct device *dev, \
619 struct device_attribute *attr, \
620 const char *buf, size_t count) \
621{ \
622 return sysfs_do_cmd(dev, attr, buf, count, _cmd); \
623} \
624static DEVICE_ATTR(_name, S_IWUSR | S_IRUGO, NULL, set_##_name);
625
626DPOT_DEVICE_DO_CMD(inc_all, DPOT_INC_ALL);
627DPOT_DEVICE_DO_CMD(dec_all, DPOT_DEC_ALL);
628DPOT_DEVICE_DO_CMD(inc_all_6db, DPOT_INC_ALL_6DB);
629DPOT_DEVICE_DO_CMD(dec_all_6db, DPOT_DEC_ALL_6DB);
630
631static struct attribute *ad525x_attributes_commands[] = {
632 &dev_attr_inc_all.attr,
633 &dev_attr_dec_all.attr,
634 &dev_attr_inc_all_6db.attr,
635 &dev_attr_dec_all_6db.attr,
636 NULL
637};
638
639static const struct attribute_group ad525x_group_commands = {
640 .attrs = ad525x_attributes_commands,
641};
642
643static int ad_dpot_add_files(struct device *dev,
644 unsigned features, unsigned rdac)
645{
646 int err = sysfs_create_file(&dev->kobj,
647 dpot_attrib_wipers[rdac]);
648 if (features & F_CMD_EEP)
649 err |= sysfs_create_file(&dev->kobj,
650 dpot_attrib_eeprom[rdac]);
651 if (features & F_CMD_TOL)
652 err |= sysfs_create_file(&dev->kobj,
653 dpot_attrib_tolerance[rdac]);
654 if (features & F_CMD_OTP) {
655 err |= sysfs_create_file(&dev->kobj,
656 dpot_attrib_otp_en[rdac]);
657 err |= sysfs_create_file(&dev->kobj,
658 dpot_attrib_otp[rdac]);
659 }
660
661 if (err)
662 dev_err(dev, "failed to register sysfs hooks for RDAC%d\n",
663 rdac);
664
665 return err;
666}
667
668static inline void ad_dpot_remove_files(struct device *dev,
669 unsigned features, unsigned rdac)
670{
671 sysfs_remove_file(&dev->kobj,
672 dpot_attrib_wipers[rdac]);
673 if (features & F_CMD_EEP)
674 sysfs_remove_file(&dev->kobj,
675 dpot_attrib_eeprom[rdac]);
676 if (features & F_CMD_TOL)
677 sysfs_remove_file(&dev->kobj,
678 dpot_attrib_tolerance[rdac]);
679 if (features & F_CMD_OTP) {
680 sysfs_remove_file(&dev->kobj,
681 dpot_attrib_otp_en[rdac]);
682 sysfs_remove_file(&dev->kobj,
683 dpot_attrib_otp[rdac]);
684 }
685}
686
687int ad_dpot_probe(struct device *dev,
688 struct ad_dpot_bus_data *bdata, unsigned long devid,
689 const char *name)
690{
691
692 struct dpot_data *data;
693 int i, err = 0;
694
695 data = kzalloc(sizeof(struct dpot_data), GFP_KERNEL);
696 if (!data) {
697 err = -ENOMEM;
698 goto exit;
699 }
700
701 dev_set_drvdata(dev, data);
702 mutex_init(&data->update_lock);
703
704 data->bdata = *bdata;
705 data->devid = devid;
706
707 data->max_pos = 1 << DPOT_MAX_POS(devid);
708 data->rdac_mask = data->max_pos - 1;
709 data->feat = DPOT_FEAT(devid);
710 data->uid = DPOT_UID(devid);
711 data->wipers = DPOT_WIPERS(devid);
712
713 for (i = DPOT_RDAC0; i < MAX_RDACS; i++)
714 if (data->wipers & (1 << i)) {
715 err = ad_dpot_add_files(dev, data->feat, i);
716 if (err)
717 goto exit_remove_files;
718 /* power-up midscale */
719 if (data->feat & F_RDACS_WONLY)
720 data->rdac_cache[i] = data->max_pos / 2;
721 }
722
723 if (data->feat & F_CMD_INC)
724 err = sysfs_create_group(&dev->kobj, &ad525x_group_commands);
725
726 if (err) {
727 dev_err(dev, "failed to register sysfs hooks\n");
728 goto exit_free;
729 }
730
731 dev_info(dev, "%s %d-Position Digital Potentiometer registered\n",
732 name, data->max_pos);
733
734 return 0;
735
736exit_remove_files:
737 for (i = DPOT_RDAC0; i < MAX_RDACS; i++)
738 if (data->wipers & (1 << i))
739 ad_dpot_remove_files(dev, data->feat, i);
740
741exit_free:
742 kfree(data);
743 dev_set_drvdata(dev, NULL);
744exit:
745 dev_err(dev, "failed to create client for %s ID 0x%lX\n",
746 name, devid);
747 return err;
748}
749EXPORT_SYMBOL(ad_dpot_probe);
750
751int ad_dpot_remove(struct device *dev)
752{
753 struct dpot_data *data = dev_get_drvdata(dev);
754 int i;
755
756 for (i = DPOT_RDAC0; i < MAX_RDACS; i++)
757 if (data->wipers & (1 << i))
758 ad_dpot_remove_files(dev, data->feat, i);
759
760 kfree(data);
761
762 return 0;
763}
764EXPORT_SYMBOL(ad_dpot_remove);
765
766
767MODULE_AUTHOR("Chris Verges <chrisv@cyberswitching.com>, "
768 "Michael Hennerich <hennerich@blackfin.uclinux.org>");
769MODULE_DESCRIPTION("Digital potentiometer driver");
770MODULE_LICENSE("GPL");
1/*
2 * ad525x_dpot: Driver for the Analog Devices digital potentiometers
3 * Copyright (c) 2009-2010 Analog Devices, Inc.
4 * Author: Michael Hennerich <hennerich@blackfin.uclinux.org>
5 *
6 * DEVID #Wipers #Positions Resistor Options (kOhm)
7 * AD5258 1 64 1, 10, 50, 100
8 * AD5259 1 256 5, 10, 50, 100
9 * AD5251 2 64 1, 10, 50, 100
10 * AD5252 2 256 1, 10, 50, 100
11 * AD5255 3 512 25, 250
12 * AD5253 4 64 1, 10, 50, 100
13 * AD5254 4 256 1, 10, 50, 100
14 * AD5160 1 256 5, 10, 50, 100
15 * AD5161 1 256 5, 10, 50, 100
16 * AD5162 2 256 2.5, 10, 50, 100
17 * AD5165 1 256 100
18 * AD5200 1 256 10, 50
19 * AD5201 1 33 10, 50
20 * AD5203 4 64 10, 100
21 * AD5204 4 256 10, 50, 100
22 * AD5206 6 256 10, 50, 100
23 * AD5207 2 256 10, 50, 100
24 * AD5231 1 1024 10, 50, 100
25 * AD5232 2 256 10, 50, 100
26 * AD5233 4 64 10, 50, 100
27 * AD5235 2 1024 25, 250
28 * AD5260 1 256 20, 50, 200
29 * AD5262 2 256 20, 50, 200
30 * AD5263 4 256 20, 50, 200
31 * AD5290 1 256 10, 50, 100
32 * AD5291 1 256 20, 50, 100 (20-TP)
33 * AD5292 1 1024 20, 50, 100 (20-TP)
34 * AD5293 1 1024 20, 50, 100
35 * AD7376 1 128 10, 50, 100, 1M
36 * AD8400 1 256 1, 10, 50, 100
37 * AD8402 2 256 1, 10, 50, 100
38 * AD8403 4 256 1, 10, 50, 100
39 * ADN2850 3 512 25, 250
40 * AD5241 1 256 10, 100, 1M
41 * AD5246 1 128 5, 10, 50, 100
42 * AD5247 1 128 5, 10, 50, 100
43 * AD5245 1 256 5, 10, 50, 100
44 * AD5243 2 256 2.5, 10, 50, 100
45 * AD5248 2 256 2.5, 10, 50, 100
46 * AD5242 2 256 20, 50, 200
47 * AD5280 1 256 20, 50, 200
48 * AD5282 2 256 20, 50, 200
49 * ADN2860 3 512 25, 250
50 * AD5273 1 64 1, 10, 50, 100 (OTP)
51 * AD5171 1 64 5, 10, 50, 100 (OTP)
52 * AD5170 1 256 2.5, 10, 50, 100 (OTP)
53 * AD5172 2 256 2.5, 10, 50, 100 (OTP)
54 * AD5173 2 256 2.5, 10, 50, 100 (OTP)
55 * AD5270 1 1024 20, 50, 100 (50-TP)
56 * AD5271 1 256 20, 50, 100 (50-TP)
57 * AD5272 1 1024 20, 50, 100 (50-TP)
58 * AD5274 1 256 20, 50, 100 (50-TP)
59 *
60 * See Documentation/misc-devices/ad525x_dpot.txt for more info.
61 *
62 * derived from ad5258.c
63 * Copyright (c) 2009 Cyber Switching, Inc.
64 * Author: Chris Verges <chrisv@cyberswitching.com>
65 *
66 * derived from ad5252.c
67 * Copyright (c) 2006-2011 Michael Hennerich <hennerich@blackfin.uclinux.org>
68 *
69 * Licensed under the GPL-2 or later.
70 */
71
72#include <linux/module.h>
73#include <linux/device.h>
74#include <linux/kernel.h>
75#include <linux/delay.h>
76#include <linux/slab.h>
77
78#include "ad525x_dpot.h"
79
80/*
81 * Client data (each client gets its own)
82 */
83
84struct dpot_data {
85 struct ad_dpot_bus_data bdata;
86 struct mutex update_lock;
87 unsigned rdac_mask;
88 unsigned max_pos;
89 unsigned long devid;
90 unsigned uid;
91 unsigned feat;
92 unsigned wipers;
93 u16 rdac_cache[MAX_RDACS];
94 DECLARE_BITMAP(otp_en_mask, MAX_RDACS);
95};
96
97static inline int dpot_read_d8(struct dpot_data *dpot)
98{
99 return dpot->bdata.bops->read_d8(dpot->bdata.client);
100}
101
102static inline int dpot_read_r8d8(struct dpot_data *dpot, u8 reg)
103{
104 return dpot->bdata.bops->read_r8d8(dpot->bdata.client, reg);
105}
106
107static inline int dpot_read_r8d16(struct dpot_data *dpot, u8 reg)
108{
109 return dpot->bdata.bops->read_r8d16(dpot->bdata.client, reg);
110}
111
112static inline int dpot_write_d8(struct dpot_data *dpot, u8 val)
113{
114 return dpot->bdata.bops->write_d8(dpot->bdata.client, val);
115}
116
117static inline int dpot_write_r8d8(struct dpot_data *dpot, u8 reg, u16 val)
118{
119 return dpot->bdata.bops->write_r8d8(dpot->bdata.client, reg, val);
120}
121
122static inline int dpot_write_r8d16(struct dpot_data *dpot, u8 reg, u16 val)
123{
124 return dpot->bdata.bops->write_r8d16(dpot->bdata.client, reg, val);
125}
126
127static s32 dpot_read_spi(struct dpot_data *dpot, u8 reg)
128{
129 unsigned ctrl = 0;
130 int value;
131
132 if (!(reg & (DPOT_ADDR_EEPROM | DPOT_ADDR_CMD))) {
133
134 if (dpot->feat & F_RDACS_WONLY)
135 return dpot->rdac_cache[reg & DPOT_RDAC_MASK];
136 if (dpot->uid == DPOT_UID(AD5291_ID) ||
137 dpot->uid == DPOT_UID(AD5292_ID) ||
138 dpot->uid == DPOT_UID(AD5293_ID)) {
139
140 value = dpot_read_r8d8(dpot,
141 DPOT_AD5291_READ_RDAC << 2);
142
143 if (dpot->uid == DPOT_UID(AD5291_ID))
144 value = value >> 2;
145
146 return value;
147 } else if (dpot->uid == DPOT_UID(AD5270_ID) ||
148 dpot->uid == DPOT_UID(AD5271_ID)) {
149
150 value = dpot_read_r8d8(dpot,
151 DPOT_AD5270_1_2_4_READ_RDAC << 2);
152
153 if (value < 0)
154 return value;
155
156 if (dpot->uid == DPOT_UID(AD5271_ID))
157 value = value >> 2;
158
159 return value;
160 }
161
162 ctrl = DPOT_SPI_READ_RDAC;
163 } else if (reg & DPOT_ADDR_EEPROM) {
164 ctrl = DPOT_SPI_READ_EEPROM;
165 }
166
167 if (dpot->feat & F_SPI_16BIT)
168 return dpot_read_r8d8(dpot, ctrl);
169 else if (dpot->feat & F_SPI_24BIT)
170 return dpot_read_r8d16(dpot, ctrl);
171
172 return -EFAULT;
173}
174
175static s32 dpot_read_i2c(struct dpot_data *dpot, u8 reg)
176{
177 int value;
178 unsigned ctrl = 0;
179
180 switch (dpot->uid) {
181 case DPOT_UID(AD5246_ID):
182 case DPOT_UID(AD5247_ID):
183 return dpot_read_d8(dpot);
184 case DPOT_UID(AD5245_ID):
185 case DPOT_UID(AD5241_ID):
186 case DPOT_UID(AD5242_ID):
187 case DPOT_UID(AD5243_ID):
188 case DPOT_UID(AD5248_ID):
189 case DPOT_UID(AD5280_ID):
190 case DPOT_UID(AD5282_ID):
191 ctrl = ((reg & DPOT_RDAC_MASK) == DPOT_RDAC0) ?
192 0 : DPOT_AD5282_RDAC_AB;
193 return dpot_read_r8d8(dpot, ctrl);
194 case DPOT_UID(AD5170_ID):
195 case DPOT_UID(AD5171_ID):
196 case DPOT_UID(AD5273_ID):
197 return dpot_read_d8(dpot);
198 case DPOT_UID(AD5172_ID):
199 case DPOT_UID(AD5173_ID):
200 ctrl = ((reg & DPOT_RDAC_MASK) == DPOT_RDAC0) ?
201 0 : DPOT_AD5172_3_A0;
202 return dpot_read_r8d8(dpot, ctrl);
203 case DPOT_UID(AD5272_ID):
204 case DPOT_UID(AD5274_ID):
205 dpot_write_r8d8(dpot,
206 (DPOT_AD5270_1_2_4_READ_RDAC << 2), 0);
207
208 value = dpot_read_r8d16(dpot,
209 DPOT_AD5270_1_2_4_RDAC << 2);
210
211 if (value < 0)
212 return value;
213 /*
214 * AD5272/AD5274 returns high byte first, however
215 * underling smbus expects low byte first.
216 */
217 value = swab16(value);
218
219 if (dpot->uid == DPOT_UID(AD5274_ID))
220 value = value >> 2;
221 return value;
222 default:
223 if ((reg & DPOT_REG_TOL) || (dpot->max_pos > 256))
224 return dpot_read_r8d16(dpot, (reg & 0xF8) |
225 ((reg & 0x7) << 1));
226 else
227 return dpot_read_r8d8(dpot, reg);
228 }
229}
230
231static s32 dpot_read(struct dpot_data *dpot, u8 reg)
232{
233 if (dpot->feat & F_SPI)
234 return dpot_read_spi(dpot, reg);
235 else
236 return dpot_read_i2c(dpot, reg);
237}
238
239static s32 dpot_write_spi(struct dpot_data *dpot, u8 reg, u16 value)
240{
241 unsigned val = 0;
242
243 if (!(reg & (DPOT_ADDR_EEPROM | DPOT_ADDR_CMD | DPOT_ADDR_OTP))) {
244 if (dpot->feat & F_RDACS_WONLY)
245 dpot->rdac_cache[reg & DPOT_RDAC_MASK] = value;
246
247 if (dpot->feat & F_AD_APPDATA) {
248 if (dpot->feat & F_SPI_8BIT) {
249 val = ((reg & DPOT_RDAC_MASK) <<
250 DPOT_MAX_POS(dpot->devid)) |
251 value;
252 return dpot_write_d8(dpot, val);
253 } else if (dpot->feat & F_SPI_16BIT) {
254 val = ((reg & DPOT_RDAC_MASK) <<
255 DPOT_MAX_POS(dpot->devid)) |
256 value;
257 return dpot_write_r8d8(dpot, val >> 8,
258 val & 0xFF);
259 } else
260 BUG();
261 } else {
262 if (dpot->uid == DPOT_UID(AD5291_ID) ||
263 dpot->uid == DPOT_UID(AD5292_ID) ||
264 dpot->uid == DPOT_UID(AD5293_ID)) {
265
266 dpot_write_r8d8(dpot, DPOT_AD5291_CTRLREG << 2,
267 DPOT_AD5291_UNLOCK_CMD);
268
269 if (dpot->uid == DPOT_UID(AD5291_ID))
270 value = value << 2;
271
272 return dpot_write_r8d8(dpot,
273 (DPOT_AD5291_RDAC << 2) |
274 (value >> 8), value & 0xFF);
275 } else if (dpot->uid == DPOT_UID(AD5270_ID) ||
276 dpot->uid == DPOT_UID(AD5271_ID)) {
277 dpot_write_r8d8(dpot,
278 DPOT_AD5270_1_2_4_CTRLREG << 2,
279 DPOT_AD5270_1_2_4_UNLOCK_CMD);
280
281 if (dpot->uid == DPOT_UID(AD5271_ID))
282 value = value << 2;
283
284 return dpot_write_r8d8(dpot,
285 (DPOT_AD5270_1_2_4_RDAC << 2) |
286 (value >> 8), value & 0xFF);
287 }
288 val = DPOT_SPI_RDAC | (reg & DPOT_RDAC_MASK);
289 }
290 } else if (reg & DPOT_ADDR_EEPROM) {
291 val = DPOT_SPI_EEPROM | (reg & DPOT_RDAC_MASK);
292 } else if (reg & DPOT_ADDR_CMD) {
293 switch (reg) {
294 case DPOT_DEC_ALL_6DB:
295 val = DPOT_SPI_DEC_ALL_6DB;
296 break;
297 case DPOT_INC_ALL_6DB:
298 val = DPOT_SPI_INC_ALL_6DB;
299 break;
300 case DPOT_DEC_ALL:
301 val = DPOT_SPI_DEC_ALL;
302 break;
303 case DPOT_INC_ALL:
304 val = DPOT_SPI_INC_ALL;
305 break;
306 }
307 } else if (reg & DPOT_ADDR_OTP) {
308 if (dpot->uid == DPOT_UID(AD5291_ID) ||
309 dpot->uid == DPOT_UID(AD5292_ID)) {
310 return dpot_write_r8d8(dpot,
311 DPOT_AD5291_STORE_XTPM << 2, 0);
312 } else if (dpot->uid == DPOT_UID(AD5270_ID) ||
313 dpot->uid == DPOT_UID(AD5271_ID)) {
314 return dpot_write_r8d8(dpot,
315 DPOT_AD5270_1_2_4_STORE_XTPM << 2, 0);
316 }
317 } else
318 BUG();
319
320 if (dpot->feat & F_SPI_16BIT)
321 return dpot_write_r8d8(dpot, val, value);
322 else if (dpot->feat & F_SPI_24BIT)
323 return dpot_write_r8d16(dpot, val, value);
324
325 return -EFAULT;
326}
327
328static s32 dpot_write_i2c(struct dpot_data *dpot, u8 reg, u16 value)
329{
330 /* Only write the instruction byte for certain commands */
331 unsigned tmp = 0, ctrl = 0;
332
333 switch (dpot->uid) {
334 case DPOT_UID(AD5246_ID):
335 case DPOT_UID(AD5247_ID):
336 return dpot_write_d8(dpot, value);
337
338 case DPOT_UID(AD5245_ID):
339 case DPOT_UID(AD5241_ID):
340 case DPOT_UID(AD5242_ID):
341 case DPOT_UID(AD5243_ID):
342 case DPOT_UID(AD5248_ID):
343 case DPOT_UID(AD5280_ID):
344 case DPOT_UID(AD5282_ID):
345 ctrl = ((reg & DPOT_RDAC_MASK) == DPOT_RDAC0) ?
346 0 : DPOT_AD5282_RDAC_AB;
347 return dpot_write_r8d8(dpot, ctrl, value);
348 case DPOT_UID(AD5171_ID):
349 case DPOT_UID(AD5273_ID):
350 if (reg & DPOT_ADDR_OTP) {
351 tmp = dpot_read_d8(dpot);
352 if (tmp >> 6) /* Ready to Program? */
353 return -EFAULT;
354 ctrl = DPOT_AD5273_FUSE;
355 }
356 return dpot_write_r8d8(dpot, ctrl, value);
357 case DPOT_UID(AD5172_ID):
358 case DPOT_UID(AD5173_ID):
359 ctrl = ((reg & DPOT_RDAC_MASK) == DPOT_RDAC0) ?
360 0 : DPOT_AD5172_3_A0;
361 if (reg & DPOT_ADDR_OTP) {
362 tmp = dpot_read_r8d16(dpot, ctrl);
363 if (tmp >> 14) /* Ready to Program? */
364 return -EFAULT;
365 ctrl |= DPOT_AD5170_2_3_FUSE;
366 }
367 return dpot_write_r8d8(dpot, ctrl, value);
368 case DPOT_UID(AD5170_ID):
369 if (reg & DPOT_ADDR_OTP) {
370 tmp = dpot_read_r8d16(dpot, tmp);
371 if (tmp >> 14) /* Ready to Program? */
372 return -EFAULT;
373 ctrl = DPOT_AD5170_2_3_FUSE;
374 }
375 return dpot_write_r8d8(dpot, ctrl, value);
376 case DPOT_UID(AD5272_ID):
377 case DPOT_UID(AD5274_ID):
378 dpot_write_r8d8(dpot, DPOT_AD5270_1_2_4_CTRLREG << 2,
379 DPOT_AD5270_1_2_4_UNLOCK_CMD);
380
381 if (reg & DPOT_ADDR_OTP)
382 return dpot_write_r8d8(dpot,
383 DPOT_AD5270_1_2_4_STORE_XTPM << 2, 0);
384
385 if (dpot->uid == DPOT_UID(AD5274_ID))
386 value = value << 2;
387
388 return dpot_write_r8d8(dpot, (DPOT_AD5270_1_2_4_RDAC << 2) |
389 (value >> 8), value & 0xFF);
390 default:
391 if (reg & DPOT_ADDR_CMD)
392 return dpot_write_d8(dpot, reg);
393
394 if (dpot->max_pos > 256)
395 return dpot_write_r8d16(dpot, (reg & 0xF8) |
396 ((reg & 0x7) << 1), value);
397 else
398 /* All other registers require instruction + data bytes */
399 return dpot_write_r8d8(dpot, reg, value);
400 }
401}
402
403static s32 dpot_write(struct dpot_data *dpot, u8 reg, u16 value)
404{
405 if (dpot->feat & F_SPI)
406 return dpot_write_spi(dpot, reg, value);
407 else
408 return dpot_write_i2c(dpot, reg, value);
409}
410
411/* sysfs functions */
412
413static ssize_t sysfs_show_reg(struct device *dev,
414 struct device_attribute *attr,
415 char *buf, u32 reg)
416{
417 struct dpot_data *data = dev_get_drvdata(dev);
418 s32 value;
419
420 if (reg & DPOT_ADDR_OTP_EN)
421 return sprintf(buf, "%s\n",
422 test_bit(DPOT_RDAC_MASK & reg, data->otp_en_mask) ?
423 "enabled" : "disabled");
424
425
426 mutex_lock(&data->update_lock);
427 value = dpot_read(data, reg);
428 mutex_unlock(&data->update_lock);
429
430 if (value < 0)
431 return -EINVAL;
432 /*
433 * Let someone else deal with converting this ...
434 * the tolerance is a two-byte value where the MSB
435 * is a sign + integer value, and the LSB is a
436 * decimal value. See page 18 of the AD5258
437 * datasheet (Rev. A) for more details.
438 */
439
440 if (reg & DPOT_REG_TOL)
441 return sprintf(buf, "0x%04x\n", value & 0xFFFF);
442 else
443 return sprintf(buf, "%u\n", value & data->rdac_mask);
444}
445
446static ssize_t sysfs_set_reg(struct device *dev,
447 struct device_attribute *attr,
448 const char *buf, size_t count, u32 reg)
449{
450 struct dpot_data *data = dev_get_drvdata(dev);
451 unsigned long value;
452 int err;
453
454 if (reg & DPOT_ADDR_OTP_EN) {
455 if (sysfs_streq(buf, "enabled"))
456 set_bit(DPOT_RDAC_MASK & reg, data->otp_en_mask);
457 else
458 clear_bit(DPOT_RDAC_MASK & reg, data->otp_en_mask);
459
460 return count;
461 }
462
463 if ((reg & DPOT_ADDR_OTP) &&
464 !test_bit(DPOT_RDAC_MASK & reg, data->otp_en_mask))
465 return -EPERM;
466
467 err = kstrtoul(buf, 10, &value);
468 if (err)
469 return err;
470
471 if (value > data->rdac_mask)
472 value = data->rdac_mask;
473
474 mutex_lock(&data->update_lock);
475 dpot_write(data, reg, value);
476 if (reg & DPOT_ADDR_EEPROM)
477 msleep(26); /* Sleep while the EEPROM updates */
478 else if (reg & DPOT_ADDR_OTP)
479 msleep(400); /* Sleep while the OTP updates */
480 mutex_unlock(&data->update_lock);
481
482 return count;
483}
484
485static ssize_t sysfs_do_cmd(struct device *dev,
486 struct device_attribute *attr,
487 const char *buf, size_t count, u32 reg)
488{
489 struct dpot_data *data = dev_get_drvdata(dev);
490
491 mutex_lock(&data->update_lock);
492 dpot_write(data, reg, 0);
493 mutex_unlock(&data->update_lock);
494
495 return count;
496}
497
498/* ------------------------------------------------------------------------- */
499
500#define DPOT_DEVICE_SHOW(_name, _reg) static ssize_t \
501show_##_name(struct device *dev, \
502 struct device_attribute *attr, char *buf) \
503{ \
504 return sysfs_show_reg(dev, attr, buf, _reg); \
505}
506
507#define DPOT_DEVICE_SET(_name, _reg) static ssize_t \
508set_##_name(struct device *dev, \
509 struct device_attribute *attr, \
510 const char *buf, size_t count) \
511{ \
512 return sysfs_set_reg(dev, attr, buf, count, _reg); \
513}
514
515#define DPOT_DEVICE_SHOW_SET(name, reg) \
516DPOT_DEVICE_SHOW(name, reg) \
517DPOT_DEVICE_SET(name, reg) \
518static DEVICE_ATTR(name, S_IWUSR | S_IRUGO, show_##name, set_##name);
519
520#define DPOT_DEVICE_SHOW_ONLY(name, reg) \
521DPOT_DEVICE_SHOW(name, reg) \
522static DEVICE_ATTR(name, S_IWUSR | S_IRUGO, show_##name, NULL);
523
524DPOT_DEVICE_SHOW_SET(rdac0, DPOT_ADDR_RDAC | DPOT_RDAC0);
525DPOT_DEVICE_SHOW_SET(eeprom0, DPOT_ADDR_EEPROM | DPOT_RDAC0);
526DPOT_DEVICE_SHOW_ONLY(tolerance0, DPOT_ADDR_EEPROM | DPOT_TOL_RDAC0);
527DPOT_DEVICE_SHOW_SET(otp0, DPOT_ADDR_OTP | DPOT_RDAC0);
528DPOT_DEVICE_SHOW_SET(otp0en, DPOT_ADDR_OTP_EN | DPOT_RDAC0);
529
530DPOT_DEVICE_SHOW_SET(rdac1, DPOT_ADDR_RDAC | DPOT_RDAC1);
531DPOT_DEVICE_SHOW_SET(eeprom1, DPOT_ADDR_EEPROM | DPOT_RDAC1);
532DPOT_DEVICE_SHOW_ONLY(tolerance1, DPOT_ADDR_EEPROM | DPOT_TOL_RDAC1);
533DPOT_DEVICE_SHOW_SET(otp1, DPOT_ADDR_OTP | DPOT_RDAC1);
534DPOT_DEVICE_SHOW_SET(otp1en, DPOT_ADDR_OTP_EN | DPOT_RDAC1);
535
536DPOT_DEVICE_SHOW_SET(rdac2, DPOT_ADDR_RDAC | DPOT_RDAC2);
537DPOT_DEVICE_SHOW_SET(eeprom2, DPOT_ADDR_EEPROM | DPOT_RDAC2);
538DPOT_DEVICE_SHOW_ONLY(tolerance2, DPOT_ADDR_EEPROM | DPOT_TOL_RDAC2);
539DPOT_DEVICE_SHOW_SET(otp2, DPOT_ADDR_OTP | DPOT_RDAC2);
540DPOT_DEVICE_SHOW_SET(otp2en, DPOT_ADDR_OTP_EN | DPOT_RDAC2);
541
542DPOT_DEVICE_SHOW_SET(rdac3, DPOT_ADDR_RDAC | DPOT_RDAC3);
543DPOT_DEVICE_SHOW_SET(eeprom3, DPOT_ADDR_EEPROM | DPOT_RDAC3);
544DPOT_DEVICE_SHOW_ONLY(tolerance3, DPOT_ADDR_EEPROM | DPOT_TOL_RDAC3);
545DPOT_DEVICE_SHOW_SET(otp3, DPOT_ADDR_OTP | DPOT_RDAC3);
546DPOT_DEVICE_SHOW_SET(otp3en, DPOT_ADDR_OTP_EN | DPOT_RDAC3);
547
548DPOT_DEVICE_SHOW_SET(rdac4, DPOT_ADDR_RDAC | DPOT_RDAC4);
549DPOT_DEVICE_SHOW_SET(eeprom4, DPOT_ADDR_EEPROM | DPOT_RDAC4);
550DPOT_DEVICE_SHOW_ONLY(tolerance4, DPOT_ADDR_EEPROM | DPOT_TOL_RDAC4);
551DPOT_DEVICE_SHOW_SET(otp4, DPOT_ADDR_OTP | DPOT_RDAC4);
552DPOT_DEVICE_SHOW_SET(otp4en, DPOT_ADDR_OTP_EN | DPOT_RDAC4);
553
554DPOT_DEVICE_SHOW_SET(rdac5, DPOT_ADDR_RDAC | DPOT_RDAC5);
555DPOT_DEVICE_SHOW_SET(eeprom5, DPOT_ADDR_EEPROM | DPOT_RDAC5);
556DPOT_DEVICE_SHOW_ONLY(tolerance5, DPOT_ADDR_EEPROM | DPOT_TOL_RDAC5);
557DPOT_DEVICE_SHOW_SET(otp5, DPOT_ADDR_OTP | DPOT_RDAC5);
558DPOT_DEVICE_SHOW_SET(otp5en, DPOT_ADDR_OTP_EN | DPOT_RDAC5);
559
560static const struct attribute *dpot_attrib_wipers[] = {
561 &dev_attr_rdac0.attr,
562 &dev_attr_rdac1.attr,
563 &dev_attr_rdac2.attr,
564 &dev_attr_rdac3.attr,
565 &dev_attr_rdac4.attr,
566 &dev_attr_rdac5.attr,
567 NULL
568};
569
570static const struct attribute *dpot_attrib_eeprom[] = {
571 &dev_attr_eeprom0.attr,
572 &dev_attr_eeprom1.attr,
573 &dev_attr_eeprom2.attr,
574 &dev_attr_eeprom3.attr,
575 &dev_attr_eeprom4.attr,
576 &dev_attr_eeprom5.attr,
577 NULL
578};
579
580static const struct attribute *dpot_attrib_otp[] = {
581 &dev_attr_otp0.attr,
582 &dev_attr_otp1.attr,
583 &dev_attr_otp2.attr,
584 &dev_attr_otp3.attr,
585 &dev_attr_otp4.attr,
586 &dev_attr_otp5.attr,
587 NULL
588};
589
590static const struct attribute *dpot_attrib_otp_en[] = {
591 &dev_attr_otp0en.attr,
592 &dev_attr_otp1en.attr,
593 &dev_attr_otp2en.attr,
594 &dev_attr_otp3en.attr,
595 &dev_attr_otp4en.attr,
596 &dev_attr_otp5en.attr,
597 NULL
598};
599
600static const struct attribute *dpot_attrib_tolerance[] = {
601 &dev_attr_tolerance0.attr,
602 &dev_attr_tolerance1.attr,
603 &dev_attr_tolerance2.attr,
604 &dev_attr_tolerance3.attr,
605 &dev_attr_tolerance4.attr,
606 &dev_attr_tolerance5.attr,
607 NULL
608};
609
610/* ------------------------------------------------------------------------- */
611
612#define DPOT_DEVICE_DO_CMD(_name, _cmd) static ssize_t \
613set_##_name(struct device *dev, \
614 struct device_attribute *attr, \
615 const char *buf, size_t count) \
616{ \
617 return sysfs_do_cmd(dev, attr, buf, count, _cmd); \
618} \
619static DEVICE_ATTR(_name, S_IWUSR | S_IRUGO, NULL, set_##_name);
620
621DPOT_DEVICE_DO_CMD(inc_all, DPOT_INC_ALL);
622DPOT_DEVICE_DO_CMD(dec_all, DPOT_DEC_ALL);
623DPOT_DEVICE_DO_CMD(inc_all_6db, DPOT_INC_ALL_6DB);
624DPOT_DEVICE_DO_CMD(dec_all_6db, DPOT_DEC_ALL_6DB);
625
626static struct attribute *ad525x_attributes_commands[] = {
627 &dev_attr_inc_all.attr,
628 &dev_attr_dec_all.attr,
629 &dev_attr_inc_all_6db.attr,
630 &dev_attr_dec_all_6db.attr,
631 NULL
632};
633
634static const struct attribute_group ad525x_group_commands = {
635 .attrs = ad525x_attributes_commands,
636};
637
638static int ad_dpot_add_files(struct device *dev,
639 unsigned features, unsigned rdac)
640{
641 int err = sysfs_create_file(&dev->kobj,
642 dpot_attrib_wipers[rdac]);
643 if (features & F_CMD_EEP)
644 err |= sysfs_create_file(&dev->kobj,
645 dpot_attrib_eeprom[rdac]);
646 if (features & F_CMD_TOL)
647 err |= sysfs_create_file(&dev->kobj,
648 dpot_attrib_tolerance[rdac]);
649 if (features & F_CMD_OTP) {
650 err |= sysfs_create_file(&dev->kobj,
651 dpot_attrib_otp_en[rdac]);
652 err |= sysfs_create_file(&dev->kobj,
653 dpot_attrib_otp[rdac]);
654 }
655
656 if (err)
657 dev_err(dev, "failed to register sysfs hooks for RDAC%d\n",
658 rdac);
659
660 return err;
661}
662
663static inline void ad_dpot_remove_files(struct device *dev,
664 unsigned features, unsigned rdac)
665{
666 sysfs_remove_file(&dev->kobj,
667 dpot_attrib_wipers[rdac]);
668 if (features & F_CMD_EEP)
669 sysfs_remove_file(&dev->kobj,
670 dpot_attrib_eeprom[rdac]);
671 if (features & F_CMD_TOL)
672 sysfs_remove_file(&dev->kobj,
673 dpot_attrib_tolerance[rdac]);
674 if (features & F_CMD_OTP) {
675 sysfs_remove_file(&dev->kobj,
676 dpot_attrib_otp_en[rdac]);
677 sysfs_remove_file(&dev->kobj,
678 dpot_attrib_otp[rdac]);
679 }
680}
681
682int ad_dpot_probe(struct device *dev,
683 struct ad_dpot_bus_data *bdata, unsigned long devid,
684 const char *name)
685{
686
687 struct dpot_data *data;
688 int i, err = 0;
689
690 data = kzalloc(sizeof(struct dpot_data), GFP_KERNEL);
691 if (!data) {
692 err = -ENOMEM;
693 goto exit;
694 }
695
696 dev_set_drvdata(dev, data);
697 mutex_init(&data->update_lock);
698
699 data->bdata = *bdata;
700 data->devid = devid;
701
702 data->max_pos = 1 << DPOT_MAX_POS(devid);
703 data->rdac_mask = data->max_pos - 1;
704 data->feat = DPOT_FEAT(devid);
705 data->uid = DPOT_UID(devid);
706 data->wipers = DPOT_WIPERS(devid);
707
708 for (i = DPOT_RDAC0; i < MAX_RDACS; i++)
709 if (data->wipers & (1 << i)) {
710 err = ad_dpot_add_files(dev, data->feat, i);
711 if (err)
712 goto exit_remove_files;
713 /* power-up midscale */
714 if (data->feat & F_RDACS_WONLY)
715 data->rdac_cache[i] = data->max_pos / 2;
716 }
717
718 if (data->feat & F_CMD_INC)
719 err = sysfs_create_group(&dev->kobj, &ad525x_group_commands);
720
721 if (err) {
722 dev_err(dev, "failed to register sysfs hooks\n");
723 goto exit_free;
724 }
725
726 dev_info(dev, "%s %d-Position Digital Potentiometer registered\n",
727 name, data->max_pos);
728
729 return 0;
730
731exit_remove_files:
732 for (i = DPOT_RDAC0; i < MAX_RDACS; i++)
733 if (data->wipers & (1 << i))
734 ad_dpot_remove_files(dev, data->feat, i);
735
736exit_free:
737 kfree(data);
738 dev_set_drvdata(dev, NULL);
739exit:
740 dev_err(dev, "failed to create client for %s ID 0x%lX\n",
741 name, devid);
742 return err;
743}
744EXPORT_SYMBOL(ad_dpot_probe);
745
746int ad_dpot_remove(struct device *dev)
747{
748 struct dpot_data *data = dev_get_drvdata(dev);
749 int i;
750
751 for (i = DPOT_RDAC0; i < MAX_RDACS; i++)
752 if (data->wipers & (1 << i))
753 ad_dpot_remove_files(dev, data->feat, i);
754
755 kfree(data);
756
757 return 0;
758}
759EXPORT_SYMBOL(ad_dpot_remove);
760
761
762MODULE_AUTHOR("Chris Verges <chrisv@cyberswitching.com>, "
763 "Michael Hennerich <hennerich@blackfin.uclinux.org>");
764MODULE_DESCRIPTION("Digital potentiometer driver");
765MODULE_LICENSE("GPL");