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1/*
2 * SH7705 Setup
3 *
4 * Copyright (C) 2006 - 2009 Paul Mundt
5 * Copyright (C) 2007 Nobuhiro Iwamatsu
6 *
7 * This file is subject to the terms and conditions of the GNU General Public
8 * License. See the file "COPYING" in the main directory of this archive
9 * for more details.
10 */
11#include <linux/platform_device.h>
12#include <linux/init.h>
13#include <linux/irq.h>
14#include <linux/serial.h>
15#include <linux/serial_sci.h>
16#include <linux/sh_timer.h>
17#include <linux/sh_intc.h>
18#include <asm/rtc.h>
19#include <cpu/serial.h>
20
21enum {
22 UNUSED = 0,
23
24 /* interrupt sources */
25 IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5,
26 PINT07, PINT815,
27
28 DMAC, SCIF0, SCIF2, ADC_ADI, USB,
29
30 TPU0, TPU1, TPU2, TPU3,
31 TMU0, TMU1, TMU2,
32
33 RTC, WDT, REF_RCMI,
34};
35
36static struct intc_vect vectors[] __initdata = {
37 /* IRQ0->5 are handled in setup-sh3.c */
38 INTC_VECT(PINT07, 0x700), INTC_VECT(PINT815, 0x720),
39 INTC_VECT(DMAC, 0x800), INTC_VECT(DMAC, 0x820),
40 INTC_VECT(DMAC, 0x840), INTC_VECT(DMAC, 0x860),
41 INTC_VECT(SCIF0, 0x880), INTC_VECT(SCIF0, 0x8a0),
42 INTC_VECT(SCIF0, 0x8e0),
43 INTC_VECT(SCIF2, 0x900), INTC_VECT(SCIF2, 0x920),
44 INTC_VECT(SCIF2, 0x960),
45 INTC_VECT(ADC_ADI, 0x980),
46 INTC_VECT(USB, 0xa20), INTC_VECT(USB, 0xa40),
47 INTC_VECT(TPU0, 0xc00), INTC_VECT(TPU1, 0xc20),
48 INTC_VECT(TPU2, 0xc80), INTC_VECT(TPU3, 0xca0),
49 INTC_VECT(TMU0, 0x400), INTC_VECT(TMU1, 0x420),
50 INTC_VECT(TMU2, 0x440), INTC_VECT(TMU2, 0x460),
51 INTC_VECT(RTC, 0x480), INTC_VECT(RTC, 0x4a0),
52 INTC_VECT(RTC, 0x4c0),
53 INTC_VECT(WDT, 0x560),
54 INTC_VECT(REF_RCMI, 0x580),
55};
56
57static struct intc_prio_reg prio_registers[] __initdata = {
58 { 0xfffffee2, 0, 16, 4, /* IPRA */ { TMU0, TMU1, TMU2, RTC } },
59 { 0xfffffee4, 0, 16, 4, /* IPRB */ { WDT, REF_RCMI, 0, 0 } },
60 { 0xa4000016, 0, 16, 4, /* IPRC */ { IRQ3, IRQ2, IRQ1, IRQ0 } },
61 { 0xa4000018, 0, 16, 4, /* IPRD */ { PINT07, PINT815, IRQ5, IRQ4 } },
62 { 0xa400001a, 0, 16, 4, /* IPRE */ { DMAC, SCIF0, SCIF2, ADC_ADI } },
63 { 0xa4080000, 0, 16, 4, /* IPRF */ { 0, 0, USB } },
64 { 0xa4080002, 0, 16, 4, /* IPRG */ { TPU0, TPU1 } },
65 { 0xa4080004, 0, 16, 4, /* IPRH */ { TPU2, TPU3 } },
66
67};
68
69static DECLARE_INTC_DESC(intc_desc, "sh7705", vectors, NULL,
70 NULL, prio_registers, NULL);
71
72static struct plat_sci_port scif0_platform_data = {
73 .flags = UPF_BOOT_AUTOCONF,
74 .scscr = SCSCR_TIE | SCSCR_RIE | SCSCR_TE |
75 SCSCR_RE | SCSCR_CKE1 | SCSCR_CKE0,
76 .type = PORT_SCIF,
77 .ops = &sh770x_sci_port_ops,
78 .regtype = SCIx_SH7705_SCIF_REGTYPE,
79};
80
81static struct resource scif0_resources[] = {
82 DEFINE_RES_MEM(0xa4410000, 0x100),
83 DEFINE_RES_IRQ(evt2irq(0x900)),
84};
85
86static struct platform_device scif0_device = {
87 .name = "sh-sci",
88 .id = 0,
89 .resource = scif0_resources,
90 .num_resources = ARRAY_SIZE(scif0_resources),
91 .dev = {
92 .platform_data = &scif0_platform_data,
93 },
94};
95
96static struct plat_sci_port scif1_platform_data = {
97 .flags = UPF_BOOT_AUTOCONF,
98 .scscr = SCSCR_TIE | SCSCR_RIE | SCSCR_TE | SCSCR_RE,
99 .type = PORT_SCIF,
100 .ops = &sh770x_sci_port_ops,
101 .regtype = SCIx_SH7705_SCIF_REGTYPE,
102};
103
104static struct resource scif1_resources[] = {
105 DEFINE_RES_MEM(0xa4400000, 0x100),
106 DEFINE_RES_IRQ(evt2irq(0x880)),
107};
108
109static struct platform_device scif1_device = {
110 .name = "sh-sci",
111 .id = 1,
112 .resource = scif1_resources,
113 .num_resources = ARRAY_SIZE(scif1_resources),
114 .dev = {
115 .platform_data = &scif1_platform_data,
116 },
117};
118
119static struct resource rtc_resources[] = {
120 [0] = {
121 .start = 0xfffffec0,
122 .end = 0xfffffec0 + 0x1e,
123 .flags = IORESOURCE_IO,
124 },
125 [1] = {
126 .start = evt2irq(0x480),
127 .flags = IORESOURCE_IRQ,
128 },
129};
130
131static struct sh_rtc_platform_info rtc_info = {
132 .capabilities = RTC_CAP_4_DIGIT_YEAR,
133};
134
135static struct platform_device rtc_device = {
136 .name = "sh-rtc",
137 .id = -1,
138 .num_resources = ARRAY_SIZE(rtc_resources),
139 .resource = rtc_resources,
140 .dev = {
141 .platform_data = &rtc_info,
142 },
143};
144
145static struct sh_timer_config tmu0_platform_data = {
146 .channel_offset = 0x02,
147 .timer_bit = 0,
148 .clockevent_rating = 200,
149};
150
151static struct resource tmu0_resources[] = {
152 [0] = {
153 .start = 0xfffffe94,
154 .end = 0xfffffe9f,
155 .flags = IORESOURCE_MEM,
156 },
157 [1] = {
158 .start = evt2irq(0x400),
159 .flags = IORESOURCE_IRQ,
160 },
161};
162
163static struct platform_device tmu0_device = {
164 .name = "sh_tmu",
165 .id = 0,
166 .dev = {
167 .platform_data = &tmu0_platform_data,
168 },
169 .resource = tmu0_resources,
170 .num_resources = ARRAY_SIZE(tmu0_resources),
171};
172
173static struct sh_timer_config tmu1_platform_data = {
174 .channel_offset = 0xe,
175 .timer_bit = 1,
176 .clocksource_rating = 200,
177};
178
179static struct resource tmu1_resources[] = {
180 [0] = {
181 .start = 0xfffffea0,
182 .end = 0xfffffeab,
183 .flags = IORESOURCE_MEM,
184 },
185 [1] = {
186 .start = evt2irq(0x420),
187 .flags = IORESOURCE_IRQ,
188 },
189};
190
191static struct platform_device tmu1_device = {
192 .name = "sh_tmu",
193 .id = 1,
194 .dev = {
195 .platform_data = &tmu1_platform_data,
196 },
197 .resource = tmu1_resources,
198 .num_resources = ARRAY_SIZE(tmu1_resources),
199};
200
201static struct sh_timer_config tmu2_platform_data = {
202 .channel_offset = 0x1a,
203 .timer_bit = 2,
204};
205
206static struct resource tmu2_resources[] = {
207 [0] = {
208 .start = 0xfffffeac,
209 .end = 0xfffffebb,
210 .flags = IORESOURCE_MEM,
211 },
212 [1] = {
213 .start = evt2irq(0x440),
214 .flags = IORESOURCE_IRQ,
215 },
216};
217
218static struct platform_device tmu2_device = {
219 .name = "sh_tmu",
220 .id = 2,
221 .dev = {
222 .platform_data = &tmu2_platform_data,
223 },
224 .resource = tmu2_resources,
225 .num_resources = ARRAY_SIZE(tmu2_resources),
226};
227
228static struct platform_device *sh7705_devices[] __initdata = {
229 &scif0_device,
230 &scif1_device,
231 &tmu0_device,
232 &tmu1_device,
233 &tmu2_device,
234 &rtc_device,
235};
236
237static int __init sh7705_devices_setup(void)
238{
239 return platform_add_devices(sh7705_devices,
240 ARRAY_SIZE(sh7705_devices));
241}
242arch_initcall(sh7705_devices_setup);
243
244static struct platform_device *sh7705_early_devices[] __initdata = {
245 &scif0_device,
246 &scif1_device,
247 &tmu0_device,
248 &tmu1_device,
249 &tmu2_device,
250};
251
252void __init plat_early_device_setup(void)
253{
254 early_platform_add_devices(sh7705_early_devices,
255 ARRAY_SIZE(sh7705_early_devices));
256}
257
258void __init plat_irq_setup(void)
259{
260 register_intc_controller(&intc_desc);
261 plat_irq_setup_sh3();
262}
1/*
2 * SH7705 Setup
3 *
4 * Copyright (C) 2006 - 2009 Paul Mundt
5 * Copyright (C) 2007 Nobuhiro Iwamatsu
6 *
7 * This file is subject to the terms and conditions of the GNU General Public
8 * License. See the file "COPYING" in the main directory of this archive
9 * for more details.
10 */
11#include <linux/platform_device.h>
12#include <linux/init.h>
13#include <linux/irq.h>
14#include <linux/serial.h>
15#include <linux/serial_sci.h>
16#include <linux/sh_timer.h>
17#include <linux/sh_intc.h>
18#include <asm/rtc.h>
19#include <cpu/serial.h>
20
21enum {
22 UNUSED = 0,
23
24 /* interrupt sources */
25 IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5,
26 PINT07, PINT815,
27
28 DMAC, SCIF0, SCIF2, ADC_ADI, USB,
29
30 TPU0, TPU1, TPU2, TPU3,
31 TMU0, TMU1, TMU2,
32
33 RTC, WDT, REF_RCMI,
34};
35
36static struct intc_vect vectors[] __initdata = {
37 /* IRQ0->5 are handled in setup-sh3.c */
38 INTC_VECT(PINT07, 0x700), INTC_VECT(PINT815, 0x720),
39 INTC_VECT(DMAC, 0x800), INTC_VECT(DMAC, 0x820),
40 INTC_VECT(DMAC, 0x840), INTC_VECT(DMAC, 0x860),
41 INTC_VECT(SCIF0, 0x880), INTC_VECT(SCIF0, 0x8a0),
42 INTC_VECT(SCIF0, 0x8e0),
43 INTC_VECT(SCIF2, 0x900), INTC_VECT(SCIF2, 0x920),
44 INTC_VECT(SCIF2, 0x960),
45 INTC_VECT(ADC_ADI, 0x980),
46 INTC_VECT(USB, 0xa20), INTC_VECT(USB, 0xa40),
47 INTC_VECT(TPU0, 0xc00), INTC_VECT(TPU1, 0xc20),
48 INTC_VECT(TPU2, 0xc80), INTC_VECT(TPU3, 0xca0),
49 INTC_VECT(TMU0, 0x400), INTC_VECT(TMU1, 0x420),
50 INTC_VECT(TMU2, 0x440), INTC_VECT(TMU2, 0x460),
51 INTC_VECT(RTC, 0x480), INTC_VECT(RTC, 0x4a0),
52 INTC_VECT(RTC, 0x4c0),
53 INTC_VECT(WDT, 0x560),
54 INTC_VECT(REF_RCMI, 0x580),
55};
56
57static struct intc_prio_reg prio_registers[] __initdata = {
58 { 0xfffffee2, 0, 16, 4, /* IPRA */ { TMU0, TMU1, TMU2, RTC } },
59 { 0xfffffee4, 0, 16, 4, /* IPRB */ { WDT, REF_RCMI, 0, 0 } },
60 { 0xa4000016, 0, 16, 4, /* IPRC */ { IRQ3, IRQ2, IRQ1, IRQ0 } },
61 { 0xa4000018, 0, 16, 4, /* IPRD */ { PINT07, PINT815, IRQ5, IRQ4 } },
62 { 0xa400001a, 0, 16, 4, /* IPRE */ { DMAC, SCIF0, SCIF2, ADC_ADI } },
63 { 0xa4080000, 0, 16, 4, /* IPRF */ { 0, 0, USB } },
64 { 0xa4080002, 0, 16, 4, /* IPRG */ { TPU0, TPU1 } },
65 { 0xa4080004, 0, 16, 4, /* IPRH */ { TPU2, TPU3 } },
66
67};
68
69static DECLARE_INTC_DESC(intc_desc, "sh7705", vectors, NULL,
70 NULL, prio_registers, NULL);
71
72static struct plat_sci_port scif0_platform_data = {
73 .flags = UPF_BOOT_AUTOCONF,
74 .scscr = SCSCR_TIE | SCSCR_RIE | SCSCR_TE |
75 SCSCR_RE | SCSCR_CKE1 | SCSCR_CKE0,
76 .type = PORT_SCIF,
77 .ops = &sh770x_sci_port_ops,
78 .regtype = SCIx_SH7705_SCIF_REGTYPE,
79};
80
81static struct resource scif0_resources[] = {
82 DEFINE_RES_MEM(0xa4410000, 0x100),
83 DEFINE_RES_IRQ(evt2irq(0x900)),
84};
85
86static struct platform_device scif0_device = {
87 .name = "sh-sci",
88 .id = 0,
89 .resource = scif0_resources,
90 .num_resources = ARRAY_SIZE(scif0_resources),
91 .dev = {
92 .platform_data = &scif0_platform_data,
93 },
94};
95
96static struct plat_sci_port scif1_platform_data = {
97 .flags = UPF_BOOT_AUTOCONF,
98 .scscr = SCSCR_TIE | SCSCR_RIE | SCSCR_TE | SCSCR_RE,
99 .type = PORT_SCIF,
100 .ops = &sh770x_sci_port_ops,
101 .regtype = SCIx_SH7705_SCIF_REGTYPE,
102};
103
104static struct resource scif1_resources[] = {
105 DEFINE_RES_MEM(0xa4400000, 0x100),
106 DEFINE_RES_IRQ(evt2irq(0x880)),
107};
108
109static struct platform_device scif1_device = {
110 .name = "sh-sci",
111 .id = 1,
112 .resource = scif1_resources,
113 .num_resources = ARRAY_SIZE(scif1_resources),
114 .dev = {
115 .platform_data = &scif1_platform_data,
116 },
117};
118
119static struct resource rtc_resources[] = {
120 [0] = {
121 .start = 0xfffffec0,
122 .end = 0xfffffec0 + 0x1e,
123 .flags = IORESOURCE_IO,
124 },
125 [1] = {
126 .start = evt2irq(0x480),
127 .flags = IORESOURCE_IRQ,
128 },
129};
130
131static struct sh_rtc_platform_info rtc_info = {
132 .capabilities = RTC_CAP_4_DIGIT_YEAR,
133};
134
135static struct platform_device rtc_device = {
136 .name = "sh-rtc",
137 .id = -1,
138 .num_resources = ARRAY_SIZE(rtc_resources),
139 .resource = rtc_resources,
140 .dev = {
141 .platform_data = &rtc_info,
142 },
143};
144
145static struct sh_timer_config tmu0_platform_data = {
146 .channels_mask = 7,
147};
148
149static struct resource tmu0_resources[] = {
150 DEFINE_RES_MEM(0xfffffe90, 0x2c),
151 DEFINE_RES_IRQ(evt2irq(0x400)),
152 DEFINE_RES_IRQ(evt2irq(0x420)),
153 DEFINE_RES_IRQ(evt2irq(0x440)),
154};
155
156static struct platform_device tmu0_device = {
157 .name = "sh-tmu-sh3",
158 .id = 0,
159 .dev = {
160 .platform_data = &tmu0_platform_data,
161 },
162 .resource = tmu0_resources,
163 .num_resources = ARRAY_SIZE(tmu0_resources),
164};
165
166static struct platform_device *sh7705_devices[] __initdata = {
167 &scif0_device,
168 &scif1_device,
169 &tmu0_device,
170 &rtc_device,
171};
172
173static int __init sh7705_devices_setup(void)
174{
175 return platform_add_devices(sh7705_devices,
176 ARRAY_SIZE(sh7705_devices));
177}
178arch_initcall(sh7705_devices_setup);
179
180static struct platform_device *sh7705_early_devices[] __initdata = {
181 &scif0_device,
182 &scif1_device,
183 &tmu0_device,
184};
185
186void __init plat_early_device_setup(void)
187{
188 early_platform_add_devices(sh7705_early_devices,
189 ARRAY_SIZE(sh7705_early_devices));
190}
191
192void __init plat_irq_setup(void)
193{
194 register_intc_controller(&intc_desc);
195 plat_irq_setup_sh3();
196}