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1/*
2 * Xilinx gpio driver for xps/axi_gpio IP.
3 *
4 * Copyright 2008 - 2013 Xilinx, Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2
8 * as published by the Free Software Foundation.
9 *
10 * You should have received a copy of the GNU General Public License
11 * along with this program; if not, write to the Free Software
12 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
13 */
14
15#include <linux/bitops.h>
16#include <linux/init.h>
17#include <linux/errno.h>
18#include <linux/module.h>
19#include <linux/of_device.h>
20#include <linux/of_platform.h>
21#include <linux/of_gpio.h>
22#include <linux/io.h>
23#include <linux/gpio.h>
24#include <linux/slab.h>
25
26/* Register Offset Definitions */
27#define XGPIO_DATA_OFFSET (0x0) /* Data register */
28#define XGPIO_TRI_OFFSET (0x4) /* I/O direction register */
29
30#define XGPIO_CHANNEL_OFFSET 0x8
31
32/* Read/Write access to the GPIO registers */
33#ifdef CONFIG_ARCH_ZYNQ
34# define xgpio_readreg(offset) readl(offset)
35# define xgpio_writereg(offset, val) writel(val, offset)
36#else
37# define xgpio_readreg(offset) __raw_readl(offset)
38# define xgpio_writereg(offset, val) __raw_writel(val, offset)
39#endif
40
41/**
42 * struct xgpio_instance - Stores information about GPIO device
43 * struct of_mm_gpio_chip mmchip: OF GPIO chip for memory mapped banks
44 * gpio_state: GPIO state shadow register
45 * gpio_dir: GPIO direction shadow register
46 * offset: GPIO channel offset
47 * gpio_lock: Lock used for synchronization
48 */
49struct xgpio_instance {
50 struct of_mm_gpio_chip mmchip;
51 u32 gpio_state;
52 u32 gpio_dir;
53 u32 offset;
54 spinlock_t gpio_lock;
55};
56
57/**
58 * xgpio_get - Read the specified signal of the GPIO device.
59 * @gc: Pointer to gpio_chip device structure.
60 * @gpio: GPIO signal number.
61 *
62 * This function reads the specified signal of the GPIO device. It returns 0 if
63 * the signal clear, 1 if signal is set or negative value on error.
64 */
65static int xgpio_get(struct gpio_chip *gc, unsigned int gpio)
66{
67 struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
68 struct xgpio_instance *chip =
69 container_of(mm_gc, struct xgpio_instance, mmchip);
70
71 void __iomem *regs = mm_gc->regs + chip->offset;
72
73 return !!(xgpio_readreg(regs + XGPIO_DATA_OFFSET) & BIT(gpio));
74}
75
76/**
77 * xgpio_set - Write the specified signal of the GPIO device.
78 * @gc: Pointer to gpio_chip device structure.
79 * @gpio: GPIO signal number.
80 * @val: Value to be written to specified signal.
81 *
82 * This function writes the specified value in to the specified signal of the
83 * GPIO device.
84 */
85static void xgpio_set(struct gpio_chip *gc, unsigned int gpio, int val)
86{
87 unsigned long flags;
88 struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
89 struct xgpio_instance *chip =
90 container_of(mm_gc, struct xgpio_instance, mmchip);
91 void __iomem *regs = mm_gc->regs;
92
93 spin_lock_irqsave(&chip->gpio_lock, flags);
94
95 /* Write to GPIO signal and set its direction to output */
96 if (val)
97 chip->gpio_state |= BIT(gpio);
98 else
99 chip->gpio_state &= ~BIT(gpio);
100
101 xgpio_writereg(regs + chip->offset + XGPIO_DATA_OFFSET,
102 chip->gpio_state);
103
104 spin_unlock_irqrestore(&chip->gpio_lock, flags);
105}
106
107/**
108 * xgpio_dir_in - Set the direction of the specified GPIO signal as input.
109 * @gc: Pointer to gpio_chip device structure.
110 * @gpio: GPIO signal number.
111 *
112 * This function sets the direction of specified GPIO signal as input.
113 * It returns 0 if direction of GPIO signals is set as input otherwise it
114 * returns negative error value.
115 */
116static int xgpio_dir_in(struct gpio_chip *gc, unsigned int gpio)
117{
118 unsigned long flags;
119 struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
120 struct xgpio_instance *chip =
121 container_of(mm_gc, struct xgpio_instance, mmchip);
122 void __iomem *regs = mm_gc->regs;
123
124 spin_lock_irqsave(&chip->gpio_lock, flags);
125
126 /* Set the GPIO bit in shadow register and set direction as input */
127 chip->gpio_dir |= BIT(gpio);
128 xgpio_writereg(regs + chip->offset + XGPIO_TRI_OFFSET, chip->gpio_dir);
129
130 spin_unlock_irqrestore(&chip->gpio_lock, flags);
131
132 return 0;
133}
134
135/**
136 * xgpio_dir_out - Set the direction of the specified GPIO signal as output.
137 * @gc: Pointer to gpio_chip device structure.
138 * @gpio: GPIO signal number.
139 * @val: Value to be written to specified signal.
140 *
141 * This function sets the direction of specified GPIO signal as output. If all
142 * GPIO signals of GPIO chip is configured as input then it returns
143 * error otherwise it returns 0.
144 */
145static int xgpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
146{
147 unsigned long flags;
148 struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
149 struct xgpio_instance *chip =
150 container_of(mm_gc, struct xgpio_instance, mmchip);
151 void __iomem *regs = mm_gc->regs;
152
153 spin_lock_irqsave(&chip->gpio_lock, flags);
154
155 /* Write state of GPIO signal */
156 if (val)
157 chip->gpio_state |= BIT(gpio);
158 else
159 chip->gpio_state &= ~BIT(gpio);
160 xgpio_writereg(regs + chip->offset + XGPIO_DATA_OFFSET,
161 chip->gpio_state);
162
163 /* Clear the GPIO bit in shadow register and set direction as output */
164 chip->gpio_dir &= ~BIT(gpio);
165 xgpio_writereg(regs + chip->offset + XGPIO_TRI_OFFSET, chip->gpio_dir);
166
167 spin_unlock_irqrestore(&chip->gpio_lock, flags);
168
169 return 0;
170}
171
172/**
173 * xgpio_save_regs - Set initial values of GPIO pins
174 * @mm_gc: pointer to memory mapped GPIO chip structure
175 */
176static void xgpio_save_regs(struct of_mm_gpio_chip *mm_gc)
177{
178 struct xgpio_instance *chip =
179 container_of(mm_gc, struct xgpio_instance, mmchip);
180
181 xgpio_writereg(mm_gc->regs + chip->offset + XGPIO_DATA_OFFSET,
182 chip->gpio_state);
183 xgpio_writereg(mm_gc->regs + chip->offset + XGPIO_TRI_OFFSET,
184 chip->gpio_dir);
185}
186
187/**
188 * xgpio_of_probe - Probe method for the GPIO device.
189 * @np: pointer to device tree node
190 *
191 * This function probes the GPIO device in the device tree. It initializes the
192 * driver data structure. It returns 0, if the driver is bound to the GPIO
193 * device, or a negative value if there is an error.
194 */
195static int xgpio_of_probe(struct device_node *np)
196{
197 struct xgpio_instance *chip;
198 int status = 0;
199 const u32 *tree_info;
200
201 chip = kzalloc(sizeof(*chip), GFP_KERNEL);
202 if (!chip)
203 return -ENOMEM;
204
205 /* Update GPIO state shadow register with default value */
206 of_property_read_u32(np, "xlnx,dout-default", &chip->gpio_state);
207
208 /* By default, all pins are inputs */
209 chip->gpio_dir = 0xFFFFFFFF;
210
211 /* Update GPIO direction shadow register with default value */
212 of_property_read_u32(np, "xlnx,tri-default", &chip->gpio_dir);
213
214 /* By default assume full GPIO controller */
215 chip->mmchip.gc.ngpio = 32;
216
217 /* Check device node and parent device node for device width */
218 of_property_read_u32(np, "xlnx,gpio-width",
219 (u32 *)&chip->mmchip.gc.ngpio);
220
221 spin_lock_init(&chip->gpio_lock);
222
223 chip->mmchip.gc.direction_input = xgpio_dir_in;
224 chip->mmchip.gc.direction_output = xgpio_dir_out;
225 chip->mmchip.gc.get = xgpio_get;
226 chip->mmchip.gc.set = xgpio_set;
227
228 chip->mmchip.save_regs = xgpio_save_regs;
229
230 /* Call the OF gpio helper to setup and register the GPIO device */
231 status = of_mm_gpiochip_add(np, &chip->mmchip);
232 if (status) {
233 kfree(chip);
234 pr_err("%s: error in probe function with status %d\n",
235 np->full_name, status);
236 return status;
237 }
238
239 pr_info("XGpio: %s: registered, base is %d\n", np->full_name,
240 chip->mmchip.gc.base);
241
242 tree_info = of_get_property(np, "xlnx,is-dual", NULL);
243 if (tree_info && be32_to_cpup(tree_info)) {
244 chip = kzalloc(sizeof(*chip), GFP_KERNEL);
245 if (!chip)
246 return -ENOMEM;
247
248 /* Add dual channel offset */
249 chip->offset = XGPIO_CHANNEL_OFFSET;
250
251 /* Update GPIO state shadow register with default value */
252 of_property_read_u32(np, "xlnx,dout-default-2",
253 &chip->gpio_state);
254
255 /* By default, all pins are inputs */
256 chip->gpio_dir = 0xFFFFFFFF;
257
258 /* Update GPIO direction shadow register with default value */
259 of_property_read_u32(np, "xlnx,tri-default-2", &chip->gpio_dir);
260
261 /* By default assume full GPIO controller */
262 chip->mmchip.gc.ngpio = 32;
263
264 /* Check device node and parent device node for device width */
265 of_property_read_u32(np, "xlnx,gpio2-width",
266 (u32 *)&chip->mmchip.gc.ngpio);
267
268 spin_lock_init(&chip->gpio_lock);
269
270 chip->mmchip.gc.direction_input = xgpio_dir_in;
271 chip->mmchip.gc.direction_output = xgpio_dir_out;
272 chip->mmchip.gc.get = xgpio_get;
273 chip->mmchip.gc.set = xgpio_set;
274
275 chip->mmchip.save_regs = xgpio_save_regs;
276
277 /* Call the OF gpio helper to setup and register the GPIO dev */
278 status = of_mm_gpiochip_add(np, &chip->mmchip);
279 if (status) {
280 kfree(chip);
281 pr_err("%s: error in probe function with status %d\n",
282 np->full_name, status);
283 return status;
284 }
285 pr_info("XGpio: %s: dual channel registered, base is %d\n",
286 np->full_name, chip->mmchip.gc.base);
287 }
288
289 return 0;
290}
291
292static struct of_device_id xgpio_of_match[] = {
293 { .compatible = "xlnx,xps-gpio-1.00.a", },
294 { /* end of list */ },
295};
296
297static int __init xgpio_init(void)
298{
299 struct device_node *np;
300
301 for_each_matching_node(np, xgpio_of_match)
302 xgpio_of_probe(np);
303
304 return 0;
305}
306
307/* Make sure we get initialized before anyone else tries to use us */
308subsys_initcall(xgpio_init);
309/* No exit call at the moment as we cannot unregister of GPIO chips */
310
311MODULE_AUTHOR("Xilinx, Inc.");
312MODULE_DESCRIPTION("Xilinx GPIO driver");
313MODULE_LICENSE("GPL");
1/*
2 * Xilinx gpio driver for xps/axi_gpio IP.
3 *
4 * Copyright 2008 - 2013 Xilinx, Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2
8 * as published by the Free Software Foundation.
9 *
10 * You should have received a copy of the GNU General Public License
11 * along with this program; if not, write to the Free Software
12 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
13 */
14
15#include <linux/bitops.h>
16#include <linux/init.h>
17#include <linux/errno.h>
18#include <linux/module.h>
19#include <linux/of_device.h>
20#include <linux/of_platform.h>
21#include <linux/of_gpio.h>
22#include <linux/io.h>
23#include <linux/gpio.h>
24#include <linux/slab.h>
25
26/* Register Offset Definitions */
27#define XGPIO_DATA_OFFSET (0x0) /* Data register */
28#define XGPIO_TRI_OFFSET (0x4) /* I/O direction register */
29
30#define XGPIO_CHANNEL_OFFSET 0x8
31
32/* Read/Write access to the GPIO registers */
33#if defined(CONFIG_ARCH_ZYNQ) || defined(CONFIG_X86)
34# define xgpio_readreg(offset) readl(offset)
35# define xgpio_writereg(offset, val) writel(val, offset)
36#else
37# define xgpio_readreg(offset) __raw_readl(offset)
38# define xgpio_writereg(offset, val) __raw_writel(val, offset)
39#endif
40
41/**
42 * struct xgpio_instance - Stores information about GPIO device
43 * @mmchip: OF GPIO chip for memory mapped banks
44 * @gpio_width: GPIO width for every channel
45 * @gpio_state: GPIO state shadow register
46 * @gpio_dir: GPIO direction shadow register
47 * @gpio_lock: Lock used for synchronization
48 */
49struct xgpio_instance {
50 struct of_mm_gpio_chip mmchip;
51 unsigned int gpio_width[2];
52 u32 gpio_state[2];
53 u32 gpio_dir[2];
54 spinlock_t gpio_lock[2];
55};
56
57static inline int xgpio_index(struct xgpio_instance *chip, int gpio)
58{
59 if (gpio >= chip->gpio_width[0])
60 return 1;
61
62 return 0;
63}
64
65static inline int xgpio_regoffset(struct xgpio_instance *chip, int gpio)
66{
67 if (xgpio_index(chip, gpio))
68 return XGPIO_CHANNEL_OFFSET;
69
70 return 0;
71}
72
73static inline int xgpio_offset(struct xgpio_instance *chip, int gpio)
74{
75 if (xgpio_index(chip, gpio))
76 return gpio - chip->gpio_width[0];
77
78 return gpio;
79}
80
81/**
82 * xgpio_get - Read the specified signal of the GPIO device.
83 * @gc: Pointer to gpio_chip device structure.
84 * @gpio: GPIO signal number.
85 *
86 * This function reads the specified signal of the GPIO device.
87 *
88 * Return:
89 * 0 if direction of GPIO signals is set as input otherwise it
90 * returns negative error value.
91 */
92static int xgpio_get(struct gpio_chip *gc, unsigned int gpio)
93{
94 struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
95 struct xgpio_instance *chip = gpiochip_get_data(gc);
96 u32 val;
97
98 val = xgpio_readreg(mm_gc->regs + XGPIO_DATA_OFFSET +
99 xgpio_regoffset(chip, gpio));
100
101 return !!(val & BIT(xgpio_offset(chip, gpio)));
102}
103
104/**
105 * xgpio_set - Write the specified signal of the GPIO device.
106 * @gc: Pointer to gpio_chip device structure.
107 * @gpio: GPIO signal number.
108 * @val: Value to be written to specified signal.
109 *
110 * This function writes the specified value in to the specified signal of the
111 * GPIO device.
112 */
113static void xgpio_set(struct gpio_chip *gc, unsigned int gpio, int val)
114{
115 unsigned long flags;
116 struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
117 struct xgpio_instance *chip = gpiochip_get_data(gc);
118 int index = xgpio_index(chip, gpio);
119 int offset = xgpio_offset(chip, gpio);
120
121 spin_lock_irqsave(&chip->gpio_lock[index], flags);
122
123 /* Write to GPIO signal and set its direction to output */
124 if (val)
125 chip->gpio_state[index] |= BIT(offset);
126 else
127 chip->gpio_state[index] &= ~BIT(offset);
128
129 xgpio_writereg(mm_gc->regs + XGPIO_DATA_OFFSET +
130 xgpio_regoffset(chip, gpio), chip->gpio_state[index]);
131
132 spin_unlock_irqrestore(&chip->gpio_lock[index], flags);
133}
134
135/**
136 * xgpio_dir_in - Set the direction of the specified GPIO signal as input.
137 * @gc: Pointer to gpio_chip device structure.
138 * @gpio: GPIO signal number.
139 *
140 * Return:
141 * 0 - if direction of GPIO signals is set as input
142 * otherwise it returns negative error value.
143 */
144static int xgpio_dir_in(struct gpio_chip *gc, unsigned int gpio)
145{
146 unsigned long flags;
147 struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
148 struct xgpio_instance *chip = gpiochip_get_data(gc);
149 int index = xgpio_index(chip, gpio);
150 int offset = xgpio_offset(chip, gpio);
151
152 spin_lock_irqsave(&chip->gpio_lock[index], flags);
153
154 /* Set the GPIO bit in shadow register and set direction as input */
155 chip->gpio_dir[index] |= BIT(offset);
156 xgpio_writereg(mm_gc->regs + XGPIO_TRI_OFFSET +
157 xgpio_regoffset(chip, gpio), chip->gpio_dir[index]);
158
159 spin_unlock_irqrestore(&chip->gpio_lock[index], flags);
160
161 return 0;
162}
163
164/**
165 * xgpio_dir_out - Set the direction of the specified GPIO signal as output.
166 * @gc: Pointer to gpio_chip device structure.
167 * @gpio: GPIO signal number.
168 * @val: Value to be written to specified signal.
169 *
170 * This function sets the direction of specified GPIO signal as output.
171 *
172 * Return:
173 * If all GPIO signals of GPIO chip is configured as input then it returns
174 * error otherwise it returns 0.
175 */
176static int xgpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
177{
178 unsigned long flags;
179 struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
180 struct xgpio_instance *chip = gpiochip_get_data(gc);
181 int index = xgpio_index(chip, gpio);
182 int offset = xgpio_offset(chip, gpio);
183
184 spin_lock_irqsave(&chip->gpio_lock[index], flags);
185
186 /* Write state of GPIO signal */
187 if (val)
188 chip->gpio_state[index] |= BIT(offset);
189 else
190 chip->gpio_state[index] &= ~BIT(offset);
191 xgpio_writereg(mm_gc->regs + XGPIO_DATA_OFFSET +
192 xgpio_regoffset(chip, gpio), chip->gpio_state[index]);
193
194 /* Clear the GPIO bit in shadow register and set direction as output */
195 chip->gpio_dir[index] &= ~BIT(offset);
196 xgpio_writereg(mm_gc->regs + XGPIO_TRI_OFFSET +
197 xgpio_regoffset(chip, gpio), chip->gpio_dir[index]);
198
199 spin_unlock_irqrestore(&chip->gpio_lock[index], flags);
200
201 return 0;
202}
203
204/**
205 * xgpio_save_regs - Set initial values of GPIO pins
206 * @mm_gc: Pointer to memory mapped GPIO chip structure
207 */
208static void xgpio_save_regs(struct of_mm_gpio_chip *mm_gc)
209{
210 struct xgpio_instance *chip =
211 container_of(mm_gc, struct xgpio_instance, mmchip);
212
213 xgpio_writereg(mm_gc->regs + XGPIO_DATA_OFFSET, chip->gpio_state[0]);
214 xgpio_writereg(mm_gc->regs + XGPIO_TRI_OFFSET, chip->gpio_dir[0]);
215
216 if (!chip->gpio_width[1])
217 return;
218
219 xgpio_writereg(mm_gc->regs + XGPIO_DATA_OFFSET + XGPIO_CHANNEL_OFFSET,
220 chip->gpio_state[1]);
221 xgpio_writereg(mm_gc->regs + XGPIO_TRI_OFFSET + XGPIO_CHANNEL_OFFSET,
222 chip->gpio_dir[1]);
223}
224
225/**
226 * xgpio_remove - Remove method for the GPIO device.
227 * @pdev: pointer to the platform device
228 *
229 * This function remove gpiochips and frees all the allocated resources.
230 *
231 * Return: 0 always
232 */
233static int xgpio_remove(struct platform_device *pdev)
234{
235 struct xgpio_instance *chip = platform_get_drvdata(pdev);
236
237 of_mm_gpiochip_remove(&chip->mmchip);
238
239 return 0;
240}
241
242/**
243 * xgpio_of_probe - Probe method for the GPIO device.
244 * @pdev: pointer to the platform device
245 *
246 * Return:
247 * It returns 0, if the driver is bound to the GPIO device, or
248 * a negative value if there is an error.
249 */
250static int xgpio_probe(struct platform_device *pdev)
251{
252 struct xgpio_instance *chip;
253 int status = 0;
254 struct device_node *np = pdev->dev.of_node;
255 u32 is_dual;
256
257 chip = devm_kzalloc(&pdev->dev, sizeof(*chip), GFP_KERNEL);
258 if (!chip)
259 return -ENOMEM;
260
261 platform_set_drvdata(pdev, chip);
262
263 /* Update GPIO state shadow register with default value */
264 of_property_read_u32(np, "xlnx,dout-default", &chip->gpio_state[0]);
265
266 /* Update GPIO direction shadow register with default value */
267 if (of_property_read_u32(np, "xlnx,tri-default", &chip->gpio_dir[0]))
268 chip->gpio_dir[0] = 0xFFFFFFFF;
269
270 /*
271 * Check device node and parent device node for device width
272 * and assume default width of 32
273 */
274 if (of_property_read_u32(np, "xlnx,gpio-width", &chip->gpio_width[0]))
275 chip->gpio_width[0] = 32;
276
277 spin_lock_init(&chip->gpio_lock[0]);
278
279 if (of_property_read_u32(np, "xlnx,is-dual", &is_dual))
280 is_dual = 0;
281
282 if (is_dual) {
283 /* Update GPIO state shadow register with default value */
284 of_property_read_u32(np, "xlnx,dout-default-2",
285 &chip->gpio_state[1]);
286
287 /* Update GPIO direction shadow register with default value */
288 if (of_property_read_u32(np, "xlnx,tri-default-2",
289 &chip->gpio_dir[1]))
290 chip->gpio_dir[1] = 0xFFFFFFFF;
291
292 /*
293 * Check device node and parent device node for device width
294 * and assume default width of 32
295 */
296 if (of_property_read_u32(np, "xlnx,gpio2-width",
297 &chip->gpio_width[1]))
298 chip->gpio_width[1] = 32;
299
300 spin_lock_init(&chip->gpio_lock[1]);
301 }
302
303 chip->mmchip.gc.ngpio = chip->gpio_width[0] + chip->gpio_width[1];
304 chip->mmchip.gc.parent = &pdev->dev;
305 chip->mmchip.gc.direction_input = xgpio_dir_in;
306 chip->mmchip.gc.direction_output = xgpio_dir_out;
307 chip->mmchip.gc.get = xgpio_get;
308 chip->mmchip.gc.set = xgpio_set;
309
310 chip->mmchip.save_regs = xgpio_save_regs;
311
312 /* Call the OF gpio helper to setup and register the GPIO device */
313 status = of_mm_gpiochip_add_data(np, &chip->mmchip, chip);
314 if (status) {
315 pr_err("%s: error in probe function with status %d\n",
316 np->full_name, status);
317 return status;
318 }
319
320 return 0;
321}
322
323static const struct of_device_id xgpio_of_match[] = {
324 { .compatible = "xlnx,xps-gpio-1.00.a", },
325 { /* end of list */ },
326};
327
328MODULE_DEVICE_TABLE(of, xgpio_of_match);
329
330static struct platform_driver xgpio_plat_driver = {
331 .probe = xgpio_probe,
332 .remove = xgpio_remove,
333 .driver = {
334 .name = "gpio-xilinx",
335 .of_match_table = xgpio_of_match,
336 },
337};
338
339static int __init xgpio_init(void)
340{
341 return platform_driver_register(&xgpio_plat_driver);
342}
343
344subsys_initcall(xgpio_init);
345
346static void __exit xgpio_exit(void)
347{
348 platform_driver_unregister(&xgpio_plat_driver);
349}
350module_exit(xgpio_exit);
351
352MODULE_AUTHOR("Xilinx, Inc.");
353MODULE_DESCRIPTION("Xilinx GPIO driver");
354MODULE_LICENSE("GPL");