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1/*
2 * Copyright 2010 Tilera Corporation. All Rights Reserved.
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation, version 2.
7 *
8 * This program is distributed in the hope that it will be useful, but
9 * WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
11 * NON INFRINGEMENT. See the GNU General Public License for
12 * more details.
13 */
14
15#include <linux/sched.h>
16#include <linux/preempt.h>
17#include <linux/module.h>
18#include <linux/fs.h>
19#include <linux/kprobes.h>
20#include <linux/elfcore.h>
21#include <linux/tick.h>
22#include <linux/init.h>
23#include <linux/mm.h>
24#include <linux/compat.h>
25#include <linux/hardirq.h>
26#include <linux/syscalls.h>
27#include <linux/kernel.h>
28#include <linux/tracehook.h>
29#include <linux/signal.h>
30#include <asm/stack.h>
31#include <asm/switch_to.h>
32#include <asm/homecache.h>
33#include <asm/syscalls.h>
34#include <asm/traps.h>
35#include <asm/setup.h>
36#include <asm/uaccess.h>
37#ifdef CONFIG_HARDWALL
38#include <asm/hardwall.h>
39#endif
40#include <arch/chip.h>
41#include <arch/abi.h>
42#include <arch/sim_def.h>
43
44/*
45 * Use the (x86) "idle=poll" option to prefer low latency when leaving the
46 * idle loop over low power while in the idle loop, e.g. if we have
47 * one thread per core and we want to get threads out of futex waits fast.
48 */
49static int __init idle_setup(char *str)
50{
51 if (!str)
52 return -EINVAL;
53
54 if (!strcmp(str, "poll")) {
55 pr_info("using polling idle threads.\n");
56 cpu_idle_poll_ctrl(true);
57 return 0;
58 } else if (!strcmp(str, "halt")) {
59 return 0;
60 }
61 return -1;
62}
63early_param("idle", idle_setup);
64
65void arch_cpu_idle(void)
66{
67 __get_cpu_var(irq_stat).idle_timestamp = jiffies;
68 _cpu_idle();
69}
70
71/*
72 * Release a thread_info structure
73 */
74void arch_release_thread_info(struct thread_info *info)
75{
76 struct single_step_state *step_state = info->step_state;
77
78 if (step_state) {
79
80 /*
81 * FIXME: we don't munmap step_state->buffer
82 * because the mm_struct for this process (info->task->mm)
83 * has already been zeroed in exit_mm(). Keeping a
84 * reference to it here seems like a bad move, so this
85 * means we can't munmap() the buffer, and therefore if we
86 * ptrace multiple threads in a process, we will slowly
87 * leak user memory. (Note that as soon as the last
88 * thread in a process dies, we will reclaim all user
89 * memory including single-step buffers in the usual way.)
90 * We should either assign a kernel VA to this buffer
91 * somehow, or we should associate the buffer(s) with the
92 * mm itself so we can clean them up that way.
93 */
94 kfree(step_state);
95 }
96}
97
98static void save_arch_state(struct thread_struct *t);
99
100int copy_thread(unsigned long clone_flags, unsigned long sp,
101 unsigned long arg, struct task_struct *p)
102{
103 struct pt_regs *childregs = task_pt_regs(p);
104 unsigned long ksp;
105 unsigned long *callee_regs;
106
107 /*
108 * Set up the stack and stack pointer appropriately for the
109 * new child to find itself woken up in __switch_to().
110 * The callee-saved registers must be on the stack to be read;
111 * the new task will then jump to assembly support to handle
112 * calling schedule_tail(), etc., and (for userspace tasks)
113 * returning to the context set up in the pt_regs.
114 */
115 ksp = (unsigned long) childregs;
116 ksp -= C_ABI_SAVE_AREA_SIZE; /* interrupt-entry save area */
117 ((long *)ksp)[0] = ((long *)ksp)[1] = 0;
118 ksp -= CALLEE_SAVED_REGS_COUNT * sizeof(unsigned long);
119 callee_regs = (unsigned long *)ksp;
120 ksp -= C_ABI_SAVE_AREA_SIZE; /* __switch_to() save area */
121 ((long *)ksp)[0] = ((long *)ksp)[1] = 0;
122 p->thread.ksp = ksp;
123
124 /* Record the pid of the task that created this one. */
125 p->thread.creator_pid = current->pid;
126
127 if (unlikely(p->flags & PF_KTHREAD)) {
128 /* kernel thread */
129 memset(childregs, 0, sizeof(struct pt_regs));
130 memset(&callee_regs[2], 0,
131 (CALLEE_SAVED_REGS_COUNT - 2) * sizeof(unsigned long));
132 callee_regs[0] = sp; /* r30 = function */
133 callee_regs[1] = arg; /* r31 = arg */
134 childregs->ex1 = PL_ICS_EX1(KERNEL_PL, 0);
135 p->thread.pc = (unsigned long) ret_from_kernel_thread;
136 return 0;
137 }
138
139 /*
140 * Start new thread in ret_from_fork so it schedules properly
141 * and then return from interrupt like the parent.
142 */
143 p->thread.pc = (unsigned long) ret_from_fork;
144
145 /*
146 * Do not clone step state from the parent; each thread
147 * must make its own lazily.
148 */
149 task_thread_info(p)->step_state = NULL;
150
151#ifdef __tilegx__
152 /*
153 * Do not clone unalign jit fixup from the parent; each thread
154 * must allocate its own on demand.
155 */
156 task_thread_info(p)->unalign_jit_base = NULL;
157#endif
158
159 /*
160 * Copy the registers onto the kernel stack so the
161 * return-from-interrupt code will reload it into registers.
162 */
163 *childregs = *current_pt_regs();
164 childregs->regs[0] = 0; /* return value is zero */
165 if (sp)
166 childregs->sp = sp; /* override with new user stack pointer */
167 memcpy(callee_regs, &childregs->regs[CALLEE_SAVED_FIRST_REG],
168 CALLEE_SAVED_REGS_COUNT * sizeof(unsigned long));
169
170 /* Save user stack top pointer so we can ID the stack vm area later. */
171 p->thread.usp0 = childregs->sp;
172
173 /*
174 * If CLONE_SETTLS is set, set "tp" in the new task to "r4",
175 * which is passed in as arg #5 to sys_clone().
176 */
177 if (clone_flags & CLONE_SETTLS)
178 childregs->tp = childregs->regs[4];
179
180
181#if CHIP_HAS_TILE_DMA()
182 /*
183 * No DMA in the new thread. We model this on the fact that
184 * fork() clears the pending signals, alarms, and aio for the child.
185 */
186 memset(&p->thread.tile_dma_state, 0, sizeof(struct tile_dma_state));
187 memset(&p->thread.dma_async_tlb, 0, sizeof(struct async_tlb));
188#endif
189
190 /* New thread has its miscellaneous processor state bits clear. */
191 p->thread.proc_status = 0;
192
193#ifdef CONFIG_HARDWALL
194 /* New thread does not own any networks. */
195 memset(&p->thread.hardwall[0], 0,
196 sizeof(struct hardwall_task) * HARDWALL_TYPES);
197#endif
198
199
200 /*
201 * Start the new thread with the current architecture state
202 * (user interrupt masks, etc.).
203 */
204 save_arch_state(&p->thread);
205
206 return 0;
207}
208
209int set_unalign_ctl(struct task_struct *tsk, unsigned int val)
210{
211 task_thread_info(tsk)->align_ctl = val;
212 return 0;
213}
214
215int get_unalign_ctl(struct task_struct *tsk, unsigned long adr)
216{
217 return put_user(task_thread_info(tsk)->align_ctl,
218 (unsigned int __user *)adr);
219}
220
221static struct task_struct corrupt_current = { .comm = "<corrupt>" };
222
223/*
224 * Return "current" if it looks plausible, or else a pointer to a dummy.
225 * This can be helpful if we are just trying to emit a clean panic.
226 */
227struct task_struct *validate_current(void)
228{
229 struct task_struct *tsk = current;
230 if (unlikely((unsigned long)tsk < PAGE_OFFSET ||
231 (high_memory && (void *)tsk > high_memory) ||
232 ((unsigned long)tsk & (__alignof__(*tsk) - 1)) != 0)) {
233 pr_err("Corrupt 'current' %p (sp %#lx)\n", tsk, stack_pointer);
234 tsk = &corrupt_current;
235 }
236 return tsk;
237}
238
239/* Take and return the pointer to the previous task, for schedule_tail(). */
240struct task_struct *sim_notify_fork(struct task_struct *prev)
241{
242 struct task_struct *tsk = current;
243 __insn_mtspr(SPR_SIM_CONTROL, SIM_CONTROL_OS_FORK_PARENT |
244 (tsk->thread.creator_pid << _SIM_CONTROL_OPERATOR_BITS));
245 __insn_mtspr(SPR_SIM_CONTROL, SIM_CONTROL_OS_FORK |
246 (tsk->pid << _SIM_CONTROL_OPERATOR_BITS));
247 return prev;
248}
249
250int dump_task_regs(struct task_struct *tsk, elf_gregset_t *regs)
251{
252 struct pt_regs *ptregs = task_pt_regs(tsk);
253 elf_core_copy_regs(regs, ptregs);
254 return 1;
255}
256
257#if CHIP_HAS_TILE_DMA()
258
259/* Allow user processes to access the DMA SPRs */
260void grant_dma_mpls(void)
261{
262#if CONFIG_KERNEL_PL == 2
263 __insn_mtspr(SPR_MPL_DMA_CPL_SET_1, 1);
264 __insn_mtspr(SPR_MPL_DMA_NOTIFY_SET_1, 1);
265#else
266 __insn_mtspr(SPR_MPL_DMA_CPL_SET_0, 1);
267 __insn_mtspr(SPR_MPL_DMA_NOTIFY_SET_0, 1);
268#endif
269}
270
271/* Forbid user processes from accessing the DMA SPRs */
272void restrict_dma_mpls(void)
273{
274#if CONFIG_KERNEL_PL == 2
275 __insn_mtspr(SPR_MPL_DMA_CPL_SET_2, 1);
276 __insn_mtspr(SPR_MPL_DMA_NOTIFY_SET_2, 1);
277#else
278 __insn_mtspr(SPR_MPL_DMA_CPL_SET_1, 1);
279 __insn_mtspr(SPR_MPL_DMA_NOTIFY_SET_1, 1);
280#endif
281}
282
283/* Pause the DMA engine, then save off its state registers. */
284static void save_tile_dma_state(struct tile_dma_state *dma)
285{
286 unsigned long state = __insn_mfspr(SPR_DMA_USER_STATUS);
287 unsigned long post_suspend_state;
288
289 /* If we're running, suspend the engine. */
290 if ((state & DMA_STATUS_MASK) == SPR_DMA_STATUS__RUNNING_MASK)
291 __insn_mtspr(SPR_DMA_CTR, SPR_DMA_CTR__SUSPEND_MASK);
292
293 /*
294 * Wait for the engine to idle, then save regs. Note that we
295 * want to record the "running" bit from before suspension,
296 * and the "done" bit from after, so that we can properly
297 * distinguish a case where the user suspended the engine from
298 * the case where the kernel suspended as part of the context
299 * swap.
300 */
301 do {
302 post_suspend_state = __insn_mfspr(SPR_DMA_USER_STATUS);
303 } while (post_suspend_state & SPR_DMA_STATUS__BUSY_MASK);
304
305 dma->src = __insn_mfspr(SPR_DMA_SRC_ADDR);
306 dma->src_chunk = __insn_mfspr(SPR_DMA_SRC_CHUNK_ADDR);
307 dma->dest = __insn_mfspr(SPR_DMA_DST_ADDR);
308 dma->dest_chunk = __insn_mfspr(SPR_DMA_DST_CHUNK_ADDR);
309 dma->strides = __insn_mfspr(SPR_DMA_STRIDE);
310 dma->chunk_size = __insn_mfspr(SPR_DMA_CHUNK_SIZE);
311 dma->byte = __insn_mfspr(SPR_DMA_BYTE);
312 dma->status = (state & SPR_DMA_STATUS__RUNNING_MASK) |
313 (post_suspend_state & SPR_DMA_STATUS__DONE_MASK);
314}
315
316/* Restart a DMA that was running before we were context-switched out. */
317static void restore_tile_dma_state(struct thread_struct *t)
318{
319 const struct tile_dma_state *dma = &t->tile_dma_state;
320
321 /*
322 * The only way to restore the done bit is to run a zero
323 * length transaction.
324 */
325 if ((dma->status & SPR_DMA_STATUS__DONE_MASK) &&
326 !(__insn_mfspr(SPR_DMA_USER_STATUS) & SPR_DMA_STATUS__DONE_MASK)) {
327 __insn_mtspr(SPR_DMA_BYTE, 0);
328 __insn_mtspr(SPR_DMA_CTR, SPR_DMA_CTR__REQUEST_MASK);
329 while (__insn_mfspr(SPR_DMA_USER_STATUS) &
330 SPR_DMA_STATUS__BUSY_MASK)
331 ;
332 }
333
334 __insn_mtspr(SPR_DMA_SRC_ADDR, dma->src);
335 __insn_mtspr(SPR_DMA_SRC_CHUNK_ADDR, dma->src_chunk);
336 __insn_mtspr(SPR_DMA_DST_ADDR, dma->dest);
337 __insn_mtspr(SPR_DMA_DST_CHUNK_ADDR, dma->dest_chunk);
338 __insn_mtspr(SPR_DMA_STRIDE, dma->strides);
339 __insn_mtspr(SPR_DMA_CHUNK_SIZE, dma->chunk_size);
340 __insn_mtspr(SPR_DMA_BYTE, dma->byte);
341
342 /*
343 * Restart the engine if we were running and not done.
344 * Clear a pending async DMA fault that we were waiting on return
345 * to user space to execute, since we expect the DMA engine
346 * to regenerate those faults for us now. Note that we don't
347 * try to clear the TIF_ASYNC_TLB flag, since it's relatively
348 * harmless if set, and it covers both DMA and the SN processor.
349 */
350 if ((dma->status & DMA_STATUS_MASK) == SPR_DMA_STATUS__RUNNING_MASK) {
351 t->dma_async_tlb.fault_num = 0;
352 __insn_mtspr(SPR_DMA_CTR, SPR_DMA_CTR__REQUEST_MASK);
353 }
354}
355
356#endif
357
358static void save_arch_state(struct thread_struct *t)
359{
360#if CHIP_HAS_SPLIT_INTR_MASK()
361 t->interrupt_mask = __insn_mfspr(SPR_INTERRUPT_MASK_0_0) |
362 ((u64)__insn_mfspr(SPR_INTERRUPT_MASK_0_1) << 32);
363#else
364 t->interrupt_mask = __insn_mfspr(SPR_INTERRUPT_MASK_0);
365#endif
366 t->ex_context[0] = __insn_mfspr(SPR_EX_CONTEXT_0_0);
367 t->ex_context[1] = __insn_mfspr(SPR_EX_CONTEXT_0_1);
368 t->system_save[0] = __insn_mfspr(SPR_SYSTEM_SAVE_0_0);
369 t->system_save[1] = __insn_mfspr(SPR_SYSTEM_SAVE_0_1);
370 t->system_save[2] = __insn_mfspr(SPR_SYSTEM_SAVE_0_2);
371 t->system_save[3] = __insn_mfspr(SPR_SYSTEM_SAVE_0_3);
372 t->intctrl_0 = __insn_mfspr(SPR_INTCTRL_0_STATUS);
373 t->proc_status = __insn_mfspr(SPR_PROC_STATUS);
374#if !CHIP_HAS_FIXED_INTVEC_BASE()
375 t->interrupt_vector_base = __insn_mfspr(SPR_INTERRUPT_VECTOR_BASE_0);
376#endif
377 t->tile_rtf_hwm = __insn_mfspr(SPR_TILE_RTF_HWM);
378#if CHIP_HAS_DSTREAM_PF()
379 t->dstream_pf = __insn_mfspr(SPR_DSTREAM_PF);
380#endif
381}
382
383static void restore_arch_state(const struct thread_struct *t)
384{
385#if CHIP_HAS_SPLIT_INTR_MASK()
386 __insn_mtspr(SPR_INTERRUPT_MASK_0_0, (u32) t->interrupt_mask);
387 __insn_mtspr(SPR_INTERRUPT_MASK_0_1, t->interrupt_mask >> 32);
388#else
389 __insn_mtspr(SPR_INTERRUPT_MASK_0, t->interrupt_mask);
390#endif
391 __insn_mtspr(SPR_EX_CONTEXT_0_0, t->ex_context[0]);
392 __insn_mtspr(SPR_EX_CONTEXT_0_1, t->ex_context[1]);
393 __insn_mtspr(SPR_SYSTEM_SAVE_0_0, t->system_save[0]);
394 __insn_mtspr(SPR_SYSTEM_SAVE_0_1, t->system_save[1]);
395 __insn_mtspr(SPR_SYSTEM_SAVE_0_2, t->system_save[2]);
396 __insn_mtspr(SPR_SYSTEM_SAVE_0_3, t->system_save[3]);
397 __insn_mtspr(SPR_INTCTRL_0_STATUS, t->intctrl_0);
398 __insn_mtspr(SPR_PROC_STATUS, t->proc_status);
399#if !CHIP_HAS_FIXED_INTVEC_BASE()
400 __insn_mtspr(SPR_INTERRUPT_VECTOR_BASE_0, t->interrupt_vector_base);
401#endif
402 __insn_mtspr(SPR_TILE_RTF_HWM, t->tile_rtf_hwm);
403#if CHIP_HAS_DSTREAM_PF()
404 __insn_mtspr(SPR_DSTREAM_PF, t->dstream_pf);
405#endif
406}
407
408
409void _prepare_arch_switch(struct task_struct *next)
410{
411#if CHIP_HAS_TILE_DMA()
412 struct tile_dma_state *dma = ¤t->thread.tile_dma_state;
413 if (dma->enabled)
414 save_tile_dma_state(dma);
415#endif
416}
417
418
419struct task_struct *__sched _switch_to(struct task_struct *prev,
420 struct task_struct *next)
421{
422 /* DMA state is already saved; save off other arch state. */
423 save_arch_state(&prev->thread);
424
425#if CHIP_HAS_TILE_DMA()
426 /*
427 * Restore DMA in new task if desired.
428 * Note that it is only safe to restart here since interrupts
429 * are disabled, so we can't take any DMATLB miss or access
430 * interrupts before we have finished switching stacks.
431 */
432 if (next->thread.tile_dma_state.enabled) {
433 restore_tile_dma_state(&next->thread);
434 grant_dma_mpls();
435 } else {
436 restrict_dma_mpls();
437 }
438#endif
439
440 /* Restore other arch state. */
441 restore_arch_state(&next->thread);
442
443#ifdef CONFIG_HARDWALL
444 /* Enable or disable access to the network registers appropriately. */
445 hardwall_switch_tasks(prev, next);
446#endif
447
448 /*
449 * Switch kernel SP, PC, and callee-saved registers.
450 * In the context of the new task, return the old task pointer
451 * (i.e. the task that actually called __switch_to).
452 * Pass the value to use for SYSTEM_SAVE_K_0 when we reset our sp.
453 */
454 return __switch_to(prev, next, next_current_ksp0(next));
455}
456
457/*
458 * This routine is called on return from interrupt if any of the
459 * TIF_WORK_MASK flags are set in thread_info->flags. It is
460 * entered with interrupts disabled so we don't miss an event
461 * that modified the thread_info flags. If any flag is set, we
462 * handle it and return, and the calling assembly code will
463 * re-disable interrupts, reload the thread flags, and call back
464 * if more flags need to be handled.
465 *
466 * We return whether we need to check the thread_info flags again
467 * or not. Note that we don't clear TIF_SINGLESTEP here, so it's
468 * important that it be tested last, and then claim that we don't
469 * need to recheck the flags.
470 */
471int do_work_pending(struct pt_regs *regs, u32 thread_info_flags)
472{
473 /* If we enter in kernel mode, do nothing and exit the caller loop. */
474 if (!user_mode(regs))
475 return 0;
476
477 /* Enable interrupts; they are disabled again on return to caller. */
478 local_irq_enable();
479
480 if (thread_info_flags & _TIF_NEED_RESCHED) {
481 schedule();
482 return 1;
483 }
484#if CHIP_HAS_TILE_DMA()
485 if (thread_info_flags & _TIF_ASYNC_TLB) {
486 do_async_page_fault(regs);
487 return 1;
488 }
489#endif
490 if (thread_info_flags & _TIF_SIGPENDING) {
491 do_signal(regs);
492 return 1;
493 }
494 if (thread_info_flags & _TIF_NOTIFY_RESUME) {
495 clear_thread_flag(TIF_NOTIFY_RESUME);
496 tracehook_notify_resume(regs);
497 return 1;
498 }
499 if (thread_info_flags & _TIF_SINGLESTEP) {
500 single_step_once(regs);
501 return 0;
502 }
503 panic("work_pending: bad flags %#x\n", thread_info_flags);
504}
505
506unsigned long get_wchan(struct task_struct *p)
507{
508 struct KBacktraceIterator kbt;
509
510 if (!p || p == current || p->state == TASK_RUNNING)
511 return 0;
512
513 for (KBacktraceIterator_init(&kbt, p, NULL);
514 !KBacktraceIterator_end(&kbt);
515 KBacktraceIterator_next(&kbt)) {
516 if (!in_sched_functions(kbt.it.pc))
517 return kbt.it.pc;
518 }
519
520 return 0;
521}
522
523/* Flush thread state. */
524void flush_thread(void)
525{
526 /* Nothing */
527}
528
529/*
530 * Free current thread data structures etc..
531 */
532void exit_thread(void)
533{
534#ifdef CONFIG_HARDWALL
535 /*
536 * Remove the task from the list of tasks that are associated
537 * with any live hardwalls. (If the task that is exiting held
538 * the last reference to a hardwall fd, it would already have
539 * been released and deactivated at this point.)
540 */
541 hardwall_deactivate_all(current);
542#endif
543}
544
545void show_regs(struct pt_regs *regs)
546{
547 struct task_struct *tsk = validate_current();
548 int i;
549
550 pr_err("\n");
551 if (tsk != &corrupt_current)
552 show_regs_print_info(KERN_ERR);
553#ifdef __tilegx__
554 for (i = 0; i < 17; i++)
555 pr_err(" r%-2d: "REGFMT" r%-2d: "REGFMT" r%-2d: "REGFMT"\n",
556 i, regs->regs[i], i+18, regs->regs[i+18],
557 i+36, regs->regs[i+36]);
558 pr_err(" r17: "REGFMT" r35: "REGFMT" tp : "REGFMT"\n",
559 regs->regs[17], regs->regs[35], regs->tp);
560 pr_err(" sp : "REGFMT" lr : "REGFMT"\n", regs->sp, regs->lr);
561#else
562 for (i = 0; i < 13; i++)
563 pr_err(" r%-2d: "REGFMT" r%-2d: "REGFMT
564 " r%-2d: "REGFMT" r%-2d: "REGFMT"\n",
565 i, regs->regs[i], i+14, regs->regs[i+14],
566 i+27, regs->regs[i+27], i+40, regs->regs[i+40]);
567 pr_err(" r13: "REGFMT" tp : "REGFMT" sp : "REGFMT" lr : "REGFMT"\n",
568 regs->regs[13], regs->tp, regs->sp, regs->lr);
569#endif
570 pr_err(" pc : "REGFMT" ex1: %ld faultnum: %ld\n",
571 regs->pc, regs->ex1, regs->faultnum);
572
573 dump_stack_regs(regs);
574}
1/*
2 * Copyright 2010 Tilera Corporation. All Rights Reserved.
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation, version 2.
7 *
8 * This program is distributed in the hope that it will be useful, but
9 * WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
11 * NON INFRINGEMENT. See the GNU General Public License for
12 * more details.
13 */
14
15#include <linux/sched.h>
16#include <linux/preempt.h>
17#include <linux/module.h>
18#include <linux/fs.h>
19#include <linux/kprobes.h>
20#include <linux/elfcore.h>
21#include <linux/tick.h>
22#include <linux/init.h>
23#include <linux/mm.h>
24#include <linux/compat.h>
25#include <linux/hardirq.h>
26#include <linux/syscalls.h>
27#include <linux/kernel.h>
28#include <linux/tracehook.h>
29#include <linux/signal.h>
30#include <linux/delay.h>
31#include <linux/context_tracking.h>
32#include <asm/stack.h>
33#include <asm/switch_to.h>
34#include <asm/homecache.h>
35#include <asm/syscalls.h>
36#include <asm/traps.h>
37#include <asm/setup.h>
38#include <asm/uaccess.h>
39#ifdef CONFIG_HARDWALL
40#include <asm/hardwall.h>
41#endif
42#include <arch/chip.h>
43#include <arch/abi.h>
44#include <arch/sim_def.h>
45
46/*
47 * Use the (x86) "idle=poll" option to prefer low latency when leaving the
48 * idle loop over low power while in the idle loop, e.g. if we have
49 * one thread per core and we want to get threads out of futex waits fast.
50 */
51static int __init idle_setup(char *str)
52{
53 if (!str)
54 return -EINVAL;
55
56 if (!strcmp(str, "poll")) {
57 pr_info("using polling idle threads\n");
58 cpu_idle_poll_ctrl(true);
59 return 0;
60 } else if (!strcmp(str, "halt")) {
61 return 0;
62 }
63 return -1;
64}
65early_param("idle", idle_setup);
66
67void arch_cpu_idle(void)
68{
69 __this_cpu_write(irq_stat.idle_timestamp, jiffies);
70 _cpu_idle();
71}
72
73/*
74 * Release a thread_info structure
75 */
76void arch_release_thread_info(struct thread_info *info)
77{
78 struct single_step_state *step_state = info->step_state;
79
80 if (step_state) {
81
82 /*
83 * FIXME: we don't munmap step_state->buffer
84 * because the mm_struct for this process (info->task->mm)
85 * has already been zeroed in exit_mm(). Keeping a
86 * reference to it here seems like a bad move, so this
87 * means we can't munmap() the buffer, and therefore if we
88 * ptrace multiple threads in a process, we will slowly
89 * leak user memory. (Note that as soon as the last
90 * thread in a process dies, we will reclaim all user
91 * memory including single-step buffers in the usual way.)
92 * We should either assign a kernel VA to this buffer
93 * somehow, or we should associate the buffer(s) with the
94 * mm itself so we can clean them up that way.
95 */
96 kfree(step_state);
97 }
98}
99
100static void save_arch_state(struct thread_struct *t);
101
102int copy_thread(unsigned long clone_flags, unsigned long sp,
103 unsigned long arg, struct task_struct *p)
104{
105 struct pt_regs *childregs = task_pt_regs(p);
106 unsigned long ksp;
107 unsigned long *callee_regs;
108
109 /*
110 * Set up the stack and stack pointer appropriately for the
111 * new child to find itself woken up in __switch_to().
112 * The callee-saved registers must be on the stack to be read;
113 * the new task will then jump to assembly support to handle
114 * calling schedule_tail(), etc., and (for userspace tasks)
115 * returning to the context set up in the pt_regs.
116 */
117 ksp = (unsigned long) childregs;
118 ksp -= C_ABI_SAVE_AREA_SIZE; /* interrupt-entry save area */
119 ((long *)ksp)[0] = ((long *)ksp)[1] = 0;
120 ksp -= CALLEE_SAVED_REGS_COUNT * sizeof(unsigned long);
121 callee_regs = (unsigned long *)ksp;
122 ksp -= C_ABI_SAVE_AREA_SIZE; /* __switch_to() save area */
123 ((long *)ksp)[0] = ((long *)ksp)[1] = 0;
124 p->thread.ksp = ksp;
125
126 /* Record the pid of the task that created this one. */
127 p->thread.creator_pid = current->pid;
128
129 if (unlikely(p->flags & PF_KTHREAD)) {
130 /* kernel thread */
131 memset(childregs, 0, sizeof(struct pt_regs));
132 memset(&callee_regs[2], 0,
133 (CALLEE_SAVED_REGS_COUNT - 2) * sizeof(unsigned long));
134 callee_regs[0] = sp; /* r30 = function */
135 callee_regs[1] = arg; /* r31 = arg */
136 p->thread.pc = (unsigned long) ret_from_kernel_thread;
137 return 0;
138 }
139
140 /*
141 * Start new thread in ret_from_fork so it schedules properly
142 * and then return from interrupt like the parent.
143 */
144 p->thread.pc = (unsigned long) ret_from_fork;
145
146 /*
147 * Do not clone step state from the parent; each thread
148 * must make its own lazily.
149 */
150 task_thread_info(p)->step_state = NULL;
151
152#ifdef __tilegx__
153 /*
154 * Do not clone unalign jit fixup from the parent; each thread
155 * must allocate its own on demand.
156 */
157 task_thread_info(p)->unalign_jit_base = NULL;
158#endif
159
160 /*
161 * Copy the registers onto the kernel stack so the
162 * return-from-interrupt code will reload it into registers.
163 */
164 *childregs = *current_pt_regs();
165 childregs->regs[0] = 0; /* return value is zero */
166 if (sp)
167 childregs->sp = sp; /* override with new user stack pointer */
168 memcpy(callee_regs, &childregs->regs[CALLEE_SAVED_FIRST_REG],
169 CALLEE_SAVED_REGS_COUNT * sizeof(unsigned long));
170
171 /* Save user stack top pointer so we can ID the stack vm area later. */
172 p->thread.usp0 = childregs->sp;
173
174 /*
175 * If CLONE_SETTLS is set, set "tp" in the new task to "r4",
176 * which is passed in as arg #5 to sys_clone().
177 */
178 if (clone_flags & CLONE_SETTLS)
179 childregs->tp = childregs->regs[4];
180
181
182#if CHIP_HAS_TILE_DMA()
183 /*
184 * No DMA in the new thread. We model this on the fact that
185 * fork() clears the pending signals, alarms, and aio for the child.
186 */
187 memset(&p->thread.tile_dma_state, 0, sizeof(struct tile_dma_state));
188 memset(&p->thread.dma_async_tlb, 0, sizeof(struct async_tlb));
189#endif
190
191 /* New thread has its miscellaneous processor state bits clear. */
192 p->thread.proc_status = 0;
193
194#ifdef CONFIG_HARDWALL
195 /* New thread does not own any networks. */
196 memset(&p->thread.hardwall[0], 0,
197 sizeof(struct hardwall_task) * HARDWALL_TYPES);
198#endif
199
200
201 /*
202 * Start the new thread with the current architecture state
203 * (user interrupt masks, etc.).
204 */
205 save_arch_state(&p->thread);
206
207 return 0;
208}
209
210int set_unalign_ctl(struct task_struct *tsk, unsigned int val)
211{
212 task_thread_info(tsk)->align_ctl = val;
213 return 0;
214}
215
216int get_unalign_ctl(struct task_struct *tsk, unsigned long adr)
217{
218 return put_user(task_thread_info(tsk)->align_ctl,
219 (unsigned int __user *)adr);
220}
221
222static struct task_struct corrupt_current = { .comm = "<corrupt>" };
223
224/*
225 * Return "current" if it looks plausible, or else a pointer to a dummy.
226 * This can be helpful if we are just trying to emit a clean panic.
227 */
228struct task_struct *validate_current(void)
229{
230 struct task_struct *tsk = current;
231 if (unlikely((unsigned long)tsk < PAGE_OFFSET ||
232 (high_memory && (void *)tsk > high_memory) ||
233 ((unsigned long)tsk & (__alignof__(*tsk) - 1)) != 0)) {
234 pr_err("Corrupt 'current' %p (sp %#lx)\n", tsk, stack_pointer);
235 tsk = &corrupt_current;
236 }
237 return tsk;
238}
239
240/* Take and return the pointer to the previous task, for schedule_tail(). */
241struct task_struct *sim_notify_fork(struct task_struct *prev)
242{
243 struct task_struct *tsk = current;
244 __insn_mtspr(SPR_SIM_CONTROL, SIM_CONTROL_OS_FORK_PARENT |
245 (tsk->thread.creator_pid << _SIM_CONTROL_OPERATOR_BITS));
246 __insn_mtspr(SPR_SIM_CONTROL, SIM_CONTROL_OS_FORK |
247 (tsk->pid << _SIM_CONTROL_OPERATOR_BITS));
248 return prev;
249}
250
251int dump_task_regs(struct task_struct *tsk, elf_gregset_t *regs)
252{
253 struct pt_regs *ptregs = task_pt_regs(tsk);
254 elf_core_copy_regs(regs, ptregs);
255 return 1;
256}
257
258#if CHIP_HAS_TILE_DMA()
259
260/* Allow user processes to access the DMA SPRs */
261void grant_dma_mpls(void)
262{
263#if CONFIG_KERNEL_PL == 2
264 __insn_mtspr(SPR_MPL_DMA_CPL_SET_1, 1);
265 __insn_mtspr(SPR_MPL_DMA_NOTIFY_SET_1, 1);
266#else
267 __insn_mtspr(SPR_MPL_DMA_CPL_SET_0, 1);
268 __insn_mtspr(SPR_MPL_DMA_NOTIFY_SET_0, 1);
269#endif
270}
271
272/* Forbid user processes from accessing the DMA SPRs */
273void restrict_dma_mpls(void)
274{
275#if CONFIG_KERNEL_PL == 2
276 __insn_mtspr(SPR_MPL_DMA_CPL_SET_2, 1);
277 __insn_mtspr(SPR_MPL_DMA_NOTIFY_SET_2, 1);
278#else
279 __insn_mtspr(SPR_MPL_DMA_CPL_SET_1, 1);
280 __insn_mtspr(SPR_MPL_DMA_NOTIFY_SET_1, 1);
281#endif
282}
283
284/* Pause the DMA engine, then save off its state registers. */
285static void save_tile_dma_state(struct tile_dma_state *dma)
286{
287 unsigned long state = __insn_mfspr(SPR_DMA_USER_STATUS);
288 unsigned long post_suspend_state;
289
290 /* If we're running, suspend the engine. */
291 if ((state & DMA_STATUS_MASK) == SPR_DMA_STATUS__RUNNING_MASK)
292 __insn_mtspr(SPR_DMA_CTR, SPR_DMA_CTR__SUSPEND_MASK);
293
294 /*
295 * Wait for the engine to idle, then save regs. Note that we
296 * want to record the "running" bit from before suspension,
297 * and the "done" bit from after, so that we can properly
298 * distinguish a case where the user suspended the engine from
299 * the case where the kernel suspended as part of the context
300 * swap.
301 */
302 do {
303 post_suspend_state = __insn_mfspr(SPR_DMA_USER_STATUS);
304 } while (post_suspend_state & SPR_DMA_STATUS__BUSY_MASK);
305
306 dma->src = __insn_mfspr(SPR_DMA_SRC_ADDR);
307 dma->src_chunk = __insn_mfspr(SPR_DMA_SRC_CHUNK_ADDR);
308 dma->dest = __insn_mfspr(SPR_DMA_DST_ADDR);
309 dma->dest_chunk = __insn_mfspr(SPR_DMA_DST_CHUNK_ADDR);
310 dma->strides = __insn_mfspr(SPR_DMA_STRIDE);
311 dma->chunk_size = __insn_mfspr(SPR_DMA_CHUNK_SIZE);
312 dma->byte = __insn_mfspr(SPR_DMA_BYTE);
313 dma->status = (state & SPR_DMA_STATUS__RUNNING_MASK) |
314 (post_suspend_state & SPR_DMA_STATUS__DONE_MASK);
315}
316
317/* Restart a DMA that was running before we were context-switched out. */
318static void restore_tile_dma_state(struct thread_struct *t)
319{
320 const struct tile_dma_state *dma = &t->tile_dma_state;
321
322 /*
323 * The only way to restore the done bit is to run a zero
324 * length transaction.
325 */
326 if ((dma->status & SPR_DMA_STATUS__DONE_MASK) &&
327 !(__insn_mfspr(SPR_DMA_USER_STATUS) & SPR_DMA_STATUS__DONE_MASK)) {
328 __insn_mtspr(SPR_DMA_BYTE, 0);
329 __insn_mtspr(SPR_DMA_CTR, SPR_DMA_CTR__REQUEST_MASK);
330 while (__insn_mfspr(SPR_DMA_USER_STATUS) &
331 SPR_DMA_STATUS__BUSY_MASK)
332 ;
333 }
334
335 __insn_mtspr(SPR_DMA_SRC_ADDR, dma->src);
336 __insn_mtspr(SPR_DMA_SRC_CHUNK_ADDR, dma->src_chunk);
337 __insn_mtspr(SPR_DMA_DST_ADDR, dma->dest);
338 __insn_mtspr(SPR_DMA_DST_CHUNK_ADDR, dma->dest_chunk);
339 __insn_mtspr(SPR_DMA_STRIDE, dma->strides);
340 __insn_mtspr(SPR_DMA_CHUNK_SIZE, dma->chunk_size);
341 __insn_mtspr(SPR_DMA_BYTE, dma->byte);
342
343 /*
344 * Restart the engine if we were running and not done.
345 * Clear a pending async DMA fault that we were waiting on return
346 * to user space to execute, since we expect the DMA engine
347 * to regenerate those faults for us now. Note that we don't
348 * try to clear the TIF_ASYNC_TLB flag, since it's relatively
349 * harmless if set, and it covers both DMA and the SN processor.
350 */
351 if ((dma->status & DMA_STATUS_MASK) == SPR_DMA_STATUS__RUNNING_MASK) {
352 t->dma_async_tlb.fault_num = 0;
353 __insn_mtspr(SPR_DMA_CTR, SPR_DMA_CTR__REQUEST_MASK);
354 }
355}
356
357#endif
358
359static void save_arch_state(struct thread_struct *t)
360{
361#if CHIP_HAS_SPLIT_INTR_MASK()
362 t->interrupt_mask = __insn_mfspr(SPR_INTERRUPT_MASK_0_0) |
363 ((u64)__insn_mfspr(SPR_INTERRUPT_MASK_0_1) << 32);
364#else
365 t->interrupt_mask = __insn_mfspr(SPR_INTERRUPT_MASK_0);
366#endif
367 t->ex_context[0] = __insn_mfspr(SPR_EX_CONTEXT_0_0);
368 t->ex_context[1] = __insn_mfspr(SPR_EX_CONTEXT_0_1);
369 t->system_save[0] = __insn_mfspr(SPR_SYSTEM_SAVE_0_0);
370 t->system_save[1] = __insn_mfspr(SPR_SYSTEM_SAVE_0_1);
371 t->system_save[2] = __insn_mfspr(SPR_SYSTEM_SAVE_0_2);
372 t->system_save[3] = __insn_mfspr(SPR_SYSTEM_SAVE_0_3);
373 t->intctrl_0 = __insn_mfspr(SPR_INTCTRL_0_STATUS);
374 t->proc_status = __insn_mfspr(SPR_PROC_STATUS);
375#if !CHIP_HAS_FIXED_INTVEC_BASE()
376 t->interrupt_vector_base = __insn_mfspr(SPR_INTERRUPT_VECTOR_BASE_0);
377#endif
378 t->tile_rtf_hwm = __insn_mfspr(SPR_TILE_RTF_HWM);
379#if CHIP_HAS_DSTREAM_PF()
380 t->dstream_pf = __insn_mfspr(SPR_DSTREAM_PF);
381#endif
382}
383
384static void restore_arch_state(const struct thread_struct *t)
385{
386#if CHIP_HAS_SPLIT_INTR_MASK()
387 __insn_mtspr(SPR_INTERRUPT_MASK_0_0, (u32) t->interrupt_mask);
388 __insn_mtspr(SPR_INTERRUPT_MASK_0_1, t->interrupt_mask >> 32);
389#else
390 __insn_mtspr(SPR_INTERRUPT_MASK_0, t->interrupt_mask);
391#endif
392 __insn_mtspr(SPR_EX_CONTEXT_0_0, t->ex_context[0]);
393 __insn_mtspr(SPR_EX_CONTEXT_0_1, t->ex_context[1]);
394 __insn_mtspr(SPR_SYSTEM_SAVE_0_0, t->system_save[0]);
395 __insn_mtspr(SPR_SYSTEM_SAVE_0_1, t->system_save[1]);
396 __insn_mtspr(SPR_SYSTEM_SAVE_0_2, t->system_save[2]);
397 __insn_mtspr(SPR_SYSTEM_SAVE_0_3, t->system_save[3]);
398 __insn_mtspr(SPR_INTCTRL_0_STATUS, t->intctrl_0);
399 __insn_mtspr(SPR_PROC_STATUS, t->proc_status);
400#if !CHIP_HAS_FIXED_INTVEC_BASE()
401 __insn_mtspr(SPR_INTERRUPT_VECTOR_BASE_0, t->interrupt_vector_base);
402#endif
403 __insn_mtspr(SPR_TILE_RTF_HWM, t->tile_rtf_hwm);
404#if CHIP_HAS_DSTREAM_PF()
405 __insn_mtspr(SPR_DSTREAM_PF, t->dstream_pf);
406#endif
407}
408
409
410void _prepare_arch_switch(struct task_struct *next)
411{
412#if CHIP_HAS_TILE_DMA()
413 struct tile_dma_state *dma = ¤t->thread.tile_dma_state;
414 if (dma->enabled)
415 save_tile_dma_state(dma);
416#endif
417}
418
419
420struct task_struct *__sched _switch_to(struct task_struct *prev,
421 struct task_struct *next)
422{
423 /* DMA state is already saved; save off other arch state. */
424 save_arch_state(&prev->thread);
425
426#if CHIP_HAS_TILE_DMA()
427 /*
428 * Restore DMA in new task if desired.
429 * Note that it is only safe to restart here since interrupts
430 * are disabled, so we can't take any DMATLB miss or access
431 * interrupts before we have finished switching stacks.
432 */
433 if (next->thread.tile_dma_state.enabled) {
434 restore_tile_dma_state(&next->thread);
435 grant_dma_mpls();
436 } else {
437 restrict_dma_mpls();
438 }
439#endif
440
441 /* Restore other arch state. */
442 restore_arch_state(&next->thread);
443
444#ifdef CONFIG_HARDWALL
445 /* Enable or disable access to the network registers appropriately. */
446 hardwall_switch_tasks(prev, next);
447#endif
448
449 /* Notify the simulator of task exit. */
450 if (unlikely(prev->state == TASK_DEAD))
451 __insn_mtspr(SPR_SIM_CONTROL, SIM_CONTROL_OS_EXIT |
452 (prev->pid << _SIM_CONTROL_OPERATOR_BITS));
453
454 /*
455 * Switch kernel SP, PC, and callee-saved registers.
456 * In the context of the new task, return the old task pointer
457 * (i.e. the task that actually called __switch_to).
458 * Pass the value to use for SYSTEM_SAVE_K_0 when we reset our sp.
459 */
460 return __switch_to(prev, next, next_current_ksp0(next));
461}
462
463/*
464 * This routine is called on return from interrupt if any of the
465 * TIF_ALLWORK_MASK flags are set in thread_info->flags. It is
466 * entered with interrupts disabled so we don't miss an event that
467 * modified the thread_info flags. We loop until all the tested flags
468 * are clear. Note that the function is called on certain conditions
469 * that are not listed in the loop condition here (e.g. SINGLESTEP)
470 * which guarantees we will do those things once, and redo them if any
471 * of the other work items is re-done, but won't continue looping if
472 * all the other work is done.
473 */
474void prepare_exit_to_usermode(struct pt_regs *regs, u32 thread_info_flags)
475{
476 if (WARN_ON(!user_mode(regs)))
477 return;
478
479 do {
480 local_irq_enable();
481
482 if (thread_info_flags & _TIF_NEED_RESCHED)
483 schedule();
484
485#if CHIP_HAS_TILE_DMA()
486 if (thread_info_flags & _TIF_ASYNC_TLB)
487 do_async_page_fault(regs);
488#endif
489
490 if (thread_info_flags & _TIF_SIGPENDING)
491 do_signal(regs);
492
493 if (thread_info_flags & _TIF_NOTIFY_RESUME) {
494 clear_thread_flag(TIF_NOTIFY_RESUME);
495 tracehook_notify_resume(regs);
496 }
497
498 local_irq_disable();
499 thread_info_flags = READ_ONCE(current_thread_info()->flags);
500
501 } while (thread_info_flags & _TIF_WORK_MASK);
502
503 if (thread_info_flags & _TIF_SINGLESTEP) {
504 single_step_once(regs);
505#ifndef __tilegx__
506 /*
507 * FIXME: on tilepro, since we enable interrupts in
508 * this routine, it's possible that we miss a signal
509 * or other asynchronous event.
510 */
511 local_irq_disable();
512#endif
513 }
514
515 user_enter();
516}
517
518unsigned long get_wchan(struct task_struct *p)
519{
520 struct KBacktraceIterator kbt;
521
522 if (!p || p == current || p->state == TASK_RUNNING)
523 return 0;
524
525 for (KBacktraceIterator_init(&kbt, p, NULL);
526 !KBacktraceIterator_end(&kbt);
527 KBacktraceIterator_next(&kbt)) {
528 if (!in_sched_functions(kbt.it.pc))
529 return kbt.it.pc;
530 }
531
532 return 0;
533}
534
535/* Flush thread state. */
536void flush_thread(void)
537{
538 /* Nothing */
539}
540
541/*
542 * Free current thread data structures etc..
543 */
544void exit_thread(void)
545{
546#ifdef CONFIG_HARDWALL
547 /*
548 * Remove the task from the list of tasks that are associated
549 * with any live hardwalls. (If the task that is exiting held
550 * the last reference to a hardwall fd, it would already have
551 * been released and deactivated at this point.)
552 */
553 hardwall_deactivate_all(current);
554#endif
555}
556
557void tile_show_regs(struct pt_regs *regs)
558{
559 int i;
560#ifdef __tilegx__
561 for (i = 0; i < 17; i++)
562 pr_err(" r%-2d: "REGFMT" r%-2d: "REGFMT" r%-2d: "REGFMT"\n",
563 i, regs->regs[i], i+18, regs->regs[i+18],
564 i+36, regs->regs[i+36]);
565 pr_err(" r17: "REGFMT" r35: "REGFMT" tp : "REGFMT"\n",
566 regs->regs[17], regs->regs[35], regs->tp);
567 pr_err(" sp : "REGFMT" lr : "REGFMT"\n", regs->sp, regs->lr);
568#else
569 for (i = 0; i < 13; i++)
570 pr_err(" r%-2d: "REGFMT" r%-2d: "REGFMT
571 " r%-2d: "REGFMT" r%-2d: "REGFMT"\n",
572 i, regs->regs[i], i+14, regs->regs[i+14],
573 i+27, regs->regs[i+27], i+40, regs->regs[i+40]);
574 pr_err(" r13: "REGFMT" tp : "REGFMT" sp : "REGFMT" lr : "REGFMT"\n",
575 regs->regs[13], regs->tp, regs->sp, regs->lr);
576#endif
577 pr_err(" pc : "REGFMT" ex1: %ld faultnum: %ld flags:%s%s%s%s\n",
578 regs->pc, regs->ex1, regs->faultnum,
579 is_compat_task() ? " compat" : "",
580 (regs->flags & PT_FLAGS_DISABLE_IRQ) ? " noirq" : "",
581 !(regs->flags & PT_FLAGS_CALLER_SAVES) ? " nocallersave" : "",
582 (regs->flags & PT_FLAGS_RESTORE_REGS) ? " restoreregs" : "");
583}
584
585void show_regs(struct pt_regs *regs)
586{
587 struct KBacktraceIterator kbt;
588
589 show_regs_print_info(KERN_DEFAULT);
590 tile_show_regs(regs);
591
592 KBacktraceIterator_init(&kbt, NULL, regs);
593 tile_show_stack(&kbt);
594}
595
596/* To ensure stack dump on tiles occurs one by one. */
597static DEFINE_SPINLOCK(backtrace_lock);
598/* To ensure no backtrace occurs before all of the stack dump are done. */
599static atomic_t backtrace_cpus;
600/* The cpu mask to avoid reentrance. */
601static struct cpumask backtrace_mask;
602
603void do_nmi_dump_stack(struct pt_regs *regs)
604{
605 int is_idle = is_idle_task(current) && !in_interrupt();
606 int cpu;
607
608 nmi_enter();
609 cpu = smp_processor_id();
610 if (WARN_ON_ONCE(!cpumask_test_and_clear_cpu(cpu, &backtrace_mask)))
611 goto done;
612
613 spin_lock(&backtrace_lock);
614 if (is_idle)
615 pr_info("CPU: %d idle\n", cpu);
616 else
617 show_regs(regs);
618 spin_unlock(&backtrace_lock);
619 atomic_dec(&backtrace_cpus);
620done:
621 nmi_exit();
622}
623
624#ifdef __tilegx__
625void arch_trigger_all_cpu_backtrace(bool self)
626{
627 struct cpumask mask;
628 HV_Coord tile;
629 unsigned int timeout;
630 int cpu;
631 int ongoing;
632 HV_NMI_Info info[NR_CPUS];
633
634 ongoing = atomic_cmpxchg(&backtrace_cpus, 0, num_online_cpus() - 1);
635 if (ongoing != 0) {
636 pr_err("Trying to do all-cpu backtrace.\n");
637 pr_err("But another all-cpu backtrace is ongoing (%d cpus left)\n",
638 ongoing);
639 if (self) {
640 pr_err("Reporting the stack on this cpu only.\n");
641 dump_stack();
642 }
643 return;
644 }
645
646 cpumask_copy(&mask, cpu_online_mask);
647 cpumask_clear_cpu(smp_processor_id(), &mask);
648 cpumask_copy(&backtrace_mask, &mask);
649
650 /* Backtrace for myself first. */
651 if (self)
652 dump_stack();
653
654 /* Tentatively dump stack on remote tiles via NMI. */
655 timeout = 100;
656 while (!cpumask_empty(&mask) && timeout) {
657 for_each_cpu(cpu, &mask) {
658 tile.x = cpu_x(cpu);
659 tile.y = cpu_y(cpu);
660 info[cpu] = hv_send_nmi(tile, TILE_NMI_DUMP_STACK, 0);
661 if (info[cpu].result == HV_NMI_RESULT_OK)
662 cpumask_clear_cpu(cpu, &mask);
663 }
664
665 mdelay(10);
666 timeout--;
667 }
668
669 /* Warn about cpus stuck in ICS and decrement their counts here. */
670 if (!cpumask_empty(&mask)) {
671 for_each_cpu(cpu, &mask) {
672 switch (info[cpu].result) {
673 case HV_NMI_RESULT_FAIL_ICS:
674 pr_warn("Skipping stack dump of cpu %d in ICS at pc %#llx\n",
675 cpu, info[cpu].pc);
676 break;
677 case HV_NMI_RESULT_FAIL_HV:
678 pr_warn("Skipping stack dump of cpu %d in hypervisor\n",
679 cpu);
680 break;
681 case HV_ENOSYS:
682 pr_warn("Hypervisor too old to allow remote stack dumps.\n");
683 goto skip_for_each;
684 default: /* should not happen */
685 pr_warn("Skipping stack dump of cpu %d [%d,%#llx]\n",
686 cpu, info[cpu].result, info[cpu].pc);
687 break;
688 }
689 }
690skip_for_each:
691 atomic_sub(cpumask_weight(&mask), &backtrace_cpus);
692 }
693}
694#endif /* __tilegx_ */