Loading...
1/*
2 * omap_hwmod implementation for OMAP2/3/4
3 *
4 * Copyright (C) 2009-2011 Nokia Corporation
5 * Copyright (C) 2011-2012 Texas Instruments, Inc.
6 *
7 * Paul Walmsley, Benoît Cousson, Kevin Hilman
8 *
9 * Created in collaboration with (alphabetical order): Thara Gopinath,
10 * Tony Lindgren, Rajendra Nayak, Vikram Pandita, Sakari Poussa, Anand
11 * Sawant, Santosh Shilimkar, Richard Woodruff
12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License version 2 as
15 * published by the Free Software Foundation.
16 *
17 * Introduction
18 * ------------
19 * One way to view an OMAP SoC is as a collection of largely unrelated
20 * IP blocks connected by interconnects. The IP blocks include
21 * devices such as ARM processors, audio serial interfaces, UARTs,
22 * etc. Some of these devices, like the DSP, are created by TI;
23 * others, like the SGX, largely originate from external vendors. In
24 * TI's documentation, on-chip devices are referred to as "OMAP
25 * modules." Some of these IP blocks are identical across several
26 * OMAP versions. Others are revised frequently.
27 *
28 * These OMAP modules are tied together by various interconnects.
29 * Most of the address and data flow between modules is via OCP-based
30 * interconnects such as the L3 and L4 buses; but there are other
31 * interconnects that distribute the hardware clock tree, handle idle
32 * and reset signaling, supply power, and connect the modules to
33 * various pads or balls on the OMAP package.
34 *
35 * OMAP hwmod provides a consistent way to describe the on-chip
36 * hardware blocks and their integration into the rest of the chip.
37 * This description can be automatically generated from the TI
38 * hardware database. OMAP hwmod provides a standard, consistent API
39 * to reset, enable, idle, and disable these hardware blocks. And
40 * hwmod provides a way for other core code, such as the Linux device
41 * code or the OMAP power management and address space mapping code,
42 * to query the hardware database.
43 *
44 * Using hwmod
45 * -----------
46 * Drivers won't call hwmod functions directly. That is done by the
47 * omap_device code, and in rare occasions, by custom integration code
48 * in arch/arm/ *omap*. The omap_device code includes functions to
49 * build a struct platform_device using omap_hwmod data, and that is
50 * currently how hwmod data is communicated to drivers and to the
51 * Linux driver model. Most drivers will call omap_hwmod functions only
52 * indirectly, via pm_runtime*() functions.
53 *
54 * From a layering perspective, here is where the OMAP hwmod code
55 * fits into the kernel software stack:
56 *
57 * +-------------------------------+
58 * | Device driver code |
59 * | (e.g., drivers/) |
60 * +-------------------------------+
61 * | Linux driver model |
62 * | (platform_device / |
63 * | platform_driver data/code) |
64 * +-------------------------------+
65 * | OMAP core-driver integration |
66 * |(arch/arm/mach-omap2/devices.c)|
67 * +-------------------------------+
68 * | omap_device code |
69 * | (../plat-omap/omap_device.c) |
70 * +-------------------------------+
71 * ----> | omap_hwmod code/data | <-----
72 * | (../mach-omap2/omap_hwmod*) |
73 * +-------------------------------+
74 * | OMAP clock/PRCM/register fns |
75 * | (__raw_{read,write}l, clk*) |
76 * +-------------------------------+
77 *
78 * Device drivers should not contain any OMAP-specific code or data in
79 * them. They should only contain code to operate the IP block that
80 * the driver is responsible for. This is because these IP blocks can
81 * also appear in other SoCs, either from TI (such as DaVinci) or from
82 * other manufacturers; and drivers should be reusable across other
83 * platforms.
84 *
85 * The OMAP hwmod code also will attempt to reset and idle all on-chip
86 * devices upon boot. The goal here is for the kernel to be
87 * completely self-reliant and independent from bootloaders. This is
88 * to ensure a repeatable configuration, both to ensure consistent
89 * runtime behavior, and to make it easier for others to reproduce
90 * bugs.
91 *
92 * OMAP module activity states
93 * ---------------------------
94 * The hwmod code considers modules to be in one of several activity
95 * states. IP blocks start out in an UNKNOWN state, then once they
96 * are registered via the hwmod code, proceed to the REGISTERED state.
97 * Once their clock names are resolved to clock pointers, the module
98 * enters the CLKS_INITED state; and finally, once the module has been
99 * reset and the integration registers programmed, the INITIALIZED state
100 * is entered. The hwmod code will then place the module into either
101 * the IDLE state to save power, or in the case of a critical system
102 * module, the ENABLED state.
103 *
104 * OMAP core integration code can then call omap_hwmod*() functions
105 * directly to move the module between the IDLE, ENABLED, and DISABLED
106 * states, as needed. This is done during both the PM idle loop, and
107 * in the OMAP core integration code's implementation of the PM runtime
108 * functions.
109 *
110 * References
111 * ----------
112 * This is a partial list.
113 * - OMAP2420 Multimedia Processor Silicon Revision 2.1.1, 2.2 (SWPU064)
114 * - OMAP2430 Multimedia Device POP Silicon Revision 2.1 (SWPU090)
115 * - OMAP34xx Multimedia Device Silicon Revision 3.1 (SWPU108)
116 * - OMAP4430 Multimedia Device Silicon Revision 1.0 (SWPU140)
117 * - Open Core Protocol Specification 2.2
118 *
119 * To do:
120 * - handle IO mapping
121 * - bus throughput & module latency measurement code
122 *
123 * XXX add tests at the beginning of each function to ensure the hwmod is
124 * in the appropriate state
125 * XXX error return values should be checked to ensure that they are
126 * appropriate
127 */
128#undef DEBUG
129
130#include <linux/kernel.h>
131#include <linux/errno.h>
132#include <linux/io.h>
133#include <linux/clk-provider.h>
134#include <linux/delay.h>
135#include <linux/err.h>
136#include <linux/list.h>
137#include <linux/mutex.h>
138#include <linux/spinlock.h>
139#include <linux/slab.h>
140#include <linux/bootmem.h>
141#include <linux/cpu.h>
142#include <linux/of.h>
143#include <linux/of_address.h>
144
145#include <asm/system_misc.h>
146
147#include "clock.h"
148#include "omap_hwmod.h"
149
150#include "soc.h"
151#include "common.h"
152#include "clockdomain.h"
153#include "powerdomain.h"
154#include "cm2xxx.h"
155#include "cm3xxx.h"
156#include "cminst44xx.h"
157#include "cm33xx.h"
158#include "prm.h"
159#include "prm3xxx.h"
160#include "prm44xx.h"
161#include "prm33xx.h"
162#include "prminst44xx.h"
163#include "mux.h"
164#include "pm.h"
165
166/* Name of the OMAP hwmod for the MPU */
167#define MPU_INITIATOR_NAME "mpu"
168
169/*
170 * Number of struct omap_hwmod_link records per struct
171 * omap_hwmod_ocp_if record (master->slave and slave->master)
172 */
173#define LINKS_PER_OCP_IF 2
174
175/**
176 * struct omap_hwmod_soc_ops - fn ptrs for some SoC-specific operations
177 * @enable_module: function to enable a module (via MODULEMODE)
178 * @disable_module: function to disable a module (via MODULEMODE)
179 *
180 * XXX Eventually this functionality will be hidden inside the PRM/CM
181 * device drivers. Until then, this should avoid huge blocks of cpu_is_*()
182 * conditionals in this code.
183 */
184struct omap_hwmod_soc_ops {
185 void (*enable_module)(struct omap_hwmod *oh);
186 int (*disable_module)(struct omap_hwmod *oh);
187 int (*wait_target_ready)(struct omap_hwmod *oh);
188 int (*assert_hardreset)(struct omap_hwmod *oh,
189 struct omap_hwmod_rst_info *ohri);
190 int (*deassert_hardreset)(struct omap_hwmod *oh,
191 struct omap_hwmod_rst_info *ohri);
192 int (*is_hardreset_asserted)(struct omap_hwmod *oh,
193 struct omap_hwmod_rst_info *ohri);
194 int (*init_clkdm)(struct omap_hwmod *oh);
195 void (*update_context_lost)(struct omap_hwmod *oh);
196 int (*get_context_lost)(struct omap_hwmod *oh);
197};
198
199/* soc_ops: adapts the omap_hwmod code to the currently-booted SoC */
200static struct omap_hwmod_soc_ops soc_ops;
201
202/* omap_hwmod_list contains all registered struct omap_hwmods */
203static LIST_HEAD(omap_hwmod_list);
204
205/* mpu_oh: used to add/remove MPU initiator from sleepdep list */
206static struct omap_hwmod *mpu_oh;
207
208/* io_chain_lock: used to serialize reconfigurations of the I/O chain */
209static DEFINE_SPINLOCK(io_chain_lock);
210
211/*
212 * linkspace: ptr to a buffer that struct omap_hwmod_link records are
213 * allocated from - used to reduce the number of small memory
214 * allocations, which has a significant impact on performance
215 */
216static struct omap_hwmod_link *linkspace;
217
218/*
219 * free_ls, max_ls: array indexes into linkspace; representing the
220 * next free struct omap_hwmod_link index, and the maximum number of
221 * struct omap_hwmod_link records allocated (respectively)
222 */
223static unsigned short free_ls, max_ls, ls_supp;
224
225/* inited: set to true once the hwmod code is initialized */
226static bool inited;
227
228/* Private functions */
229
230/**
231 * _fetch_next_ocp_if - return the next OCP interface in a list
232 * @p: ptr to a ptr to the list_head inside the ocp_if to return
233 * @i: pointer to the index of the element pointed to by @p in the list
234 *
235 * Return a pointer to the struct omap_hwmod_ocp_if record
236 * containing the struct list_head pointed to by @p, and increment
237 * @p such that a future call to this routine will return the next
238 * record.
239 */
240static struct omap_hwmod_ocp_if *_fetch_next_ocp_if(struct list_head **p,
241 int *i)
242{
243 struct omap_hwmod_ocp_if *oi;
244
245 oi = list_entry(*p, struct omap_hwmod_link, node)->ocp_if;
246 *p = (*p)->next;
247
248 *i = *i + 1;
249
250 return oi;
251}
252
253/**
254 * _update_sysc_cache - return the module OCP_SYSCONFIG register, keep copy
255 * @oh: struct omap_hwmod *
256 *
257 * Load the current value of the hwmod OCP_SYSCONFIG register into the
258 * struct omap_hwmod for later use. Returns -EINVAL if the hwmod has no
259 * OCP_SYSCONFIG register or 0 upon success.
260 */
261static int _update_sysc_cache(struct omap_hwmod *oh)
262{
263 if (!oh->class->sysc) {
264 WARN(1, "omap_hwmod: %s: cannot read OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
265 return -EINVAL;
266 }
267
268 /* XXX ensure module interface clock is up */
269
270 oh->_sysc_cache = omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
271
272 if (!(oh->class->sysc->sysc_flags & SYSC_NO_CACHE))
273 oh->_int_flags |= _HWMOD_SYSCONFIG_LOADED;
274
275 return 0;
276}
277
278/**
279 * _write_sysconfig - write a value to the module's OCP_SYSCONFIG register
280 * @v: OCP_SYSCONFIG value to write
281 * @oh: struct omap_hwmod *
282 *
283 * Write @v into the module class' OCP_SYSCONFIG register, if it has
284 * one. No return value.
285 */
286static void _write_sysconfig(u32 v, struct omap_hwmod *oh)
287{
288 if (!oh->class->sysc) {
289 WARN(1, "omap_hwmod: %s: cannot write OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
290 return;
291 }
292
293 /* XXX ensure module interface clock is up */
294
295 /* Module might have lost context, always update cache and register */
296 oh->_sysc_cache = v;
297 omap_hwmod_write(v, oh, oh->class->sysc->sysc_offs);
298}
299
300/**
301 * _set_master_standbymode: set the OCP_SYSCONFIG MIDLEMODE field in @v
302 * @oh: struct omap_hwmod *
303 * @standbymode: MIDLEMODE field bits
304 * @v: pointer to register contents to modify
305 *
306 * Update the master standby mode bits in @v to be @standbymode for
307 * the @oh hwmod. Does not write to the hardware. Returns -EINVAL
308 * upon error or 0 upon success.
309 */
310static int _set_master_standbymode(struct omap_hwmod *oh, u8 standbymode,
311 u32 *v)
312{
313 u32 mstandby_mask;
314 u8 mstandby_shift;
315
316 if (!oh->class->sysc ||
317 !(oh->class->sysc->sysc_flags & SYSC_HAS_MIDLEMODE))
318 return -EINVAL;
319
320 if (!oh->class->sysc->sysc_fields) {
321 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
322 return -EINVAL;
323 }
324
325 mstandby_shift = oh->class->sysc->sysc_fields->midle_shift;
326 mstandby_mask = (0x3 << mstandby_shift);
327
328 *v &= ~mstandby_mask;
329 *v |= __ffs(standbymode) << mstandby_shift;
330
331 return 0;
332}
333
334/**
335 * _set_slave_idlemode: set the OCP_SYSCONFIG SIDLEMODE field in @v
336 * @oh: struct omap_hwmod *
337 * @idlemode: SIDLEMODE field bits
338 * @v: pointer to register contents to modify
339 *
340 * Update the slave idle mode bits in @v to be @idlemode for the @oh
341 * hwmod. Does not write to the hardware. Returns -EINVAL upon error
342 * or 0 upon success.
343 */
344static int _set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode, u32 *v)
345{
346 u32 sidle_mask;
347 u8 sidle_shift;
348
349 if (!oh->class->sysc ||
350 !(oh->class->sysc->sysc_flags & SYSC_HAS_SIDLEMODE))
351 return -EINVAL;
352
353 if (!oh->class->sysc->sysc_fields) {
354 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
355 return -EINVAL;
356 }
357
358 sidle_shift = oh->class->sysc->sysc_fields->sidle_shift;
359 sidle_mask = (0x3 << sidle_shift);
360
361 *v &= ~sidle_mask;
362 *v |= __ffs(idlemode) << sidle_shift;
363
364 return 0;
365}
366
367/**
368 * _set_clockactivity: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
369 * @oh: struct omap_hwmod *
370 * @clockact: CLOCKACTIVITY field bits
371 * @v: pointer to register contents to modify
372 *
373 * Update the clockactivity mode bits in @v to be @clockact for the
374 * @oh hwmod. Used for additional powersaving on some modules. Does
375 * not write to the hardware. Returns -EINVAL upon error or 0 upon
376 * success.
377 */
378static int _set_clockactivity(struct omap_hwmod *oh, u8 clockact, u32 *v)
379{
380 u32 clkact_mask;
381 u8 clkact_shift;
382
383 if (!oh->class->sysc ||
384 !(oh->class->sysc->sysc_flags & SYSC_HAS_CLOCKACTIVITY))
385 return -EINVAL;
386
387 if (!oh->class->sysc->sysc_fields) {
388 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
389 return -EINVAL;
390 }
391
392 clkact_shift = oh->class->sysc->sysc_fields->clkact_shift;
393 clkact_mask = (0x3 << clkact_shift);
394
395 *v &= ~clkact_mask;
396 *v |= clockact << clkact_shift;
397
398 return 0;
399}
400
401/**
402 * _set_softreset: set OCP_SYSCONFIG.SOFTRESET bit in @v
403 * @oh: struct omap_hwmod *
404 * @v: pointer to register contents to modify
405 *
406 * Set the SOFTRESET bit in @v for hwmod @oh. Returns -EINVAL upon
407 * error or 0 upon success.
408 */
409static int _set_softreset(struct omap_hwmod *oh, u32 *v)
410{
411 u32 softrst_mask;
412
413 if (!oh->class->sysc ||
414 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
415 return -EINVAL;
416
417 if (!oh->class->sysc->sysc_fields) {
418 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
419 return -EINVAL;
420 }
421
422 softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
423
424 *v |= softrst_mask;
425
426 return 0;
427}
428
429/**
430 * _clear_softreset: clear OCP_SYSCONFIG.SOFTRESET bit in @v
431 * @oh: struct omap_hwmod *
432 * @v: pointer to register contents to modify
433 *
434 * Clear the SOFTRESET bit in @v for hwmod @oh. Returns -EINVAL upon
435 * error or 0 upon success.
436 */
437static int _clear_softreset(struct omap_hwmod *oh, u32 *v)
438{
439 u32 softrst_mask;
440
441 if (!oh->class->sysc ||
442 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
443 return -EINVAL;
444
445 if (!oh->class->sysc->sysc_fields) {
446 WARN(1,
447 "omap_hwmod: %s: sysc_fields absent for sysconfig class\n",
448 oh->name);
449 return -EINVAL;
450 }
451
452 softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
453
454 *v &= ~softrst_mask;
455
456 return 0;
457}
458
459/**
460 * _wait_softreset_complete - wait for an OCP softreset to complete
461 * @oh: struct omap_hwmod * to wait on
462 *
463 * Wait until the IP block represented by @oh reports that its OCP
464 * softreset is complete. This can be triggered by software (see
465 * _ocp_softreset()) or by hardware upon returning from off-mode (one
466 * example is HSMMC). Waits for up to MAX_MODULE_SOFTRESET_WAIT
467 * microseconds. Returns the number of microseconds waited.
468 */
469static int _wait_softreset_complete(struct omap_hwmod *oh)
470{
471 struct omap_hwmod_class_sysconfig *sysc;
472 u32 softrst_mask;
473 int c = 0;
474
475 sysc = oh->class->sysc;
476
477 if (sysc->sysc_flags & SYSS_HAS_RESET_STATUS)
478 omap_test_timeout((omap_hwmod_read(oh, sysc->syss_offs)
479 & SYSS_RESETDONE_MASK),
480 MAX_MODULE_SOFTRESET_WAIT, c);
481 else if (sysc->sysc_flags & SYSC_HAS_RESET_STATUS) {
482 softrst_mask = (0x1 << sysc->sysc_fields->srst_shift);
483 omap_test_timeout(!(omap_hwmod_read(oh, sysc->sysc_offs)
484 & softrst_mask),
485 MAX_MODULE_SOFTRESET_WAIT, c);
486 }
487
488 return c;
489}
490
491/**
492 * _set_dmadisable: set OCP_SYSCONFIG.DMADISABLE bit in @v
493 * @oh: struct omap_hwmod *
494 *
495 * The DMADISABLE bit is a semi-automatic bit present in sysconfig register
496 * of some modules. When the DMA must perform read/write accesses, the
497 * DMADISABLE bit is cleared by the hardware. But when the DMA must stop
498 * for power management, software must set the DMADISABLE bit back to 1.
499 *
500 * Set the DMADISABLE bit in @v for hwmod @oh. Returns -EINVAL upon
501 * error or 0 upon success.
502 */
503static int _set_dmadisable(struct omap_hwmod *oh)
504{
505 u32 v;
506 u32 dmadisable_mask;
507
508 if (!oh->class->sysc ||
509 !(oh->class->sysc->sysc_flags & SYSC_HAS_DMADISABLE))
510 return -EINVAL;
511
512 if (!oh->class->sysc->sysc_fields) {
513 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
514 return -EINVAL;
515 }
516
517 /* clocks must be on for this operation */
518 if (oh->_state != _HWMOD_STATE_ENABLED) {
519 pr_warn("omap_hwmod: %s: dma can be disabled only from enabled state\n", oh->name);
520 return -EINVAL;
521 }
522
523 pr_debug("omap_hwmod: %s: setting DMADISABLE\n", oh->name);
524
525 v = oh->_sysc_cache;
526 dmadisable_mask =
527 (0x1 << oh->class->sysc->sysc_fields->dmadisable_shift);
528 v |= dmadisable_mask;
529 _write_sysconfig(v, oh);
530
531 return 0;
532}
533
534/**
535 * _set_module_autoidle: set the OCP_SYSCONFIG AUTOIDLE field in @v
536 * @oh: struct omap_hwmod *
537 * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
538 * @v: pointer to register contents to modify
539 *
540 * Update the module autoidle bit in @v to be @autoidle for the @oh
541 * hwmod. The autoidle bit controls whether the module can gate
542 * internal clocks automatically when it isn't doing anything; the
543 * exact function of this bit varies on a per-module basis. This
544 * function does not write to the hardware. Returns -EINVAL upon
545 * error or 0 upon success.
546 */
547static int _set_module_autoidle(struct omap_hwmod *oh, u8 autoidle,
548 u32 *v)
549{
550 u32 autoidle_mask;
551 u8 autoidle_shift;
552
553 if (!oh->class->sysc ||
554 !(oh->class->sysc->sysc_flags & SYSC_HAS_AUTOIDLE))
555 return -EINVAL;
556
557 if (!oh->class->sysc->sysc_fields) {
558 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
559 return -EINVAL;
560 }
561
562 autoidle_shift = oh->class->sysc->sysc_fields->autoidle_shift;
563 autoidle_mask = (0x1 << autoidle_shift);
564
565 *v &= ~autoidle_mask;
566 *v |= autoidle << autoidle_shift;
567
568 return 0;
569}
570
571/**
572 * _set_idle_ioring_wakeup - enable/disable IO pad wakeup on hwmod idle for mux
573 * @oh: struct omap_hwmod *
574 * @set_wake: bool value indicating to set (true) or clear (false) wakeup enable
575 *
576 * Set or clear the I/O pad wakeup flag in the mux entries for the
577 * hwmod @oh. This function changes the @oh->mux->pads_dynamic array
578 * in memory. If the hwmod is currently idled, and the new idle
579 * values don't match the previous ones, this function will also
580 * update the SCM PADCTRL registers. Otherwise, if the hwmod is not
581 * currently idled, this function won't touch the hardware: the new
582 * mux settings are written to the SCM PADCTRL registers when the
583 * hwmod is idled. No return value.
584 */
585static void _set_idle_ioring_wakeup(struct omap_hwmod *oh, bool set_wake)
586{
587 struct omap_device_pad *pad;
588 bool change = false;
589 u16 prev_idle;
590 int j;
591
592 if (!oh->mux || !oh->mux->enabled)
593 return;
594
595 for (j = 0; j < oh->mux->nr_pads_dynamic; j++) {
596 pad = oh->mux->pads_dynamic[j];
597
598 if (!(pad->flags & OMAP_DEVICE_PAD_WAKEUP))
599 continue;
600
601 prev_idle = pad->idle;
602
603 if (set_wake)
604 pad->idle |= OMAP_WAKEUP_EN;
605 else
606 pad->idle &= ~OMAP_WAKEUP_EN;
607
608 if (prev_idle != pad->idle)
609 change = true;
610 }
611
612 if (change && oh->_state == _HWMOD_STATE_IDLE)
613 omap_hwmod_mux(oh->mux, _HWMOD_STATE_IDLE);
614}
615
616/**
617 * _enable_wakeup: set OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
618 * @oh: struct omap_hwmod *
619 *
620 * Allow the hardware module @oh to send wakeups. Returns -EINVAL
621 * upon error or 0 upon success.
622 */
623static int _enable_wakeup(struct omap_hwmod *oh, u32 *v)
624{
625 if (!oh->class->sysc ||
626 !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
627 (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
628 (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
629 return -EINVAL;
630
631 if (!oh->class->sysc->sysc_fields) {
632 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
633 return -EINVAL;
634 }
635
636 if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
637 *v |= 0x1 << oh->class->sysc->sysc_fields->enwkup_shift;
638
639 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
640 _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
641 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
642 _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
643
644 /* XXX test pwrdm_get_wken for this hwmod's subsystem */
645
646 return 0;
647}
648
649/**
650 * _disable_wakeup: clear OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
651 * @oh: struct omap_hwmod *
652 *
653 * Prevent the hardware module @oh to send wakeups. Returns -EINVAL
654 * upon error or 0 upon success.
655 */
656static int _disable_wakeup(struct omap_hwmod *oh, u32 *v)
657{
658 if (!oh->class->sysc ||
659 !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
660 (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
661 (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
662 return -EINVAL;
663
664 if (!oh->class->sysc->sysc_fields) {
665 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
666 return -EINVAL;
667 }
668
669 if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
670 *v &= ~(0x1 << oh->class->sysc->sysc_fields->enwkup_shift);
671
672 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
673 _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART, v);
674 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
675 _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART, v);
676
677 /* XXX test pwrdm_get_wken for this hwmod's subsystem */
678
679 return 0;
680}
681
682static struct clockdomain *_get_clkdm(struct omap_hwmod *oh)
683{
684 struct clk_hw_omap *clk;
685
686 if (oh->clkdm) {
687 return oh->clkdm;
688 } else if (oh->_clk) {
689 if (__clk_get_flags(oh->_clk) & CLK_IS_BASIC)
690 return NULL;
691 clk = to_clk_hw_omap(__clk_get_hw(oh->_clk));
692 return clk->clkdm;
693 }
694 return NULL;
695}
696
697/**
698 * _add_initiator_dep: prevent @oh from smart-idling while @init_oh is active
699 * @oh: struct omap_hwmod *
700 *
701 * Prevent the hardware module @oh from entering idle while the
702 * hardare module initiator @init_oh is active. Useful when a module
703 * will be accessed by a particular initiator (e.g., if a module will
704 * be accessed by the IVA, there should be a sleepdep between the IVA
705 * initiator and the module). Only applies to modules in smart-idle
706 * mode. If the clockdomain is marked as not needing autodeps, return
707 * 0 without doing anything. Otherwise, returns -EINVAL upon error or
708 * passes along clkdm_add_sleepdep() value upon success.
709 */
710static int _add_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
711{
712 struct clockdomain *clkdm, *init_clkdm;
713
714 clkdm = _get_clkdm(oh);
715 init_clkdm = _get_clkdm(init_oh);
716
717 if (!clkdm || !init_clkdm)
718 return -EINVAL;
719
720 if (clkdm && clkdm->flags & CLKDM_NO_AUTODEPS)
721 return 0;
722
723 return clkdm_add_sleepdep(clkdm, init_clkdm);
724}
725
726/**
727 * _del_initiator_dep: allow @oh to smart-idle even if @init_oh is active
728 * @oh: struct omap_hwmod *
729 *
730 * Allow the hardware module @oh to enter idle while the hardare
731 * module initiator @init_oh is active. Useful when a module will not
732 * be accessed by a particular initiator (e.g., if a module will not
733 * be accessed by the IVA, there should be no sleepdep between the IVA
734 * initiator and the module). Only applies to modules in smart-idle
735 * mode. If the clockdomain is marked as not needing autodeps, return
736 * 0 without doing anything. Returns -EINVAL upon error or passes
737 * along clkdm_del_sleepdep() value upon success.
738 */
739static int _del_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
740{
741 struct clockdomain *clkdm, *init_clkdm;
742
743 clkdm = _get_clkdm(oh);
744 init_clkdm = _get_clkdm(init_oh);
745
746 if (!clkdm || !init_clkdm)
747 return -EINVAL;
748
749 if (clkdm && clkdm->flags & CLKDM_NO_AUTODEPS)
750 return 0;
751
752 return clkdm_del_sleepdep(clkdm, init_clkdm);
753}
754
755/**
756 * _init_main_clk - get a struct clk * for the the hwmod's main functional clk
757 * @oh: struct omap_hwmod *
758 *
759 * Called from _init_clocks(). Populates the @oh _clk (main
760 * functional clock pointer) if a main_clk is present. Returns 0 on
761 * success or -EINVAL on error.
762 */
763static int _init_main_clk(struct omap_hwmod *oh)
764{
765 int ret = 0;
766
767 if (!oh->main_clk)
768 return 0;
769
770 oh->_clk = clk_get(NULL, oh->main_clk);
771 if (IS_ERR(oh->_clk)) {
772 pr_warning("omap_hwmod: %s: cannot clk_get main_clk %s\n",
773 oh->name, oh->main_clk);
774 return -EINVAL;
775 }
776 /*
777 * HACK: This needs a re-visit once clk_prepare() is implemented
778 * to do something meaningful. Today its just a no-op.
779 * If clk_prepare() is used at some point to do things like
780 * voltage scaling etc, then this would have to be moved to
781 * some point where subsystems like i2c and pmic become
782 * available.
783 */
784 clk_prepare(oh->_clk);
785
786 if (!_get_clkdm(oh))
787 pr_debug("omap_hwmod: %s: missing clockdomain for %s.\n",
788 oh->name, oh->main_clk);
789
790 return ret;
791}
792
793/**
794 * _init_interface_clks - get a struct clk * for the the hwmod's interface clks
795 * @oh: struct omap_hwmod *
796 *
797 * Called from _init_clocks(). Populates the @oh OCP slave interface
798 * clock pointers. Returns 0 on success or -EINVAL on error.
799 */
800static int _init_interface_clks(struct omap_hwmod *oh)
801{
802 struct omap_hwmod_ocp_if *os;
803 struct list_head *p;
804 struct clk *c;
805 int i = 0;
806 int ret = 0;
807
808 p = oh->slave_ports.next;
809
810 while (i < oh->slaves_cnt) {
811 os = _fetch_next_ocp_if(&p, &i);
812 if (!os->clk)
813 continue;
814
815 c = clk_get(NULL, os->clk);
816 if (IS_ERR(c)) {
817 pr_warning("omap_hwmod: %s: cannot clk_get interface_clk %s\n",
818 oh->name, os->clk);
819 ret = -EINVAL;
820 continue;
821 }
822 os->_clk = c;
823 /*
824 * HACK: This needs a re-visit once clk_prepare() is implemented
825 * to do something meaningful. Today its just a no-op.
826 * If clk_prepare() is used at some point to do things like
827 * voltage scaling etc, then this would have to be moved to
828 * some point where subsystems like i2c and pmic become
829 * available.
830 */
831 clk_prepare(os->_clk);
832 }
833
834 return ret;
835}
836
837/**
838 * _init_opt_clk - get a struct clk * for the the hwmod's optional clocks
839 * @oh: struct omap_hwmod *
840 *
841 * Called from _init_clocks(). Populates the @oh omap_hwmod_opt_clk
842 * clock pointers. Returns 0 on success or -EINVAL on error.
843 */
844static int _init_opt_clks(struct omap_hwmod *oh)
845{
846 struct omap_hwmod_opt_clk *oc;
847 struct clk *c;
848 int i;
849 int ret = 0;
850
851 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++) {
852 c = clk_get(NULL, oc->clk);
853 if (IS_ERR(c)) {
854 pr_warning("omap_hwmod: %s: cannot clk_get opt_clk %s\n",
855 oh->name, oc->clk);
856 ret = -EINVAL;
857 continue;
858 }
859 oc->_clk = c;
860 /*
861 * HACK: This needs a re-visit once clk_prepare() is implemented
862 * to do something meaningful. Today its just a no-op.
863 * If clk_prepare() is used at some point to do things like
864 * voltage scaling etc, then this would have to be moved to
865 * some point where subsystems like i2c and pmic become
866 * available.
867 */
868 clk_prepare(oc->_clk);
869 }
870
871 return ret;
872}
873
874/**
875 * _enable_clocks - enable hwmod main clock and interface clocks
876 * @oh: struct omap_hwmod *
877 *
878 * Enables all clocks necessary for register reads and writes to succeed
879 * on the hwmod @oh. Returns 0.
880 */
881static int _enable_clocks(struct omap_hwmod *oh)
882{
883 struct omap_hwmod_ocp_if *os;
884 struct list_head *p;
885 int i = 0;
886
887 pr_debug("omap_hwmod: %s: enabling clocks\n", oh->name);
888
889 if (oh->_clk)
890 clk_enable(oh->_clk);
891
892 p = oh->slave_ports.next;
893
894 while (i < oh->slaves_cnt) {
895 os = _fetch_next_ocp_if(&p, &i);
896
897 if (os->_clk && (os->flags & OCPIF_SWSUP_IDLE))
898 clk_enable(os->_clk);
899 }
900
901 /* The opt clocks are controlled by the device driver. */
902
903 return 0;
904}
905
906/**
907 * _disable_clocks - disable hwmod main clock and interface clocks
908 * @oh: struct omap_hwmod *
909 *
910 * Disables the hwmod @oh main functional and interface clocks. Returns 0.
911 */
912static int _disable_clocks(struct omap_hwmod *oh)
913{
914 struct omap_hwmod_ocp_if *os;
915 struct list_head *p;
916 int i = 0;
917
918 pr_debug("omap_hwmod: %s: disabling clocks\n", oh->name);
919
920 if (oh->_clk)
921 clk_disable(oh->_clk);
922
923 p = oh->slave_ports.next;
924
925 while (i < oh->slaves_cnt) {
926 os = _fetch_next_ocp_if(&p, &i);
927
928 if (os->_clk && (os->flags & OCPIF_SWSUP_IDLE))
929 clk_disable(os->_clk);
930 }
931
932 /* The opt clocks are controlled by the device driver. */
933
934 return 0;
935}
936
937static void _enable_optional_clocks(struct omap_hwmod *oh)
938{
939 struct omap_hwmod_opt_clk *oc;
940 int i;
941
942 pr_debug("omap_hwmod: %s: enabling optional clocks\n", oh->name);
943
944 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
945 if (oc->_clk) {
946 pr_debug("omap_hwmod: enable %s:%s\n", oc->role,
947 __clk_get_name(oc->_clk));
948 clk_enable(oc->_clk);
949 }
950}
951
952static void _disable_optional_clocks(struct omap_hwmod *oh)
953{
954 struct omap_hwmod_opt_clk *oc;
955 int i;
956
957 pr_debug("omap_hwmod: %s: disabling optional clocks\n", oh->name);
958
959 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
960 if (oc->_clk) {
961 pr_debug("omap_hwmod: disable %s:%s\n", oc->role,
962 __clk_get_name(oc->_clk));
963 clk_disable(oc->_clk);
964 }
965}
966
967/**
968 * _omap4_enable_module - enable CLKCTRL modulemode on OMAP4
969 * @oh: struct omap_hwmod *
970 *
971 * Enables the PRCM module mode related to the hwmod @oh.
972 * No return value.
973 */
974static void _omap4_enable_module(struct omap_hwmod *oh)
975{
976 if (!oh->clkdm || !oh->prcm.omap4.modulemode)
977 return;
978
979 pr_debug("omap_hwmod: %s: %s: %d\n",
980 oh->name, __func__, oh->prcm.omap4.modulemode);
981
982 omap4_cminst_module_enable(oh->prcm.omap4.modulemode,
983 oh->clkdm->prcm_partition,
984 oh->clkdm->cm_inst,
985 oh->clkdm->clkdm_offs,
986 oh->prcm.omap4.clkctrl_offs);
987}
988
989/**
990 * _am33xx_enable_module - enable CLKCTRL modulemode on AM33XX
991 * @oh: struct omap_hwmod *
992 *
993 * Enables the PRCM module mode related to the hwmod @oh.
994 * No return value.
995 */
996static void _am33xx_enable_module(struct omap_hwmod *oh)
997{
998 if (!oh->clkdm || !oh->prcm.omap4.modulemode)
999 return;
1000
1001 pr_debug("omap_hwmod: %s: %s: %d\n",
1002 oh->name, __func__, oh->prcm.omap4.modulemode);
1003
1004 am33xx_cm_module_enable(oh->prcm.omap4.modulemode, oh->clkdm->cm_inst,
1005 oh->clkdm->clkdm_offs,
1006 oh->prcm.omap4.clkctrl_offs);
1007}
1008
1009/**
1010 * _omap4_wait_target_disable - wait for a module to be disabled on OMAP4
1011 * @oh: struct omap_hwmod *
1012 *
1013 * Wait for a module @oh to enter slave idle. Returns 0 if the module
1014 * does not have an IDLEST bit or if the module successfully enters
1015 * slave idle; otherwise, pass along the return value of the
1016 * appropriate *_cm*_wait_module_idle() function.
1017 */
1018static int _omap4_wait_target_disable(struct omap_hwmod *oh)
1019{
1020 if (!oh)
1021 return -EINVAL;
1022
1023 if (oh->_int_flags & _HWMOD_NO_MPU_PORT || !oh->clkdm)
1024 return 0;
1025
1026 if (oh->flags & HWMOD_NO_IDLEST)
1027 return 0;
1028
1029 return omap4_cminst_wait_module_idle(oh->clkdm->prcm_partition,
1030 oh->clkdm->cm_inst,
1031 oh->clkdm->clkdm_offs,
1032 oh->prcm.omap4.clkctrl_offs);
1033}
1034
1035/**
1036 * _am33xx_wait_target_disable - wait for a module to be disabled on AM33XX
1037 * @oh: struct omap_hwmod *
1038 *
1039 * Wait for a module @oh to enter slave idle. Returns 0 if the module
1040 * does not have an IDLEST bit or if the module successfully enters
1041 * slave idle; otherwise, pass along the return value of the
1042 * appropriate *_cm*_wait_module_idle() function.
1043 */
1044static int _am33xx_wait_target_disable(struct omap_hwmod *oh)
1045{
1046 if (!oh)
1047 return -EINVAL;
1048
1049 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
1050 return 0;
1051
1052 if (oh->flags & HWMOD_NO_IDLEST)
1053 return 0;
1054
1055 return am33xx_cm_wait_module_idle(oh->clkdm->cm_inst,
1056 oh->clkdm->clkdm_offs,
1057 oh->prcm.omap4.clkctrl_offs);
1058}
1059
1060/**
1061 * _count_mpu_irqs - count the number of MPU IRQ lines associated with @oh
1062 * @oh: struct omap_hwmod *oh
1063 *
1064 * Count and return the number of MPU IRQs associated with the hwmod
1065 * @oh. Used to allocate struct resource data. Returns 0 if @oh is
1066 * NULL.
1067 */
1068static int _count_mpu_irqs(struct omap_hwmod *oh)
1069{
1070 struct omap_hwmod_irq_info *ohii;
1071 int i = 0;
1072
1073 if (!oh || !oh->mpu_irqs)
1074 return 0;
1075
1076 do {
1077 ohii = &oh->mpu_irqs[i++];
1078 } while (ohii->irq != -1);
1079
1080 return i-1;
1081}
1082
1083/**
1084 * _count_sdma_reqs - count the number of SDMA request lines associated with @oh
1085 * @oh: struct omap_hwmod *oh
1086 *
1087 * Count and return the number of SDMA request lines associated with
1088 * the hwmod @oh. Used to allocate struct resource data. Returns 0
1089 * if @oh is NULL.
1090 */
1091static int _count_sdma_reqs(struct omap_hwmod *oh)
1092{
1093 struct omap_hwmod_dma_info *ohdi;
1094 int i = 0;
1095
1096 if (!oh || !oh->sdma_reqs)
1097 return 0;
1098
1099 do {
1100 ohdi = &oh->sdma_reqs[i++];
1101 } while (ohdi->dma_req != -1);
1102
1103 return i-1;
1104}
1105
1106/**
1107 * _count_ocp_if_addr_spaces - count the number of address space entries for @oh
1108 * @oh: struct omap_hwmod *oh
1109 *
1110 * Count and return the number of address space ranges associated with
1111 * the hwmod @oh. Used to allocate struct resource data. Returns 0
1112 * if @oh is NULL.
1113 */
1114static int _count_ocp_if_addr_spaces(struct omap_hwmod_ocp_if *os)
1115{
1116 struct omap_hwmod_addr_space *mem;
1117 int i = 0;
1118
1119 if (!os || !os->addr)
1120 return 0;
1121
1122 do {
1123 mem = &os->addr[i++];
1124 } while (mem->pa_start != mem->pa_end);
1125
1126 return i-1;
1127}
1128
1129/**
1130 * _get_mpu_irq_by_name - fetch MPU interrupt line number by name
1131 * @oh: struct omap_hwmod * to operate on
1132 * @name: pointer to the name of the MPU interrupt number to fetch (optional)
1133 * @irq: pointer to an unsigned int to store the MPU IRQ number to
1134 *
1135 * Retrieve a MPU hardware IRQ line number named by @name associated
1136 * with the IP block pointed to by @oh. The IRQ number will be filled
1137 * into the address pointed to by @dma. When @name is non-null, the
1138 * IRQ line number associated with the named entry will be returned.
1139 * If @name is null, the first matching entry will be returned. Data
1140 * order is not meaningful in hwmod data, so callers are strongly
1141 * encouraged to use a non-null @name whenever possible to avoid
1142 * unpredictable effects if hwmod data is later added that causes data
1143 * ordering to change. Returns 0 upon success or a negative error
1144 * code upon error.
1145 */
1146static int _get_mpu_irq_by_name(struct omap_hwmod *oh, const char *name,
1147 unsigned int *irq)
1148{
1149 int i;
1150 bool found = false;
1151
1152 if (!oh->mpu_irqs)
1153 return -ENOENT;
1154
1155 i = 0;
1156 while (oh->mpu_irqs[i].irq != -1) {
1157 if (name == oh->mpu_irqs[i].name ||
1158 !strcmp(name, oh->mpu_irqs[i].name)) {
1159 found = true;
1160 break;
1161 }
1162 i++;
1163 }
1164
1165 if (!found)
1166 return -ENOENT;
1167
1168 *irq = oh->mpu_irqs[i].irq;
1169
1170 return 0;
1171}
1172
1173/**
1174 * _get_sdma_req_by_name - fetch SDMA request line ID by name
1175 * @oh: struct omap_hwmod * to operate on
1176 * @name: pointer to the name of the SDMA request line to fetch (optional)
1177 * @dma: pointer to an unsigned int to store the request line ID to
1178 *
1179 * Retrieve an SDMA request line ID named by @name on the IP block
1180 * pointed to by @oh. The ID will be filled into the address pointed
1181 * to by @dma. When @name is non-null, the request line ID associated
1182 * with the named entry will be returned. If @name is null, the first
1183 * matching entry will be returned. Data order is not meaningful in
1184 * hwmod data, so callers are strongly encouraged to use a non-null
1185 * @name whenever possible to avoid unpredictable effects if hwmod
1186 * data is later added that causes data ordering to change. Returns 0
1187 * upon success or a negative error code upon error.
1188 */
1189static int _get_sdma_req_by_name(struct omap_hwmod *oh, const char *name,
1190 unsigned int *dma)
1191{
1192 int i;
1193 bool found = false;
1194
1195 if (!oh->sdma_reqs)
1196 return -ENOENT;
1197
1198 i = 0;
1199 while (oh->sdma_reqs[i].dma_req != -1) {
1200 if (name == oh->sdma_reqs[i].name ||
1201 !strcmp(name, oh->sdma_reqs[i].name)) {
1202 found = true;
1203 break;
1204 }
1205 i++;
1206 }
1207
1208 if (!found)
1209 return -ENOENT;
1210
1211 *dma = oh->sdma_reqs[i].dma_req;
1212
1213 return 0;
1214}
1215
1216/**
1217 * _get_addr_space_by_name - fetch address space start & end by name
1218 * @oh: struct omap_hwmod * to operate on
1219 * @name: pointer to the name of the address space to fetch (optional)
1220 * @pa_start: pointer to a u32 to store the starting address to
1221 * @pa_end: pointer to a u32 to store the ending address to
1222 *
1223 * Retrieve address space start and end addresses for the IP block
1224 * pointed to by @oh. The data will be filled into the addresses
1225 * pointed to by @pa_start and @pa_end. When @name is non-null, the
1226 * address space data associated with the named entry will be
1227 * returned. If @name is null, the first matching entry will be
1228 * returned. Data order is not meaningful in hwmod data, so callers
1229 * are strongly encouraged to use a non-null @name whenever possible
1230 * to avoid unpredictable effects if hwmod data is later added that
1231 * causes data ordering to change. Returns 0 upon success or a
1232 * negative error code upon error.
1233 */
1234static int _get_addr_space_by_name(struct omap_hwmod *oh, const char *name,
1235 u32 *pa_start, u32 *pa_end)
1236{
1237 int i, j;
1238 struct omap_hwmod_ocp_if *os;
1239 struct list_head *p = NULL;
1240 bool found = false;
1241
1242 p = oh->slave_ports.next;
1243
1244 i = 0;
1245 while (i < oh->slaves_cnt) {
1246 os = _fetch_next_ocp_if(&p, &i);
1247
1248 if (!os->addr)
1249 return -ENOENT;
1250
1251 j = 0;
1252 while (os->addr[j].pa_start != os->addr[j].pa_end) {
1253 if (name == os->addr[j].name ||
1254 !strcmp(name, os->addr[j].name)) {
1255 found = true;
1256 break;
1257 }
1258 j++;
1259 }
1260
1261 if (found)
1262 break;
1263 }
1264
1265 if (!found)
1266 return -ENOENT;
1267
1268 *pa_start = os->addr[j].pa_start;
1269 *pa_end = os->addr[j].pa_end;
1270
1271 return 0;
1272}
1273
1274/**
1275 * _save_mpu_port_index - find and save the index to @oh's MPU port
1276 * @oh: struct omap_hwmod *
1277 *
1278 * Determines the array index of the OCP slave port that the MPU uses
1279 * to address the device, and saves it into the struct omap_hwmod.
1280 * Intended to be called during hwmod registration only. No return
1281 * value.
1282 */
1283static void __init _save_mpu_port_index(struct omap_hwmod *oh)
1284{
1285 struct omap_hwmod_ocp_if *os = NULL;
1286 struct list_head *p;
1287 int i = 0;
1288
1289 if (!oh)
1290 return;
1291
1292 oh->_int_flags |= _HWMOD_NO_MPU_PORT;
1293
1294 p = oh->slave_ports.next;
1295
1296 while (i < oh->slaves_cnt) {
1297 os = _fetch_next_ocp_if(&p, &i);
1298 if (os->user & OCP_USER_MPU) {
1299 oh->_mpu_port = os;
1300 oh->_int_flags &= ~_HWMOD_NO_MPU_PORT;
1301 break;
1302 }
1303 }
1304
1305 return;
1306}
1307
1308/**
1309 * _find_mpu_rt_port - return omap_hwmod_ocp_if accessible by the MPU
1310 * @oh: struct omap_hwmod *
1311 *
1312 * Given a pointer to a struct omap_hwmod record @oh, return a pointer
1313 * to the struct omap_hwmod_ocp_if record that is used by the MPU to
1314 * communicate with the IP block. This interface need not be directly
1315 * connected to the MPU (and almost certainly is not), but is directly
1316 * connected to the IP block represented by @oh. Returns a pointer
1317 * to the struct omap_hwmod_ocp_if * upon success, or returns NULL upon
1318 * error or if there does not appear to be a path from the MPU to this
1319 * IP block.
1320 */
1321static struct omap_hwmod_ocp_if *_find_mpu_rt_port(struct omap_hwmod *oh)
1322{
1323 if (!oh || oh->_int_flags & _HWMOD_NO_MPU_PORT || oh->slaves_cnt == 0)
1324 return NULL;
1325
1326 return oh->_mpu_port;
1327};
1328
1329/**
1330 * _find_mpu_rt_addr_space - return MPU register target address space for @oh
1331 * @oh: struct omap_hwmod *
1332 *
1333 * Returns a pointer to the struct omap_hwmod_addr_space record representing
1334 * the register target MPU address space; or returns NULL upon error.
1335 */
1336static struct omap_hwmod_addr_space * __init _find_mpu_rt_addr_space(struct omap_hwmod *oh)
1337{
1338 struct omap_hwmod_ocp_if *os;
1339 struct omap_hwmod_addr_space *mem;
1340 int found = 0, i = 0;
1341
1342 os = _find_mpu_rt_port(oh);
1343 if (!os || !os->addr)
1344 return NULL;
1345
1346 do {
1347 mem = &os->addr[i++];
1348 if (mem->flags & ADDR_TYPE_RT)
1349 found = 1;
1350 } while (!found && mem->pa_start != mem->pa_end);
1351
1352 return (found) ? mem : NULL;
1353}
1354
1355/**
1356 * _enable_sysc - try to bring a module out of idle via OCP_SYSCONFIG
1357 * @oh: struct omap_hwmod *
1358 *
1359 * Ensure that the OCP_SYSCONFIG register for the IP block represented
1360 * by @oh is set to indicate to the PRCM that the IP block is active.
1361 * Usually this means placing the module into smart-idle mode and
1362 * smart-standby, but if there is a bug in the automatic idle handling
1363 * for the IP block, it may need to be placed into the force-idle or
1364 * no-idle variants of these modes. No return value.
1365 */
1366static void _enable_sysc(struct omap_hwmod *oh)
1367{
1368 u8 idlemode, sf;
1369 u32 v;
1370 bool clkdm_act;
1371 struct clockdomain *clkdm;
1372
1373 if (!oh->class->sysc)
1374 return;
1375
1376 /*
1377 * Wait until reset has completed, this is needed as the IP
1378 * block is reset automatically by hardware in some cases
1379 * (off-mode for example), and the drivers require the
1380 * IP to be ready when they access it
1381 */
1382 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1383 _enable_optional_clocks(oh);
1384 _wait_softreset_complete(oh);
1385 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1386 _disable_optional_clocks(oh);
1387
1388 v = oh->_sysc_cache;
1389 sf = oh->class->sysc->sysc_flags;
1390
1391 clkdm = _get_clkdm(oh);
1392 if (sf & SYSC_HAS_SIDLEMODE) {
1393 if (oh->flags & HWMOD_SWSUP_SIDLE ||
1394 oh->flags & HWMOD_SWSUP_SIDLE_ACT) {
1395 idlemode = HWMOD_IDLEMODE_NO;
1396 } else {
1397 if (sf & SYSC_HAS_ENAWAKEUP)
1398 _enable_wakeup(oh, &v);
1399 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
1400 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
1401 else
1402 idlemode = HWMOD_IDLEMODE_SMART;
1403 }
1404
1405 /*
1406 * This is special handling for some IPs like
1407 * 32k sync timer. Force them to idle!
1408 */
1409 clkdm_act = (clkdm && clkdm->flags & CLKDM_ACTIVE_WITH_MPU);
1410 if (clkdm_act && !(oh->class->sysc->idlemodes &
1411 (SIDLE_SMART | SIDLE_SMART_WKUP)))
1412 idlemode = HWMOD_IDLEMODE_FORCE;
1413
1414 _set_slave_idlemode(oh, idlemode, &v);
1415 }
1416
1417 if (sf & SYSC_HAS_MIDLEMODE) {
1418 if (oh->flags & HWMOD_FORCE_MSTANDBY) {
1419 idlemode = HWMOD_IDLEMODE_FORCE;
1420 } else if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
1421 idlemode = HWMOD_IDLEMODE_NO;
1422 } else {
1423 if (sf & SYSC_HAS_ENAWAKEUP)
1424 _enable_wakeup(oh, &v);
1425 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
1426 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
1427 else
1428 idlemode = HWMOD_IDLEMODE_SMART;
1429 }
1430 _set_master_standbymode(oh, idlemode, &v);
1431 }
1432
1433 /*
1434 * XXX The clock framework should handle this, by
1435 * calling into this code. But this must wait until the
1436 * clock structures are tagged with omap_hwmod entries
1437 */
1438 if ((oh->flags & HWMOD_SET_DEFAULT_CLOCKACT) &&
1439 (sf & SYSC_HAS_CLOCKACTIVITY))
1440 _set_clockactivity(oh, oh->class->sysc->clockact, &v);
1441
1442 /* If the cached value is the same as the new value, skip the write */
1443 if (oh->_sysc_cache != v)
1444 _write_sysconfig(v, oh);
1445
1446 /*
1447 * Set the autoidle bit only after setting the smartidle bit
1448 * Setting this will not have any impact on the other modules.
1449 */
1450 if (sf & SYSC_HAS_AUTOIDLE) {
1451 idlemode = (oh->flags & HWMOD_NO_OCP_AUTOIDLE) ?
1452 0 : 1;
1453 _set_module_autoidle(oh, idlemode, &v);
1454 _write_sysconfig(v, oh);
1455 }
1456}
1457
1458/**
1459 * _idle_sysc - try to put a module into idle via OCP_SYSCONFIG
1460 * @oh: struct omap_hwmod *
1461 *
1462 * If module is marked as SWSUP_SIDLE, force the module into slave
1463 * idle; otherwise, configure it for smart-idle. If module is marked
1464 * as SWSUP_MSUSPEND, force the module into master standby; otherwise,
1465 * configure it for smart-standby. No return value.
1466 */
1467static void _idle_sysc(struct omap_hwmod *oh)
1468{
1469 u8 idlemode, sf;
1470 u32 v;
1471
1472 if (!oh->class->sysc)
1473 return;
1474
1475 v = oh->_sysc_cache;
1476 sf = oh->class->sysc->sysc_flags;
1477
1478 if (sf & SYSC_HAS_SIDLEMODE) {
1479 if (oh->flags & HWMOD_SWSUP_SIDLE) {
1480 idlemode = HWMOD_IDLEMODE_FORCE;
1481 } else {
1482 if (sf & SYSC_HAS_ENAWAKEUP)
1483 _enable_wakeup(oh, &v);
1484 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
1485 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
1486 else
1487 idlemode = HWMOD_IDLEMODE_SMART;
1488 }
1489 _set_slave_idlemode(oh, idlemode, &v);
1490 }
1491
1492 if (sf & SYSC_HAS_MIDLEMODE) {
1493 if ((oh->flags & HWMOD_SWSUP_MSTANDBY) ||
1494 (oh->flags & HWMOD_FORCE_MSTANDBY)) {
1495 idlemode = HWMOD_IDLEMODE_FORCE;
1496 } else {
1497 if (sf & SYSC_HAS_ENAWAKEUP)
1498 _enable_wakeup(oh, &v);
1499 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
1500 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
1501 else
1502 idlemode = HWMOD_IDLEMODE_SMART;
1503 }
1504 _set_master_standbymode(oh, idlemode, &v);
1505 }
1506
1507 _write_sysconfig(v, oh);
1508}
1509
1510/**
1511 * _shutdown_sysc - force a module into idle via OCP_SYSCONFIG
1512 * @oh: struct omap_hwmod *
1513 *
1514 * Force the module into slave idle and master suspend. No return
1515 * value.
1516 */
1517static void _shutdown_sysc(struct omap_hwmod *oh)
1518{
1519 u32 v;
1520 u8 sf;
1521
1522 if (!oh->class->sysc)
1523 return;
1524
1525 v = oh->_sysc_cache;
1526 sf = oh->class->sysc->sysc_flags;
1527
1528 if (sf & SYSC_HAS_SIDLEMODE)
1529 _set_slave_idlemode(oh, HWMOD_IDLEMODE_FORCE, &v);
1530
1531 if (sf & SYSC_HAS_MIDLEMODE)
1532 _set_master_standbymode(oh, HWMOD_IDLEMODE_FORCE, &v);
1533
1534 if (sf & SYSC_HAS_AUTOIDLE)
1535 _set_module_autoidle(oh, 1, &v);
1536
1537 _write_sysconfig(v, oh);
1538}
1539
1540/**
1541 * _lookup - find an omap_hwmod by name
1542 * @name: find an omap_hwmod by name
1543 *
1544 * Return a pointer to an omap_hwmod by name, or NULL if not found.
1545 */
1546static struct omap_hwmod *_lookup(const char *name)
1547{
1548 struct omap_hwmod *oh, *temp_oh;
1549
1550 oh = NULL;
1551
1552 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
1553 if (!strcmp(name, temp_oh->name)) {
1554 oh = temp_oh;
1555 break;
1556 }
1557 }
1558
1559 return oh;
1560}
1561
1562/**
1563 * _init_clkdm - look up a clockdomain name, store pointer in omap_hwmod
1564 * @oh: struct omap_hwmod *
1565 *
1566 * Convert a clockdomain name stored in a struct omap_hwmod into a
1567 * clockdomain pointer, and save it into the struct omap_hwmod.
1568 * Return -EINVAL if the clkdm_name lookup failed.
1569 */
1570static int _init_clkdm(struct omap_hwmod *oh)
1571{
1572 if (!oh->clkdm_name) {
1573 pr_debug("omap_hwmod: %s: missing clockdomain\n", oh->name);
1574 return 0;
1575 }
1576
1577 oh->clkdm = clkdm_lookup(oh->clkdm_name);
1578 if (!oh->clkdm) {
1579 pr_warning("omap_hwmod: %s: could not associate to clkdm %s\n",
1580 oh->name, oh->clkdm_name);
1581 return 0;
1582 }
1583
1584 pr_debug("omap_hwmod: %s: associated to clkdm %s\n",
1585 oh->name, oh->clkdm_name);
1586
1587 return 0;
1588}
1589
1590/**
1591 * _init_clocks - clk_get() all clocks associated with this hwmod. Retrieve as
1592 * well the clockdomain.
1593 * @oh: struct omap_hwmod *
1594 * @data: not used; pass NULL
1595 *
1596 * Called by omap_hwmod_setup_*() (after omap2_clk_init()).
1597 * Resolves all clock names embedded in the hwmod. Returns 0 on
1598 * success, or a negative error code on failure.
1599 */
1600static int _init_clocks(struct omap_hwmod *oh, void *data)
1601{
1602 int ret = 0;
1603
1604 if (oh->_state != _HWMOD_STATE_REGISTERED)
1605 return 0;
1606
1607 pr_debug("omap_hwmod: %s: looking up clocks\n", oh->name);
1608
1609 if (soc_ops.init_clkdm)
1610 ret |= soc_ops.init_clkdm(oh);
1611
1612 ret |= _init_main_clk(oh);
1613 ret |= _init_interface_clks(oh);
1614 ret |= _init_opt_clks(oh);
1615
1616 if (!ret)
1617 oh->_state = _HWMOD_STATE_CLKS_INITED;
1618 else
1619 pr_warning("omap_hwmod: %s: cannot _init_clocks\n", oh->name);
1620
1621 return ret;
1622}
1623
1624/**
1625 * _lookup_hardreset - fill register bit info for this hwmod/reset line
1626 * @oh: struct omap_hwmod *
1627 * @name: name of the reset line in the context of this hwmod
1628 * @ohri: struct omap_hwmod_rst_info * that this function will fill in
1629 *
1630 * Return the bit position of the reset line that match the
1631 * input name. Return -ENOENT if not found.
1632 */
1633static int _lookup_hardreset(struct omap_hwmod *oh, const char *name,
1634 struct omap_hwmod_rst_info *ohri)
1635{
1636 int i;
1637
1638 for (i = 0; i < oh->rst_lines_cnt; i++) {
1639 const char *rst_line = oh->rst_lines[i].name;
1640 if (!strcmp(rst_line, name)) {
1641 ohri->rst_shift = oh->rst_lines[i].rst_shift;
1642 ohri->st_shift = oh->rst_lines[i].st_shift;
1643 pr_debug("omap_hwmod: %s: %s: %s: rst %d st %d\n",
1644 oh->name, __func__, rst_line, ohri->rst_shift,
1645 ohri->st_shift);
1646
1647 return 0;
1648 }
1649 }
1650
1651 return -ENOENT;
1652}
1653
1654/**
1655 * _assert_hardreset - assert the HW reset line of submodules
1656 * contained in the hwmod module.
1657 * @oh: struct omap_hwmod *
1658 * @name: name of the reset line to lookup and assert
1659 *
1660 * Some IP like dsp, ipu or iva contain processor that require an HW
1661 * reset line to be assert / deassert in order to enable fully the IP.
1662 * Returns -EINVAL if @oh is null, -ENOSYS if we have no way of
1663 * asserting the hardreset line on the currently-booted SoC, or passes
1664 * along the return value from _lookup_hardreset() or the SoC's
1665 * assert_hardreset code.
1666 */
1667static int _assert_hardreset(struct omap_hwmod *oh, const char *name)
1668{
1669 struct omap_hwmod_rst_info ohri;
1670 int ret = -EINVAL;
1671
1672 if (!oh)
1673 return -EINVAL;
1674
1675 if (!soc_ops.assert_hardreset)
1676 return -ENOSYS;
1677
1678 ret = _lookup_hardreset(oh, name, &ohri);
1679 if (ret < 0)
1680 return ret;
1681
1682 ret = soc_ops.assert_hardreset(oh, &ohri);
1683
1684 return ret;
1685}
1686
1687/**
1688 * _deassert_hardreset - deassert the HW reset line of submodules contained
1689 * in the hwmod module.
1690 * @oh: struct omap_hwmod *
1691 * @name: name of the reset line to look up and deassert
1692 *
1693 * Some IP like dsp, ipu or iva contain processor that require an HW
1694 * reset line to be assert / deassert in order to enable fully the IP.
1695 * Returns -EINVAL if @oh is null, -ENOSYS if we have no way of
1696 * deasserting the hardreset line on the currently-booted SoC, or passes
1697 * along the return value from _lookup_hardreset() or the SoC's
1698 * deassert_hardreset code.
1699 */
1700static int _deassert_hardreset(struct omap_hwmod *oh, const char *name)
1701{
1702 struct omap_hwmod_rst_info ohri;
1703 int ret = -EINVAL;
1704 int hwsup = 0;
1705
1706 if (!oh)
1707 return -EINVAL;
1708
1709 if (!soc_ops.deassert_hardreset)
1710 return -ENOSYS;
1711
1712 ret = _lookup_hardreset(oh, name, &ohri);
1713 if (ret < 0)
1714 return ret;
1715
1716 if (oh->clkdm) {
1717 /*
1718 * A clockdomain must be in SW_SUP otherwise reset
1719 * might not be completed. The clockdomain can be set
1720 * in HW_AUTO only when the module become ready.
1721 */
1722 hwsup = clkdm_in_hwsup(oh->clkdm);
1723 ret = clkdm_hwmod_enable(oh->clkdm, oh);
1724 if (ret) {
1725 WARN(1, "omap_hwmod: %s: could not enable clockdomain %s: %d\n",
1726 oh->name, oh->clkdm->name, ret);
1727 return ret;
1728 }
1729 }
1730
1731 _enable_clocks(oh);
1732 if (soc_ops.enable_module)
1733 soc_ops.enable_module(oh);
1734
1735 ret = soc_ops.deassert_hardreset(oh, &ohri);
1736
1737 if (soc_ops.disable_module)
1738 soc_ops.disable_module(oh);
1739 _disable_clocks(oh);
1740
1741 if (ret == -EBUSY)
1742 pr_warning("omap_hwmod: %s: failed to hardreset\n", oh->name);
1743
1744 if (!ret) {
1745 /*
1746 * Set the clockdomain to HW_AUTO, assuming that the
1747 * previous state was HW_AUTO.
1748 */
1749 if (oh->clkdm && hwsup)
1750 clkdm_allow_idle(oh->clkdm);
1751 } else {
1752 if (oh->clkdm)
1753 clkdm_hwmod_disable(oh->clkdm, oh);
1754 }
1755
1756 return ret;
1757}
1758
1759/**
1760 * _read_hardreset - read the HW reset line state of submodules
1761 * contained in the hwmod module
1762 * @oh: struct omap_hwmod *
1763 * @name: name of the reset line to look up and read
1764 *
1765 * Return the state of the reset line. Returns -EINVAL if @oh is
1766 * null, -ENOSYS if we have no way of reading the hardreset line
1767 * status on the currently-booted SoC, or passes along the return
1768 * value from _lookup_hardreset() or the SoC's is_hardreset_asserted
1769 * code.
1770 */
1771static int _read_hardreset(struct omap_hwmod *oh, const char *name)
1772{
1773 struct omap_hwmod_rst_info ohri;
1774 int ret = -EINVAL;
1775
1776 if (!oh)
1777 return -EINVAL;
1778
1779 if (!soc_ops.is_hardreset_asserted)
1780 return -ENOSYS;
1781
1782 ret = _lookup_hardreset(oh, name, &ohri);
1783 if (ret < 0)
1784 return ret;
1785
1786 return soc_ops.is_hardreset_asserted(oh, &ohri);
1787}
1788
1789/**
1790 * _are_all_hardreset_lines_asserted - return true if the @oh is hard-reset
1791 * @oh: struct omap_hwmod *
1792 *
1793 * If all hardreset lines associated with @oh are asserted, then return true.
1794 * Otherwise, if part of @oh is out hardreset or if no hardreset lines
1795 * associated with @oh are asserted, then return false.
1796 * This function is used to avoid executing some parts of the IP block
1797 * enable/disable sequence if its hardreset line is set.
1798 */
1799static bool _are_all_hardreset_lines_asserted(struct omap_hwmod *oh)
1800{
1801 int i, rst_cnt = 0;
1802
1803 if (oh->rst_lines_cnt == 0)
1804 return false;
1805
1806 for (i = 0; i < oh->rst_lines_cnt; i++)
1807 if (_read_hardreset(oh, oh->rst_lines[i].name) > 0)
1808 rst_cnt++;
1809
1810 if (oh->rst_lines_cnt == rst_cnt)
1811 return true;
1812
1813 return false;
1814}
1815
1816/**
1817 * _are_any_hardreset_lines_asserted - return true if any part of @oh is
1818 * hard-reset
1819 * @oh: struct omap_hwmod *
1820 *
1821 * If any hardreset lines associated with @oh are asserted, then
1822 * return true. Otherwise, if no hardreset lines associated with @oh
1823 * are asserted, or if @oh has no hardreset lines, then return false.
1824 * This function is used to avoid executing some parts of the IP block
1825 * enable/disable sequence if any hardreset line is set.
1826 */
1827static bool _are_any_hardreset_lines_asserted(struct omap_hwmod *oh)
1828{
1829 int rst_cnt = 0;
1830 int i;
1831
1832 for (i = 0; i < oh->rst_lines_cnt && rst_cnt == 0; i++)
1833 if (_read_hardreset(oh, oh->rst_lines[i].name) > 0)
1834 rst_cnt++;
1835
1836 return (rst_cnt) ? true : false;
1837}
1838
1839/**
1840 * _omap4_disable_module - enable CLKCTRL modulemode on OMAP4
1841 * @oh: struct omap_hwmod *
1842 *
1843 * Disable the PRCM module mode related to the hwmod @oh.
1844 * Return EINVAL if the modulemode is not supported and 0 in case of success.
1845 */
1846static int _omap4_disable_module(struct omap_hwmod *oh)
1847{
1848 int v;
1849
1850 if (!oh->clkdm || !oh->prcm.omap4.modulemode)
1851 return -EINVAL;
1852
1853 /*
1854 * Since integration code might still be doing something, only
1855 * disable if all lines are under hardreset.
1856 */
1857 if (_are_any_hardreset_lines_asserted(oh))
1858 return 0;
1859
1860 pr_debug("omap_hwmod: %s: %s\n", oh->name, __func__);
1861
1862 omap4_cminst_module_disable(oh->clkdm->prcm_partition,
1863 oh->clkdm->cm_inst,
1864 oh->clkdm->clkdm_offs,
1865 oh->prcm.omap4.clkctrl_offs);
1866
1867 v = _omap4_wait_target_disable(oh);
1868 if (v)
1869 pr_warn("omap_hwmod: %s: _wait_target_disable failed\n",
1870 oh->name);
1871
1872 return 0;
1873}
1874
1875/**
1876 * _am33xx_disable_module - enable CLKCTRL modulemode on AM33XX
1877 * @oh: struct omap_hwmod *
1878 *
1879 * Disable the PRCM module mode related to the hwmod @oh.
1880 * Return EINVAL if the modulemode is not supported and 0 in case of success.
1881 */
1882static int _am33xx_disable_module(struct omap_hwmod *oh)
1883{
1884 int v;
1885
1886 if (!oh->clkdm || !oh->prcm.omap4.modulemode)
1887 return -EINVAL;
1888
1889 pr_debug("omap_hwmod: %s: %s\n", oh->name, __func__);
1890
1891 if (_are_any_hardreset_lines_asserted(oh))
1892 return 0;
1893
1894 am33xx_cm_module_disable(oh->clkdm->cm_inst, oh->clkdm->clkdm_offs,
1895 oh->prcm.omap4.clkctrl_offs);
1896
1897 v = _am33xx_wait_target_disable(oh);
1898 if (v)
1899 pr_warn("omap_hwmod: %s: _wait_target_disable failed\n",
1900 oh->name);
1901
1902 return 0;
1903}
1904
1905/**
1906 * _ocp_softreset - reset an omap_hwmod via the OCP_SYSCONFIG bit
1907 * @oh: struct omap_hwmod *
1908 *
1909 * Resets an omap_hwmod @oh via the OCP_SYSCONFIG bit. hwmod must be
1910 * enabled for this to work. Returns -ENOENT if the hwmod cannot be
1911 * reset this way, -EINVAL if the hwmod is in the wrong state,
1912 * -ETIMEDOUT if the module did not reset in time, or 0 upon success.
1913 *
1914 * In OMAP3 a specific SYSSTATUS register is used to get the reset status.
1915 * Starting in OMAP4, some IPs do not have SYSSTATUS registers and instead
1916 * use the SYSCONFIG softreset bit to provide the status.
1917 *
1918 * Note that some IP like McBSP do have reset control but don't have
1919 * reset status.
1920 */
1921static int _ocp_softreset(struct omap_hwmod *oh)
1922{
1923 u32 v;
1924 int c = 0;
1925 int ret = 0;
1926
1927 if (!oh->class->sysc ||
1928 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
1929 return -ENOENT;
1930
1931 /* clocks must be on for this operation */
1932 if (oh->_state != _HWMOD_STATE_ENABLED) {
1933 pr_warn("omap_hwmod: %s: reset can only be entered from enabled state\n",
1934 oh->name);
1935 return -EINVAL;
1936 }
1937
1938 /* For some modules, all optionnal clocks need to be enabled as well */
1939 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1940 _enable_optional_clocks(oh);
1941
1942 pr_debug("omap_hwmod: %s: resetting via OCP SOFTRESET\n", oh->name);
1943
1944 v = oh->_sysc_cache;
1945 ret = _set_softreset(oh, &v);
1946 if (ret)
1947 goto dis_opt_clks;
1948
1949 _write_sysconfig(v, oh);
1950
1951 if (oh->class->sysc->srst_udelay)
1952 udelay(oh->class->sysc->srst_udelay);
1953
1954 c = _wait_softreset_complete(oh);
1955 if (c == MAX_MODULE_SOFTRESET_WAIT) {
1956 pr_warning("omap_hwmod: %s: softreset failed (waited %d usec)\n",
1957 oh->name, MAX_MODULE_SOFTRESET_WAIT);
1958 ret = -ETIMEDOUT;
1959 goto dis_opt_clks;
1960 } else {
1961 pr_debug("omap_hwmod: %s: softreset in %d usec\n", oh->name, c);
1962 }
1963
1964 ret = _clear_softreset(oh, &v);
1965 if (ret)
1966 goto dis_opt_clks;
1967
1968 _write_sysconfig(v, oh);
1969
1970 /*
1971 * XXX add _HWMOD_STATE_WEDGED for modules that don't come back from
1972 * _wait_target_ready() or _reset()
1973 */
1974
1975dis_opt_clks:
1976 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1977 _disable_optional_clocks(oh);
1978
1979 return ret;
1980}
1981
1982/**
1983 * _reset - reset an omap_hwmod
1984 * @oh: struct omap_hwmod *
1985 *
1986 * Resets an omap_hwmod @oh. If the module has a custom reset
1987 * function pointer defined, then call it to reset the IP block, and
1988 * pass along its return value to the caller. Otherwise, if the IP
1989 * block has an OCP_SYSCONFIG register with a SOFTRESET bitfield
1990 * associated with it, call a function to reset the IP block via that
1991 * method, and pass along the return value to the caller. Finally, if
1992 * the IP block has some hardreset lines associated with it, assert
1993 * all of those, but do _not_ deassert them. (This is because driver
1994 * authors have expressed an apparent requirement to control the
1995 * deassertion of the hardreset lines themselves.)
1996 *
1997 * The default software reset mechanism for most OMAP IP blocks is
1998 * triggered via the OCP_SYSCONFIG.SOFTRESET bit. However, some
1999 * hwmods cannot be reset via this method. Some are not targets and
2000 * therefore have no OCP header registers to access. Others (like the
2001 * IVA) have idiosyncratic reset sequences. So for these relatively
2002 * rare cases, custom reset code can be supplied in the struct
2003 * omap_hwmod_class .reset function pointer.
2004 *
2005 * _set_dmadisable() is called to set the DMADISABLE bit so that it
2006 * does not prevent idling of the system. This is necessary for cases
2007 * where ROMCODE/BOOTLOADER uses dma and transfers control to the
2008 * kernel without disabling dma.
2009 *
2010 * Passes along the return value from either _ocp_softreset() or the
2011 * custom reset function - these must return -EINVAL if the hwmod
2012 * cannot be reset this way or if the hwmod is in the wrong state,
2013 * -ETIMEDOUT if the module did not reset in time, or 0 upon success.
2014 */
2015static int _reset(struct omap_hwmod *oh)
2016{
2017 int i, r;
2018
2019 pr_debug("omap_hwmod: %s: resetting\n", oh->name);
2020
2021 if (oh->class->reset) {
2022 r = oh->class->reset(oh);
2023 } else {
2024 if (oh->rst_lines_cnt > 0) {
2025 for (i = 0; i < oh->rst_lines_cnt; i++)
2026 _assert_hardreset(oh, oh->rst_lines[i].name);
2027 return 0;
2028 } else {
2029 r = _ocp_softreset(oh);
2030 if (r == -ENOENT)
2031 r = 0;
2032 }
2033 }
2034
2035 _set_dmadisable(oh);
2036
2037 /*
2038 * OCP_SYSCONFIG bits need to be reprogrammed after a
2039 * softreset. The _enable() function should be split to avoid
2040 * the rewrite of the OCP_SYSCONFIG register.
2041 */
2042 if (oh->class->sysc) {
2043 _update_sysc_cache(oh);
2044 _enable_sysc(oh);
2045 }
2046
2047 return r;
2048}
2049
2050/**
2051 * _reconfigure_io_chain - clear any I/O chain wakeups and reconfigure chain
2052 *
2053 * Call the appropriate PRM function to clear any logged I/O chain
2054 * wakeups and to reconfigure the chain. This apparently needs to be
2055 * done upon every mux change. Since hwmods can be concurrently
2056 * enabled and idled, hold a spinlock around the I/O chain
2057 * reconfiguration sequence. No return value.
2058 *
2059 * XXX When the PRM code is moved to drivers, this function can be removed,
2060 * as the PRM infrastructure should abstract this.
2061 */
2062static void _reconfigure_io_chain(void)
2063{
2064 unsigned long flags;
2065
2066 spin_lock_irqsave(&io_chain_lock, flags);
2067
2068 if (cpu_is_omap34xx() && omap3_has_io_chain_ctrl())
2069 omap3xxx_prm_reconfigure_io_chain();
2070 else if (cpu_is_omap44xx())
2071 omap44xx_prm_reconfigure_io_chain();
2072
2073 spin_unlock_irqrestore(&io_chain_lock, flags);
2074}
2075
2076/**
2077 * _omap4_update_context_lost - increment hwmod context loss counter if
2078 * hwmod context was lost, and clear hardware context loss reg
2079 * @oh: hwmod to check for context loss
2080 *
2081 * If the PRCM indicates that the hwmod @oh lost context, increment
2082 * our in-memory context loss counter, and clear the RM_*_CONTEXT
2083 * bits. No return value.
2084 */
2085static void _omap4_update_context_lost(struct omap_hwmod *oh)
2086{
2087 if (oh->prcm.omap4.flags & HWMOD_OMAP4_NO_CONTEXT_LOSS_BIT)
2088 return;
2089
2090 if (!prm_was_any_context_lost_old(oh->clkdm->pwrdm.ptr->prcm_partition,
2091 oh->clkdm->pwrdm.ptr->prcm_offs,
2092 oh->prcm.omap4.context_offs))
2093 return;
2094
2095 oh->prcm.omap4.context_lost_counter++;
2096 prm_clear_context_loss_flags_old(oh->clkdm->pwrdm.ptr->prcm_partition,
2097 oh->clkdm->pwrdm.ptr->prcm_offs,
2098 oh->prcm.omap4.context_offs);
2099}
2100
2101/**
2102 * _omap4_get_context_lost - get context loss counter for a hwmod
2103 * @oh: hwmod to get context loss counter for
2104 *
2105 * Returns the in-memory context loss counter for a hwmod.
2106 */
2107static int _omap4_get_context_lost(struct omap_hwmod *oh)
2108{
2109 return oh->prcm.omap4.context_lost_counter;
2110}
2111
2112/**
2113 * _enable_preprogram - Pre-program an IP block during the _enable() process
2114 * @oh: struct omap_hwmod *
2115 *
2116 * Some IP blocks (such as AESS) require some additional programming
2117 * after enable before they can enter idle. If a function pointer to
2118 * do so is present in the hwmod data, then call it and pass along the
2119 * return value; otherwise, return 0.
2120 */
2121static int _enable_preprogram(struct omap_hwmod *oh)
2122{
2123 if (!oh->class->enable_preprogram)
2124 return 0;
2125
2126 return oh->class->enable_preprogram(oh);
2127}
2128
2129/**
2130 * _enable - enable an omap_hwmod
2131 * @oh: struct omap_hwmod *
2132 *
2133 * Enables an omap_hwmod @oh such that the MPU can access the hwmod's
2134 * register target. Returns -EINVAL if the hwmod is in the wrong
2135 * state or passes along the return value of _wait_target_ready().
2136 */
2137static int _enable(struct omap_hwmod *oh)
2138{
2139 int r;
2140 int hwsup = 0;
2141
2142 pr_debug("omap_hwmod: %s: enabling\n", oh->name);
2143
2144 /*
2145 * hwmods with HWMOD_INIT_NO_IDLE flag set are left in enabled
2146 * state at init. Now that someone is really trying to enable
2147 * them, just ensure that the hwmod mux is set.
2148 */
2149 if (oh->_int_flags & _HWMOD_SKIP_ENABLE) {
2150 /*
2151 * If the caller has mux data populated, do the mux'ing
2152 * which wouldn't have been done as part of the _enable()
2153 * done during setup.
2154 */
2155 if (oh->mux)
2156 omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED);
2157
2158 oh->_int_flags &= ~_HWMOD_SKIP_ENABLE;
2159 return 0;
2160 }
2161
2162 if (oh->_state != _HWMOD_STATE_INITIALIZED &&
2163 oh->_state != _HWMOD_STATE_IDLE &&
2164 oh->_state != _HWMOD_STATE_DISABLED) {
2165 WARN(1, "omap_hwmod: %s: enabled state can only be entered from initialized, idle, or disabled state\n",
2166 oh->name);
2167 return -EINVAL;
2168 }
2169
2170 /*
2171 * If an IP block contains HW reset lines and all of them are
2172 * asserted, we let integration code associated with that
2173 * block handle the enable. We've received very little
2174 * information on what those driver authors need, and until
2175 * detailed information is provided and the driver code is
2176 * posted to the public lists, this is probably the best we
2177 * can do.
2178 */
2179 if (_are_all_hardreset_lines_asserted(oh))
2180 return 0;
2181
2182 /* Mux pins for device runtime if populated */
2183 if (oh->mux && (!oh->mux->enabled ||
2184 ((oh->_state == _HWMOD_STATE_IDLE) &&
2185 oh->mux->pads_dynamic))) {
2186 omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED);
2187 _reconfigure_io_chain();
2188 }
2189
2190 _add_initiator_dep(oh, mpu_oh);
2191
2192 if (oh->clkdm) {
2193 /*
2194 * A clockdomain must be in SW_SUP before enabling
2195 * completely the module. The clockdomain can be set
2196 * in HW_AUTO only when the module become ready.
2197 */
2198 hwsup = clkdm_in_hwsup(oh->clkdm) &&
2199 !clkdm_missing_idle_reporting(oh->clkdm);
2200 r = clkdm_hwmod_enable(oh->clkdm, oh);
2201 if (r) {
2202 WARN(1, "omap_hwmod: %s: could not enable clockdomain %s: %d\n",
2203 oh->name, oh->clkdm->name, r);
2204 return r;
2205 }
2206 }
2207
2208 _enable_clocks(oh);
2209 if (soc_ops.enable_module)
2210 soc_ops.enable_module(oh);
2211 if (oh->flags & HWMOD_BLOCK_WFI)
2212 cpu_idle_poll_ctrl(true);
2213
2214 if (soc_ops.update_context_lost)
2215 soc_ops.update_context_lost(oh);
2216
2217 r = (soc_ops.wait_target_ready) ? soc_ops.wait_target_ready(oh) :
2218 -EINVAL;
2219 if (!r) {
2220 /*
2221 * Set the clockdomain to HW_AUTO only if the target is ready,
2222 * assuming that the previous state was HW_AUTO
2223 */
2224 if (oh->clkdm && hwsup)
2225 clkdm_allow_idle(oh->clkdm);
2226
2227 oh->_state = _HWMOD_STATE_ENABLED;
2228
2229 /* Access the sysconfig only if the target is ready */
2230 if (oh->class->sysc) {
2231 if (!(oh->_int_flags & _HWMOD_SYSCONFIG_LOADED))
2232 _update_sysc_cache(oh);
2233 _enable_sysc(oh);
2234 }
2235 r = _enable_preprogram(oh);
2236 } else {
2237 if (soc_ops.disable_module)
2238 soc_ops.disable_module(oh);
2239 _disable_clocks(oh);
2240 pr_debug("omap_hwmod: %s: _wait_target_ready: %d\n",
2241 oh->name, r);
2242
2243 if (oh->clkdm)
2244 clkdm_hwmod_disable(oh->clkdm, oh);
2245 }
2246
2247 return r;
2248}
2249
2250/**
2251 * _idle - idle an omap_hwmod
2252 * @oh: struct omap_hwmod *
2253 *
2254 * Idles an omap_hwmod @oh. This should be called once the hwmod has
2255 * no further work. Returns -EINVAL if the hwmod is in the wrong
2256 * state or returns 0.
2257 */
2258static int _idle(struct omap_hwmod *oh)
2259{
2260 pr_debug("omap_hwmod: %s: idling\n", oh->name);
2261
2262 if (oh->_state != _HWMOD_STATE_ENABLED) {
2263 WARN(1, "omap_hwmod: %s: idle state can only be entered from enabled state\n",
2264 oh->name);
2265 return -EINVAL;
2266 }
2267
2268 if (_are_all_hardreset_lines_asserted(oh))
2269 return 0;
2270
2271 if (oh->class->sysc)
2272 _idle_sysc(oh);
2273 _del_initiator_dep(oh, mpu_oh);
2274
2275 if (oh->flags & HWMOD_BLOCK_WFI)
2276 cpu_idle_poll_ctrl(false);
2277 if (soc_ops.disable_module)
2278 soc_ops.disable_module(oh);
2279
2280 /*
2281 * The module must be in idle mode before disabling any parents
2282 * clocks. Otherwise, the parent clock might be disabled before
2283 * the module transition is done, and thus will prevent the
2284 * transition to complete properly.
2285 */
2286 _disable_clocks(oh);
2287 if (oh->clkdm)
2288 clkdm_hwmod_disable(oh->clkdm, oh);
2289
2290 /* Mux pins for device idle if populated */
2291 if (oh->mux && oh->mux->pads_dynamic) {
2292 omap_hwmod_mux(oh->mux, _HWMOD_STATE_IDLE);
2293 _reconfigure_io_chain();
2294 }
2295
2296 oh->_state = _HWMOD_STATE_IDLE;
2297
2298 return 0;
2299}
2300
2301/**
2302 * _shutdown - shutdown an omap_hwmod
2303 * @oh: struct omap_hwmod *
2304 *
2305 * Shut down an omap_hwmod @oh. This should be called when the driver
2306 * used for the hwmod is removed or unloaded or if the driver is not
2307 * used by the system. Returns -EINVAL if the hwmod is in the wrong
2308 * state or returns 0.
2309 */
2310static int _shutdown(struct omap_hwmod *oh)
2311{
2312 int ret, i;
2313 u8 prev_state;
2314
2315 if (oh->_state != _HWMOD_STATE_IDLE &&
2316 oh->_state != _HWMOD_STATE_ENABLED) {
2317 WARN(1, "omap_hwmod: %s: disabled state can only be entered from idle, or enabled state\n",
2318 oh->name);
2319 return -EINVAL;
2320 }
2321
2322 if (_are_all_hardreset_lines_asserted(oh))
2323 return 0;
2324
2325 pr_debug("omap_hwmod: %s: disabling\n", oh->name);
2326
2327 if (oh->class->pre_shutdown) {
2328 prev_state = oh->_state;
2329 if (oh->_state == _HWMOD_STATE_IDLE)
2330 _enable(oh);
2331 ret = oh->class->pre_shutdown(oh);
2332 if (ret) {
2333 if (prev_state == _HWMOD_STATE_IDLE)
2334 _idle(oh);
2335 return ret;
2336 }
2337 }
2338
2339 if (oh->class->sysc) {
2340 if (oh->_state == _HWMOD_STATE_IDLE)
2341 _enable(oh);
2342 _shutdown_sysc(oh);
2343 }
2344
2345 /* clocks and deps are already disabled in idle */
2346 if (oh->_state == _HWMOD_STATE_ENABLED) {
2347 _del_initiator_dep(oh, mpu_oh);
2348 /* XXX what about the other system initiators here? dma, dsp */
2349 if (oh->flags & HWMOD_BLOCK_WFI)
2350 cpu_idle_poll_ctrl(false);
2351 if (soc_ops.disable_module)
2352 soc_ops.disable_module(oh);
2353 _disable_clocks(oh);
2354 if (oh->clkdm)
2355 clkdm_hwmod_disable(oh->clkdm, oh);
2356 }
2357 /* XXX Should this code also force-disable the optional clocks? */
2358
2359 for (i = 0; i < oh->rst_lines_cnt; i++)
2360 _assert_hardreset(oh, oh->rst_lines[i].name);
2361
2362 /* Mux pins to safe mode or use populated off mode values */
2363 if (oh->mux)
2364 omap_hwmod_mux(oh->mux, _HWMOD_STATE_DISABLED);
2365
2366 oh->_state = _HWMOD_STATE_DISABLED;
2367
2368 return 0;
2369}
2370
2371static int of_dev_find_hwmod(struct device_node *np,
2372 struct omap_hwmod *oh)
2373{
2374 int count, i, res;
2375 const char *p;
2376
2377 count = of_property_count_strings(np, "ti,hwmods");
2378 if (count < 1)
2379 return -ENODEV;
2380
2381 for (i = 0; i < count; i++) {
2382 res = of_property_read_string_index(np, "ti,hwmods",
2383 i, &p);
2384 if (res)
2385 continue;
2386 if (!strcmp(p, oh->name)) {
2387 pr_debug("omap_hwmod: dt %s[%i] uses hwmod %s\n",
2388 np->name, i, oh->name);
2389 return i;
2390 }
2391 }
2392
2393 return -ENODEV;
2394}
2395
2396/**
2397 * of_dev_hwmod_lookup - look up needed hwmod from dt blob
2398 * @np: struct device_node *
2399 * @oh: struct omap_hwmod *
2400 * @index: index of the entry found
2401 * @found: struct device_node * found or NULL
2402 *
2403 * Parse the dt blob and find out needed hwmod. Recursive function is
2404 * implemented to take care hierarchical dt blob parsing.
2405 * Return: Returns 0 on success, -ENODEV when not found.
2406 */
2407static int of_dev_hwmod_lookup(struct device_node *np,
2408 struct omap_hwmod *oh,
2409 int *index,
2410 struct device_node **found)
2411{
2412 struct device_node *np0 = NULL;
2413 int res;
2414
2415 res = of_dev_find_hwmod(np, oh);
2416 if (res >= 0) {
2417 *found = np;
2418 *index = res;
2419 return 0;
2420 }
2421
2422 for_each_child_of_node(np, np0) {
2423 struct device_node *fc;
2424 int i;
2425
2426 res = of_dev_hwmod_lookup(np0, oh, &i, &fc);
2427 if (res == 0) {
2428 *found = fc;
2429 *index = i;
2430 return 0;
2431 }
2432 }
2433
2434 *found = NULL;
2435 *index = 0;
2436
2437 return -ENODEV;
2438}
2439
2440/**
2441 * _init_mpu_rt_base - populate the virtual address for a hwmod
2442 * @oh: struct omap_hwmod * to locate the virtual address
2443 * @data: (unused, caller should pass NULL)
2444 * @index: index of the reg entry iospace in device tree
2445 * @np: struct device_node * of the IP block's device node in the DT data
2446 *
2447 * Cache the virtual address used by the MPU to access this IP block's
2448 * registers. This address is needed early so the OCP registers that
2449 * are part of the device's address space can be ioremapped properly.
2450 *
2451 * Returns 0 on success, -EINVAL if an invalid hwmod is passed, and
2452 * -ENXIO on absent or invalid register target address space.
2453 */
2454static int __init _init_mpu_rt_base(struct omap_hwmod *oh, void *data,
2455 int index, struct device_node *np)
2456{
2457 struct omap_hwmod_addr_space *mem;
2458 void __iomem *va_start = NULL;
2459
2460 if (!oh)
2461 return -EINVAL;
2462
2463 _save_mpu_port_index(oh);
2464
2465 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
2466 return -ENXIO;
2467
2468 mem = _find_mpu_rt_addr_space(oh);
2469 if (!mem) {
2470 pr_debug("omap_hwmod: %s: no MPU register target found\n",
2471 oh->name);
2472
2473 /* Extract the IO space from device tree blob */
2474 if (!np)
2475 return -ENXIO;
2476
2477 va_start = of_iomap(np, index + oh->mpu_rt_idx);
2478 } else {
2479 va_start = ioremap(mem->pa_start, mem->pa_end - mem->pa_start);
2480 }
2481
2482 if (!va_start) {
2483 if (mem)
2484 pr_err("omap_hwmod: %s: Could not ioremap\n", oh->name);
2485 else
2486 pr_err("omap_hwmod: %s: Missing dt reg%i for %s\n",
2487 oh->name, index, np->full_name);
2488 return -ENXIO;
2489 }
2490
2491 pr_debug("omap_hwmod: %s: MPU register target at va %p\n",
2492 oh->name, va_start);
2493
2494 oh->_mpu_rt_va = va_start;
2495 return 0;
2496}
2497
2498/**
2499 * _init - initialize internal data for the hwmod @oh
2500 * @oh: struct omap_hwmod *
2501 * @n: (unused)
2502 *
2503 * Look up the clocks and the address space used by the MPU to access
2504 * registers belonging to the hwmod @oh. @oh must already be
2505 * registered at this point. This is the first of two phases for
2506 * hwmod initialization. Code called here does not touch any hardware
2507 * registers, it simply prepares internal data structures. Returns 0
2508 * upon success or if the hwmod isn't registered or if the hwmod's
2509 * address space is not defined, or -EINVAL upon failure.
2510 */
2511static int __init _init(struct omap_hwmod *oh, void *data)
2512{
2513 int r, index;
2514 struct device_node *np = NULL;
2515
2516 if (oh->_state != _HWMOD_STATE_REGISTERED)
2517 return 0;
2518
2519 if (of_have_populated_dt()) {
2520 struct device_node *bus;
2521
2522 bus = of_find_node_by_name(NULL, "ocp");
2523 if (!bus)
2524 return -ENODEV;
2525
2526 r = of_dev_hwmod_lookup(bus, oh, &index, &np);
2527 if (r)
2528 pr_debug("omap_hwmod: %s missing dt data\n", oh->name);
2529 else if (np && index)
2530 pr_warn("omap_hwmod: %s using broken dt data from %s\n",
2531 oh->name, np->name);
2532 }
2533
2534 if (oh->class->sysc) {
2535 r = _init_mpu_rt_base(oh, NULL, index, np);
2536 if (r < 0) {
2537 WARN(1, "omap_hwmod: %s: doesn't have mpu register target base\n",
2538 oh->name);
2539 return 0;
2540 }
2541 }
2542
2543 r = _init_clocks(oh, NULL);
2544 if (r < 0) {
2545 WARN(1, "omap_hwmod: %s: couldn't init clocks\n", oh->name);
2546 return -EINVAL;
2547 }
2548
2549 if (np) {
2550 if (of_find_property(np, "ti,no-reset-on-init", NULL))
2551 oh->flags |= HWMOD_INIT_NO_RESET;
2552 if (of_find_property(np, "ti,no-idle-on-init", NULL))
2553 oh->flags |= HWMOD_INIT_NO_IDLE;
2554 }
2555
2556 oh->_state = _HWMOD_STATE_INITIALIZED;
2557
2558 return 0;
2559}
2560
2561/**
2562 * _setup_iclk_autoidle - configure an IP block's interface clocks
2563 * @oh: struct omap_hwmod *
2564 *
2565 * Set up the module's interface clocks. XXX This function is still mostly
2566 * a stub; implementing this properly requires iclk autoidle usecounting in
2567 * the clock code. No return value.
2568 */
2569static void __init _setup_iclk_autoidle(struct omap_hwmod *oh)
2570{
2571 struct omap_hwmod_ocp_if *os;
2572 struct list_head *p;
2573 int i = 0;
2574 if (oh->_state != _HWMOD_STATE_INITIALIZED)
2575 return;
2576
2577 p = oh->slave_ports.next;
2578
2579 while (i < oh->slaves_cnt) {
2580 os = _fetch_next_ocp_if(&p, &i);
2581 if (!os->_clk)
2582 continue;
2583
2584 if (os->flags & OCPIF_SWSUP_IDLE) {
2585 /* XXX omap_iclk_deny_idle(c); */
2586 } else {
2587 /* XXX omap_iclk_allow_idle(c); */
2588 clk_enable(os->_clk);
2589 }
2590 }
2591
2592 return;
2593}
2594
2595/**
2596 * _setup_reset - reset an IP block during the setup process
2597 * @oh: struct omap_hwmod *
2598 *
2599 * Reset the IP block corresponding to the hwmod @oh during the setup
2600 * process. The IP block is first enabled so it can be successfully
2601 * reset. Returns 0 upon success or a negative error code upon
2602 * failure.
2603 */
2604static int __init _setup_reset(struct omap_hwmod *oh)
2605{
2606 int r;
2607
2608 if (oh->_state != _HWMOD_STATE_INITIALIZED)
2609 return -EINVAL;
2610
2611 if (oh->flags & HWMOD_EXT_OPT_MAIN_CLK)
2612 return -EPERM;
2613
2614 if (oh->rst_lines_cnt == 0) {
2615 r = _enable(oh);
2616 if (r) {
2617 pr_warning("omap_hwmod: %s: cannot be enabled for reset (%d)\n",
2618 oh->name, oh->_state);
2619 return -EINVAL;
2620 }
2621 }
2622
2623 if (!(oh->flags & HWMOD_INIT_NO_RESET))
2624 r = _reset(oh);
2625
2626 return r;
2627}
2628
2629/**
2630 * _setup_postsetup - transition to the appropriate state after _setup
2631 * @oh: struct omap_hwmod *
2632 *
2633 * Place an IP block represented by @oh into a "post-setup" state --
2634 * either IDLE, ENABLED, or DISABLED. ("post-setup" simply means that
2635 * this function is called at the end of _setup().) The postsetup
2636 * state for an IP block can be changed by calling
2637 * omap_hwmod_enter_postsetup_state() early in the boot process,
2638 * before one of the omap_hwmod_setup*() functions are called for the
2639 * IP block.
2640 *
2641 * The IP block stays in this state until a PM runtime-based driver is
2642 * loaded for that IP block. A post-setup state of IDLE is
2643 * appropriate for almost all IP blocks with runtime PM-enabled
2644 * drivers, since those drivers are able to enable the IP block. A
2645 * post-setup state of ENABLED is appropriate for kernels with PM
2646 * runtime disabled. The DISABLED state is appropriate for unusual IP
2647 * blocks such as the MPU WDTIMER on kernels without WDTIMER drivers
2648 * included, since the WDTIMER starts running on reset and will reset
2649 * the MPU if left active.
2650 *
2651 * This post-setup mechanism is deprecated. Once all of the OMAP
2652 * drivers have been converted to use PM runtime, and all of the IP
2653 * block data and interconnect data is available to the hwmod code, it
2654 * should be possible to replace this mechanism with a "lazy reset"
2655 * arrangement. In a "lazy reset" setup, each IP block is enabled
2656 * when the driver first probes, then all remaining IP blocks without
2657 * drivers are either shut down or enabled after the drivers have
2658 * loaded. However, this cannot take place until the above
2659 * preconditions have been met, since otherwise the late reset code
2660 * has no way of knowing which IP blocks are in use by drivers, and
2661 * which ones are unused.
2662 *
2663 * No return value.
2664 */
2665static void __init _setup_postsetup(struct omap_hwmod *oh)
2666{
2667 u8 postsetup_state;
2668
2669 if (oh->rst_lines_cnt > 0)
2670 return;
2671
2672 postsetup_state = oh->_postsetup_state;
2673 if (postsetup_state == _HWMOD_STATE_UNKNOWN)
2674 postsetup_state = _HWMOD_STATE_ENABLED;
2675
2676 /*
2677 * XXX HWMOD_INIT_NO_IDLE does not belong in hwmod data -
2678 * it should be set by the core code as a runtime flag during startup
2679 */
2680 if ((oh->flags & HWMOD_INIT_NO_IDLE) &&
2681 (postsetup_state == _HWMOD_STATE_IDLE)) {
2682 oh->_int_flags |= _HWMOD_SKIP_ENABLE;
2683 postsetup_state = _HWMOD_STATE_ENABLED;
2684 }
2685
2686 if (postsetup_state == _HWMOD_STATE_IDLE)
2687 _idle(oh);
2688 else if (postsetup_state == _HWMOD_STATE_DISABLED)
2689 _shutdown(oh);
2690 else if (postsetup_state != _HWMOD_STATE_ENABLED)
2691 WARN(1, "hwmod: %s: unknown postsetup state %d! defaulting to enabled\n",
2692 oh->name, postsetup_state);
2693
2694 return;
2695}
2696
2697/**
2698 * _setup - prepare IP block hardware for use
2699 * @oh: struct omap_hwmod *
2700 * @n: (unused, pass NULL)
2701 *
2702 * Configure the IP block represented by @oh. This may include
2703 * enabling the IP block, resetting it, and placing it into a
2704 * post-setup state, depending on the type of IP block and applicable
2705 * flags. IP blocks are reset to prevent any previous configuration
2706 * by the bootloader or previous operating system from interfering
2707 * with power management or other parts of the system. The reset can
2708 * be avoided; see omap_hwmod_no_setup_reset(). This is the second of
2709 * two phases for hwmod initialization. Code called here generally
2710 * affects the IP block hardware, or system integration hardware
2711 * associated with the IP block. Returns 0.
2712 */
2713static int __init _setup(struct omap_hwmod *oh, void *data)
2714{
2715 if (oh->_state != _HWMOD_STATE_INITIALIZED)
2716 return 0;
2717
2718 _setup_iclk_autoidle(oh);
2719
2720 if (!_setup_reset(oh))
2721 _setup_postsetup(oh);
2722
2723 return 0;
2724}
2725
2726/**
2727 * _register - register a struct omap_hwmod
2728 * @oh: struct omap_hwmod *
2729 *
2730 * Registers the omap_hwmod @oh. Returns -EEXIST if an omap_hwmod
2731 * already has been registered by the same name; -EINVAL if the
2732 * omap_hwmod is in the wrong state, if @oh is NULL, if the
2733 * omap_hwmod's class field is NULL; if the omap_hwmod is missing a
2734 * name, or if the omap_hwmod's class is missing a name; or 0 upon
2735 * success.
2736 *
2737 * XXX The data should be copied into bootmem, so the original data
2738 * should be marked __initdata and freed after init. This would allow
2739 * unneeded omap_hwmods to be freed on multi-OMAP configurations. Note
2740 * that the copy process would be relatively complex due to the large number
2741 * of substructures.
2742 */
2743static int __init _register(struct omap_hwmod *oh)
2744{
2745 if (!oh || !oh->name || !oh->class || !oh->class->name ||
2746 (oh->_state != _HWMOD_STATE_UNKNOWN))
2747 return -EINVAL;
2748
2749 pr_debug("omap_hwmod: %s: registering\n", oh->name);
2750
2751 if (_lookup(oh->name))
2752 return -EEXIST;
2753
2754 list_add_tail(&oh->node, &omap_hwmod_list);
2755
2756 INIT_LIST_HEAD(&oh->master_ports);
2757 INIT_LIST_HEAD(&oh->slave_ports);
2758 spin_lock_init(&oh->_lock);
2759
2760 oh->_state = _HWMOD_STATE_REGISTERED;
2761
2762 /*
2763 * XXX Rather than doing a strcmp(), this should test a flag
2764 * set in the hwmod data, inserted by the autogenerator code.
2765 */
2766 if (!strcmp(oh->name, MPU_INITIATOR_NAME))
2767 mpu_oh = oh;
2768
2769 return 0;
2770}
2771
2772/**
2773 * _alloc_links - return allocated memory for hwmod links
2774 * @ml: pointer to a struct omap_hwmod_link * for the master link
2775 * @sl: pointer to a struct omap_hwmod_link * for the slave link
2776 *
2777 * Return pointers to two struct omap_hwmod_link records, via the
2778 * addresses pointed to by @ml and @sl. Will first attempt to return
2779 * memory allocated as part of a large initial block, but if that has
2780 * been exhausted, will allocate memory itself. Since ideally this
2781 * second allocation path will never occur, the number of these
2782 * 'supplemental' allocations will be logged when debugging is
2783 * enabled. Returns 0.
2784 */
2785static int __init _alloc_links(struct omap_hwmod_link **ml,
2786 struct omap_hwmod_link **sl)
2787{
2788 unsigned int sz;
2789
2790 if ((free_ls + LINKS_PER_OCP_IF) <= max_ls) {
2791 *ml = &linkspace[free_ls++];
2792 *sl = &linkspace[free_ls++];
2793 return 0;
2794 }
2795
2796 sz = sizeof(struct omap_hwmod_link) * LINKS_PER_OCP_IF;
2797
2798 *sl = NULL;
2799 *ml = memblock_virt_alloc(sz, 0);
2800
2801 *sl = (void *)(*ml) + sizeof(struct omap_hwmod_link);
2802
2803 ls_supp++;
2804 pr_debug("omap_hwmod: supplemental link allocations needed: %d\n",
2805 ls_supp * LINKS_PER_OCP_IF);
2806
2807 return 0;
2808};
2809
2810/**
2811 * _add_link - add an interconnect between two IP blocks
2812 * @oi: pointer to a struct omap_hwmod_ocp_if record
2813 *
2814 * Add struct omap_hwmod_link records connecting the master IP block
2815 * specified in @oi->master to @oi, and connecting the slave IP block
2816 * specified in @oi->slave to @oi. This code is assumed to run before
2817 * preemption or SMP has been enabled, thus avoiding the need for
2818 * locking in this code. Changes to this assumption will require
2819 * additional locking. Returns 0.
2820 */
2821static int __init _add_link(struct omap_hwmod_ocp_if *oi)
2822{
2823 struct omap_hwmod_link *ml, *sl;
2824
2825 pr_debug("omap_hwmod: %s -> %s: adding link\n", oi->master->name,
2826 oi->slave->name);
2827
2828 _alloc_links(&ml, &sl);
2829
2830 ml->ocp_if = oi;
2831 INIT_LIST_HEAD(&ml->node);
2832 list_add(&ml->node, &oi->master->master_ports);
2833 oi->master->masters_cnt++;
2834
2835 sl->ocp_if = oi;
2836 INIT_LIST_HEAD(&sl->node);
2837 list_add(&sl->node, &oi->slave->slave_ports);
2838 oi->slave->slaves_cnt++;
2839
2840 return 0;
2841}
2842
2843/**
2844 * _register_link - register a struct omap_hwmod_ocp_if
2845 * @oi: struct omap_hwmod_ocp_if *
2846 *
2847 * Registers the omap_hwmod_ocp_if record @oi. Returns -EEXIST if it
2848 * has already been registered; -EINVAL if @oi is NULL or if the
2849 * record pointed to by @oi is missing required fields; or 0 upon
2850 * success.
2851 *
2852 * XXX The data should be copied into bootmem, so the original data
2853 * should be marked __initdata and freed after init. This would allow
2854 * unneeded omap_hwmods to be freed on multi-OMAP configurations.
2855 */
2856static int __init _register_link(struct omap_hwmod_ocp_if *oi)
2857{
2858 if (!oi || !oi->master || !oi->slave || !oi->user)
2859 return -EINVAL;
2860
2861 if (oi->_int_flags & _OCPIF_INT_FLAGS_REGISTERED)
2862 return -EEXIST;
2863
2864 pr_debug("omap_hwmod: registering link from %s to %s\n",
2865 oi->master->name, oi->slave->name);
2866
2867 /*
2868 * Register the connected hwmods, if they haven't been
2869 * registered already
2870 */
2871 if (oi->master->_state != _HWMOD_STATE_REGISTERED)
2872 _register(oi->master);
2873
2874 if (oi->slave->_state != _HWMOD_STATE_REGISTERED)
2875 _register(oi->slave);
2876
2877 _add_link(oi);
2878
2879 oi->_int_flags |= _OCPIF_INT_FLAGS_REGISTERED;
2880
2881 return 0;
2882}
2883
2884/**
2885 * _alloc_linkspace - allocate large block of hwmod links
2886 * @ois: pointer to an array of struct omap_hwmod_ocp_if records to count
2887 *
2888 * Allocate a large block of struct omap_hwmod_link records. This
2889 * improves boot time significantly by avoiding the need to allocate
2890 * individual records one by one. If the number of records to
2891 * allocate in the block hasn't been manually specified, this function
2892 * will count the number of struct omap_hwmod_ocp_if records in @ois
2893 * and use that to determine the allocation size. For SoC families
2894 * that require multiple list registrations, such as OMAP3xxx, this
2895 * estimation process isn't optimal, so manual estimation is advised
2896 * in those cases. Returns -EEXIST if the allocation has already occurred
2897 * or 0 upon success.
2898 */
2899static int __init _alloc_linkspace(struct omap_hwmod_ocp_if **ois)
2900{
2901 unsigned int i = 0;
2902 unsigned int sz;
2903
2904 if (linkspace) {
2905 WARN(1, "linkspace already allocated\n");
2906 return -EEXIST;
2907 }
2908
2909 if (max_ls == 0)
2910 while (ois[i++])
2911 max_ls += LINKS_PER_OCP_IF;
2912
2913 sz = sizeof(struct omap_hwmod_link) * max_ls;
2914
2915 pr_debug("omap_hwmod: %s: allocating %d byte linkspace (%d links)\n",
2916 __func__, sz, max_ls);
2917
2918 linkspace = memblock_virt_alloc(sz, 0);
2919
2920 return 0;
2921}
2922
2923/* Static functions intended only for use in soc_ops field function pointers */
2924
2925/**
2926 * _omap2xxx_wait_target_ready - wait for a module to leave slave idle
2927 * @oh: struct omap_hwmod *
2928 *
2929 * Wait for a module @oh to leave slave idle. Returns 0 if the module
2930 * does not have an IDLEST bit or if the module successfully leaves
2931 * slave idle; otherwise, pass along the return value of the
2932 * appropriate *_cm*_wait_module_ready() function.
2933 */
2934static int _omap2xxx_wait_target_ready(struct omap_hwmod *oh)
2935{
2936 if (!oh)
2937 return -EINVAL;
2938
2939 if (oh->flags & HWMOD_NO_IDLEST)
2940 return 0;
2941
2942 if (!_find_mpu_rt_port(oh))
2943 return 0;
2944
2945 /* XXX check module SIDLEMODE, hardreset status, enabled clocks */
2946
2947 return omap2xxx_cm_wait_module_ready(oh->prcm.omap2.module_offs,
2948 oh->prcm.omap2.idlest_reg_id,
2949 oh->prcm.omap2.idlest_idle_bit);
2950}
2951
2952/**
2953 * _omap3xxx_wait_target_ready - wait for a module to leave slave idle
2954 * @oh: struct omap_hwmod *
2955 *
2956 * Wait for a module @oh to leave slave idle. Returns 0 if the module
2957 * does not have an IDLEST bit or if the module successfully leaves
2958 * slave idle; otherwise, pass along the return value of the
2959 * appropriate *_cm*_wait_module_ready() function.
2960 */
2961static int _omap3xxx_wait_target_ready(struct omap_hwmod *oh)
2962{
2963 if (!oh)
2964 return -EINVAL;
2965
2966 if (oh->flags & HWMOD_NO_IDLEST)
2967 return 0;
2968
2969 if (!_find_mpu_rt_port(oh))
2970 return 0;
2971
2972 /* XXX check module SIDLEMODE, hardreset status, enabled clocks */
2973
2974 return omap3xxx_cm_wait_module_ready(oh->prcm.omap2.module_offs,
2975 oh->prcm.omap2.idlest_reg_id,
2976 oh->prcm.omap2.idlest_idle_bit);
2977}
2978
2979/**
2980 * _omap4_wait_target_ready - wait for a module to leave slave idle
2981 * @oh: struct omap_hwmod *
2982 *
2983 * Wait for a module @oh to leave slave idle. Returns 0 if the module
2984 * does not have an IDLEST bit or if the module successfully leaves
2985 * slave idle; otherwise, pass along the return value of the
2986 * appropriate *_cm*_wait_module_ready() function.
2987 */
2988static int _omap4_wait_target_ready(struct omap_hwmod *oh)
2989{
2990 if (!oh)
2991 return -EINVAL;
2992
2993 if (oh->flags & HWMOD_NO_IDLEST || !oh->clkdm)
2994 return 0;
2995
2996 if (!_find_mpu_rt_port(oh))
2997 return 0;
2998
2999 /* XXX check module SIDLEMODE, hardreset status */
3000
3001 return omap4_cminst_wait_module_ready(oh->clkdm->prcm_partition,
3002 oh->clkdm->cm_inst,
3003 oh->clkdm->clkdm_offs,
3004 oh->prcm.omap4.clkctrl_offs);
3005}
3006
3007/**
3008 * _am33xx_wait_target_ready - wait for a module to leave slave idle
3009 * @oh: struct omap_hwmod *
3010 *
3011 * Wait for a module @oh to leave slave idle. Returns 0 if the module
3012 * does not have an IDLEST bit or if the module successfully leaves
3013 * slave idle; otherwise, pass along the return value of the
3014 * appropriate *_cm*_wait_module_ready() function.
3015 */
3016static int _am33xx_wait_target_ready(struct omap_hwmod *oh)
3017{
3018 if (!oh || !oh->clkdm)
3019 return -EINVAL;
3020
3021 if (oh->flags & HWMOD_NO_IDLEST)
3022 return 0;
3023
3024 if (!_find_mpu_rt_port(oh))
3025 return 0;
3026
3027 /* XXX check module SIDLEMODE, hardreset status */
3028
3029 return am33xx_cm_wait_module_ready(oh->clkdm->cm_inst,
3030 oh->clkdm->clkdm_offs,
3031 oh->prcm.omap4.clkctrl_offs);
3032}
3033
3034/**
3035 * _omap2_assert_hardreset - call OMAP2 PRM hardreset fn with hwmod args
3036 * @oh: struct omap_hwmod * to assert hardreset
3037 * @ohri: hardreset line data
3038 *
3039 * Call omap2_prm_assert_hardreset() with parameters extracted from
3040 * the hwmod @oh and the hardreset line data @ohri. Only intended for
3041 * use as an soc_ops function pointer. Passes along the return value
3042 * from omap2_prm_assert_hardreset(). XXX This function is scheduled
3043 * for removal when the PRM code is moved into drivers/.
3044 */
3045static int _omap2_assert_hardreset(struct omap_hwmod *oh,
3046 struct omap_hwmod_rst_info *ohri)
3047{
3048 return omap2_prm_assert_hardreset(oh->prcm.omap2.module_offs,
3049 ohri->rst_shift);
3050}
3051
3052/**
3053 * _omap2_deassert_hardreset - call OMAP2 PRM hardreset fn with hwmod args
3054 * @oh: struct omap_hwmod * to deassert hardreset
3055 * @ohri: hardreset line data
3056 *
3057 * Call omap2_prm_deassert_hardreset() with parameters extracted from
3058 * the hwmod @oh and the hardreset line data @ohri. Only intended for
3059 * use as an soc_ops function pointer. Passes along the return value
3060 * from omap2_prm_deassert_hardreset(). XXX This function is
3061 * scheduled for removal when the PRM code is moved into drivers/.
3062 */
3063static int _omap2_deassert_hardreset(struct omap_hwmod *oh,
3064 struct omap_hwmod_rst_info *ohri)
3065{
3066 return omap2_prm_deassert_hardreset(oh->prcm.omap2.module_offs,
3067 ohri->rst_shift,
3068 ohri->st_shift);
3069}
3070
3071/**
3072 * _omap2_is_hardreset_asserted - call OMAP2 PRM hardreset fn with hwmod args
3073 * @oh: struct omap_hwmod * to test hardreset
3074 * @ohri: hardreset line data
3075 *
3076 * Call omap2_prm_is_hardreset_asserted() with parameters extracted
3077 * from the hwmod @oh and the hardreset line data @ohri. Only
3078 * intended for use as an soc_ops function pointer. Passes along the
3079 * return value from omap2_prm_is_hardreset_asserted(). XXX This
3080 * function is scheduled for removal when the PRM code is moved into
3081 * drivers/.
3082 */
3083static int _omap2_is_hardreset_asserted(struct omap_hwmod *oh,
3084 struct omap_hwmod_rst_info *ohri)
3085{
3086 return omap2_prm_is_hardreset_asserted(oh->prcm.omap2.module_offs,
3087 ohri->st_shift);
3088}
3089
3090/**
3091 * _omap4_assert_hardreset - call OMAP4 PRM hardreset fn with hwmod args
3092 * @oh: struct omap_hwmod * to assert hardreset
3093 * @ohri: hardreset line data
3094 *
3095 * Call omap4_prminst_assert_hardreset() with parameters extracted
3096 * from the hwmod @oh and the hardreset line data @ohri. Only
3097 * intended for use as an soc_ops function pointer. Passes along the
3098 * return value from omap4_prminst_assert_hardreset(). XXX This
3099 * function is scheduled for removal when the PRM code is moved into
3100 * drivers/.
3101 */
3102static int _omap4_assert_hardreset(struct omap_hwmod *oh,
3103 struct omap_hwmod_rst_info *ohri)
3104{
3105 if (!oh->clkdm)
3106 return -EINVAL;
3107
3108 return omap4_prminst_assert_hardreset(ohri->rst_shift,
3109 oh->clkdm->pwrdm.ptr->prcm_partition,
3110 oh->clkdm->pwrdm.ptr->prcm_offs,
3111 oh->prcm.omap4.rstctrl_offs);
3112}
3113
3114/**
3115 * _omap4_deassert_hardreset - call OMAP4 PRM hardreset fn with hwmod args
3116 * @oh: struct omap_hwmod * to deassert hardreset
3117 * @ohri: hardreset line data
3118 *
3119 * Call omap4_prminst_deassert_hardreset() with parameters extracted
3120 * from the hwmod @oh and the hardreset line data @ohri. Only
3121 * intended for use as an soc_ops function pointer. Passes along the
3122 * return value from omap4_prminst_deassert_hardreset(). XXX This
3123 * function is scheduled for removal when the PRM code is moved into
3124 * drivers/.
3125 */
3126static int _omap4_deassert_hardreset(struct omap_hwmod *oh,
3127 struct omap_hwmod_rst_info *ohri)
3128{
3129 if (!oh->clkdm)
3130 return -EINVAL;
3131
3132 if (ohri->st_shift)
3133 pr_err("omap_hwmod: %s: %s: hwmod data error: OMAP4 does not support st_shift\n",
3134 oh->name, ohri->name);
3135 return omap4_prminst_deassert_hardreset(ohri->rst_shift,
3136 oh->clkdm->pwrdm.ptr->prcm_partition,
3137 oh->clkdm->pwrdm.ptr->prcm_offs,
3138 oh->prcm.omap4.rstctrl_offs);
3139}
3140
3141/**
3142 * _omap4_is_hardreset_asserted - call OMAP4 PRM hardreset fn with hwmod args
3143 * @oh: struct omap_hwmod * to test hardreset
3144 * @ohri: hardreset line data
3145 *
3146 * Call omap4_prminst_is_hardreset_asserted() with parameters
3147 * extracted from the hwmod @oh and the hardreset line data @ohri.
3148 * Only intended for use as an soc_ops function pointer. Passes along
3149 * the return value from omap4_prminst_is_hardreset_asserted(). XXX
3150 * This function is scheduled for removal when the PRM code is moved
3151 * into drivers/.
3152 */
3153static int _omap4_is_hardreset_asserted(struct omap_hwmod *oh,
3154 struct omap_hwmod_rst_info *ohri)
3155{
3156 if (!oh->clkdm)
3157 return -EINVAL;
3158
3159 return omap4_prminst_is_hardreset_asserted(ohri->rst_shift,
3160 oh->clkdm->pwrdm.ptr->prcm_partition,
3161 oh->clkdm->pwrdm.ptr->prcm_offs,
3162 oh->prcm.omap4.rstctrl_offs);
3163}
3164
3165/**
3166 * _am33xx_assert_hardreset - call AM33XX PRM hardreset fn with hwmod args
3167 * @oh: struct omap_hwmod * to assert hardreset
3168 * @ohri: hardreset line data
3169 *
3170 * Call am33xx_prminst_assert_hardreset() with parameters extracted
3171 * from the hwmod @oh and the hardreset line data @ohri. Only
3172 * intended for use as an soc_ops function pointer. Passes along the
3173 * return value from am33xx_prminst_assert_hardreset(). XXX This
3174 * function is scheduled for removal when the PRM code is moved into
3175 * drivers/.
3176 */
3177static int _am33xx_assert_hardreset(struct omap_hwmod *oh,
3178 struct omap_hwmod_rst_info *ohri)
3179
3180{
3181 return am33xx_prm_assert_hardreset(ohri->rst_shift,
3182 oh->clkdm->pwrdm.ptr->prcm_offs,
3183 oh->prcm.omap4.rstctrl_offs);
3184}
3185
3186/**
3187 * _am33xx_deassert_hardreset - call AM33XX PRM hardreset fn with hwmod args
3188 * @oh: struct omap_hwmod * to deassert hardreset
3189 * @ohri: hardreset line data
3190 *
3191 * Call am33xx_prminst_deassert_hardreset() with parameters extracted
3192 * from the hwmod @oh and the hardreset line data @ohri. Only
3193 * intended for use as an soc_ops function pointer. Passes along the
3194 * return value from am33xx_prminst_deassert_hardreset(). XXX This
3195 * function is scheduled for removal when the PRM code is moved into
3196 * drivers/.
3197 */
3198static int _am33xx_deassert_hardreset(struct omap_hwmod *oh,
3199 struct omap_hwmod_rst_info *ohri)
3200{
3201 return am33xx_prm_deassert_hardreset(ohri->rst_shift,
3202 ohri->st_shift,
3203 oh->clkdm->pwrdm.ptr->prcm_offs,
3204 oh->prcm.omap4.rstctrl_offs,
3205 oh->prcm.omap4.rstst_offs);
3206}
3207
3208/**
3209 * _am33xx_is_hardreset_asserted - call AM33XX PRM hardreset fn with hwmod args
3210 * @oh: struct omap_hwmod * to test hardreset
3211 * @ohri: hardreset line data
3212 *
3213 * Call am33xx_prminst_is_hardreset_asserted() with parameters
3214 * extracted from the hwmod @oh and the hardreset line data @ohri.
3215 * Only intended for use as an soc_ops function pointer. Passes along
3216 * the return value from am33xx_prminst_is_hardreset_asserted(). XXX
3217 * This function is scheduled for removal when the PRM code is moved
3218 * into drivers/.
3219 */
3220static int _am33xx_is_hardreset_asserted(struct omap_hwmod *oh,
3221 struct omap_hwmod_rst_info *ohri)
3222{
3223 return am33xx_prm_is_hardreset_asserted(ohri->rst_shift,
3224 oh->clkdm->pwrdm.ptr->prcm_offs,
3225 oh->prcm.omap4.rstctrl_offs);
3226}
3227
3228/* Public functions */
3229
3230u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs)
3231{
3232 if (oh->flags & HWMOD_16BIT_REG)
3233 return __raw_readw(oh->_mpu_rt_va + reg_offs);
3234 else
3235 return __raw_readl(oh->_mpu_rt_va + reg_offs);
3236}
3237
3238void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs)
3239{
3240 if (oh->flags & HWMOD_16BIT_REG)
3241 __raw_writew(v, oh->_mpu_rt_va + reg_offs);
3242 else
3243 __raw_writel(v, oh->_mpu_rt_va + reg_offs);
3244}
3245
3246/**
3247 * omap_hwmod_softreset - reset a module via SYSCONFIG.SOFTRESET bit
3248 * @oh: struct omap_hwmod *
3249 *
3250 * This is a public function exposed to drivers. Some drivers may need to do
3251 * some settings before and after resetting the device. Those drivers after
3252 * doing the necessary settings could use this function to start a reset by
3253 * setting the SYSCONFIG.SOFTRESET bit.
3254 */
3255int omap_hwmod_softreset(struct omap_hwmod *oh)
3256{
3257 u32 v;
3258 int ret;
3259
3260 if (!oh || !(oh->_sysc_cache))
3261 return -EINVAL;
3262
3263 v = oh->_sysc_cache;
3264 ret = _set_softreset(oh, &v);
3265 if (ret)
3266 goto error;
3267 _write_sysconfig(v, oh);
3268
3269 ret = _clear_softreset(oh, &v);
3270 if (ret)
3271 goto error;
3272 _write_sysconfig(v, oh);
3273
3274error:
3275 return ret;
3276}
3277
3278/**
3279 * omap_hwmod_lookup - look up a registered omap_hwmod by name
3280 * @name: name of the omap_hwmod to look up
3281 *
3282 * Given a @name of an omap_hwmod, return a pointer to the registered
3283 * struct omap_hwmod *, or NULL upon error.
3284 */
3285struct omap_hwmod *omap_hwmod_lookup(const char *name)
3286{
3287 struct omap_hwmod *oh;
3288
3289 if (!name)
3290 return NULL;
3291
3292 oh = _lookup(name);
3293
3294 return oh;
3295}
3296
3297/**
3298 * omap_hwmod_for_each - call function for each registered omap_hwmod
3299 * @fn: pointer to a callback function
3300 * @data: void * data to pass to callback function
3301 *
3302 * Call @fn for each registered omap_hwmod, passing @data to each
3303 * function. @fn must return 0 for success or any other value for
3304 * failure. If @fn returns non-zero, the iteration across omap_hwmods
3305 * will stop and the non-zero return value will be passed to the
3306 * caller of omap_hwmod_for_each(). @fn is called with
3307 * omap_hwmod_for_each() held.
3308 */
3309int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh, void *data),
3310 void *data)
3311{
3312 struct omap_hwmod *temp_oh;
3313 int ret = 0;
3314
3315 if (!fn)
3316 return -EINVAL;
3317
3318 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
3319 ret = (*fn)(temp_oh, data);
3320 if (ret)
3321 break;
3322 }
3323
3324 return ret;
3325}
3326
3327/**
3328 * omap_hwmod_register_links - register an array of hwmod links
3329 * @ois: pointer to an array of omap_hwmod_ocp_if to register
3330 *
3331 * Intended to be called early in boot before the clock framework is
3332 * initialized. If @ois is not null, will register all omap_hwmods
3333 * listed in @ois that are valid for this chip. Returns -EINVAL if
3334 * omap_hwmod_init() hasn't been called before calling this function,
3335 * -ENOMEM if the link memory area can't be allocated, or 0 upon
3336 * success.
3337 */
3338int __init omap_hwmod_register_links(struct omap_hwmod_ocp_if **ois)
3339{
3340 int r, i;
3341
3342 if (!inited)
3343 return -EINVAL;
3344
3345 if (!ois)
3346 return 0;
3347
3348 if (!linkspace) {
3349 if (_alloc_linkspace(ois)) {
3350 pr_err("omap_hwmod: could not allocate link space\n");
3351 return -ENOMEM;
3352 }
3353 }
3354
3355 i = 0;
3356 do {
3357 r = _register_link(ois[i]);
3358 WARN(r && r != -EEXIST,
3359 "omap_hwmod: _register_link(%s -> %s) returned %d\n",
3360 ois[i]->master->name, ois[i]->slave->name, r);
3361 } while (ois[++i]);
3362
3363 return 0;
3364}
3365
3366/**
3367 * _ensure_mpu_hwmod_is_setup - ensure the MPU SS hwmod is init'ed and set up
3368 * @oh: pointer to the hwmod currently being set up (usually not the MPU)
3369 *
3370 * If the hwmod data corresponding to the MPU subsystem IP block
3371 * hasn't been initialized and set up yet, do so now. This must be
3372 * done first since sleep dependencies may be added from other hwmods
3373 * to the MPU. Intended to be called only by omap_hwmod_setup*(). No
3374 * return value.
3375 */
3376static void __init _ensure_mpu_hwmod_is_setup(struct omap_hwmod *oh)
3377{
3378 if (!mpu_oh || mpu_oh->_state == _HWMOD_STATE_UNKNOWN)
3379 pr_err("omap_hwmod: %s: MPU initiator hwmod %s not yet registered\n",
3380 __func__, MPU_INITIATOR_NAME);
3381 else if (mpu_oh->_state == _HWMOD_STATE_REGISTERED && oh != mpu_oh)
3382 omap_hwmod_setup_one(MPU_INITIATOR_NAME);
3383}
3384
3385/**
3386 * omap_hwmod_setup_one - set up a single hwmod
3387 * @oh_name: const char * name of the already-registered hwmod to set up
3388 *
3389 * Initialize and set up a single hwmod. Intended to be used for a
3390 * small number of early devices, such as the timer IP blocks used for
3391 * the scheduler clock. Must be called after omap2_clk_init().
3392 * Resolves the struct clk names to struct clk pointers for each
3393 * registered omap_hwmod. Also calls _setup() on each hwmod. Returns
3394 * -EINVAL upon error or 0 upon success.
3395 */
3396int __init omap_hwmod_setup_one(const char *oh_name)
3397{
3398 struct omap_hwmod *oh;
3399
3400 pr_debug("omap_hwmod: %s: %s\n", oh_name, __func__);
3401
3402 oh = _lookup(oh_name);
3403 if (!oh) {
3404 WARN(1, "omap_hwmod: %s: hwmod not yet registered\n", oh_name);
3405 return -EINVAL;
3406 }
3407
3408 _ensure_mpu_hwmod_is_setup(oh);
3409
3410 _init(oh, NULL);
3411 _setup(oh, NULL);
3412
3413 return 0;
3414}
3415
3416/**
3417 * omap_hwmod_setup_all - set up all registered IP blocks
3418 *
3419 * Initialize and set up all IP blocks registered with the hwmod code.
3420 * Must be called after omap2_clk_init(). Resolves the struct clk
3421 * names to struct clk pointers for each registered omap_hwmod. Also
3422 * calls _setup() on each hwmod. Returns 0 upon success.
3423 */
3424static int __init omap_hwmod_setup_all(void)
3425{
3426 _ensure_mpu_hwmod_is_setup(NULL);
3427
3428 omap_hwmod_for_each(_init, NULL);
3429 omap_hwmod_for_each(_setup, NULL);
3430
3431 return 0;
3432}
3433omap_core_initcall(omap_hwmod_setup_all);
3434
3435/**
3436 * omap_hwmod_enable - enable an omap_hwmod
3437 * @oh: struct omap_hwmod *
3438 *
3439 * Enable an omap_hwmod @oh. Intended to be called by omap_device_enable().
3440 * Returns -EINVAL on error or passes along the return value from _enable().
3441 */
3442int omap_hwmod_enable(struct omap_hwmod *oh)
3443{
3444 int r;
3445 unsigned long flags;
3446
3447 if (!oh)
3448 return -EINVAL;
3449
3450 spin_lock_irqsave(&oh->_lock, flags);
3451 r = _enable(oh);
3452 spin_unlock_irqrestore(&oh->_lock, flags);
3453
3454 return r;
3455}
3456
3457/**
3458 * omap_hwmod_idle - idle an omap_hwmod
3459 * @oh: struct omap_hwmod *
3460 *
3461 * Idle an omap_hwmod @oh. Intended to be called by omap_device_idle().
3462 * Returns -EINVAL on error or passes along the return value from _idle().
3463 */
3464int omap_hwmod_idle(struct omap_hwmod *oh)
3465{
3466 unsigned long flags;
3467
3468 if (!oh)
3469 return -EINVAL;
3470
3471 spin_lock_irqsave(&oh->_lock, flags);
3472 _idle(oh);
3473 spin_unlock_irqrestore(&oh->_lock, flags);
3474
3475 return 0;
3476}
3477
3478/**
3479 * omap_hwmod_shutdown - shutdown an omap_hwmod
3480 * @oh: struct omap_hwmod *
3481 *
3482 * Shutdown an omap_hwmod @oh. Intended to be called by
3483 * omap_device_shutdown(). Returns -EINVAL on error or passes along
3484 * the return value from _shutdown().
3485 */
3486int omap_hwmod_shutdown(struct omap_hwmod *oh)
3487{
3488 unsigned long flags;
3489
3490 if (!oh)
3491 return -EINVAL;
3492
3493 spin_lock_irqsave(&oh->_lock, flags);
3494 _shutdown(oh);
3495 spin_unlock_irqrestore(&oh->_lock, flags);
3496
3497 return 0;
3498}
3499
3500/**
3501 * omap_hwmod_enable_clocks - enable main_clk, all interface clocks
3502 * @oh: struct omap_hwmod *oh
3503 *
3504 * Intended to be called by the omap_device code.
3505 */
3506int omap_hwmod_enable_clocks(struct omap_hwmod *oh)
3507{
3508 unsigned long flags;
3509
3510 spin_lock_irqsave(&oh->_lock, flags);
3511 _enable_clocks(oh);
3512 spin_unlock_irqrestore(&oh->_lock, flags);
3513
3514 return 0;
3515}
3516
3517/**
3518 * omap_hwmod_disable_clocks - disable main_clk, all interface clocks
3519 * @oh: struct omap_hwmod *oh
3520 *
3521 * Intended to be called by the omap_device code.
3522 */
3523int omap_hwmod_disable_clocks(struct omap_hwmod *oh)
3524{
3525 unsigned long flags;
3526
3527 spin_lock_irqsave(&oh->_lock, flags);
3528 _disable_clocks(oh);
3529 spin_unlock_irqrestore(&oh->_lock, flags);
3530
3531 return 0;
3532}
3533
3534/**
3535 * omap_hwmod_ocp_barrier - wait for posted writes against the hwmod to complete
3536 * @oh: struct omap_hwmod *oh
3537 *
3538 * Intended to be called by drivers and core code when all posted
3539 * writes to a device must complete before continuing further
3540 * execution (for example, after clearing some device IRQSTATUS
3541 * register bits)
3542 *
3543 * XXX what about targets with multiple OCP threads?
3544 */
3545void omap_hwmod_ocp_barrier(struct omap_hwmod *oh)
3546{
3547 BUG_ON(!oh);
3548
3549 if (!oh->class->sysc || !oh->class->sysc->sysc_flags) {
3550 WARN(1, "omap_device: %s: OCP barrier impossible due to device configuration\n",
3551 oh->name);
3552 return;
3553 }
3554
3555 /*
3556 * Forces posted writes to complete on the OCP thread handling
3557 * register writes
3558 */
3559 omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
3560}
3561
3562/**
3563 * omap_hwmod_reset - reset the hwmod
3564 * @oh: struct omap_hwmod *
3565 *
3566 * Under some conditions, a driver may wish to reset the entire device.
3567 * Called from omap_device code. Returns -EINVAL on error or passes along
3568 * the return value from _reset().
3569 */
3570int omap_hwmod_reset(struct omap_hwmod *oh)
3571{
3572 int r;
3573 unsigned long flags;
3574
3575 if (!oh)
3576 return -EINVAL;
3577
3578 spin_lock_irqsave(&oh->_lock, flags);
3579 r = _reset(oh);
3580 spin_unlock_irqrestore(&oh->_lock, flags);
3581
3582 return r;
3583}
3584
3585/*
3586 * IP block data retrieval functions
3587 */
3588
3589/**
3590 * omap_hwmod_count_resources - count number of struct resources needed by hwmod
3591 * @oh: struct omap_hwmod *
3592 * @flags: Type of resources to include when counting (IRQ/DMA/MEM)
3593 *
3594 * Count the number of struct resource array elements necessary to
3595 * contain omap_hwmod @oh resources. Intended to be called by code
3596 * that registers omap_devices. Intended to be used to determine the
3597 * size of a dynamically-allocated struct resource array, before
3598 * calling omap_hwmod_fill_resources(). Returns the number of struct
3599 * resource array elements needed.
3600 *
3601 * XXX This code is not optimized. It could attempt to merge adjacent
3602 * resource IDs.
3603 *
3604 */
3605int omap_hwmod_count_resources(struct omap_hwmod *oh, unsigned long flags)
3606{
3607 int ret = 0;
3608
3609 if (flags & IORESOURCE_IRQ)
3610 ret += _count_mpu_irqs(oh);
3611
3612 if (flags & IORESOURCE_DMA)
3613 ret += _count_sdma_reqs(oh);
3614
3615 if (flags & IORESOURCE_MEM) {
3616 int i = 0;
3617 struct omap_hwmod_ocp_if *os;
3618 struct list_head *p = oh->slave_ports.next;
3619
3620 while (i < oh->slaves_cnt) {
3621 os = _fetch_next_ocp_if(&p, &i);
3622 ret += _count_ocp_if_addr_spaces(os);
3623 }
3624 }
3625
3626 return ret;
3627}
3628
3629/**
3630 * omap_hwmod_fill_resources - fill struct resource array with hwmod data
3631 * @oh: struct omap_hwmod *
3632 * @res: pointer to the first element of an array of struct resource to fill
3633 *
3634 * Fill the struct resource array @res with resource data from the
3635 * omap_hwmod @oh. Intended to be called by code that registers
3636 * omap_devices. See also omap_hwmod_count_resources(). Returns the
3637 * number of array elements filled.
3638 */
3639int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res)
3640{
3641 struct omap_hwmod_ocp_if *os;
3642 struct list_head *p;
3643 int i, j, mpu_irqs_cnt, sdma_reqs_cnt, addr_cnt;
3644 int r = 0;
3645
3646 /* For each IRQ, DMA, memory area, fill in array.*/
3647
3648 mpu_irqs_cnt = _count_mpu_irqs(oh);
3649 for (i = 0; i < mpu_irqs_cnt; i++) {
3650 (res + r)->name = (oh->mpu_irqs + i)->name;
3651 (res + r)->start = (oh->mpu_irqs + i)->irq;
3652 (res + r)->end = (oh->mpu_irqs + i)->irq;
3653 (res + r)->flags = IORESOURCE_IRQ;
3654 r++;
3655 }
3656
3657 sdma_reqs_cnt = _count_sdma_reqs(oh);
3658 for (i = 0; i < sdma_reqs_cnt; i++) {
3659 (res + r)->name = (oh->sdma_reqs + i)->name;
3660 (res + r)->start = (oh->sdma_reqs + i)->dma_req;
3661 (res + r)->end = (oh->sdma_reqs + i)->dma_req;
3662 (res + r)->flags = IORESOURCE_DMA;
3663 r++;
3664 }
3665
3666 p = oh->slave_ports.next;
3667
3668 i = 0;
3669 while (i < oh->slaves_cnt) {
3670 os = _fetch_next_ocp_if(&p, &i);
3671 addr_cnt = _count_ocp_if_addr_spaces(os);
3672
3673 for (j = 0; j < addr_cnt; j++) {
3674 (res + r)->name = (os->addr + j)->name;
3675 (res + r)->start = (os->addr + j)->pa_start;
3676 (res + r)->end = (os->addr + j)->pa_end;
3677 (res + r)->flags = IORESOURCE_MEM;
3678 r++;
3679 }
3680 }
3681
3682 return r;
3683}
3684
3685/**
3686 * omap_hwmod_fill_dma_resources - fill struct resource array with dma data
3687 * @oh: struct omap_hwmod *
3688 * @res: pointer to the array of struct resource to fill
3689 *
3690 * Fill the struct resource array @res with dma resource data from the
3691 * omap_hwmod @oh. Intended to be called by code that registers
3692 * omap_devices. See also omap_hwmod_count_resources(). Returns the
3693 * number of array elements filled.
3694 */
3695int omap_hwmod_fill_dma_resources(struct omap_hwmod *oh, struct resource *res)
3696{
3697 int i, sdma_reqs_cnt;
3698 int r = 0;
3699
3700 sdma_reqs_cnt = _count_sdma_reqs(oh);
3701 for (i = 0; i < sdma_reqs_cnt; i++) {
3702 (res + r)->name = (oh->sdma_reqs + i)->name;
3703 (res + r)->start = (oh->sdma_reqs + i)->dma_req;
3704 (res + r)->end = (oh->sdma_reqs + i)->dma_req;
3705 (res + r)->flags = IORESOURCE_DMA;
3706 r++;
3707 }
3708
3709 return r;
3710}
3711
3712/**
3713 * omap_hwmod_get_resource_byname - fetch IP block integration data by name
3714 * @oh: struct omap_hwmod * to operate on
3715 * @type: one of the IORESOURCE_* constants from include/linux/ioport.h
3716 * @name: pointer to the name of the data to fetch (optional)
3717 * @rsrc: pointer to a struct resource, allocated by the caller
3718 *
3719 * Retrieve MPU IRQ, SDMA request line, or address space start/end
3720 * data for the IP block pointed to by @oh. The data will be filled
3721 * into a struct resource record pointed to by @rsrc. The struct
3722 * resource must be allocated by the caller. When @name is non-null,
3723 * the data associated with the matching entry in the IRQ/SDMA/address
3724 * space hwmod data arrays will be returned. If @name is null, the
3725 * first array entry will be returned. Data order is not meaningful
3726 * in hwmod data, so callers are strongly encouraged to use a non-null
3727 * @name whenever possible to avoid unpredictable effects if hwmod
3728 * data is later added that causes data ordering to change. This
3729 * function is only intended for use by OMAP core code. Device
3730 * drivers should not call this function - the appropriate bus-related
3731 * data accessor functions should be used instead. Returns 0 upon
3732 * success or a negative error code upon error.
3733 */
3734int omap_hwmod_get_resource_byname(struct omap_hwmod *oh, unsigned int type,
3735 const char *name, struct resource *rsrc)
3736{
3737 int r;
3738 unsigned int irq, dma;
3739 u32 pa_start, pa_end;
3740
3741 if (!oh || !rsrc)
3742 return -EINVAL;
3743
3744 if (type == IORESOURCE_IRQ) {
3745 r = _get_mpu_irq_by_name(oh, name, &irq);
3746 if (r)
3747 return r;
3748
3749 rsrc->start = irq;
3750 rsrc->end = irq;
3751 } else if (type == IORESOURCE_DMA) {
3752 r = _get_sdma_req_by_name(oh, name, &dma);
3753 if (r)
3754 return r;
3755
3756 rsrc->start = dma;
3757 rsrc->end = dma;
3758 } else if (type == IORESOURCE_MEM) {
3759 r = _get_addr_space_by_name(oh, name, &pa_start, &pa_end);
3760 if (r)
3761 return r;
3762
3763 rsrc->start = pa_start;
3764 rsrc->end = pa_end;
3765 } else {
3766 return -EINVAL;
3767 }
3768
3769 rsrc->flags = type;
3770 rsrc->name = name;
3771
3772 return 0;
3773}
3774
3775/**
3776 * omap_hwmod_get_pwrdm - return pointer to this module's main powerdomain
3777 * @oh: struct omap_hwmod *
3778 *
3779 * Return the powerdomain pointer associated with the OMAP module
3780 * @oh's main clock. If @oh does not have a main clk, return the
3781 * powerdomain associated with the interface clock associated with the
3782 * module's MPU port. (XXX Perhaps this should use the SDMA port
3783 * instead?) Returns NULL on error, or a struct powerdomain * on
3784 * success.
3785 */
3786struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh)
3787{
3788 struct clk *c;
3789 struct omap_hwmod_ocp_if *oi;
3790 struct clockdomain *clkdm;
3791 struct clk_hw_omap *clk;
3792
3793 if (!oh)
3794 return NULL;
3795
3796 if (oh->clkdm)
3797 return oh->clkdm->pwrdm.ptr;
3798
3799 if (oh->_clk) {
3800 c = oh->_clk;
3801 } else {
3802 oi = _find_mpu_rt_port(oh);
3803 if (!oi)
3804 return NULL;
3805 c = oi->_clk;
3806 }
3807
3808 clk = to_clk_hw_omap(__clk_get_hw(c));
3809 clkdm = clk->clkdm;
3810 if (!clkdm)
3811 return NULL;
3812
3813 return clkdm->pwrdm.ptr;
3814}
3815
3816/**
3817 * omap_hwmod_get_mpu_rt_va - return the module's base address (for the MPU)
3818 * @oh: struct omap_hwmod *
3819 *
3820 * Returns the virtual address corresponding to the beginning of the
3821 * module's register target, in the address range that is intended to
3822 * be used by the MPU. Returns the virtual address upon success or NULL
3823 * upon error.
3824 */
3825void __iomem *omap_hwmod_get_mpu_rt_va(struct omap_hwmod *oh)
3826{
3827 if (!oh)
3828 return NULL;
3829
3830 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
3831 return NULL;
3832
3833 if (oh->_state == _HWMOD_STATE_UNKNOWN)
3834 return NULL;
3835
3836 return oh->_mpu_rt_va;
3837}
3838
3839/**
3840 * omap_hwmod_add_initiator_dep - add sleepdep from @init_oh to @oh
3841 * @oh: struct omap_hwmod *
3842 * @init_oh: struct omap_hwmod * (initiator)
3843 *
3844 * Add a sleep dependency between the initiator @init_oh and @oh.
3845 * Intended to be called by DSP/Bridge code via platform_data for the
3846 * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
3847 * code needs to add/del initiator dependencies dynamically
3848 * before/after accessing a device. Returns the return value from
3849 * _add_initiator_dep().
3850 *
3851 * XXX Keep a usecount in the clockdomain code
3852 */
3853int omap_hwmod_add_initiator_dep(struct omap_hwmod *oh,
3854 struct omap_hwmod *init_oh)
3855{
3856 return _add_initiator_dep(oh, init_oh);
3857}
3858
3859/*
3860 * XXX what about functions for drivers to save/restore ocp_sysconfig
3861 * for context save/restore operations?
3862 */
3863
3864/**
3865 * omap_hwmod_del_initiator_dep - remove sleepdep from @init_oh to @oh
3866 * @oh: struct omap_hwmod *
3867 * @init_oh: struct omap_hwmod * (initiator)
3868 *
3869 * Remove a sleep dependency between the initiator @init_oh and @oh.
3870 * Intended to be called by DSP/Bridge code via platform_data for the
3871 * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
3872 * code needs to add/del initiator dependencies dynamically
3873 * before/after accessing a device. Returns the return value from
3874 * _del_initiator_dep().
3875 *
3876 * XXX Keep a usecount in the clockdomain code
3877 */
3878int omap_hwmod_del_initiator_dep(struct omap_hwmod *oh,
3879 struct omap_hwmod *init_oh)
3880{
3881 return _del_initiator_dep(oh, init_oh);
3882}
3883
3884/**
3885 * omap_hwmod_enable_wakeup - allow device to wake up the system
3886 * @oh: struct omap_hwmod *
3887 *
3888 * Sets the module OCP socket ENAWAKEUP bit to allow the module to
3889 * send wakeups to the PRCM, and enable I/O ring wakeup events for
3890 * this IP block if it has dynamic mux entries. Eventually this
3891 * should set PRCM wakeup registers to cause the PRCM to receive
3892 * wakeup events from the module. Does not set any wakeup routing
3893 * registers beyond this point - if the module is to wake up any other
3894 * module or subsystem, that must be set separately. Called by
3895 * omap_device code. Returns -EINVAL on error or 0 upon success.
3896 */
3897int omap_hwmod_enable_wakeup(struct omap_hwmod *oh)
3898{
3899 unsigned long flags;
3900 u32 v;
3901
3902 spin_lock_irqsave(&oh->_lock, flags);
3903
3904 if (oh->class->sysc &&
3905 (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) {
3906 v = oh->_sysc_cache;
3907 _enable_wakeup(oh, &v);
3908 _write_sysconfig(v, oh);
3909 }
3910
3911 _set_idle_ioring_wakeup(oh, true);
3912 spin_unlock_irqrestore(&oh->_lock, flags);
3913
3914 return 0;
3915}
3916
3917/**
3918 * omap_hwmod_disable_wakeup - prevent device from waking the system
3919 * @oh: struct omap_hwmod *
3920 *
3921 * Clears the module OCP socket ENAWAKEUP bit to prevent the module
3922 * from sending wakeups to the PRCM, and disable I/O ring wakeup
3923 * events for this IP block if it has dynamic mux entries. Eventually
3924 * this should clear PRCM wakeup registers to cause the PRCM to ignore
3925 * wakeup events from the module. Does not set any wakeup routing
3926 * registers beyond this point - if the module is to wake up any other
3927 * module or subsystem, that must be set separately. Called by
3928 * omap_device code. Returns -EINVAL on error or 0 upon success.
3929 */
3930int omap_hwmod_disable_wakeup(struct omap_hwmod *oh)
3931{
3932 unsigned long flags;
3933 u32 v;
3934
3935 spin_lock_irqsave(&oh->_lock, flags);
3936
3937 if (oh->class->sysc &&
3938 (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) {
3939 v = oh->_sysc_cache;
3940 _disable_wakeup(oh, &v);
3941 _write_sysconfig(v, oh);
3942 }
3943
3944 _set_idle_ioring_wakeup(oh, false);
3945 spin_unlock_irqrestore(&oh->_lock, flags);
3946
3947 return 0;
3948}
3949
3950/**
3951 * omap_hwmod_assert_hardreset - assert the HW reset line of submodules
3952 * contained in the hwmod module.
3953 * @oh: struct omap_hwmod *
3954 * @name: name of the reset line to lookup and assert
3955 *
3956 * Some IP like dsp, ipu or iva contain processor that require
3957 * an HW reset line to be assert / deassert in order to enable fully
3958 * the IP. Returns -EINVAL if @oh is null or if the operation is not
3959 * yet supported on this OMAP; otherwise, passes along the return value
3960 * from _assert_hardreset().
3961 */
3962int omap_hwmod_assert_hardreset(struct omap_hwmod *oh, const char *name)
3963{
3964 int ret;
3965 unsigned long flags;
3966
3967 if (!oh)
3968 return -EINVAL;
3969
3970 spin_lock_irqsave(&oh->_lock, flags);
3971 ret = _assert_hardreset(oh, name);
3972 spin_unlock_irqrestore(&oh->_lock, flags);
3973
3974 return ret;
3975}
3976
3977/**
3978 * omap_hwmod_deassert_hardreset - deassert the HW reset line of submodules
3979 * contained in the hwmod module.
3980 * @oh: struct omap_hwmod *
3981 * @name: name of the reset line to look up and deassert
3982 *
3983 * Some IP like dsp, ipu or iva contain processor that require
3984 * an HW reset line to be assert / deassert in order to enable fully
3985 * the IP. Returns -EINVAL if @oh is null or if the operation is not
3986 * yet supported on this OMAP; otherwise, passes along the return value
3987 * from _deassert_hardreset().
3988 */
3989int omap_hwmod_deassert_hardreset(struct omap_hwmod *oh, const char *name)
3990{
3991 int ret;
3992 unsigned long flags;
3993
3994 if (!oh)
3995 return -EINVAL;
3996
3997 spin_lock_irqsave(&oh->_lock, flags);
3998 ret = _deassert_hardreset(oh, name);
3999 spin_unlock_irqrestore(&oh->_lock, flags);
4000
4001 return ret;
4002}
4003
4004/**
4005 * omap_hwmod_read_hardreset - read the HW reset line state of submodules
4006 * contained in the hwmod module
4007 * @oh: struct omap_hwmod *
4008 * @name: name of the reset line to look up and read
4009 *
4010 * Return the current state of the hwmod @oh's reset line named @name:
4011 * returns -EINVAL upon parameter error or if this operation
4012 * is unsupported on the current OMAP; otherwise, passes along the return
4013 * value from _read_hardreset().
4014 */
4015int omap_hwmod_read_hardreset(struct omap_hwmod *oh, const char *name)
4016{
4017 int ret;
4018 unsigned long flags;
4019
4020 if (!oh)
4021 return -EINVAL;
4022
4023 spin_lock_irqsave(&oh->_lock, flags);
4024 ret = _read_hardreset(oh, name);
4025 spin_unlock_irqrestore(&oh->_lock, flags);
4026
4027 return ret;
4028}
4029
4030
4031/**
4032 * omap_hwmod_for_each_by_class - call @fn for each hwmod of class @classname
4033 * @classname: struct omap_hwmod_class name to search for
4034 * @fn: callback function pointer to call for each hwmod in class @classname
4035 * @user: arbitrary context data to pass to the callback function
4036 *
4037 * For each omap_hwmod of class @classname, call @fn.
4038 * If the callback function returns something other than
4039 * zero, the iterator is terminated, and the callback function's return
4040 * value is passed back to the caller. Returns 0 upon success, -EINVAL
4041 * if @classname or @fn are NULL, or passes back the error code from @fn.
4042 */
4043int omap_hwmod_for_each_by_class(const char *classname,
4044 int (*fn)(struct omap_hwmod *oh,
4045 void *user),
4046 void *user)
4047{
4048 struct omap_hwmod *temp_oh;
4049 int ret = 0;
4050
4051 if (!classname || !fn)
4052 return -EINVAL;
4053
4054 pr_debug("omap_hwmod: %s: looking for modules of class %s\n",
4055 __func__, classname);
4056
4057 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
4058 if (!strcmp(temp_oh->class->name, classname)) {
4059 pr_debug("omap_hwmod: %s: %s: calling callback fn\n",
4060 __func__, temp_oh->name);
4061 ret = (*fn)(temp_oh, user);
4062 if (ret)
4063 break;
4064 }
4065 }
4066
4067 if (ret)
4068 pr_debug("omap_hwmod: %s: iterator terminated early: %d\n",
4069 __func__, ret);
4070
4071 return ret;
4072}
4073
4074/**
4075 * omap_hwmod_set_postsetup_state - set the post-_setup() state for this hwmod
4076 * @oh: struct omap_hwmod *
4077 * @state: state that _setup() should leave the hwmod in
4078 *
4079 * Sets the hwmod state that @oh will enter at the end of _setup()
4080 * (called by omap_hwmod_setup_*()). See also the documentation
4081 * for _setup_postsetup(), above. Returns 0 upon success or
4082 * -EINVAL if there is a problem with the arguments or if the hwmod is
4083 * in the wrong state.
4084 */
4085int omap_hwmod_set_postsetup_state(struct omap_hwmod *oh, u8 state)
4086{
4087 int ret;
4088 unsigned long flags;
4089
4090 if (!oh)
4091 return -EINVAL;
4092
4093 if (state != _HWMOD_STATE_DISABLED &&
4094 state != _HWMOD_STATE_ENABLED &&
4095 state != _HWMOD_STATE_IDLE)
4096 return -EINVAL;
4097
4098 spin_lock_irqsave(&oh->_lock, flags);
4099
4100 if (oh->_state != _HWMOD_STATE_REGISTERED) {
4101 ret = -EINVAL;
4102 goto ohsps_unlock;
4103 }
4104
4105 oh->_postsetup_state = state;
4106 ret = 0;
4107
4108ohsps_unlock:
4109 spin_unlock_irqrestore(&oh->_lock, flags);
4110
4111 return ret;
4112}
4113
4114/**
4115 * omap_hwmod_get_context_loss_count - get lost context count
4116 * @oh: struct omap_hwmod *
4117 *
4118 * Returns the context loss count of associated @oh
4119 * upon success, or zero if no context loss data is available.
4120 *
4121 * On OMAP4, this queries the per-hwmod context loss register,
4122 * assuming one exists. If not, or on OMAP2/3, this queries the
4123 * enclosing powerdomain context loss count.
4124 */
4125int omap_hwmod_get_context_loss_count(struct omap_hwmod *oh)
4126{
4127 struct powerdomain *pwrdm;
4128 int ret = 0;
4129
4130 if (soc_ops.get_context_lost)
4131 return soc_ops.get_context_lost(oh);
4132
4133 pwrdm = omap_hwmod_get_pwrdm(oh);
4134 if (pwrdm)
4135 ret = pwrdm_get_context_loss_count(pwrdm);
4136
4137 return ret;
4138}
4139
4140/**
4141 * omap_hwmod_no_setup_reset - prevent a hwmod from being reset upon setup
4142 * @oh: struct omap_hwmod *
4143 *
4144 * Prevent the hwmod @oh from being reset during the setup process.
4145 * Intended for use by board-*.c files on boards with devices that
4146 * cannot tolerate being reset. Must be called before the hwmod has
4147 * been set up. Returns 0 upon success or negative error code upon
4148 * failure.
4149 */
4150int omap_hwmod_no_setup_reset(struct omap_hwmod *oh)
4151{
4152 if (!oh)
4153 return -EINVAL;
4154
4155 if (oh->_state != _HWMOD_STATE_REGISTERED) {
4156 pr_err("omap_hwmod: %s: cannot prevent setup reset; in wrong state\n",
4157 oh->name);
4158 return -EINVAL;
4159 }
4160
4161 oh->flags |= HWMOD_INIT_NO_RESET;
4162
4163 return 0;
4164}
4165
4166/**
4167 * omap_hwmod_pad_route_irq - route an I/O pad wakeup to a particular MPU IRQ
4168 * @oh: struct omap_hwmod * containing hwmod mux entries
4169 * @pad_idx: array index in oh->mux of the hwmod mux entry to route wakeup
4170 * @irq_idx: the hwmod mpu_irqs array index of the IRQ to trigger on wakeup
4171 *
4172 * When an I/O pad wakeup arrives for the dynamic or wakeup hwmod mux
4173 * entry number @pad_idx for the hwmod @oh, trigger the interrupt
4174 * service routine for the hwmod's mpu_irqs array index @irq_idx. If
4175 * this function is not called for a given pad_idx, then the ISR
4176 * associated with @oh's first MPU IRQ will be triggered when an I/O
4177 * pad wakeup occurs on that pad. Note that @pad_idx is the index of
4178 * the _dynamic or wakeup_ entry: if there are other entries not
4179 * marked with OMAP_DEVICE_PAD_WAKEUP or OMAP_DEVICE_PAD_REMUX, these
4180 * entries are NOT COUNTED in the dynamic pad index. This function
4181 * must be called separately for each pad that requires its interrupt
4182 * to be re-routed this way. Returns -EINVAL if there is an argument
4183 * problem or if @oh does not have hwmod mux entries or MPU IRQs;
4184 * returns -ENOMEM if memory cannot be allocated; or 0 upon success.
4185 *
4186 * XXX This function interface is fragile. Rather than using array
4187 * indexes, which are subject to unpredictable change, it should be
4188 * using hwmod IRQ names, and some other stable key for the hwmod mux
4189 * pad records.
4190 */
4191int omap_hwmod_pad_route_irq(struct omap_hwmod *oh, int pad_idx, int irq_idx)
4192{
4193 int nr_irqs;
4194
4195 might_sleep();
4196
4197 if (!oh || !oh->mux || !oh->mpu_irqs || pad_idx < 0 ||
4198 pad_idx >= oh->mux->nr_pads_dynamic)
4199 return -EINVAL;
4200
4201 /* Check the number of available mpu_irqs */
4202 for (nr_irqs = 0; oh->mpu_irqs[nr_irqs].irq >= 0; nr_irqs++)
4203 ;
4204
4205 if (irq_idx >= nr_irqs)
4206 return -EINVAL;
4207
4208 if (!oh->mux->irqs) {
4209 /* XXX What frees this? */
4210 oh->mux->irqs = kzalloc(sizeof(int) * oh->mux->nr_pads_dynamic,
4211 GFP_KERNEL);
4212 if (!oh->mux->irqs)
4213 return -ENOMEM;
4214 }
4215 oh->mux->irqs[pad_idx] = irq_idx;
4216
4217 return 0;
4218}
4219
4220/**
4221 * omap_hwmod_init - initialize the hwmod code
4222 *
4223 * Sets up some function pointers needed by the hwmod code to operate on the
4224 * currently-booted SoC. Intended to be called once during kernel init
4225 * before any hwmods are registered. No return value.
4226 */
4227void __init omap_hwmod_init(void)
4228{
4229 if (cpu_is_omap24xx()) {
4230 soc_ops.wait_target_ready = _omap2xxx_wait_target_ready;
4231 soc_ops.assert_hardreset = _omap2_assert_hardreset;
4232 soc_ops.deassert_hardreset = _omap2_deassert_hardreset;
4233 soc_ops.is_hardreset_asserted = _omap2_is_hardreset_asserted;
4234 } else if (cpu_is_omap34xx()) {
4235 soc_ops.wait_target_ready = _omap3xxx_wait_target_ready;
4236 soc_ops.assert_hardreset = _omap2_assert_hardreset;
4237 soc_ops.deassert_hardreset = _omap2_deassert_hardreset;
4238 soc_ops.is_hardreset_asserted = _omap2_is_hardreset_asserted;
4239 soc_ops.init_clkdm = _init_clkdm;
4240 } else if (cpu_is_omap44xx() || soc_is_omap54xx() || soc_is_dra7xx()) {
4241 soc_ops.enable_module = _omap4_enable_module;
4242 soc_ops.disable_module = _omap4_disable_module;
4243 soc_ops.wait_target_ready = _omap4_wait_target_ready;
4244 soc_ops.assert_hardreset = _omap4_assert_hardreset;
4245 soc_ops.deassert_hardreset = _omap4_deassert_hardreset;
4246 soc_ops.is_hardreset_asserted = _omap4_is_hardreset_asserted;
4247 soc_ops.init_clkdm = _init_clkdm;
4248 soc_ops.update_context_lost = _omap4_update_context_lost;
4249 soc_ops.get_context_lost = _omap4_get_context_lost;
4250 } else if (soc_is_am43xx()) {
4251 soc_ops.enable_module = _omap4_enable_module;
4252 soc_ops.disable_module = _omap4_disable_module;
4253 soc_ops.wait_target_ready = _omap4_wait_target_ready;
4254 soc_ops.assert_hardreset = _omap4_assert_hardreset;
4255 soc_ops.deassert_hardreset = _omap4_deassert_hardreset;
4256 soc_ops.is_hardreset_asserted = _omap4_is_hardreset_asserted;
4257 soc_ops.init_clkdm = _init_clkdm;
4258 } else if (soc_is_am33xx()) {
4259 soc_ops.enable_module = _am33xx_enable_module;
4260 soc_ops.disable_module = _am33xx_disable_module;
4261 soc_ops.wait_target_ready = _am33xx_wait_target_ready;
4262 soc_ops.assert_hardreset = _am33xx_assert_hardreset;
4263 soc_ops.deassert_hardreset = _am33xx_deassert_hardreset;
4264 soc_ops.is_hardreset_asserted = _am33xx_is_hardreset_asserted;
4265 soc_ops.init_clkdm = _init_clkdm;
4266 } else {
4267 WARN(1, "omap_hwmod: unknown SoC type\n");
4268 }
4269
4270 inited = true;
4271}
4272
4273/**
4274 * omap_hwmod_get_main_clk - get pointer to main clock name
4275 * @oh: struct omap_hwmod *
4276 *
4277 * Returns the main clock name assocated with @oh upon success,
4278 * or NULL if @oh is NULL.
4279 */
4280const char *omap_hwmod_get_main_clk(struct omap_hwmod *oh)
4281{
4282 if (!oh)
4283 return NULL;
4284
4285 return oh->main_clk;
4286}
1/*
2 * omap_hwmod implementation for OMAP2/3/4
3 *
4 * Copyright (C) 2009-2011 Nokia Corporation
5 * Copyright (C) 2011-2012 Texas Instruments, Inc.
6 *
7 * Paul Walmsley, Benoît Cousson, Kevin Hilman
8 *
9 * Created in collaboration with (alphabetical order): Thara Gopinath,
10 * Tony Lindgren, Rajendra Nayak, Vikram Pandita, Sakari Poussa, Anand
11 * Sawant, Santosh Shilimkar, Richard Woodruff
12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License version 2 as
15 * published by the Free Software Foundation.
16 *
17 * Introduction
18 * ------------
19 * One way to view an OMAP SoC is as a collection of largely unrelated
20 * IP blocks connected by interconnects. The IP blocks include
21 * devices such as ARM processors, audio serial interfaces, UARTs,
22 * etc. Some of these devices, like the DSP, are created by TI;
23 * others, like the SGX, largely originate from external vendors. In
24 * TI's documentation, on-chip devices are referred to as "OMAP
25 * modules." Some of these IP blocks are identical across several
26 * OMAP versions. Others are revised frequently.
27 *
28 * These OMAP modules are tied together by various interconnects.
29 * Most of the address and data flow between modules is via OCP-based
30 * interconnects such as the L3 and L4 buses; but there are other
31 * interconnects that distribute the hardware clock tree, handle idle
32 * and reset signaling, supply power, and connect the modules to
33 * various pads or balls on the OMAP package.
34 *
35 * OMAP hwmod provides a consistent way to describe the on-chip
36 * hardware blocks and their integration into the rest of the chip.
37 * This description can be automatically generated from the TI
38 * hardware database. OMAP hwmod provides a standard, consistent API
39 * to reset, enable, idle, and disable these hardware blocks. And
40 * hwmod provides a way for other core code, such as the Linux device
41 * code or the OMAP power management and address space mapping code,
42 * to query the hardware database.
43 *
44 * Using hwmod
45 * -----------
46 * Drivers won't call hwmod functions directly. That is done by the
47 * omap_device code, and in rare occasions, by custom integration code
48 * in arch/arm/ *omap*. The omap_device code includes functions to
49 * build a struct platform_device using omap_hwmod data, and that is
50 * currently how hwmod data is communicated to drivers and to the
51 * Linux driver model. Most drivers will call omap_hwmod functions only
52 * indirectly, via pm_runtime*() functions.
53 *
54 * From a layering perspective, here is where the OMAP hwmod code
55 * fits into the kernel software stack:
56 *
57 * +-------------------------------+
58 * | Device driver code |
59 * | (e.g., drivers/) |
60 * +-------------------------------+
61 * | Linux driver model |
62 * | (platform_device / |
63 * | platform_driver data/code) |
64 * +-------------------------------+
65 * | OMAP core-driver integration |
66 * |(arch/arm/mach-omap2/devices.c)|
67 * +-------------------------------+
68 * | omap_device code |
69 * | (../plat-omap/omap_device.c) |
70 * +-------------------------------+
71 * ----> | omap_hwmod code/data | <-----
72 * | (../mach-omap2/omap_hwmod*) |
73 * +-------------------------------+
74 * | OMAP clock/PRCM/register fns |
75 * | ({read,write}l_relaxed, clk*) |
76 * +-------------------------------+
77 *
78 * Device drivers should not contain any OMAP-specific code or data in
79 * them. They should only contain code to operate the IP block that
80 * the driver is responsible for. This is because these IP blocks can
81 * also appear in other SoCs, either from TI (such as DaVinci) or from
82 * other manufacturers; and drivers should be reusable across other
83 * platforms.
84 *
85 * The OMAP hwmod code also will attempt to reset and idle all on-chip
86 * devices upon boot. The goal here is for the kernel to be
87 * completely self-reliant and independent from bootloaders. This is
88 * to ensure a repeatable configuration, both to ensure consistent
89 * runtime behavior, and to make it easier for others to reproduce
90 * bugs.
91 *
92 * OMAP module activity states
93 * ---------------------------
94 * The hwmod code considers modules to be in one of several activity
95 * states. IP blocks start out in an UNKNOWN state, then once they
96 * are registered via the hwmod code, proceed to the REGISTERED state.
97 * Once their clock names are resolved to clock pointers, the module
98 * enters the CLKS_INITED state; and finally, once the module has been
99 * reset and the integration registers programmed, the INITIALIZED state
100 * is entered. The hwmod code will then place the module into either
101 * the IDLE state to save power, or in the case of a critical system
102 * module, the ENABLED state.
103 *
104 * OMAP core integration code can then call omap_hwmod*() functions
105 * directly to move the module between the IDLE, ENABLED, and DISABLED
106 * states, as needed. This is done during both the PM idle loop, and
107 * in the OMAP core integration code's implementation of the PM runtime
108 * functions.
109 *
110 * References
111 * ----------
112 * This is a partial list.
113 * - OMAP2420 Multimedia Processor Silicon Revision 2.1.1, 2.2 (SWPU064)
114 * - OMAP2430 Multimedia Device POP Silicon Revision 2.1 (SWPU090)
115 * - OMAP34xx Multimedia Device Silicon Revision 3.1 (SWPU108)
116 * - OMAP4430 Multimedia Device Silicon Revision 1.0 (SWPU140)
117 * - Open Core Protocol Specification 2.2
118 *
119 * To do:
120 * - handle IO mapping
121 * - bus throughput & module latency measurement code
122 *
123 * XXX add tests at the beginning of each function to ensure the hwmod is
124 * in the appropriate state
125 * XXX error return values should be checked to ensure that they are
126 * appropriate
127 */
128#undef DEBUG
129
130#include <linux/kernel.h>
131#include <linux/errno.h>
132#include <linux/io.h>
133#include <linux/clk.h>
134#include <linux/clk-provider.h>
135#include <linux/delay.h>
136#include <linux/err.h>
137#include <linux/list.h>
138#include <linux/mutex.h>
139#include <linux/spinlock.h>
140#include <linux/slab.h>
141#include <linux/cpu.h>
142#include <linux/of.h>
143#include <linux/of_address.h>
144#include <linux/bootmem.h>
145
146#include <linux/platform_data/ti-sysc.h>
147
148#include <dt-bindings/bus/ti-sysc.h>
149
150#include <asm/system_misc.h>
151
152#include "clock.h"
153#include "omap_hwmod.h"
154
155#include "soc.h"
156#include "common.h"
157#include "clockdomain.h"
158#include "powerdomain.h"
159#include "cm2xxx.h"
160#include "cm3xxx.h"
161#include "cm33xx.h"
162#include "prm.h"
163#include "prm3xxx.h"
164#include "prm44xx.h"
165#include "prm33xx.h"
166#include "prminst44xx.h"
167#include "pm.h"
168
169/* Name of the OMAP hwmod for the MPU */
170#define MPU_INITIATOR_NAME "mpu"
171
172/*
173 * Number of struct omap_hwmod_link records per struct
174 * omap_hwmod_ocp_if record (master->slave and slave->master)
175 */
176#define LINKS_PER_OCP_IF 2
177
178/*
179 * Address offset (in bytes) between the reset control and the reset
180 * status registers: 4 bytes on OMAP4
181 */
182#define OMAP4_RST_CTRL_ST_OFFSET 4
183
184/*
185 * Maximum length for module clock handle names
186 */
187#define MOD_CLK_MAX_NAME_LEN 32
188
189/**
190 * struct clkctrl_provider - clkctrl provider mapping data
191 * @addr: base address for the provider
192 * @size: size of the provider address space
193 * @offset: offset of the provider from PRCM instance base
194 * @node: device node associated with the provider
195 * @link: list link
196 */
197struct clkctrl_provider {
198 u32 addr;
199 u32 size;
200 u16 offset;
201 struct device_node *node;
202 struct list_head link;
203};
204
205static LIST_HEAD(clkctrl_providers);
206
207/**
208 * struct omap_hwmod_soc_ops - fn ptrs for some SoC-specific operations
209 * @enable_module: function to enable a module (via MODULEMODE)
210 * @disable_module: function to disable a module (via MODULEMODE)
211 *
212 * XXX Eventually this functionality will be hidden inside the PRM/CM
213 * device drivers. Until then, this should avoid huge blocks of cpu_is_*()
214 * conditionals in this code.
215 */
216struct omap_hwmod_soc_ops {
217 void (*enable_module)(struct omap_hwmod *oh);
218 int (*disable_module)(struct omap_hwmod *oh);
219 int (*wait_target_ready)(struct omap_hwmod *oh);
220 int (*assert_hardreset)(struct omap_hwmod *oh,
221 struct omap_hwmod_rst_info *ohri);
222 int (*deassert_hardreset)(struct omap_hwmod *oh,
223 struct omap_hwmod_rst_info *ohri);
224 int (*is_hardreset_asserted)(struct omap_hwmod *oh,
225 struct omap_hwmod_rst_info *ohri);
226 int (*init_clkdm)(struct omap_hwmod *oh);
227 void (*update_context_lost)(struct omap_hwmod *oh);
228 int (*get_context_lost)(struct omap_hwmod *oh);
229 int (*disable_direct_prcm)(struct omap_hwmod *oh);
230 u32 (*xlate_clkctrl)(struct omap_hwmod *oh);
231};
232
233/* soc_ops: adapts the omap_hwmod code to the currently-booted SoC */
234static struct omap_hwmod_soc_ops soc_ops;
235
236/* omap_hwmod_list contains all registered struct omap_hwmods */
237static LIST_HEAD(omap_hwmod_list);
238
239/* mpu_oh: used to add/remove MPU initiator from sleepdep list */
240static struct omap_hwmod *mpu_oh;
241
242/* inited: set to true once the hwmod code is initialized */
243static bool inited;
244
245/* Private functions */
246
247/**
248 * _update_sysc_cache - return the module OCP_SYSCONFIG register, keep copy
249 * @oh: struct omap_hwmod *
250 *
251 * Load the current value of the hwmod OCP_SYSCONFIG register into the
252 * struct omap_hwmod for later use. Returns -EINVAL if the hwmod has no
253 * OCP_SYSCONFIG register or 0 upon success.
254 */
255static int _update_sysc_cache(struct omap_hwmod *oh)
256{
257 if (!oh->class->sysc) {
258 WARN(1, "omap_hwmod: %s: cannot read OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
259 return -EINVAL;
260 }
261
262 /* XXX ensure module interface clock is up */
263
264 oh->_sysc_cache = omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
265
266 if (!(oh->class->sysc->sysc_flags & SYSC_NO_CACHE))
267 oh->_int_flags |= _HWMOD_SYSCONFIG_LOADED;
268
269 return 0;
270}
271
272/**
273 * _write_sysconfig - write a value to the module's OCP_SYSCONFIG register
274 * @v: OCP_SYSCONFIG value to write
275 * @oh: struct omap_hwmod *
276 *
277 * Write @v into the module class' OCP_SYSCONFIG register, if it has
278 * one. No return value.
279 */
280static void _write_sysconfig(u32 v, struct omap_hwmod *oh)
281{
282 if (!oh->class->sysc) {
283 WARN(1, "omap_hwmod: %s: cannot write OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
284 return;
285 }
286
287 /* XXX ensure module interface clock is up */
288
289 /* Module might have lost context, always update cache and register */
290 oh->_sysc_cache = v;
291
292 /*
293 * Some IP blocks (such as RTC) require unlocking of IP before
294 * accessing its registers. If a function pointer is present
295 * to unlock, then call it before accessing sysconfig and
296 * call lock after writing sysconfig.
297 */
298 if (oh->class->unlock)
299 oh->class->unlock(oh);
300
301 omap_hwmod_write(v, oh, oh->class->sysc->sysc_offs);
302
303 if (oh->class->lock)
304 oh->class->lock(oh);
305}
306
307/**
308 * _set_master_standbymode: set the OCP_SYSCONFIG MIDLEMODE field in @v
309 * @oh: struct omap_hwmod *
310 * @standbymode: MIDLEMODE field bits
311 * @v: pointer to register contents to modify
312 *
313 * Update the master standby mode bits in @v to be @standbymode for
314 * the @oh hwmod. Does not write to the hardware. Returns -EINVAL
315 * upon error or 0 upon success.
316 */
317static int _set_master_standbymode(struct omap_hwmod *oh, u8 standbymode,
318 u32 *v)
319{
320 u32 mstandby_mask;
321 u8 mstandby_shift;
322
323 if (!oh->class->sysc ||
324 !(oh->class->sysc->sysc_flags & SYSC_HAS_MIDLEMODE))
325 return -EINVAL;
326
327 if (!oh->class->sysc->sysc_fields) {
328 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
329 return -EINVAL;
330 }
331
332 mstandby_shift = oh->class->sysc->sysc_fields->midle_shift;
333 mstandby_mask = (0x3 << mstandby_shift);
334
335 *v &= ~mstandby_mask;
336 *v |= __ffs(standbymode) << mstandby_shift;
337
338 return 0;
339}
340
341/**
342 * _set_slave_idlemode: set the OCP_SYSCONFIG SIDLEMODE field in @v
343 * @oh: struct omap_hwmod *
344 * @idlemode: SIDLEMODE field bits
345 * @v: pointer to register contents to modify
346 *
347 * Update the slave idle mode bits in @v to be @idlemode for the @oh
348 * hwmod. Does not write to the hardware. Returns -EINVAL upon error
349 * or 0 upon success.
350 */
351static int _set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode, u32 *v)
352{
353 u32 sidle_mask;
354 u8 sidle_shift;
355
356 if (!oh->class->sysc ||
357 !(oh->class->sysc->sysc_flags & SYSC_HAS_SIDLEMODE))
358 return -EINVAL;
359
360 if (!oh->class->sysc->sysc_fields) {
361 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
362 return -EINVAL;
363 }
364
365 sidle_shift = oh->class->sysc->sysc_fields->sidle_shift;
366 sidle_mask = (0x3 << sidle_shift);
367
368 *v &= ~sidle_mask;
369 *v |= __ffs(idlemode) << sidle_shift;
370
371 return 0;
372}
373
374/**
375 * _set_clockactivity: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
376 * @oh: struct omap_hwmod *
377 * @clockact: CLOCKACTIVITY field bits
378 * @v: pointer to register contents to modify
379 *
380 * Update the clockactivity mode bits in @v to be @clockact for the
381 * @oh hwmod. Used for additional powersaving on some modules. Does
382 * not write to the hardware. Returns -EINVAL upon error or 0 upon
383 * success.
384 */
385static int _set_clockactivity(struct omap_hwmod *oh, u8 clockact, u32 *v)
386{
387 u32 clkact_mask;
388 u8 clkact_shift;
389
390 if (!oh->class->sysc ||
391 !(oh->class->sysc->sysc_flags & SYSC_HAS_CLOCKACTIVITY))
392 return -EINVAL;
393
394 if (!oh->class->sysc->sysc_fields) {
395 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
396 return -EINVAL;
397 }
398
399 clkact_shift = oh->class->sysc->sysc_fields->clkact_shift;
400 clkact_mask = (0x3 << clkact_shift);
401
402 *v &= ~clkact_mask;
403 *v |= clockact << clkact_shift;
404
405 return 0;
406}
407
408/**
409 * _set_softreset: set OCP_SYSCONFIG.SOFTRESET bit in @v
410 * @oh: struct omap_hwmod *
411 * @v: pointer to register contents to modify
412 *
413 * Set the SOFTRESET bit in @v for hwmod @oh. Returns -EINVAL upon
414 * error or 0 upon success.
415 */
416static int _set_softreset(struct omap_hwmod *oh, u32 *v)
417{
418 u32 softrst_mask;
419
420 if (!oh->class->sysc ||
421 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
422 return -EINVAL;
423
424 if (!oh->class->sysc->sysc_fields) {
425 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
426 return -EINVAL;
427 }
428
429 softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
430
431 *v |= softrst_mask;
432
433 return 0;
434}
435
436/**
437 * _clear_softreset: clear OCP_SYSCONFIG.SOFTRESET bit in @v
438 * @oh: struct omap_hwmod *
439 * @v: pointer to register contents to modify
440 *
441 * Clear the SOFTRESET bit in @v for hwmod @oh. Returns -EINVAL upon
442 * error or 0 upon success.
443 */
444static int _clear_softreset(struct omap_hwmod *oh, u32 *v)
445{
446 u32 softrst_mask;
447
448 if (!oh->class->sysc ||
449 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
450 return -EINVAL;
451
452 if (!oh->class->sysc->sysc_fields) {
453 WARN(1,
454 "omap_hwmod: %s: sysc_fields absent for sysconfig class\n",
455 oh->name);
456 return -EINVAL;
457 }
458
459 softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
460
461 *v &= ~softrst_mask;
462
463 return 0;
464}
465
466/**
467 * _wait_softreset_complete - wait for an OCP softreset to complete
468 * @oh: struct omap_hwmod * to wait on
469 *
470 * Wait until the IP block represented by @oh reports that its OCP
471 * softreset is complete. This can be triggered by software (see
472 * _ocp_softreset()) or by hardware upon returning from off-mode (one
473 * example is HSMMC). Waits for up to MAX_MODULE_SOFTRESET_WAIT
474 * microseconds. Returns the number of microseconds waited.
475 */
476static int _wait_softreset_complete(struct omap_hwmod *oh)
477{
478 struct omap_hwmod_class_sysconfig *sysc;
479 u32 softrst_mask;
480 int c = 0;
481
482 sysc = oh->class->sysc;
483
484 if (sysc->sysc_flags & SYSS_HAS_RESET_STATUS)
485 omap_test_timeout((omap_hwmod_read(oh, sysc->syss_offs)
486 & SYSS_RESETDONE_MASK),
487 MAX_MODULE_SOFTRESET_WAIT, c);
488 else if (sysc->sysc_flags & SYSC_HAS_RESET_STATUS) {
489 softrst_mask = (0x1 << sysc->sysc_fields->srst_shift);
490 omap_test_timeout(!(omap_hwmod_read(oh, sysc->sysc_offs)
491 & softrst_mask),
492 MAX_MODULE_SOFTRESET_WAIT, c);
493 }
494
495 return c;
496}
497
498/**
499 * _set_dmadisable: set OCP_SYSCONFIG.DMADISABLE bit in @v
500 * @oh: struct omap_hwmod *
501 *
502 * The DMADISABLE bit is a semi-automatic bit present in sysconfig register
503 * of some modules. When the DMA must perform read/write accesses, the
504 * DMADISABLE bit is cleared by the hardware. But when the DMA must stop
505 * for power management, software must set the DMADISABLE bit back to 1.
506 *
507 * Set the DMADISABLE bit in @v for hwmod @oh. Returns -EINVAL upon
508 * error or 0 upon success.
509 */
510static int _set_dmadisable(struct omap_hwmod *oh)
511{
512 u32 v;
513 u32 dmadisable_mask;
514
515 if (!oh->class->sysc ||
516 !(oh->class->sysc->sysc_flags & SYSC_HAS_DMADISABLE))
517 return -EINVAL;
518
519 if (!oh->class->sysc->sysc_fields) {
520 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
521 return -EINVAL;
522 }
523
524 /* clocks must be on for this operation */
525 if (oh->_state != _HWMOD_STATE_ENABLED) {
526 pr_warn("omap_hwmod: %s: dma can be disabled only from enabled state\n", oh->name);
527 return -EINVAL;
528 }
529
530 pr_debug("omap_hwmod: %s: setting DMADISABLE\n", oh->name);
531
532 v = oh->_sysc_cache;
533 dmadisable_mask =
534 (0x1 << oh->class->sysc->sysc_fields->dmadisable_shift);
535 v |= dmadisable_mask;
536 _write_sysconfig(v, oh);
537
538 return 0;
539}
540
541/**
542 * _set_module_autoidle: set the OCP_SYSCONFIG AUTOIDLE field in @v
543 * @oh: struct omap_hwmod *
544 * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
545 * @v: pointer to register contents to modify
546 *
547 * Update the module autoidle bit in @v to be @autoidle for the @oh
548 * hwmod. The autoidle bit controls whether the module can gate
549 * internal clocks automatically when it isn't doing anything; the
550 * exact function of this bit varies on a per-module basis. This
551 * function does not write to the hardware. Returns -EINVAL upon
552 * error or 0 upon success.
553 */
554static int _set_module_autoidle(struct omap_hwmod *oh, u8 autoidle,
555 u32 *v)
556{
557 u32 autoidle_mask;
558 u8 autoidle_shift;
559
560 if (!oh->class->sysc ||
561 !(oh->class->sysc->sysc_flags & SYSC_HAS_AUTOIDLE))
562 return -EINVAL;
563
564 if (!oh->class->sysc->sysc_fields) {
565 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
566 return -EINVAL;
567 }
568
569 autoidle_shift = oh->class->sysc->sysc_fields->autoidle_shift;
570 autoidle_mask = (0x1 << autoidle_shift);
571
572 *v &= ~autoidle_mask;
573 *v |= autoidle << autoidle_shift;
574
575 return 0;
576}
577
578/**
579 * _enable_wakeup: set OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
580 * @oh: struct omap_hwmod *
581 *
582 * Allow the hardware module @oh to send wakeups. Returns -EINVAL
583 * upon error or 0 upon success.
584 */
585static int _enable_wakeup(struct omap_hwmod *oh, u32 *v)
586{
587 if (!oh->class->sysc ||
588 !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
589 (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
590 (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
591 return -EINVAL;
592
593 if (!oh->class->sysc->sysc_fields) {
594 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
595 return -EINVAL;
596 }
597
598 if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
599 *v |= 0x1 << oh->class->sysc->sysc_fields->enwkup_shift;
600
601 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
602 _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
603 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
604 _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
605
606 /* XXX test pwrdm_get_wken for this hwmod's subsystem */
607
608 return 0;
609}
610
611/**
612 * _disable_wakeup: clear OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
613 * @oh: struct omap_hwmod *
614 *
615 * Prevent the hardware module @oh to send wakeups. Returns -EINVAL
616 * upon error or 0 upon success.
617 */
618static int _disable_wakeup(struct omap_hwmod *oh, u32 *v)
619{
620 if (!oh->class->sysc ||
621 !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
622 (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
623 (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
624 return -EINVAL;
625
626 if (!oh->class->sysc->sysc_fields) {
627 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
628 return -EINVAL;
629 }
630
631 if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
632 *v &= ~(0x1 << oh->class->sysc->sysc_fields->enwkup_shift);
633
634 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
635 _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART, v);
636 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
637 _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART, v);
638
639 /* XXX test pwrdm_get_wken for this hwmod's subsystem */
640
641 return 0;
642}
643
644static struct clockdomain *_get_clkdm(struct omap_hwmod *oh)
645{
646 struct clk_hw_omap *clk;
647
648 if (oh->clkdm) {
649 return oh->clkdm;
650 } else if (oh->_clk) {
651 if (__clk_get_flags(oh->_clk) & CLK_IS_BASIC)
652 return NULL;
653 clk = to_clk_hw_omap(__clk_get_hw(oh->_clk));
654 return clk->clkdm;
655 }
656 return NULL;
657}
658
659/**
660 * _add_initiator_dep: prevent @oh from smart-idling while @init_oh is active
661 * @oh: struct omap_hwmod *
662 *
663 * Prevent the hardware module @oh from entering idle while the
664 * hardare module initiator @init_oh is active. Useful when a module
665 * will be accessed by a particular initiator (e.g., if a module will
666 * be accessed by the IVA, there should be a sleepdep between the IVA
667 * initiator and the module). Only applies to modules in smart-idle
668 * mode. If the clockdomain is marked as not needing autodeps, return
669 * 0 without doing anything. Otherwise, returns -EINVAL upon error or
670 * passes along clkdm_add_sleepdep() value upon success.
671 */
672static int _add_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
673{
674 struct clockdomain *clkdm, *init_clkdm;
675
676 clkdm = _get_clkdm(oh);
677 init_clkdm = _get_clkdm(init_oh);
678
679 if (!clkdm || !init_clkdm)
680 return -EINVAL;
681
682 if (clkdm && clkdm->flags & CLKDM_NO_AUTODEPS)
683 return 0;
684
685 return clkdm_add_sleepdep(clkdm, init_clkdm);
686}
687
688/**
689 * _del_initiator_dep: allow @oh to smart-idle even if @init_oh is active
690 * @oh: struct omap_hwmod *
691 *
692 * Allow the hardware module @oh to enter idle while the hardare
693 * module initiator @init_oh is active. Useful when a module will not
694 * be accessed by a particular initiator (e.g., if a module will not
695 * be accessed by the IVA, there should be no sleepdep between the IVA
696 * initiator and the module). Only applies to modules in smart-idle
697 * mode. If the clockdomain is marked as not needing autodeps, return
698 * 0 without doing anything. Returns -EINVAL upon error or passes
699 * along clkdm_del_sleepdep() value upon success.
700 */
701static int _del_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
702{
703 struct clockdomain *clkdm, *init_clkdm;
704
705 clkdm = _get_clkdm(oh);
706 init_clkdm = _get_clkdm(init_oh);
707
708 if (!clkdm || !init_clkdm)
709 return -EINVAL;
710
711 if (clkdm && clkdm->flags & CLKDM_NO_AUTODEPS)
712 return 0;
713
714 return clkdm_del_sleepdep(clkdm, init_clkdm);
715}
716
717static const struct of_device_id ti_clkctrl_match_table[] __initconst = {
718 { .compatible = "ti,clkctrl" },
719 { }
720};
721
722static int __init _setup_clkctrl_provider(struct device_node *np)
723{
724 const __be32 *addrp;
725 struct clkctrl_provider *provider;
726 u64 size;
727
728 provider = memblock_virt_alloc(sizeof(*provider), 0);
729 if (!provider)
730 return -ENOMEM;
731
732 addrp = of_get_address(np, 0, &size, NULL);
733 provider->addr = (u32)of_translate_address(np, addrp);
734 addrp = of_get_address(np->parent, 0, NULL, NULL);
735 provider->offset = provider->addr -
736 (u32)of_translate_address(np->parent, addrp);
737 provider->addr &= ~0xff;
738 provider->size = size | 0xff;
739 provider->node = np;
740
741 pr_debug("%s: %s: %x...%x [+%x]\n", __func__, np->parent->name,
742 provider->addr, provider->addr + provider->size,
743 provider->offset);
744
745 list_add(&provider->link, &clkctrl_providers);
746
747 return 0;
748}
749
750static int __init _init_clkctrl_providers(void)
751{
752 struct device_node *np;
753 int ret = 0;
754
755 for_each_matching_node(np, ti_clkctrl_match_table) {
756 ret = _setup_clkctrl_provider(np);
757 if (ret)
758 break;
759 }
760
761 return ret;
762}
763
764static u32 _omap4_xlate_clkctrl(struct omap_hwmod *oh)
765{
766 if (!oh->prcm.omap4.modulemode)
767 return 0;
768
769 return omap_cm_xlate_clkctrl(oh->clkdm->prcm_partition,
770 oh->clkdm->cm_inst,
771 oh->prcm.omap4.clkctrl_offs);
772}
773
774static struct clk *_lookup_clkctrl_clk(struct omap_hwmod *oh)
775{
776 struct clkctrl_provider *provider;
777 struct clk *clk;
778 u32 addr;
779
780 if (!soc_ops.xlate_clkctrl)
781 return NULL;
782
783 addr = soc_ops.xlate_clkctrl(oh);
784 if (!addr)
785 return NULL;
786
787 pr_debug("%s: %s: addr=%x\n", __func__, oh->name, addr);
788
789 list_for_each_entry(provider, &clkctrl_providers, link) {
790 if (provider->addr <= addr &&
791 provider->addr + provider->size >= addr) {
792 struct of_phandle_args clkspec;
793
794 clkspec.np = provider->node;
795 clkspec.args_count = 2;
796 clkspec.args[0] = addr - provider->addr -
797 provider->offset;
798 clkspec.args[1] = 0;
799
800 clk = of_clk_get_from_provider(&clkspec);
801
802 pr_debug("%s: %s got %p (offset=%x, provider=%s)\n",
803 __func__, oh->name, clk, clkspec.args[0],
804 provider->node->parent->name);
805
806 return clk;
807 }
808 }
809
810 return NULL;
811}
812
813/**
814 * _init_main_clk - get a struct clk * for the the hwmod's main functional clk
815 * @oh: struct omap_hwmod *
816 *
817 * Called from _init_clocks(). Populates the @oh _clk (main
818 * functional clock pointer) if a clock matching the hwmod name is found,
819 * or a main_clk is present. Returns 0 on success or -EINVAL on error.
820 */
821static int _init_main_clk(struct omap_hwmod *oh)
822{
823 int ret = 0;
824 struct clk *clk = NULL;
825
826 clk = _lookup_clkctrl_clk(oh);
827
828 if (!IS_ERR_OR_NULL(clk)) {
829 pr_debug("%s: mapped main_clk %s for %s\n", __func__,
830 __clk_get_name(clk), oh->name);
831 oh->main_clk = __clk_get_name(clk);
832 oh->_clk = clk;
833 soc_ops.disable_direct_prcm(oh);
834 } else {
835 if (!oh->main_clk)
836 return 0;
837
838 oh->_clk = clk_get(NULL, oh->main_clk);
839 }
840
841 if (IS_ERR(oh->_clk)) {
842 pr_warn("omap_hwmod: %s: cannot clk_get main_clk %s\n",
843 oh->name, oh->main_clk);
844 return -EINVAL;
845 }
846 /*
847 * HACK: This needs a re-visit once clk_prepare() is implemented
848 * to do something meaningful. Today its just a no-op.
849 * If clk_prepare() is used at some point to do things like
850 * voltage scaling etc, then this would have to be moved to
851 * some point where subsystems like i2c and pmic become
852 * available.
853 */
854 clk_prepare(oh->_clk);
855
856 if (!_get_clkdm(oh))
857 pr_debug("omap_hwmod: %s: missing clockdomain for %s.\n",
858 oh->name, oh->main_clk);
859
860 return ret;
861}
862
863/**
864 * _init_interface_clks - get a struct clk * for the the hwmod's interface clks
865 * @oh: struct omap_hwmod *
866 *
867 * Called from _init_clocks(). Populates the @oh OCP slave interface
868 * clock pointers. Returns 0 on success or -EINVAL on error.
869 */
870static int _init_interface_clks(struct omap_hwmod *oh)
871{
872 struct omap_hwmod_ocp_if *os;
873 struct clk *c;
874 int ret = 0;
875
876 list_for_each_entry(os, &oh->slave_ports, node) {
877 if (!os->clk)
878 continue;
879
880 c = clk_get(NULL, os->clk);
881 if (IS_ERR(c)) {
882 pr_warn("omap_hwmod: %s: cannot clk_get interface_clk %s\n",
883 oh->name, os->clk);
884 ret = -EINVAL;
885 continue;
886 }
887 os->_clk = c;
888 /*
889 * HACK: This needs a re-visit once clk_prepare() is implemented
890 * to do something meaningful. Today its just a no-op.
891 * If clk_prepare() is used at some point to do things like
892 * voltage scaling etc, then this would have to be moved to
893 * some point where subsystems like i2c and pmic become
894 * available.
895 */
896 clk_prepare(os->_clk);
897 }
898
899 return ret;
900}
901
902/**
903 * _init_opt_clk - get a struct clk * for the the hwmod's optional clocks
904 * @oh: struct omap_hwmod *
905 *
906 * Called from _init_clocks(). Populates the @oh omap_hwmod_opt_clk
907 * clock pointers. Returns 0 on success or -EINVAL on error.
908 */
909static int _init_opt_clks(struct omap_hwmod *oh)
910{
911 struct omap_hwmod_opt_clk *oc;
912 struct clk *c;
913 int i;
914 int ret = 0;
915
916 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++) {
917 c = clk_get(NULL, oc->clk);
918 if (IS_ERR(c)) {
919 pr_warn("omap_hwmod: %s: cannot clk_get opt_clk %s\n",
920 oh->name, oc->clk);
921 ret = -EINVAL;
922 continue;
923 }
924 oc->_clk = c;
925 /*
926 * HACK: This needs a re-visit once clk_prepare() is implemented
927 * to do something meaningful. Today its just a no-op.
928 * If clk_prepare() is used at some point to do things like
929 * voltage scaling etc, then this would have to be moved to
930 * some point where subsystems like i2c and pmic become
931 * available.
932 */
933 clk_prepare(oc->_clk);
934 }
935
936 return ret;
937}
938
939static void _enable_optional_clocks(struct omap_hwmod *oh)
940{
941 struct omap_hwmod_opt_clk *oc;
942 int i;
943
944 pr_debug("omap_hwmod: %s: enabling optional clocks\n", oh->name);
945
946 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
947 if (oc->_clk) {
948 pr_debug("omap_hwmod: enable %s:%s\n", oc->role,
949 __clk_get_name(oc->_clk));
950 clk_enable(oc->_clk);
951 }
952}
953
954static void _disable_optional_clocks(struct omap_hwmod *oh)
955{
956 struct omap_hwmod_opt_clk *oc;
957 int i;
958
959 pr_debug("omap_hwmod: %s: disabling optional clocks\n", oh->name);
960
961 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
962 if (oc->_clk) {
963 pr_debug("omap_hwmod: disable %s:%s\n", oc->role,
964 __clk_get_name(oc->_clk));
965 clk_disable(oc->_clk);
966 }
967}
968
969/**
970 * _enable_clocks - enable hwmod main clock and interface clocks
971 * @oh: struct omap_hwmod *
972 *
973 * Enables all clocks necessary for register reads and writes to succeed
974 * on the hwmod @oh. Returns 0.
975 */
976static int _enable_clocks(struct omap_hwmod *oh)
977{
978 struct omap_hwmod_ocp_if *os;
979
980 pr_debug("omap_hwmod: %s: enabling clocks\n", oh->name);
981
982 if (oh->flags & HWMOD_OPT_CLKS_NEEDED)
983 _enable_optional_clocks(oh);
984
985 if (oh->_clk)
986 clk_enable(oh->_clk);
987
988 list_for_each_entry(os, &oh->slave_ports, node) {
989 if (os->_clk && (os->flags & OCPIF_SWSUP_IDLE))
990 clk_enable(os->_clk);
991 }
992
993 /* The opt clocks are controlled by the device driver. */
994
995 return 0;
996}
997
998/**
999 * _omap4_clkctrl_managed_by_clkfwk - true if clkctrl managed by clock framework
1000 * @oh: struct omap_hwmod *
1001 */
1002static bool _omap4_clkctrl_managed_by_clkfwk(struct omap_hwmod *oh)
1003{
1004 if (oh->prcm.omap4.flags & HWMOD_OMAP4_CLKFWK_CLKCTR_CLOCK)
1005 return true;
1006
1007 return false;
1008}
1009
1010/**
1011 * _omap4_has_clkctrl_clock - returns true if a module has clkctrl clock
1012 * @oh: struct omap_hwmod *
1013 */
1014static bool _omap4_has_clkctrl_clock(struct omap_hwmod *oh)
1015{
1016 if (oh->prcm.omap4.clkctrl_offs)
1017 return true;
1018
1019 if (!oh->prcm.omap4.clkctrl_offs &&
1020 oh->prcm.omap4.flags & HWMOD_OMAP4_ZERO_CLKCTRL_OFFSET)
1021 return true;
1022
1023 return false;
1024}
1025
1026/**
1027 * _disable_clocks - disable hwmod main clock and interface clocks
1028 * @oh: struct omap_hwmod *
1029 *
1030 * Disables the hwmod @oh main functional and interface clocks. Returns 0.
1031 */
1032static int _disable_clocks(struct omap_hwmod *oh)
1033{
1034 struct omap_hwmod_ocp_if *os;
1035
1036 pr_debug("omap_hwmod: %s: disabling clocks\n", oh->name);
1037
1038 if (oh->_clk)
1039 clk_disable(oh->_clk);
1040
1041 list_for_each_entry(os, &oh->slave_ports, node) {
1042 if (os->_clk && (os->flags & OCPIF_SWSUP_IDLE))
1043 clk_disable(os->_clk);
1044 }
1045
1046 if (oh->flags & HWMOD_OPT_CLKS_NEEDED)
1047 _disable_optional_clocks(oh);
1048
1049 /* The opt clocks are controlled by the device driver. */
1050
1051 return 0;
1052}
1053
1054/**
1055 * _omap4_enable_module - enable CLKCTRL modulemode on OMAP4
1056 * @oh: struct omap_hwmod *
1057 *
1058 * Enables the PRCM module mode related to the hwmod @oh.
1059 * No return value.
1060 */
1061static void _omap4_enable_module(struct omap_hwmod *oh)
1062{
1063 if (!oh->clkdm || !oh->prcm.omap4.modulemode ||
1064 _omap4_clkctrl_managed_by_clkfwk(oh))
1065 return;
1066
1067 pr_debug("omap_hwmod: %s: %s: %d\n",
1068 oh->name, __func__, oh->prcm.omap4.modulemode);
1069
1070 omap_cm_module_enable(oh->prcm.omap4.modulemode,
1071 oh->clkdm->prcm_partition,
1072 oh->clkdm->cm_inst, oh->prcm.omap4.clkctrl_offs);
1073}
1074
1075/**
1076 * _omap4_wait_target_disable - wait for a module to be disabled on OMAP4
1077 * @oh: struct omap_hwmod *
1078 *
1079 * Wait for a module @oh to enter slave idle. Returns 0 if the module
1080 * does not have an IDLEST bit or if the module successfully enters
1081 * slave idle; otherwise, pass along the return value of the
1082 * appropriate *_cm*_wait_module_idle() function.
1083 */
1084static int _omap4_wait_target_disable(struct omap_hwmod *oh)
1085{
1086 if (!oh)
1087 return -EINVAL;
1088
1089 if (oh->_int_flags & _HWMOD_NO_MPU_PORT || !oh->clkdm)
1090 return 0;
1091
1092 if (oh->flags & HWMOD_NO_IDLEST)
1093 return 0;
1094
1095 if (_omap4_clkctrl_managed_by_clkfwk(oh))
1096 return 0;
1097
1098 if (!_omap4_has_clkctrl_clock(oh))
1099 return 0;
1100
1101 return omap_cm_wait_module_idle(oh->clkdm->prcm_partition,
1102 oh->clkdm->cm_inst,
1103 oh->prcm.omap4.clkctrl_offs, 0);
1104}
1105
1106/**
1107 * _save_mpu_port_index - find and save the index to @oh's MPU port
1108 * @oh: struct omap_hwmod *
1109 *
1110 * Determines the array index of the OCP slave port that the MPU uses
1111 * to address the device, and saves it into the struct omap_hwmod.
1112 * Intended to be called during hwmod registration only. No return
1113 * value.
1114 */
1115static void __init _save_mpu_port_index(struct omap_hwmod *oh)
1116{
1117 struct omap_hwmod_ocp_if *os = NULL;
1118
1119 if (!oh)
1120 return;
1121
1122 oh->_int_flags |= _HWMOD_NO_MPU_PORT;
1123
1124 list_for_each_entry(os, &oh->slave_ports, node) {
1125 if (os->user & OCP_USER_MPU) {
1126 oh->_mpu_port = os;
1127 oh->_int_flags &= ~_HWMOD_NO_MPU_PORT;
1128 break;
1129 }
1130 }
1131
1132 return;
1133}
1134
1135/**
1136 * _find_mpu_rt_port - return omap_hwmod_ocp_if accessible by the MPU
1137 * @oh: struct omap_hwmod *
1138 *
1139 * Given a pointer to a struct omap_hwmod record @oh, return a pointer
1140 * to the struct omap_hwmod_ocp_if record that is used by the MPU to
1141 * communicate with the IP block. This interface need not be directly
1142 * connected to the MPU (and almost certainly is not), but is directly
1143 * connected to the IP block represented by @oh. Returns a pointer
1144 * to the struct omap_hwmod_ocp_if * upon success, or returns NULL upon
1145 * error or if there does not appear to be a path from the MPU to this
1146 * IP block.
1147 */
1148static struct omap_hwmod_ocp_if *_find_mpu_rt_port(struct omap_hwmod *oh)
1149{
1150 if (!oh || oh->_int_flags & _HWMOD_NO_MPU_PORT || oh->slaves_cnt == 0)
1151 return NULL;
1152
1153 return oh->_mpu_port;
1154};
1155
1156/**
1157 * _enable_sysc - try to bring a module out of idle via OCP_SYSCONFIG
1158 * @oh: struct omap_hwmod *
1159 *
1160 * Ensure that the OCP_SYSCONFIG register for the IP block represented
1161 * by @oh is set to indicate to the PRCM that the IP block is active.
1162 * Usually this means placing the module into smart-idle mode and
1163 * smart-standby, but if there is a bug in the automatic idle handling
1164 * for the IP block, it may need to be placed into the force-idle or
1165 * no-idle variants of these modes. No return value.
1166 */
1167static void _enable_sysc(struct omap_hwmod *oh)
1168{
1169 u8 idlemode, sf;
1170 u32 v;
1171 bool clkdm_act;
1172 struct clockdomain *clkdm;
1173
1174 if (!oh->class->sysc)
1175 return;
1176
1177 /*
1178 * Wait until reset has completed, this is needed as the IP
1179 * block is reset automatically by hardware in some cases
1180 * (off-mode for example), and the drivers require the
1181 * IP to be ready when they access it
1182 */
1183 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1184 _enable_optional_clocks(oh);
1185 _wait_softreset_complete(oh);
1186 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1187 _disable_optional_clocks(oh);
1188
1189 v = oh->_sysc_cache;
1190 sf = oh->class->sysc->sysc_flags;
1191
1192 clkdm = _get_clkdm(oh);
1193 if (sf & SYSC_HAS_SIDLEMODE) {
1194 if (oh->flags & HWMOD_SWSUP_SIDLE ||
1195 oh->flags & HWMOD_SWSUP_SIDLE_ACT) {
1196 idlemode = HWMOD_IDLEMODE_NO;
1197 } else {
1198 if (sf & SYSC_HAS_ENAWAKEUP)
1199 _enable_wakeup(oh, &v);
1200 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
1201 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
1202 else
1203 idlemode = HWMOD_IDLEMODE_SMART;
1204 }
1205
1206 /*
1207 * This is special handling for some IPs like
1208 * 32k sync timer. Force them to idle!
1209 */
1210 clkdm_act = (clkdm && clkdm->flags & CLKDM_ACTIVE_WITH_MPU);
1211 if (clkdm_act && !(oh->class->sysc->idlemodes &
1212 (SIDLE_SMART | SIDLE_SMART_WKUP)))
1213 idlemode = HWMOD_IDLEMODE_FORCE;
1214
1215 _set_slave_idlemode(oh, idlemode, &v);
1216 }
1217
1218 if (sf & SYSC_HAS_MIDLEMODE) {
1219 if (oh->flags & HWMOD_FORCE_MSTANDBY) {
1220 idlemode = HWMOD_IDLEMODE_FORCE;
1221 } else if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
1222 idlemode = HWMOD_IDLEMODE_NO;
1223 } else {
1224 if (sf & SYSC_HAS_ENAWAKEUP)
1225 _enable_wakeup(oh, &v);
1226 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
1227 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
1228 else
1229 idlemode = HWMOD_IDLEMODE_SMART;
1230 }
1231 _set_master_standbymode(oh, idlemode, &v);
1232 }
1233
1234 /*
1235 * XXX The clock framework should handle this, by
1236 * calling into this code. But this must wait until the
1237 * clock structures are tagged with omap_hwmod entries
1238 */
1239 if ((oh->flags & HWMOD_SET_DEFAULT_CLOCKACT) &&
1240 (sf & SYSC_HAS_CLOCKACTIVITY))
1241 _set_clockactivity(oh, CLOCKACT_TEST_ICLK, &v);
1242
1243 _write_sysconfig(v, oh);
1244
1245 /*
1246 * Set the autoidle bit only after setting the smartidle bit
1247 * Setting this will not have any impact on the other modules.
1248 */
1249 if (sf & SYSC_HAS_AUTOIDLE) {
1250 idlemode = (oh->flags & HWMOD_NO_OCP_AUTOIDLE) ?
1251 0 : 1;
1252 _set_module_autoidle(oh, idlemode, &v);
1253 _write_sysconfig(v, oh);
1254 }
1255}
1256
1257/**
1258 * _idle_sysc - try to put a module into idle via OCP_SYSCONFIG
1259 * @oh: struct omap_hwmod *
1260 *
1261 * If module is marked as SWSUP_SIDLE, force the module into slave
1262 * idle; otherwise, configure it for smart-idle. If module is marked
1263 * as SWSUP_MSUSPEND, force the module into master standby; otherwise,
1264 * configure it for smart-standby. No return value.
1265 */
1266static void _idle_sysc(struct omap_hwmod *oh)
1267{
1268 u8 idlemode, sf;
1269 u32 v;
1270
1271 if (!oh->class->sysc)
1272 return;
1273
1274 v = oh->_sysc_cache;
1275 sf = oh->class->sysc->sysc_flags;
1276
1277 if (sf & SYSC_HAS_SIDLEMODE) {
1278 if (oh->flags & HWMOD_SWSUP_SIDLE) {
1279 idlemode = HWMOD_IDLEMODE_FORCE;
1280 } else {
1281 if (sf & SYSC_HAS_ENAWAKEUP)
1282 _enable_wakeup(oh, &v);
1283 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
1284 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
1285 else
1286 idlemode = HWMOD_IDLEMODE_SMART;
1287 }
1288 _set_slave_idlemode(oh, idlemode, &v);
1289 }
1290
1291 if (sf & SYSC_HAS_MIDLEMODE) {
1292 if ((oh->flags & HWMOD_SWSUP_MSTANDBY) ||
1293 (oh->flags & HWMOD_FORCE_MSTANDBY)) {
1294 idlemode = HWMOD_IDLEMODE_FORCE;
1295 } else {
1296 if (sf & SYSC_HAS_ENAWAKEUP)
1297 _enable_wakeup(oh, &v);
1298 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
1299 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
1300 else
1301 idlemode = HWMOD_IDLEMODE_SMART;
1302 }
1303 _set_master_standbymode(oh, idlemode, &v);
1304 }
1305
1306 /* If the cached value is the same as the new value, skip the write */
1307 if (oh->_sysc_cache != v)
1308 _write_sysconfig(v, oh);
1309}
1310
1311/**
1312 * _shutdown_sysc - force a module into idle via OCP_SYSCONFIG
1313 * @oh: struct omap_hwmod *
1314 *
1315 * Force the module into slave idle and master suspend. No return
1316 * value.
1317 */
1318static void _shutdown_sysc(struct omap_hwmod *oh)
1319{
1320 u32 v;
1321 u8 sf;
1322
1323 if (!oh->class->sysc)
1324 return;
1325
1326 v = oh->_sysc_cache;
1327 sf = oh->class->sysc->sysc_flags;
1328
1329 if (sf & SYSC_HAS_SIDLEMODE)
1330 _set_slave_idlemode(oh, HWMOD_IDLEMODE_FORCE, &v);
1331
1332 if (sf & SYSC_HAS_MIDLEMODE)
1333 _set_master_standbymode(oh, HWMOD_IDLEMODE_FORCE, &v);
1334
1335 if (sf & SYSC_HAS_AUTOIDLE)
1336 _set_module_autoidle(oh, 1, &v);
1337
1338 _write_sysconfig(v, oh);
1339}
1340
1341/**
1342 * _lookup - find an omap_hwmod by name
1343 * @name: find an omap_hwmod by name
1344 *
1345 * Return a pointer to an omap_hwmod by name, or NULL if not found.
1346 */
1347static struct omap_hwmod *_lookup(const char *name)
1348{
1349 struct omap_hwmod *oh, *temp_oh;
1350
1351 oh = NULL;
1352
1353 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
1354 if (!strcmp(name, temp_oh->name)) {
1355 oh = temp_oh;
1356 break;
1357 }
1358 }
1359
1360 return oh;
1361}
1362
1363/**
1364 * _init_clkdm - look up a clockdomain name, store pointer in omap_hwmod
1365 * @oh: struct omap_hwmod *
1366 *
1367 * Convert a clockdomain name stored in a struct omap_hwmod into a
1368 * clockdomain pointer, and save it into the struct omap_hwmod.
1369 * Return -EINVAL if the clkdm_name lookup failed.
1370 */
1371static int _init_clkdm(struct omap_hwmod *oh)
1372{
1373 if (!oh->clkdm_name) {
1374 pr_debug("omap_hwmod: %s: missing clockdomain\n", oh->name);
1375 return 0;
1376 }
1377
1378 oh->clkdm = clkdm_lookup(oh->clkdm_name);
1379 if (!oh->clkdm) {
1380 pr_warn("omap_hwmod: %s: could not associate to clkdm %s\n",
1381 oh->name, oh->clkdm_name);
1382 return 0;
1383 }
1384
1385 pr_debug("omap_hwmod: %s: associated to clkdm %s\n",
1386 oh->name, oh->clkdm_name);
1387
1388 return 0;
1389}
1390
1391/**
1392 * _init_clocks - clk_get() all clocks associated with this hwmod. Retrieve as
1393 * well the clockdomain.
1394 * @oh: struct omap_hwmod *
1395 * @np: device_node mapped to this hwmod
1396 *
1397 * Called by omap_hwmod_setup_*() (after omap2_clk_init()).
1398 * Resolves all clock names embedded in the hwmod. Returns 0 on
1399 * success, or a negative error code on failure.
1400 */
1401static int _init_clocks(struct omap_hwmod *oh, struct device_node *np)
1402{
1403 int ret = 0;
1404
1405 if (oh->_state != _HWMOD_STATE_REGISTERED)
1406 return 0;
1407
1408 pr_debug("omap_hwmod: %s: looking up clocks\n", oh->name);
1409
1410 if (soc_ops.init_clkdm)
1411 ret |= soc_ops.init_clkdm(oh);
1412
1413 ret |= _init_main_clk(oh);
1414 ret |= _init_interface_clks(oh);
1415 ret |= _init_opt_clks(oh);
1416
1417 if (!ret)
1418 oh->_state = _HWMOD_STATE_CLKS_INITED;
1419 else
1420 pr_warn("omap_hwmod: %s: cannot _init_clocks\n", oh->name);
1421
1422 return ret;
1423}
1424
1425/**
1426 * _lookup_hardreset - fill register bit info for this hwmod/reset line
1427 * @oh: struct omap_hwmod *
1428 * @name: name of the reset line in the context of this hwmod
1429 * @ohri: struct omap_hwmod_rst_info * that this function will fill in
1430 *
1431 * Return the bit position of the reset line that match the
1432 * input name. Return -ENOENT if not found.
1433 */
1434static int _lookup_hardreset(struct omap_hwmod *oh, const char *name,
1435 struct omap_hwmod_rst_info *ohri)
1436{
1437 int i;
1438
1439 for (i = 0; i < oh->rst_lines_cnt; i++) {
1440 const char *rst_line = oh->rst_lines[i].name;
1441 if (!strcmp(rst_line, name)) {
1442 ohri->rst_shift = oh->rst_lines[i].rst_shift;
1443 ohri->st_shift = oh->rst_lines[i].st_shift;
1444 pr_debug("omap_hwmod: %s: %s: %s: rst %d st %d\n",
1445 oh->name, __func__, rst_line, ohri->rst_shift,
1446 ohri->st_shift);
1447
1448 return 0;
1449 }
1450 }
1451
1452 return -ENOENT;
1453}
1454
1455/**
1456 * _assert_hardreset - assert the HW reset line of submodules
1457 * contained in the hwmod module.
1458 * @oh: struct omap_hwmod *
1459 * @name: name of the reset line to lookup and assert
1460 *
1461 * Some IP like dsp, ipu or iva contain processor that require an HW
1462 * reset line to be assert / deassert in order to enable fully the IP.
1463 * Returns -EINVAL if @oh is null, -ENOSYS if we have no way of
1464 * asserting the hardreset line on the currently-booted SoC, or passes
1465 * along the return value from _lookup_hardreset() or the SoC's
1466 * assert_hardreset code.
1467 */
1468static int _assert_hardreset(struct omap_hwmod *oh, const char *name)
1469{
1470 struct omap_hwmod_rst_info ohri;
1471 int ret = -EINVAL;
1472
1473 if (!oh)
1474 return -EINVAL;
1475
1476 if (!soc_ops.assert_hardreset)
1477 return -ENOSYS;
1478
1479 ret = _lookup_hardreset(oh, name, &ohri);
1480 if (ret < 0)
1481 return ret;
1482
1483 ret = soc_ops.assert_hardreset(oh, &ohri);
1484
1485 return ret;
1486}
1487
1488/**
1489 * _deassert_hardreset - deassert the HW reset line of submodules contained
1490 * in the hwmod module.
1491 * @oh: struct omap_hwmod *
1492 * @name: name of the reset line to look up and deassert
1493 *
1494 * Some IP like dsp, ipu or iva contain processor that require an HW
1495 * reset line to be assert / deassert in order to enable fully the IP.
1496 * Returns -EINVAL if @oh is null, -ENOSYS if we have no way of
1497 * deasserting the hardreset line on the currently-booted SoC, or passes
1498 * along the return value from _lookup_hardreset() or the SoC's
1499 * deassert_hardreset code.
1500 */
1501static int _deassert_hardreset(struct omap_hwmod *oh, const char *name)
1502{
1503 struct omap_hwmod_rst_info ohri;
1504 int ret = -EINVAL;
1505
1506 if (!oh)
1507 return -EINVAL;
1508
1509 if (!soc_ops.deassert_hardreset)
1510 return -ENOSYS;
1511
1512 ret = _lookup_hardreset(oh, name, &ohri);
1513 if (ret < 0)
1514 return ret;
1515
1516 if (oh->clkdm) {
1517 /*
1518 * A clockdomain must be in SW_SUP otherwise reset
1519 * might not be completed. The clockdomain can be set
1520 * in HW_AUTO only when the module become ready.
1521 */
1522 clkdm_deny_idle(oh->clkdm);
1523 ret = clkdm_hwmod_enable(oh->clkdm, oh);
1524 if (ret) {
1525 WARN(1, "omap_hwmod: %s: could not enable clockdomain %s: %d\n",
1526 oh->name, oh->clkdm->name, ret);
1527 return ret;
1528 }
1529 }
1530
1531 _enable_clocks(oh);
1532 if (soc_ops.enable_module)
1533 soc_ops.enable_module(oh);
1534
1535 ret = soc_ops.deassert_hardreset(oh, &ohri);
1536
1537 if (soc_ops.disable_module)
1538 soc_ops.disable_module(oh);
1539 _disable_clocks(oh);
1540
1541 if (ret == -EBUSY)
1542 pr_warn("omap_hwmod: %s: failed to hardreset\n", oh->name);
1543
1544 if (oh->clkdm) {
1545 /*
1546 * Set the clockdomain to HW_AUTO, assuming that the
1547 * previous state was HW_AUTO.
1548 */
1549 clkdm_allow_idle(oh->clkdm);
1550
1551 clkdm_hwmod_disable(oh->clkdm, oh);
1552 }
1553
1554 return ret;
1555}
1556
1557/**
1558 * _read_hardreset - read the HW reset line state of submodules
1559 * contained in the hwmod module
1560 * @oh: struct omap_hwmod *
1561 * @name: name of the reset line to look up and read
1562 *
1563 * Return the state of the reset line. Returns -EINVAL if @oh is
1564 * null, -ENOSYS if we have no way of reading the hardreset line
1565 * status on the currently-booted SoC, or passes along the return
1566 * value from _lookup_hardreset() or the SoC's is_hardreset_asserted
1567 * code.
1568 */
1569static int _read_hardreset(struct omap_hwmod *oh, const char *name)
1570{
1571 struct omap_hwmod_rst_info ohri;
1572 int ret = -EINVAL;
1573
1574 if (!oh)
1575 return -EINVAL;
1576
1577 if (!soc_ops.is_hardreset_asserted)
1578 return -ENOSYS;
1579
1580 ret = _lookup_hardreset(oh, name, &ohri);
1581 if (ret < 0)
1582 return ret;
1583
1584 return soc_ops.is_hardreset_asserted(oh, &ohri);
1585}
1586
1587/**
1588 * _are_all_hardreset_lines_asserted - return true if the @oh is hard-reset
1589 * @oh: struct omap_hwmod *
1590 *
1591 * If all hardreset lines associated with @oh are asserted, then return true.
1592 * Otherwise, if part of @oh is out hardreset or if no hardreset lines
1593 * associated with @oh are asserted, then return false.
1594 * This function is used to avoid executing some parts of the IP block
1595 * enable/disable sequence if its hardreset line is set.
1596 */
1597static bool _are_all_hardreset_lines_asserted(struct omap_hwmod *oh)
1598{
1599 int i, rst_cnt = 0;
1600
1601 if (oh->rst_lines_cnt == 0)
1602 return false;
1603
1604 for (i = 0; i < oh->rst_lines_cnt; i++)
1605 if (_read_hardreset(oh, oh->rst_lines[i].name) > 0)
1606 rst_cnt++;
1607
1608 if (oh->rst_lines_cnt == rst_cnt)
1609 return true;
1610
1611 return false;
1612}
1613
1614/**
1615 * _are_any_hardreset_lines_asserted - return true if any part of @oh is
1616 * hard-reset
1617 * @oh: struct omap_hwmod *
1618 *
1619 * If any hardreset lines associated with @oh are asserted, then
1620 * return true. Otherwise, if no hardreset lines associated with @oh
1621 * are asserted, or if @oh has no hardreset lines, then return false.
1622 * This function is used to avoid executing some parts of the IP block
1623 * enable/disable sequence if any hardreset line is set.
1624 */
1625static bool _are_any_hardreset_lines_asserted(struct omap_hwmod *oh)
1626{
1627 int rst_cnt = 0;
1628 int i;
1629
1630 for (i = 0; i < oh->rst_lines_cnt && rst_cnt == 0; i++)
1631 if (_read_hardreset(oh, oh->rst_lines[i].name) > 0)
1632 rst_cnt++;
1633
1634 return (rst_cnt) ? true : false;
1635}
1636
1637/**
1638 * _omap4_disable_module - enable CLKCTRL modulemode on OMAP4
1639 * @oh: struct omap_hwmod *
1640 *
1641 * Disable the PRCM module mode related to the hwmod @oh.
1642 * Return EINVAL if the modulemode is not supported and 0 in case of success.
1643 */
1644static int _omap4_disable_module(struct omap_hwmod *oh)
1645{
1646 int v;
1647
1648 if (!oh->clkdm || !oh->prcm.omap4.modulemode ||
1649 _omap4_clkctrl_managed_by_clkfwk(oh))
1650 return -EINVAL;
1651
1652 /*
1653 * Since integration code might still be doing something, only
1654 * disable if all lines are under hardreset.
1655 */
1656 if (_are_any_hardreset_lines_asserted(oh))
1657 return 0;
1658
1659 pr_debug("omap_hwmod: %s: %s\n", oh->name, __func__);
1660
1661 omap_cm_module_disable(oh->clkdm->prcm_partition, oh->clkdm->cm_inst,
1662 oh->prcm.omap4.clkctrl_offs);
1663
1664 v = _omap4_wait_target_disable(oh);
1665 if (v)
1666 pr_warn("omap_hwmod: %s: _wait_target_disable failed\n",
1667 oh->name);
1668
1669 return 0;
1670}
1671
1672/**
1673 * _ocp_softreset - reset an omap_hwmod via the OCP_SYSCONFIG bit
1674 * @oh: struct omap_hwmod *
1675 *
1676 * Resets an omap_hwmod @oh via the OCP_SYSCONFIG bit. hwmod must be
1677 * enabled for this to work. Returns -ENOENT if the hwmod cannot be
1678 * reset this way, -EINVAL if the hwmod is in the wrong state,
1679 * -ETIMEDOUT if the module did not reset in time, or 0 upon success.
1680 *
1681 * In OMAP3 a specific SYSSTATUS register is used to get the reset status.
1682 * Starting in OMAP4, some IPs do not have SYSSTATUS registers and instead
1683 * use the SYSCONFIG softreset bit to provide the status.
1684 *
1685 * Note that some IP like McBSP do have reset control but don't have
1686 * reset status.
1687 */
1688static int _ocp_softreset(struct omap_hwmod *oh)
1689{
1690 u32 v;
1691 int c = 0;
1692 int ret = 0;
1693
1694 if (!oh->class->sysc ||
1695 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
1696 return -ENOENT;
1697
1698 /* clocks must be on for this operation */
1699 if (oh->_state != _HWMOD_STATE_ENABLED) {
1700 pr_warn("omap_hwmod: %s: reset can only be entered from enabled state\n",
1701 oh->name);
1702 return -EINVAL;
1703 }
1704
1705 /* For some modules, all optionnal clocks need to be enabled as well */
1706 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1707 _enable_optional_clocks(oh);
1708
1709 pr_debug("omap_hwmod: %s: resetting via OCP SOFTRESET\n", oh->name);
1710
1711 v = oh->_sysc_cache;
1712 ret = _set_softreset(oh, &v);
1713 if (ret)
1714 goto dis_opt_clks;
1715
1716 _write_sysconfig(v, oh);
1717
1718 if (oh->class->sysc->srst_udelay)
1719 udelay(oh->class->sysc->srst_udelay);
1720
1721 c = _wait_softreset_complete(oh);
1722 if (c == MAX_MODULE_SOFTRESET_WAIT) {
1723 pr_warn("omap_hwmod: %s: softreset failed (waited %d usec)\n",
1724 oh->name, MAX_MODULE_SOFTRESET_WAIT);
1725 ret = -ETIMEDOUT;
1726 goto dis_opt_clks;
1727 } else {
1728 pr_debug("omap_hwmod: %s: softreset in %d usec\n", oh->name, c);
1729 }
1730
1731 ret = _clear_softreset(oh, &v);
1732 if (ret)
1733 goto dis_opt_clks;
1734
1735 _write_sysconfig(v, oh);
1736
1737 /*
1738 * XXX add _HWMOD_STATE_WEDGED for modules that don't come back from
1739 * _wait_target_ready() or _reset()
1740 */
1741
1742dis_opt_clks:
1743 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1744 _disable_optional_clocks(oh);
1745
1746 return ret;
1747}
1748
1749/**
1750 * _reset - reset an omap_hwmod
1751 * @oh: struct omap_hwmod *
1752 *
1753 * Resets an omap_hwmod @oh. If the module has a custom reset
1754 * function pointer defined, then call it to reset the IP block, and
1755 * pass along its return value to the caller. Otherwise, if the IP
1756 * block has an OCP_SYSCONFIG register with a SOFTRESET bitfield
1757 * associated with it, call a function to reset the IP block via that
1758 * method, and pass along the return value to the caller. Finally, if
1759 * the IP block has some hardreset lines associated with it, assert
1760 * all of those, but do _not_ deassert them. (This is because driver
1761 * authors have expressed an apparent requirement to control the
1762 * deassertion of the hardreset lines themselves.)
1763 *
1764 * The default software reset mechanism for most OMAP IP blocks is
1765 * triggered via the OCP_SYSCONFIG.SOFTRESET bit. However, some
1766 * hwmods cannot be reset via this method. Some are not targets and
1767 * therefore have no OCP header registers to access. Others (like the
1768 * IVA) have idiosyncratic reset sequences. So for these relatively
1769 * rare cases, custom reset code can be supplied in the struct
1770 * omap_hwmod_class .reset function pointer.
1771 *
1772 * _set_dmadisable() is called to set the DMADISABLE bit so that it
1773 * does not prevent idling of the system. This is necessary for cases
1774 * where ROMCODE/BOOTLOADER uses dma and transfers control to the
1775 * kernel without disabling dma.
1776 *
1777 * Passes along the return value from either _ocp_softreset() or the
1778 * custom reset function - these must return -EINVAL if the hwmod
1779 * cannot be reset this way or if the hwmod is in the wrong state,
1780 * -ETIMEDOUT if the module did not reset in time, or 0 upon success.
1781 */
1782static int _reset(struct omap_hwmod *oh)
1783{
1784 int i, r;
1785
1786 pr_debug("omap_hwmod: %s: resetting\n", oh->name);
1787
1788 if (oh->class->reset) {
1789 r = oh->class->reset(oh);
1790 } else {
1791 if (oh->rst_lines_cnt > 0) {
1792 for (i = 0; i < oh->rst_lines_cnt; i++)
1793 _assert_hardreset(oh, oh->rst_lines[i].name);
1794 return 0;
1795 } else {
1796 r = _ocp_softreset(oh);
1797 if (r == -ENOENT)
1798 r = 0;
1799 }
1800 }
1801
1802 _set_dmadisable(oh);
1803
1804 /*
1805 * OCP_SYSCONFIG bits need to be reprogrammed after a
1806 * softreset. The _enable() function should be split to avoid
1807 * the rewrite of the OCP_SYSCONFIG register.
1808 */
1809 if (oh->class->sysc) {
1810 _update_sysc_cache(oh);
1811 _enable_sysc(oh);
1812 }
1813
1814 return r;
1815}
1816
1817/**
1818 * _omap4_update_context_lost - increment hwmod context loss counter if
1819 * hwmod context was lost, and clear hardware context loss reg
1820 * @oh: hwmod to check for context loss
1821 *
1822 * If the PRCM indicates that the hwmod @oh lost context, increment
1823 * our in-memory context loss counter, and clear the RM_*_CONTEXT
1824 * bits. No return value.
1825 */
1826static void _omap4_update_context_lost(struct omap_hwmod *oh)
1827{
1828 if (oh->prcm.omap4.flags & HWMOD_OMAP4_NO_CONTEXT_LOSS_BIT)
1829 return;
1830
1831 if (!prm_was_any_context_lost_old(oh->clkdm->pwrdm.ptr->prcm_partition,
1832 oh->clkdm->pwrdm.ptr->prcm_offs,
1833 oh->prcm.omap4.context_offs))
1834 return;
1835
1836 oh->prcm.omap4.context_lost_counter++;
1837 prm_clear_context_loss_flags_old(oh->clkdm->pwrdm.ptr->prcm_partition,
1838 oh->clkdm->pwrdm.ptr->prcm_offs,
1839 oh->prcm.omap4.context_offs);
1840}
1841
1842/**
1843 * _omap4_get_context_lost - get context loss counter for a hwmod
1844 * @oh: hwmod to get context loss counter for
1845 *
1846 * Returns the in-memory context loss counter for a hwmod.
1847 */
1848static int _omap4_get_context_lost(struct omap_hwmod *oh)
1849{
1850 return oh->prcm.omap4.context_lost_counter;
1851}
1852
1853/**
1854 * _enable_preprogram - Pre-program an IP block during the _enable() process
1855 * @oh: struct omap_hwmod *
1856 *
1857 * Some IP blocks (such as AESS) require some additional programming
1858 * after enable before they can enter idle. If a function pointer to
1859 * do so is present in the hwmod data, then call it and pass along the
1860 * return value; otherwise, return 0.
1861 */
1862static int _enable_preprogram(struct omap_hwmod *oh)
1863{
1864 if (!oh->class->enable_preprogram)
1865 return 0;
1866
1867 return oh->class->enable_preprogram(oh);
1868}
1869
1870/**
1871 * _enable - enable an omap_hwmod
1872 * @oh: struct omap_hwmod *
1873 *
1874 * Enables an omap_hwmod @oh such that the MPU can access the hwmod's
1875 * register target. Returns -EINVAL if the hwmod is in the wrong
1876 * state or passes along the return value of _wait_target_ready().
1877 */
1878static int _enable(struct omap_hwmod *oh)
1879{
1880 int r;
1881
1882 pr_debug("omap_hwmod: %s: enabling\n", oh->name);
1883
1884 /*
1885 * hwmods with HWMOD_INIT_NO_IDLE flag set are left in enabled
1886 * state at init.
1887 */
1888 if (oh->_int_flags & _HWMOD_SKIP_ENABLE) {
1889 oh->_int_flags &= ~_HWMOD_SKIP_ENABLE;
1890 return 0;
1891 }
1892
1893 if (oh->_state != _HWMOD_STATE_INITIALIZED &&
1894 oh->_state != _HWMOD_STATE_IDLE &&
1895 oh->_state != _HWMOD_STATE_DISABLED) {
1896 WARN(1, "omap_hwmod: %s: enabled state can only be entered from initialized, idle, or disabled state\n",
1897 oh->name);
1898 return -EINVAL;
1899 }
1900
1901 /*
1902 * If an IP block contains HW reset lines and all of them are
1903 * asserted, we let integration code associated with that
1904 * block handle the enable. We've received very little
1905 * information on what those driver authors need, and until
1906 * detailed information is provided and the driver code is
1907 * posted to the public lists, this is probably the best we
1908 * can do.
1909 */
1910 if (_are_all_hardreset_lines_asserted(oh))
1911 return 0;
1912
1913 _add_initiator_dep(oh, mpu_oh);
1914
1915 if (oh->clkdm) {
1916 /*
1917 * A clockdomain must be in SW_SUP before enabling
1918 * completely the module. The clockdomain can be set
1919 * in HW_AUTO only when the module become ready.
1920 */
1921 clkdm_deny_idle(oh->clkdm);
1922 r = clkdm_hwmod_enable(oh->clkdm, oh);
1923 if (r) {
1924 WARN(1, "omap_hwmod: %s: could not enable clockdomain %s: %d\n",
1925 oh->name, oh->clkdm->name, r);
1926 return r;
1927 }
1928 }
1929
1930 _enable_clocks(oh);
1931 if (soc_ops.enable_module)
1932 soc_ops.enable_module(oh);
1933 if (oh->flags & HWMOD_BLOCK_WFI)
1934 cpu_idle_poll_ctrl(true);
1935
1936 if (soc_ops.update_context_lost)
1937 soc_ops.update_context_lost(oh);
1938
1939 r = (soc_ops.wait_target_ready) ? soc_ops.wait_target_ready(oh) :
1940 -EINVAL;
1941 if (oh->clkdm && !(oh->flags & HWMOD_CLKDM_NOAUTO))
1942 clkdm_allow_idle(oh->clkdm);
1943
1944 if (!r) {
1945 oh->_state = _HWMOD_STATE_ENABLED;
1946
1947 /* Access the sysconfig only if the target is ready */
1948 if (oh->class->sysc) {
1949 if (!(oh->_int_flags & _HWMOD_SYSCONFIG_LOADED))
1950 _update_sysc_cache(oh);
1951 _enable_sysc(oh);
1952 }
1953 r = _enable_preprogram(oh);
1954 } else {
1955 if (soc_ops.disable_module)
1956 soc_ops.disable_module(oh);
1957 _disable_clocks(oh);
1958 pr_err("omap_hwmod: %s: _wait_target_ready failed: %d\n",
1959 oh->name, r);
1960
1961 if (oh->clkdm)
1962 clkdm_hwmod_disable(oh->clkdm, oh);
1963 }
1964
1965 return r;
1966}
1967
1968/**
1969 * _idle - idle an omap_hwmod
1970 * @oh: struct omap_hwmod *
1971 *
1972 * Idles an omap_hwmod @oh. This should be called once the hwmod has
1973 * no further work. Returns -EINVAL if the hwmod is in the wrong
1974 * state or returns 0.
1975 */
1976static int _idle(struct omap_hwmod *oh)
1977{
1978 if (oh->flags & HWMOD_NO_IDLE) {
1979 oh->_int_flags |= _HWMOD_SKIP_ENABLE;
1980 return 0;
1981 }
1982
1983 pr_debug("omap_hwmod: %s: idling\n", oh->name);
1984
1985 if (_are_all_hardreset_lines_asserted(oh))
1986 return 0;
1987
1988 if (oh->_state != _HWMOD_STATE_ENABLED) {
1989 WARN(1, "omap_hwmod: %s: idle state can only be entered from enabled state\n",
1990 oh->name);
1991 return -EINVAL;
1992 }
1993
1994 if (oh->class->sysc)
1995 _idle_sysc(oh);
1996 _del_initiator_dep(oh, mpu_oh);
1997
1998 /*
1999 * If HWMOD_CLKDM_NOAUTO is set then we don't
2000 * deny idle the clkdm again since idle was already denied
2001 * in _enable()
2002 */
2003 if (oh->clkdm && !(oh->flags & HWMOD_CLKDM_NOAUTO))
2004 clkdm_deny_idle(oh->clkdm);
2005
2006 if (oh->flags & HWMOD_BLOCK_WFI)
2007 cpu_idle_poll_ctrl(false);
2008 if (soc_ops.disable_module)
2009 soc_ops.disable_module(oh);
2010
2011 /*
2012 * The module must be in idle mode before disabling any parents
2013 * clocks. Otherwise, the parent clock might be disabled before
2014 * the module transition is done, and thus will prevent the
2015 * transition to complete properly.
2016 */
2017 _disable_clocks(oh);
2018 if (oh->clkdm) {
2019 clkdm_allow_idle(oh->clkdm);
2020 clkdm_hwmod_disable(oh->clkdm, oh);
2021 }
2022
2023 oh->_state = _HWMOD_STATE_IDLE;
2024
2025 return 0;
2026}
2027
2028/**
2029 * _shutdown - shutdown an omap_hwmod
2030 * @oh: struct omap_hwmod *
2031 *
2032 * Shut down an omap_hwmod @oh. This should be called when the driver
2033 * used for the hwmod is removed or unloaded or if the driver is not
2034 * used by the system. Returns -EINVAL if the hwmod is in the wrong
2035 * state or returns 0.
2036 */
2037static int _shutdown(struct omap_hwmod *oh)
2038{
2039 int ret, i;
2040 u8 prev_state;
2041
2042 if (_are_all_hardreset_lines_asserted(oh))
2043 return 0;
2044
2045 if (oh->_state != _HWMOD_STATE_IDLE &&
2046 oh->_state != _HWMOD_STATE_ENABLED) {
2047 WARN(1, "omap_hwmod: %s: disabled state can only be entered from idle, or enabled state\n",
2048 oh->name);
2049 return -EINVAL;
2050 }
2051
2052 pr_debug("omap_hwmod: %s: disabling\n", oh->name);
2053
2054 if (oh->class->pre_shutdown) {
2055 prev_state = oh->_state;
2056 if (oh->_state == _HWMOD_STATE_IDLE)
2057 _enable(oh);
2058 ret = oh->class->pre_shutdown(oh);
2059 if (ret) {
2060 if (prev_state == _HWMOD_STATE_IDLE)
2061 _idle(oh);
2062 return ret;
2063 }
2064 }
2065
2066 if (oh->class->sysc) {
2067 if (oh->_state == _HWMOD_STATE_IDLE)
2068 _enable(oh);
2069 _shutdown_sysc(oh);
2070 }
2071
2072 /* clocks and deps are already disabled in idle */
2073 if (oh->_state == _HWMOD_STATE_ENABLED) {
2074 _del_initiator_dep(oh, mpu_oh);
2075 /* XXX what about the other system initiators here? dma, dsp */
2076 if (oh->flags & HWMOD_BLOCK_WFI)
2077 cpu_idle_poll_ctrl(false);
2078 if (soc_ops.disable_module)
2079 soc_ops.disable_module(oh);
2080 _disable_clocks(oh);
2081 if (oh->clkdm)
2082 clkdm_hwmod_disable(oh->clkdm, oh);
2083 }
2084 /* XXX Should this code also force-disable the optional clocks? */
2085
2086 for (i = 0; i < oh->rst_lines_cnt; i++)
2087 _assert_hardreset(oh, oh->rst_lines[i].name);
2088
2089 oh->_state = _HWMOD_STATE_DISABLED;
2090
2091 return 0;
2092}
2093
2094static int of_dev_find_hwmod(struct device_node *np,
2095 struct omap_hwmod *oh)
2096{
2097 int count, i, res;
2098 const char *p;
2099
2100 count = of_property_count_strings(np, "ti,hwmods");
2101 if (count < 1)
2102 return -ENODEV;
2103
2104 for (i = 0; i < count; i++) {
2105 res = of_property_read_string_index(np, "ti,hwmods",
2106 i, &p);
2107 if (res)
2108 continue;
2109 if (!strcmp(p, oh->name)) {
2110 pr_debug("omap_hwmod: dt %s[%i] uses hwmod %s\n",
2111 np->name, i, oh->name);
2112 return i;
2113 }
2114 }
2115
2116 return -ENODEV;
2117}
2118
2119/**
2120 * of_dev_hwmod_lookup - look up needed hwmod from dt blob
2121 * @np: struct device_node *
2122 * @oh: struct omap_hwmod *
2123 * @index: index of the entry found
2124 * @found: struct device_node * found or NULL
2125 *
2126 * Parse the dt blob and find out needed hwmod. Recursive function is
2127 * implemented to take care hierarchical dt blob parsing.
2128 * Return: Returns 0 on success, -ENODEV when not found.
2129 */
2130static int of_dev_hwmod_lookup(struct device_node *np,
2131 struct omap_hwmod *oh,
2132 int *index,
2133 struct device_node **found)
2134{
2135 struct device_node *np0 = NULL;
2136 int res;
2137
2138 res = of_dev_find_hwmod(np, oh);
2139 if (res >= 0) {
2140 *found = np;
2141 *index = res;
2142 return 0;
2143 }
2144
2145 for_each_child_of_node(np, np0) {
2146 struct device_node *fc;
2147 int i;
2148
2149 res = of_dev_hwmod_lookup(np0, oh, &i, &fc);
2150 if (res == 0) {
2151 *found = fc;
2152 *index = i;
2153 return 0;
2154 }
2155 }
2156
2157 *found = NULL;
2158 *index = 0;
2159
2160 return -ENODEV;
2161}
2162
2163/**
2164 * omap_hwmod_parse_module_range - map module IO range from device tree
2165 * @oh: struct omap_hwmod *
2166 * @np: struct device_node *
2167 *
2168 * Parse the device tree range an interconnect target module provides
2169 * for it's child device IP blocks. This way we can support the old
2170 * "ti,hwmods" property with just dts data without a need for platform
2171 * data for IO resources. And we don't need all the child IP device
2172 * nodes available in the dts.
2173 */
2174int omap_hwmod_parse_module_range(struct omap_hwmod *oh,
2175 struct device_node *np,
2176 struct resource *res)
2177{
2178 struct property *prop;
2179 const __be32 *ranges;
2180 const char *name;
2181 u32 nr_addr, nr_size;
2182 u64 base, size;
2183 int len, error;
2184
2185 if (!res)
2186 return -EINVAL;
2187
2188 ranges = of_get_property(np, "ranges", &len);
2189 if (!ranges)
2190 return -ENOENT;
2191
2192 len /= sizeof(*ranges);
2193
2194 if (len < 3)
2195 return -EINVAL;
2196
2197 of_property_for_each_string(np, "compatible", prop, name)
2198 if (!strncmp("ti,sysc-", name, 8))
2199 break;
2200
2201 if (!name)
2202 return -ENOENT;
2203
2204 error = of_property_read_u32(np, "#address-cells", &nr_addr);
2205 if (error)
2206 return -ENOENT;
2207
2208 error = of_property_read_u32(np, "#size-cells", &nr_size);
2209 if (error)
2210 return -ENOENT;
2211
2212 if (nr_addr != 1 || nr_size != 1) {
2213 pr_err("%s: invalid range for %s->%s\n", __func__,
2214 oh->name, np->name);
2215 return -EINVAL;
2216 }
2217
2218 ranges++;
2219 base = of_translate_address(np, ranges++);
2220 size = be32_to_cpup(ranges);
2221
2222 pr_debug("omap_hwmod: %s %s at 0x%llx size 0x%llx\n",
2223 oh->name, np->name, base, size);
2224
2225 res->start = base;
2226 res->end = base + size - 1;
2227 res->flags = IORESOURCE_MEM;
2228
2229 return 0;
2230}
2231
2232/**
2233 * _init_mpu_rt_base - populate the virtual address for a hwmod
2234 * @oh: struct omap_hwmod * to locate the virtual address
2235 * @data: (unused, caller should pass NULL)
2236 * @index: index of the reg entry iospace in device tree
2237 * @np: struct device_node * of the IP block's device node in the DT data
2238 *
2239 * Cache the virtual address used by the MPU to access this IP block's
2240 * registers. This address is needed early so the OCP registers that
2241 * are part of the device's address space can be ioremapped properly.
2242 *
2243 * If SYSC access is not needed, the registers will not be remapped
2244 * and non-availability of MPU access is not treated as an error.
2245 *
2246 * Returns 0 on success, -EINVAL if an invalid hwmod is passed, and
2247 * -ENXIO on absent or invalid register target address space.
2248 */
2249static int __init _init_mpu_rt_base(struct omap_hwmod *oh, void *data,
2250 int index, struct device_node *np)
2251{
2252 void __iomem *va_start = NULL;
2253 struct resource res;
2254 int error;
2255
2256 if (!oh)
2257 return -EINVAL;
2258
2259 _save_mpu_port_index(oh);
2260
2261 /* if we don't need sysc access we don't need to ioremap */
2262 if (!oh->class->sysc)
2263 return 0;
2264
2265 /* we can't continue without MPU PORT if we need sysc access */
2266 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
2267 return -ENXIO;
2268
2269 if (!np) {
2270 pr_err("omap_hwmod: %s: no dt node\n", oh->name);
2271 return -ENXIO;
2272 }
2273
2274 /* Do we have a dts range for the interconnect target module? */
2275 error = omap_hwmod_parse_module_range(oh, np, &res);
2276 if (!error)
2277 va_start = ioremap(res.start, resource_size(&res));
2278
2279 /* No ranges, rely on device reg entry */
2280 if (!va_start)
2281 va_start = of_iomap(np, index + oh->mpu_rt_idx);
2282 if (!va_start) {
2283 pr_err("omap_hwmod: %s: Missing dt reg%i for %pOF\n",
2284 oh->name, index, np);
2285 return -ENXIO;
2286 }
2287
2288 pr_debug("omap_hwmod: %s: MPU register target at va %p\n",
2289 oh->name, va_start);
2290
2291 oh->_mpu_rt_va = va_start;
2292 return 0;
2293}
2294
2295/**
2296 * _init - initialize internal data for the hwmod @oh
2297 * @oh: struct omap_hwmod *
2298 * @n: (unused)
2299 *
2300 * Look up the clocks and the address space used by the MPU to access
2301 * registers belonging to the hwmod @oh. @oh must already be
2302 * registered at this point. This is the first of two phases for
2303 * hwmod initialization. Code called here does not touch any hardware
2304 * registers, it simply prepares internal data structures. Returns 0
2305 * upon success or if the hwmod isn't registered or if the hwmod's
2306 * address space is not defined, or -EINVAL upon failure.
2307 */
2308static int __init _init(struct omap_hwmod *oh, void *data)
2309{
2310 int r, index;
2311 struct device_node *np = NULL;
2312 struct device_node *bus;
2313
2314 if (oh->_state != _HWMOD_STATE_REGISTERED)
2315 return 0;
2316
2317 bus = of_find_node_by_name(NULL, "ocp");
2318 if (!bus)
2319 return -ENODEV;
2320
2321 r = of_dev_hwmod_lookup(bus, oh, &index, &np);
2322 if (r)
2323 pr_debug("omap_hwmod: %s missing dt data\n", oh->name);
2324 else if (np && index)
2325 pr_warn("omap_hwmod: %s using broken dt data from %s\n",
2326 oh->name, np->name);
2327
2328 r = _init_mpu_rt_base(oh, NULL, index, np);
2329 if (r < 0) {
2330 WARN(1, "omap_hwmod: %s: doesn't have mpu register target base\n",
2331 oh->name);
2332 return 0;
2333 }
2334
2335 r = _init_clocks(oh, np);
2336 if (r < 0) {
2337 WARN(1, "omap_hwmod: %s: couldn't init clocks\n", oh->name);
2338 return -EINVAL;
2339 }
2340
2341 if (np) {
2342 if (of_find_property(np, "ti,no-reset-on-init", NULL))
2343 oh->flags |= HWMOD_INIT_NO_RESET;
2344 if (of_find_property(np, "ti,no-idle-on-init", NULL))
2345 oh->flags |= HWMOD_INIT_NO_IDLE;
2346 if (of_find_property(np, "ti,no-idle", NULL))
2347 oh->flags |= HWMOD_NO_IDLE;
2348 }
2349
2350 oh->_state = _HWMOD_STATE_INITIALIZED;
2351
2352 return 0;
2353}
2354
2355/**
2356 * _setup_iclk_autoidle - configure an IP block's interface clocks
2357 * @oh: struct omap_hwmod *
2358 *
2359 * Set up the module's interface clocks. XXX This function is still mostly
2360 * a stub; implementing this properly requires iclk autoidle usecounting in
2361 * the clock code. No return value.
2362 */
2363static void __init _setup_iclk_autoidle(struct omap_hwmod *oh)
2364{
2365 struct omap_hwmod_ocp_if *os;
2366
2367 if (oh->_state != _HWMOD_STATE_INITIALIZED)
2368 return;
2369
2370 list_for_each_entry(os, &oh->slave_ports, node) {
2371 if (!os->_clk)
2372 continue;
2373
2374 if (os->flags & OCPIF_SWSUP_IDLE) {
2375 /* XXX omap_iclk_deny_idle(c); */
2376 } else {
2377 /* XXX omap_iclk_allow_idle(c); */
2378 clk_enable(os->_clk);
2379 }
2380 }
2381
2382 return;
2383}
2384
2385/**
2386 * _setup_reset - reset an IP block during the setup process
2387 * @oh: struct omap_hwmod *
2388 *
2389 * Reset the IP block corresponding to the hwmod @oh during the setup
2390 * process. The IP block is first enabled so it can be successfully
2391 * reset. Returns 0 upon success or a negative error code upon
2392 * failure.
2393 */
2394static int __init _setup_reset(struct omap_hwmod *oh)
2395{
2396 int r;
2397
2398 if (oh->_state != _HWMOD_STATE_INITIALIZED)
2399 return -EINVAL;
2400
2401 if (oh->flags & HWMOD_EXT_OPT_MAIN_CLK)
2402 return -EPERM;
2403
2404 if (oh->rst_lines_cnt == 0) {
2405 r = _enable(oh);
2406 if (r) {
2407 pr_warn("omap_hwmod: %s: cannot be enabled for reset (%d)\n",
2408 oh->name, oh->_state);
2409 return -EINVAL;
2410 }
2411 }
2412
2413 if (!(oh->flags & HWMOD_INIT_NO_RESET))
2414 r = _reset(oh);
2415
2416 return r;
2417}
2418
2419/**
2420 * _setup_postsetup - transition to the appropriate state after _setup
2421 * @oh: struct omap_hwmod *
2422 *
2423 * Place an IP block represented by @oh into a "post-setup" state --
2424 * either IDLE, ENABLED, or DISABLED. ("post-setup" simply means that
2425 * this function is called at the end of _setup().) The postsetup
2426 * state for an IP block can be changed by calling
2427 * omap_hwmod_enter_postsetup_state() early in the boot process,
2428 * before one of the omap_hwmod_setup*() functions are called for the
2429 * IP block.
2430 *
2431 * The IP block stays in this state until a PM runtime-based driver is
2432 * loaded for that IP block. A post-setup state of IDLE is
2433 * appropriate for almost all IP blocks with runtime PM-enabled
2434 * drivers, since those drivers are able to enable the IP block. A
2435 * post-setup state of ENABLED is appropriate for kernels with PM
2436 * runtime disabled. The DISABLED state is appropriate for unusual IP
2437 * blocks such as the MPU WDTIMER on kernels without WDTIMER drivers
2438 * included, since the WDTIMER starts running on reset and will reset
2439 * the MPU if left active.
2440 *
2441 * This post-setup mechanism is deprecated. Once all of the OMAP
2442 * drivers have been converted to use PM runtime, and all of the IP
2443 * block data and interconnect data is available to the hwmod code, it
2444 * should be possible to replace this mechanism with a "lazy reset"
2445 * arrangement. In a "lazy reset" setup, each IP block is enabled
2446 * when the driver first probes, then all remaining IP blocks without
2447 * drivers are either shut down or enabled after the drivers have
2448 * loaded. However, this cannot take place until the above
2449 * preconditions have been met, since otherwise the late reset code
2450 * has no way of knowing which IP blocks are in use by drivers, and
2451 * which ones are unused.
2452 *
2453 * No return value.
2454 */
2455static void __init _setup_postsetup(struct omap_hwmod *oh)
2456{
2457 u8 postsetup_state;
2458
2459 if (oh->rst_lines_cnt > 0)
2460 return;
2461
2462 postsetup_state = oh->_postsetup_state;
2463 if (postsetup_state == _HWMOD_STATE_UNKNOWN)
2464 postsetup_state = _HWMOD_STATE_ENABLED;
2465
2466 /*
2467 * XXX HWMOD_INIT_NO_IDLE does not belong in hwmod data -
2468 * it should be set by the core code as a runtime flag during startup
2469 */
2470 if ((oh->flags & (HWMOD_INIT_NO_IDLE | HWMOD_NO_IDLE)) &&
2471 (postsetup_state == _HWMOD_STATE_IDLE)) {
2472 oh->_int_flags |= _HWMOD_SKIP_ENABLE;
2473 postsetup_state = _HWMOD_STATE_ENABLED;
2474 }
2475
2476 if (postsetup_state == _HWMOD_STATE_IDLE)
2477 _idle(oh);
2478 else if (postsetup_state == _HWMOD_STATE_DISABLED)
2479 _shutdown(oh);
2480 else if (postsetup_state != _HWMOD_STATE_ENABLED)
2481 WARN(1, "hwmod: %s: unknown postsetup state %d! defaulting to enabled\n",
2482 oh->name, postsetup_state);
2483
2484 return;
2485}
2486
2487/**
2488 * _setup - prepare IP block hardware for use
2489 * @oh: struct omap_hwmod *
2490 * @n: (unused, pass NULL)
2491 *
2492 * Configure the IP block represented by @oh. This may include
2493 * enabling the IP block, resetting it, and placing it into a
2494 * post-setup state, depending on the type of IP block and applicable
2495 * flags. IP blocks are reset to prevent any previous configuration
2496 * by the bootloader or previous operating system from interfering
2497 * with power management or other parts of the system. The reset can
2498 * be avoided; see omap_hwmod_no_setup_reset(). This is the second of
2499 * two phases for hwmod initialization. Code called here generally
2500 * affects the IP block hardware, or system integration hardware
2501 * associated with the IP block. Returns 0.
2502 */
2503static int _setup(struct omap_hwmod *oh, void *data)
2504{
2505 if (oh->_state != _HWMOD_STATE_INITIALIZED)
2506 return 0;
2507
2508 if (oh->parent_hwmod) {
2509 int r;
2510
2511 r = _enable(oh->parent_hwmod);
2512 WARN(r, "hwmod: %s: setup: failed to enable parent hwmod %s\n",
2513 oh->name, oh->parent_hwmod->name);
2514 }
2515
2516 _setup_iclk_autoidle(oh);
2517
2518 if (!_setup_reset(oh))
2519 _setup_postsetup(oh);
2520
2521 if (oh->parent_hwmod) {
2522 u8 postsetup_state;
2523
2524 postsetup_state = oh->parent_hwmod->_postsetup_state;
2525
2526 if (postsetup_state == _HWMOD_STATE_IDLE)
2527 _idle(oh->parent_hwmod);
2528 else if (postsetup_state == _HWMOD_STATE_DISABLED)
2529 _shutdown(oh->parent_hwmod);
2530 else if (postsetup_state != _HWMOD_STATE_ENABLED)
2531 WARN(1, "hwmod: %s: unknown postsetup state %d! defaulting to enabled\n",
2532 oh->parent_hwmod->name, postsetup_state);
2533 }
2534
2535 return 0;
2536}
2537
2538/**
2539 * _register - register a struct omap_hwmod
2540 * @oh: struct omap_hwmod *
2541 *
2542 * Registers the omap_hwmod @oh. Returns -EEXIST if an omap_hwmod
2543 * already has been registered by the same name; -EINVAL if the
2544 * omap_hwmod is in the wrong state, if @oh is NULL, if the
2545 * omap_hwmod's class field is NULL; if the omap_hwmod is missing a
2546 * name, or if the omap_hwmod's class is missing a name; or 0 upon
2547 * success.
2548 *
2549 * XXX The data should be copied into bootmem, so the original data
2550 * should be marked __initdata and freed after init. This would allow
2551 * unneeded omap_hwmods to be freed on multi-OMAP configurations. Note
2552 * that the copy process would be relatively complex due to the large number
2553 * of substructures.
2554 */
2555static int __init _register(struct omap_hwmod *oh)
2556{
2557 if (!oh || !oh->name || !oh->class || !oh->class->name ||
2558 (oh->_state != _HWMOD_STATE_UNKNOWN))
2559 return -EINVAL;
2560
2561 pr_debug("omap_hwmod: %s: registering\n", oh->name);
2562
2563 if (_lookup(oh->name))
2564 return -EEXIST;
2565
2566 list_add_tail(&oh->node, &omap_hwmod_list);
2567
2568 INIT_LIST_HEAD(&oh->slave_ports);
2569 spin_lock_init(&oh->_lock);
2570 lockdep_set_class(&oh->_lock, &oh->hwmod_key);
2571
2572 oh->_state = _HWMOD_STATE_REGISTERED;
2573
2574 /*
2575 * XXX Rather than doing a strcmp(), this should test a flag
2576 * set in the hwmod data, inserted by the autogenerator code.
2577 */
2578 if (!strcmp(oh->name, MPU_INITIATOR_NAME))
2579 mpu_oh = oh;
2580
2581 return 0;
2582}
2583
2584/**
2585 * _add_link - add an interconnect between two IP blocks
2586 * @oi: pointer to a struct omap_hwmod_ocp_if record
2587 *
2588 * Add struct omap_hwmod_link records connecting the slave IP block
2589 * specified in @oi->slave to @oi. This code is assumed to run before
2590 * preemption or SMP has been enabled, thus avoiding the need for
2591 * locking in this code. Changes to this assumption will require
2592 * additional locking. Returns 0.
2593 */
2594static int __init _add_link(struct omap_hwmod_ocp_if *oi)
2595{
2596 pr_debug("omap_hwmod: %s -> %s: adding link\n", oi->master->name,
2597 oi->slave->name);
2598
2599 list_add(&oi->node, &oi->slave->slave_ports);
2600 oi->slave->slaves_cnt++;
2601
2602 return 0;
2603}
2604
2605/**
2606 * _register_link - register a struct omap_hwmod_ocp_if
2607 * @oi: struct omap_hwmod_ocp_if *
2608 *
2609 * Registers the omap_hwmod_ocp_if record @oi. Returns -EEXIST if it
2610 * has already been registered; -EINVAL if @oi is NULL or if the
2611 * record pointed to by @oi is missing required fields; or 0 upon
2612 * success.
2613 *
2614 * XXX The data should be copied into bootmem, so the original data
2615 * should be marked __initdata and freed after init. This would allow
2616 * unneeded omap_hwmods to be freed on multi-OMAP configurations.
2617 */
2618static int __init _register_link(struct omap_hwmod_ocp_if *oi)
2619{
2620 if (!oi || !oi->master || !oi->slave || !oi->user)
2621 return -EINVAL;
2622
2623 if (oi->_int_flags & _OCPIF_INT_FLAGS_REGISTERED)
2624 return -EEXIST;
2625
2626 pr_debug("omap_hwmod: registering link from %s to %s\n",
2627 oi->master->name, oi->slave->name);
2628
2629 /*
2630 * Register the connected hwmods, if they haven't been
2631 * registered already
2632 */
2633 if (oi->master->_state != _HWMOD_STATE_REGISTERED)
2634 _register(oi->master);
2635
2636 if (oi->slave->_state != _HWMOD_STATE_REGISTERED)
2637 _register(oi->slave);
2638
2639 _add_link(oi);
2640
2641 oi->_int_flags |= _OCPIF_INT_FLAGS_REGISTERED;
2642
2643 return 0;
2644}
2645
2646/* Static functions intended only for use in soc_ops field function pointers */
2647
2648/**
2649 * _omap2xxx_3xxx_wait_target_ready - wait for a module to leave slave idle
2650 * @oh: struct omap_hwmod *
2651 *
2652 * Wait for a module @oh to leave slave idle. Returns 0 if the module
2653 * does not have an IDLEST bit or if the module successfully leaves
2654 * slave idle; otherwise, pass along the return value of the
2655 * appropriate *_cm*_wait_module_ready() function.
2656 */
2657static int _omap2xxx_3xxx_wait_target_ready(struct omap_hwmod *oh)
2658{
2659 if (!oh)
2660 return -EINVAL;
2661
2662 if (oh->flags & HWMOD_NO_IDLEST)
2663 return 0;
2664
2665 if (!_find_mpu_rt_port(oh))
2666 return 0;
2667
2668 /* XXX check module SIDLEMODE, hardreset status, enabled clocks */
2669
2670 return omap_cm_wait_module_ready(0, oh->prcm.omap2.module_offs,
2671 oh->prcm.omap2.idlest_reg_id,
2672 oh->prcm.omap2.idlest_idle_bit);
2673}
2674
2675/**
2676 * _omap4_wait_target_ready - wait for a module to leave slave idle
2677 * @oh: struct omap_hwmod *
2678 *
2679 * Wait for a module @oh to leave slave idle. Returns 0 if the module
2680 * does not have an IDLEST bit or if the module successfully leaves
2681 * slave idle; otherwise, pass along the return value of the
2682 * appropriate *_cm*_wait_module_ready() function.
2683 */
2684static int _omap4_wait_target_ready(struct omap_hwmod *oh)
2685{
2686 if (!oh)
2687 return -EINVAL;
2688
2689 if (oh->flags & HWMOD_NO_IDLEST || !oh->clkdm)
2690 return 0;
2691
2692 if (!_find_mpu_rt_port(oh))
2693 return 0;
2694
2695 if (_omap4_clkctrl_managed_by_clkfwk(oh))
2696 return 0;
2697
2698 if (!_omap4_has_clkctrl_clock(oh))
2699 return 0;
2700
2701 /* XXX check module SIDLEMODE, hardreset status */
2702
2703 return omap_cm_wait_module_ready(oh->clkdm->prcm_partition,
2704 oh->clkdm->cm_inst,
2705 oh->prcm.omap4.clkctrl_offs, 0);
2706}
2707
2708/**
2709 * _omap2_assert_hardreset - call OMAP2 PRM hardreset fn with hwmod args
2710 * @oh: struct omap_hwmod * to assert hardreset
2711 * @ohri: hardreset line data
2712 *
2713 * Call omap2_prm_assert_hardreset() with parameters extracted from
2714 * the hwmod @oh and the hardreset line data @ohri. Only intended for
2715 * use as an soc_ops function pointer. Passes along the return value
2716 * from omap2_prm_assert_hardreset(). XXX This function is scheduled
2717 * for removal when the PRM code is moved into drivers/.
2718 */
2719static int _omap2_assert_hardreset(struct omap_hwmod *oh,
2720 struct omap_hwmod_rst_info *ohri)
2721{
2722 return omap_prm_assert_hardreset(ohri->rst_shift, 0,
2723 oh->prcm.omap2.module_offs, 0);
2724}
2725
2726/**
2727 * _omap2_deassert_hardreset - call OMAP2 PRM hardreset fn with hwmod args
2728 * @oh: struct omap_hwmod * to deassert hardreset
2729 * @ohri: hardreset line data
2730 *
2731 * Call omap2_prm_deassert_hardreset() with parameters extracted from
2732 * the hwmod @oh and the hardreset line data @ohri. Only intended for
2733 * use as an soc_ops function pointer. Passes along the return value
2734 * from omap2_prm_deassert_hardreset(). XXX This function is
2735 * scheduled for removal when the PRM code is moved into drivers/.
2736 */
2737static int _omap2_deassert_hardreset(struct omap_hwmod *oh,
2738 struct omap_hwmod_rst_info *ohri)
2739{
2740 return omap_prm_deassert_hardreset(ohri->rst_shift, ohri->st_shift, 0,
2741 oh->prcm.omap2.module_offs, 0, 0);
2742}
2743
2744/**
2745 * _omap2_is_hardreset_asserted - call OMAP2 PRM hardreset fn with hwmod args
2746 * @oh: struct omap_hwmod * to test hardreset
2747 * @ohri: hardreset line data
2748 *
2749 * Call omap2_prm_is_hardreset_asserted() with parameters extracted
2750 * from the hwmod @oh and the hardreset line data @ohri. Only
2751 * intended for use as an soc_ops function pointer. Passes along the
2752 * return value from omap2_prm_is_hardreset_asserted(). XXX This
2753 * function is scheduled for removal when the PRM code is moved into
2754 * drivers/.
2755 */
2756static int _omap2_is_hardreset_asserted(struct omap_hwmod *oh,
2757 struct omap_hwmod_rst_info *ohri)
2758{
2759 return omap_prm_is_hardreset_asserted(ohri->st_shift, 0,
2760 oh->prcm.omap2.module_offs, 0);
2761}
2762
2763/**
2764 * _omap4_assert_hardreset - call OMAP4 PRM hardreset fn with hwmod args
2765 * @oh: struct omap_hwmod * to assert hardreset
2766 * @ohri: hardreset line data
2767 *
2768 * Call omap4_prminst_assert_hardreset() with parameters extracted
2769 * from the hwmod @oh and the hardreset line data @ohri. Only
2770 * intended for use as an soc_ops function pointer. Passes along the
2771 * return value from omap4_prminst_assert_hardreset(). XXX This
2772 * function is scheduled for removal when the PRM code is moved into
2773 * drivers/.
2774 */
2775static int _omap4_assert_hardreset(struct omap_hwmod *oh,
2776 struct omap_hwmod_rst_info *ohri)
2777{
2778 if (!oh->clkdm)
2779 return -EINVAL;
2780
2781 return omap_prm_assert_hardreset(ohri->rst_shift,
2782 oh->clkdm->pwrdm.ptr->prcm_partition,
2783 oh->clkdm->pwrdm.ptr->prcm_offs,
2784 oh->prcm.omap4.rstctrl_offs);
2785}
2786
2787/**
2788 * _omap4_deassert_hardreset - call OMAP4 PRM hardreset fn with hwmod args
2789 * @oh: struct omap_hwmod * to deassert hardreset
2790 * @ohri: hardreset line data
2791 *
2792 * Call omap4_prminst_deassert_hardreset() with parameters extracted
2793 * from the hwmod @oh and the hardreset line data @ohri. Only
2794 * intended for use as an soc_ops function pointer. Passes along the
2795 * return value from omap4_prminst_deassert_hardreset(). XXX This
2796 * function is scheduled for removal when the PRM code is moved into
2797 * drivers/.
2798 */
2799static int _omap4_deassert_hardreset(struct omap_hwmod *oh,
2800 struct omap_hwmod_rst_info *ohri)
2801{
2802 if (!oh->clkdm)
2803 return -EINVAL;
2804
2805 if (ohri->st_shift)
2806 pr_err("omap_hwmod: %s: %s: hwmod data error: OMAP4 does not support st_shift\n",
2807 oh->name, ohri->name);
2808 return omap_prm_deassert_hardreset(ohri->rst_shift, ohri->rst_shift,
2809 oh->clkdm->pwrdm.ptr->prcm_partition,
2810 oh->clkdm->pwrdm.ptr->prcm_offs,
2811 oh->prcm.omap4.rstctrl_offs,
2812 oh->prcm.omap4.rstctrl_offs +
2813 OMAP4_RST_CTRL_ST_OFFSET);
2814}
2815
2816/**
2817 * _omap4_is_hardreset_asserted - call OMAP4 PRM hardreset fn with hwmod args
2818 * @oh: struct omap_hwmod * to test hardreset
2819 * @ohri: hardreset line data
2820 *
2821 * Call omap4_prminst_is_hardreset_asserted() with parameters
2822 * extracted from the hwmod @oh and the hardreset line data @ohri.
2823 * Only intended for use as an soc_ops function pointer. Passes along
2824 * the return value from omap4_prminst_is_hardreset_asserted(). XXX
2825 * This function is scheduled for removal when the PRM code is moved
2826 * into drivers/.
2827 */
2828static int _omap4_is_hardreset_asserted(struct omap_hwmod *oh,
2829 struct omap_hwmod_rst_info *ohri)
2830{
2831 if (!oh->clkdm)
2832 return -EINVAL;
2833
2834 return omap_prm_is_hardreset_asserted(ohri->rst_shift,
2835 oh->clkdm->pwrdm.ptr->
2836 prcm_partition,
2837 oh->clkdm->pwrdm.ptr->prcm_offs,
2838 oh->prcm.omap4.rstctrl_offs);
2839}
2840
2841/**
2842 * _omap4_disable_direct_prcm - disable direct PRCM control for hwmod
2843 * @oh: struct omap_hwmod * to disable control for
2844 *
2845 * Disables direct PRCM clkctrl done by hwmod core. Instead, the hwmod
2846 * will be using its main_clk to enable/disable the module. Returns
2847 * 0 if successful.
2848 */
2849static int _omap4_disable_direct_prcm(struct omap_hwmod *oh)
2850{
2851 if (!oh)
2852 return -EINVAL;
2853
2854 oh->prcm.omap4.flags |= HWMOD_OMAP4_CLKFWK_CLKCTR_CLOCK;
2855
2856 return 0;
2857}
2858
2859/**
2860 * _am33xx_deassert_hardreset - call AM33XX PRM hardreset fn with hwmod args
2861 * @oh: struct omap_hwmod * to deassert hardreset
2862 * @ohri: hardreset line data
2863 *
2864 * Call am33xx_prminst_deassert_hardreset() with parameters extracted
2865 * from the hwmod @oh and the hardreset line data @ohri. Only
2866 * intended for use as an soc_ops function pointer. Passes along the
2867 * return value from am33xx_prminst_deassert_hardreset(). XXX This
2868 * function is scheduled for removal when the PRM code is moved into
2869 * drivers/.
2870 */
2871static int _am33xx_deassert_hardreset(struct omap_hwmod *oh,
2872 struct omap_hwmod_rst_info *ohri)
2873{
2874 return omap_prm_deassert_hardreset(ohri->rst_shift, ohri->st_shift,
2875 oh->clkdm->pwrdm.ptr->prcm_partition,
2876 oh->clkdm->pwrdm.ptr->prcm_offs,
2877 oh->prcm.omap4.rstctrl_offs,
2878 oh->prcm.omap4.rstst_offs);
2879}
2880
2881/* Public functions */
2882
2883u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs)
2884{
2885 if (oh->flags & HWMOD_16BIT_REG)
2886 return readw_relaxed(oh->_mpu_rt_va + reg_offs);
2887 else
2888 return readl_relaxed(oh->_mpu_rt_va + reg_offs);
2889}
2890
2891void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs)
2892{
2893 if (oh->flags & HWMOD_16BIT_REG)
2894 writew_relaxed(v, oh->_mpu_rt_va + reg_offs);
2895 else
2896 writel_relaxed(v, oh->_mpu_rt_va + reg_offs);
2897}
2898
2899/**
2900 * omap_hwmod_softreset - reset a module via SYSCONFIG.SOFTRESET bit
2901 * @oh: struct omap_hwmod *
2902 *
2903 * This is a public function exposed to drivers. Some drivers may need to do
2904 * some settings before and after resetting the device. Those drivers after
2905 * doing the necessary settings could use this function to start a reset by
2906 * setting the SYSCONFIG.SOFTRESET bit.
2907 */
2908int omap_hwmod_softreset(struct omap_hwmod *oh)
2909{
2910 u32 v;
2911 int ret;
2912
2913 if (!oh || !(oh->_sysc_cache))
2914 return -EINVAL;
2915
2916 v = oh->_sysc_cache;
2917 ret = _set_softreset(oh, &v);
2918 if (ret)
2919 goto error;
2920 _write_sysconfig(v, oh);
2921
2922 ret = _clear_softreset(oh, &v);
2923 if (ret)
2924 goto error;
2925 _write_sysconfig(v, oh);
2926
2927error:
2928 return ret;
2929}
2930
2931/**
2932 * omap_hwmod_lookup - look up a registered omap_hwmod by name
2933 * @name: name of the omap_hwmod to look up
2934 *
2935 * Given a @name of an omap_hwmod, return a pointer to the registered
2936 * struct omap_hwmod *, or NULL upon error.
2937 */
2938struct omap_hwmod *omap_hwmod_lookup(const char *name)
2939{
2940 struct omap_hwmod *oh;
2941
2942 if (!name)
2943 return NULL;
2944
2945 oh = _lookup(name);
2946
2947 return oh;
2948}
2949
2950/**
2951 * omap_hwmod_for_each - call function for each registered omap_hwmod
2952 * @fn: pointer to a callback function
2953 * @data: void * data to pass to callback function
2954 *
2955 * Call @fn for each registered omap_hwmod, passing @data to each
2956 * function. @fn must return 0 for success or any other value for
2957 * failure. If @fn returns non-zero, the iteration across omap_hwmods
2958 * will stop and the non-zero return value will be passed to the
2959 * caller of omap_hwmod_for_each(). @fn is called with
2960 * omap_hwmod_for_each() held.
2961 */
2962int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh, void *data),
2963 void *data)
2964{
2965 struct omap_hwmod *temp_oh;
2966 int ret = 0;
2967
2968 if (!fn)
2969 return -EINVAL;
2970
2971 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
2972 ret = (*fn)(temp_oh, data);
2973 if (ret)
2974 break;
2975 }
2976
2977 return ret;
2978}
2979
2980/**
2981 * omap_hwmod_register_links - register an array of hwmod links
2982 * @ois: pointer to an array of omap_hwmod_ocp_if to register
2983 *
2984 * Intended to be called early in boot before the clock framework is
2985 * initialized. If @ois is not null, will register all omap_hwmods
2986 * listed in @ois that are valid for this chip. Returns -EINVAL if
2987 * omap_hwmod_init() hasn't been called before calling this function,
2988 * -ENOMEM if the link memory area can't be allocated, or 0 upon
2989 * success.
2990 */
2991int __init omap_hwmod_register_links(struct omap_hwmod_ocp_if **ois)
2992{
2993 int r, i;
2994
2995 if (!inited)
2996 return -EINVAL;
2997
2998 if (!ois)
2999 return 0;
3000
3001 if (ois[0] == NULL) /* Empty list */
3002 return 0;
3003
3004 i = 0;
3005 do {
3006 r = _register_link(ois[i]);
3007 WARN(r && r != -EEXIST,
3008 "omap_hwmod: _register_link(%s -> %s) returned %d\n",
3009 ois[i]->master->name, ois[i]->slave->name, r);
3010 } while (ois[++i]);
3011
3012 return 0;
3013}
3014
3015/**
3016 * _ensure_mpu_hwmod_is_setup - ensure the MPU SS hwmod is init'ed and set up
3017 * @oh: pointer to the hwmod currently being set up (usually not the MPU)
3018 *
3019 * If the hwmod data corresponding to the MPU subsystem IP block
3020 * hasn't been initialized and set up yet, do so now. This must be
3021 * done first since sleep dependencies may be added from other hwmods
3022 * to the MPU. Intended to be called only by omap_hwmod_setup*(). No
3023 * return value.
3024 */
3025static void __init _ensure_mpu_hwmod_is_setup(struct omap_hwmod *oh)
3026{
3027 if (!mpu_oh || mpu_oh->_state == _HWMOD_STATE_UNKNOWN)
3028 pr_err("omap_hwmod: %s: MPU initiator hwmod %s not yet registered\n",
3029 __func__, MPU_INITIATOR_NAME);
3030 else if (mpu_oh->_state == _HWMOD_STATE_REGISTERED && oh != mpu_oh)
3031 omap_hwmod_setup_one(MPU_INITIATOR_NAME);
3032}
3033
3034/**
3035 * omap_hwmod_setup_one - set up a single hwmod
3036 * @oh_name: const char * name of the already-registered hwmod to set up
3037 *
3038 * Initialize and set up a single hwmod. Intended to be used for a
3039 * small number of early devices, such as the timer IP blocks used for
3040 * the scheduler clock. Must be called after omap2_clk_init().
3041 * Resolves the struct clk names to struct clk pointers for each
3042 * registered omap_hwmod. Also calls _setup() on each hwmod. Returns
3043 * -EINVAL upon error or 0 upon success.
3044 */
3045int __init omap_hwmod_setup_one(const char *oh_name)
3046{
3047 struct omap_hwmod *oh;
3048
3049 pr_debug("omap_hwmod: %s: %s\n", oh_name, __func__);
3050
3051 oh = _lookup(oh_name);
3052 if (!oh) {
3053 WARN(1, "omap_hwmod: %s: hwmod not yet registered\n", oh_name);
3054 return -EINVAL;
3055 }
3056
3057 _ensure_mpu_hwmod_is_setup(oh);
3058
3059 _init(oh, NULL);
3060 _setup(oh, NULL);
3061
3062 return 0;
3063}
3064
3065static void omap_hwmod_check_one(struct device *dev,
3066 const char *name, s8 v1, u8 v2)
3067{
3068 if (v1 < 0)
3069 return;
3070
3071 if (v1 != v2)
3072 dev_warn(dev, "%s %d != %d\n", name, v1, v2);
3073}
3074
3075/**
3076 * omap_hwmod_check_sysc - check sysc against platform sysc
3077 * @dev: struct device
3078 * @data: module data
3079 * @sysc_fields: new sysc configuration
3080 */
3081static int omap_hwmod_check_sysc(struct device *dev,
3082 const struct ti_sysc_module_data *data,
3083 struct sysc_regbits *sysc_fields)
3084{
3085 const struct sysc_regbits *regbits = data->cap->regbits;
3086
3087 omap_hwmod_check_one(dev, "dmadisable_shift",
3088 regbits->dmadisable_shift,
3089 sysc_fields->dmadisable_shift);
3090 omap_hwmod_check_one(dev, "midle_shift",
3091 regbits->midle_shift,
3092 sysc_fields->midle_shift);
3093 omap_hwmod_check_one(dev, "sidle_shift",
3094 regbits->sidle_shift,
3095 sysc_fields->sidle_shift);
3096 omap_hwmod_check_one(dev, "clkact_shift",
3097 regbits->clkact_shift,
3098 sysc_fields->clkact_shift);
3099 omap_hwmod_check_one(dev, "enwkup_shift",
3100 regbits->enwkup_shift,
3101 sysc_fields->enwkup_shift);
3102 omap_hwmod_check_one(dev, "srst_shift",
3103 regbits->srst_shift,
3104 sysc_fields->srst_shift);
3105 omap_hwmod_check_one(dev, "autoidle_shift",
3106 regbits->autoidle_shift,
3107 sysc_fields->autoidle_shift);
3108
3109 return 0;
3110}
3111
3112/**
3113 * omap_hwmod_init_regbits - init sysconfig specific register bits
3114 * @dev: struct device
3115 * @data: module data
3116 * @sysc_fields: new sysc configuration
3117 */
3118static int omap_hwmod_init_regbits(struct device *dev,
3119 const struct ti_sysc_module_data *data,
3120 struct sysc_regbits **sysc_fields)
3121{
3122 *sysc_fields = NULL;
3123
3124 switch (data->cap->type) {
3125 case TI_SYSC_OMAP2:
3126 case TI_SYSC_OMAP2_TIMER:
3127 *sysc_fields = &omap_hwmod_sysc_type1;
3128 break;
3129 case TI_SYSC_OMAP3_SHAM:
3130 *sysc_fields = &omap3_sham_sysc_fields;
3131 break;
3132 case TI_SYSC_OMAP3_AES:
3133 *sysc_fields = &omap3xxx_aes_sysc_fields;
3134 break;
3135 case TI_SYSC_OMAP4:
3136 case TI_SYSC_OMAP4_TIMER:
3137 *sysc_fields = &omap_hwmod_sysc_type2;
3138 break;
3139 case TI_SYSC_OMAP4_SIMPLE:
3140 *sysc_fields = &omap_hwmod_sysc_type3;
3141 break;
3142 case TI_SYSC_OMAP34XX_SR:
3143 *sysc_fields = &omap34xx_sr_sysc_fields;
3144 break;
3145 case TI_SYSC_OMAP36XX_SR:
3146 *sysc_fields = &omap36xx_sr_sysc_fields;
3147 break;
3148 case TI_SYSC_OMAP4_SR:
3149 *sysc_fields = &omap36xx_sr_sysc_fields;
3150 break;
3151 case TI_SYSC_OMAP4_MCASP:
3152 *sysc_fields = &omap_hwmod_sysc_type_mcasp;
3153 break;
3154 case TI_SYSC_OMAP4_USB_HOST_FS:
3155 *sysc_fields = &omap_hwmod_sysc_type_usb_host_fs;
3156 break;
3157 default:
3158 return -EINVAL;
3159 }
3160
3161 return omap_hwmod_check_sysc(dev, data, *sysc_fields);
3162}
3163
3164/**
3165 * omap_hwmod_init_reg_offs - initialize sysconfig register offsets
3166 * @dev: struct device
3167 * @data: module data
3168 * @rev_offs: revision register offset
3169 * @sysc_offs: sysc register offset
3170 * @syss_offs: syss register offset
3171 */
3172int omap_hwmod_init_reg_offs(struct device *dev,
3173 const struct ti_sysc_module_data *data,
3174 u32 *rev_offs, u32 *sysc_offs, u32 *syss_offs)
3175{
3176 *rev_offs = 0;
3177 *sysc_offs = 0;
3178 *syss_offs = 0;
3179
3180 if (data->offsets[SYSC_REVISION] > 0)
3181 *rev_offs = data->offsets[SYSC_REVISION];
3182
3183 if (data->offsets[SYSC_SYSCONFIG] > 0)
3184 *sysc_offs = data->offsets[SYSC_SYSCONFIG];
3185
3186 if (data->offsets[SYSC_SYSSTATUS] > 0)
3187 *syss_offs = data->offsets[SYSC_SYSSTATUS];
3188
3189 return 0;
3190}
3191
3192/**
3193 * omap_hwmod_init_sysc_flags - initialize sysconfig features
3194 * @dev: struct device
3195 * @data: module data
3196 * @sysc_flags: module configuration
3197 */
3198int omap_hwmod_init_sysc_flags(struct device *dev,
3199 const struct ti_sysc_module_data *data,
3200 u32 *sysc_flags)
3201{
3202 *sysc_flags = 0;
3203
3204 switch (data->cap->type) {
3205 case TI_SYSC_OMAP2:
3206 case TI_SYSC_OMAP2_TIMER:
3207 /* See SYSC_OMAP2_* in include/dt-bindings/bus/ti-sysc.h */
3208 if (data->cfg->sysc_val & SYSC_OMAP2_CLOCKACTIVITY)
3209 *sysc_flags |= SYSC_HAS_CLOCKACTIVITY;
3210 if (data->cfg->sysc_val & SYSC_OMAP2_EMUFREE)
3211 *sysc_flags |= SYSC_HAS_EMUFREE;
3212 if (data->cfg->sysc_val & SYSC_OMAP2_ENAWAKEUP)
3213 *sysc_flags |= SYSC_HAS_ENAWAKEUP;
3214 if (data->cfg->sysc_val & SYSC_OMAP2_SOFTRESET)
3215 *sysc_flags |= SYSC_HAS_SOFTRESET;
3216 if (data->cfg->sysc_val & SYSC_OMAP2_AUTOIDLE)
3217 *sysc_flags |= SYSC_HAS_AUTOIDLE;
3218 break;
3219 case TI_SYSC_OMAP4:
3220 case TI_SYSC_OMAP4_TIMER:
3221 /* See SYSC_OMAP4_* in include/dt-bindings/bus/ti-sysc.h */
3222 if (data->cfg->sysc_val & SYSC_OMAP4_DMADISABLE)
3223 *sysc_flags |= SYSC_HAS_DMADISABLE;
3224 if (data->cfg->sysc_val & SYSC_OMAP4_FREEEMU)
3225 *sysc_flags |= SYSC_HAS_EMUFREE;
3226 if (data->cfg->sysc_val & SYSC_OMAP4_SOFTRESET)
3227 *sysc_flags |= SYSC_HAS_SOFTRESET;
3228 break;
3229 case TI_SYSC_OMAP34XX_SR:
3230 case TI_SYSC_OMAP36XX_SR:
3231 /* See SYSC_OMAP3_SR_* in include/dt-bindings/bus/ti-sysc.h */
3232 if (data->cfg->sysc_val & SYSC_OMAP3_SR_ENAWAKEUP)
3233 *sysc_flags |= SYSC_HAS_ENAWAKEUP;
3234 break;
3235 default:
3236 if (data->cap->regbits->emufree_shift >= 0)
3237 *sysc_flags |= SYSC_HAS_EMUFREE;
3238 if (data->cap->regbits->enwkup_shift >= 0)
3239 *sysc_flags |= SYSC_HAS_ENAWAKEUP;
3240 if (data->cap->regbits->srst_shift >= 0)
3241 *sysc_flags |= SYSC_HAS_SOFTRESET;
3242 if (data->cap->regbits->autoidle_shift >= 0)
3243 *sysc_flags |= SYSC_HAS_AUTOIDLE;
3244 break;
3245 }
3246
3247 if (data->cap->regbits->midle_shift >= 0 &&
3248 data->cfg->midlemodes)
3249 *sysc_flags |= SYSC_HAS_MIDLEMODE;
3250
3251 if (data->cap->regbits->sidle_shift >= 0 &&
3252 data->cfg->sidlemodes)
3253 *sysc_flags |= SYSC_HAS_SIDLEMODE;
3254
3255 if (data->cfg->quirks & SYSC_QUIRK_UNCACHED)
3256 *sysc_flags |= SYSC_NO_CACHE;
3257 if (data->cfg->quirks & SYSC_QUIRK_RESET_STATUS)
3258 *sysc_flags |= SYSC_HAS_RESET_STATUS;
3259
3260 if (data->cfg->syss_mask & 1)
3261 *sysc_flags |= SYSS_HAS_RESET_STATUS;
3262
3263 return 0;
3264}
3265
3266/**
3267 * omap_hwmod_init_idlemodes - initialize module idle modes
3268 * @dev: struct device
3269 * @data: module data
3270 * @idlemodes: module supported idle modes
3271 */
3272int omap_hwmod_init_idlemodes(struct device *dev,
3273 const struct ti_sysc_module_data *data,
3274 u32 *idlemodes)
3275{
3276 *idlemodes = 0;
3277
3278 if (data->cfg->midlemodes & BIT(SYSC_IDLE_FORCE))
3279 *idlemodes |= MSTANDBY_FORCE;
3280 if (data->cfg->midlemodes & BIT(SYSC_IDLE_NO))
3281 *idlemodes |= MSTANDBY_NO;
3282 if (data->cfg->midlemodes & BIT(SYSC_IDLE_SMART))
3283 *idlemodes |= MSTANDBY_SMART;
3284 if (data->cfg->midlemodes & BIT(SYSC_IDLE_SMART_WKUP))
3285 *idlemodes |= MSTANDBY_SMART_WKUP;
3286
3287 if (data->cfg->sidlemodes & BIT(SYSC_IDLE_FORCE))
3288 *idlemodes |= SIDLE_FORCE;
3289 if (data->cfg->sidlemodes & BIT(SYSC_IDLE_NO))
3290 *idlemodes |= SIDLE_NO;
3291 if (data->cfg->sidlemodes & BIT(SYSC_IDLE_SMART))
3292 *idlemodes |= SIDLE_SMART;
3293 if (data->cfg->sidlemodes & BIT(SYSC_IDLE_SMART_WKUP))
3294 *idlemodes |= SIDLE_SMART_WKUP;
3295
3296 return 0;
3297}
3298
3299/**
3300 * omap_hwmod_check_module - check new module against platform data
3301 * @dev: struct device
3302 * @oh: module
3303 * @data: new module data
3304 * @sysc_fields: sysc register bits
3305 * @rev_offs: revision register offset
3306 * @sysc_offs: sysconfig register offset
3307 * @syss_offs: sysstatus register offset
3308 * @sysc_flags: sysc specific flags
3309 * @idlemodes: sysc supported idlemodes
3310 */
3311static int omap_hwmod_check_module(struct device *dev,
3312 struct omap_hwmod *oh,
3313 const struct ti_sysc_module_data *data,
3314 struct sysc_regbits *sysc_fields,
3315 u32 rev_offs, u32 sysc_offs,
3316 u32 syss_offs, u32 sysc_flags,
3317 u32 idlemodes)
3318{
3319 if (!oh->class->sysc)
3320 return -ENODEV;
3321
3322 if (sysc_fields != oh->class->sysc->sysc_fields)
3323 dev_warn(dev, "sysc_fields %p != %p\n", sysc_fields,
3324 oh->class->sysc->sysc_fields);
3325
3326 if (rev_offs != oh->class->sysc->rev_offs)
3327 dev_warn(dev, "rev_offs %08x != %08x\n", rev_offs,
3328 oh->class->sysc->rev_offs);
3329 if (sysc_offs != oh->class->sysc->sysc_offs)
3330 dev_warn(dev, "sysc_offs %08x != %08x\n", sysc_offs,
3331 oh->class->sysc->sysc_offs);
3332 if (syss_offs != oh->class->sysc->syss_offs)
3333 dev_warn(dev, "syss_offs %08x != %08x\n", syss_offs,
3334 oh->class->sysc->syss_offs);
3335
3336 if (sysc_flags != oh->class->sysc->sysc_flags)
3337 dev_warn(dev, "sysc_flags %08x != %08x\n", sysc_flags,
3338 oh->class->sysc->sysc_flags);
3339
3340 if (idlemodes != oh->class->sysc->idlemodes)
3341 dev_warn(dev, "idlemodes %08x != %08x\n", idlemodes,
3342 oh->class->sysc->idlemodes);
3343
3344 if (data->cfg->srst_udelay != oh->class->sysc->srst_udelay)
3345 dev_warn(dev, "srst_udelay %i != %i\n",
3346 data->cfg->srst_udelay,
3347 oh->class->sysc->srst_udelay);
3348
3349 return 0;
3350}
3351
3352/**
3353 * omap_hwmod_allocate_module - allocate new module
3354 * @dev: struct device
3355 * @oh: module
3356 * @sysc_fields: sysc register bits
3357 * @rev_offs: revision register offset
3358 * @sysc_offs: sysconfig register offset
3359 * @syss_offs: sysstatus register offset
3360 * @sysc_flags: sysc specific flags
3361 * @idlemodes: sysc supported idlemodes
3362 *
3363 * Note that the allocations here cannot use devm as ti-sysc can rebind.
3364 */
3365int omap_hwmod_allocate_module(struct device *dev, struct omap_hwmod *oh,
3366 const struct ti_sysc_module_data *data,
3367 struct sysc_regbits *sysc_fields,
3368 u32 rev_offs, u32 sysc_offs, u32 syss_offs,
3369 u32 sysc_flags, u32 idlemodes)
3370{
3371 struct omap_hwmod_class_sysconfig *sysc;
3372 struct omap_hwmod_class *class;
3373 void __iomem *regs = NULL;
3374 unsigned long flags;
3375
3376 sysc = kzalloc(sizeof(*sysc), GFP_KERNEL);
3377 if (!sysc)
3378 return -ENOMEM;
3379
3380 sysc->sysc_fields = sysc_fields;
3381 sysc->rev_offs = rev_offs;
3382 sysc->sysc_offs = sysc_offs;
3383 sysc->syss_offs = syss_offs;
3384 sysc->sysc_flags = sysc_flags;
3385 sysc->idlemodes = idlemodes;
3386 sysc->srst_udelay = data->cfg->srst_udelay;
3387
3388 if (!oh->_mpu_rt_va) {
3389 regs = ioremap(data->module_pa,
3390 data->module_size);
3391 if (!regs)
3392 return -ENOMEM;
3393 }
3394
3395 /*
3396 * We need new oh->class as the other devices in the same class
3397 * may not yet have ioremapped their registers.
3398 */
3399 class = kmemdup(oh->class, sizeof(*oh->class), GFP_KERNEL);
3400 if (!class)
3401 return -ENOMEM;
3402
3403 class->sysc = sysc;
3404
3405 spin_lock_irqsave(&oh->_lock, flags);
3406 if (regs)
3407 oh->_mpu_rt_va = regs;
3408 oh->class = class;
3409 oh->_state = _HWMOD_STATE_INITIALIZED;
3410 _setup(oh, NULL);
3411 spin_unlock_irqrestore(&oh->_lock, flags);
3412
3413 return 0;
3414}
3415
3416/**
3417 * omap_hwmod_init_module - initialize new module
3418 * @dev: struct device
3419 * @data: module data
3420 * @cookie: cookie for the caller to use for later calls
3421 */
3422int omap_hwmod_init_module(struct device *dev,
3423 const struct ti_sysc_module_data *data,
3424 struct ti_sysc_cookie *cookie)
3425{
3426 struct omap_hwmod *oh;
3427 struct sysc_regbits *sysc_fields;
3428 u32 rev_offs, sysc_offs, syss_offs, sysc_flags, idlemodes;
3429 int error;
3430
3431 if (!dev || !data)
3432 return -EINVAL;
3433
3434 oh = _lookup(data->name);
3435 if (!oh)
3436 return -ENODEV;
3437
3438 cookie->data = oh;
3439
3440 error = omap_hwmod_init_regbits(dev, data, &sysc_fields);
3441 if (error)
3442 return error;
3443
3444 error = omap_hwmod_init_reg_offs(dev, data, &rev_offs,
3445 &sysc_offs, &syss_offs);
3446 if (error)
3447 return error;
3448
3449 error = omap_hwmod_init_sysc_flags(dev, data, &sysc_flags);
3450 if (error)
3451 return error;
3452
3453 error = omap_hwmod_init_idlemodes(dev, data, &idlemodes);
3454 if (error)
3455 return error;
3456
3457 if (data->cfg->quirks & SYSC_QUIRK_NO_IDLE_ON_INIT)
3458 oh->flags |= HWMOD_INIT_NO_IDLE;
3459 if (data->cfg->quirks & SYSC_QUIRK_NO_RESET_ON_INIT)
3460 oh->flags |= HWMOD_INIT_NO_RESET;
3461
3462 error = omap_hwmod_check_module(dev, oh, data, sysc_fields,
3463 rev_offs, sysc_offs, syss_offs,
3464 sysc_flags, idlemodes);
3465 if (!error)
3466 return error;
3467
3468 return omap_hwmod_allocate_module(dev, oh, data, sysc_fields,
3469 rev_offs, sysc_offs, syss_offs,
3470 sysc_flags, idlemodes);
3471}
3472
3473/**
3474 * omap_hwmod_setup_earlycon_flags - set up flags for early console
3475 *
3476 * Enable DEBUG_OMAPUART_FLAGS for uart hwmod that is being used as
3477 * early concole so that hwmod core doesn't reset and keep it in idle
3478 * that specific uart.
3479 */
3480#ifdef CONFIG_SERIAL_EARLYCON
3481static void __init omap_hwmod_setup_earlycon_flags(void)
3482{
3483 struct device_node *np;
3484 struct omap_hwmod *oh;
3485 const char *uart;
3486
3487 np = of_find_node_by_path("/chosen");
3488 if (np) {
3489 uart = of_get_property(np, "stdout-path", NULL);
3490 if (uart) {
3491 np = of_find_node_by_path(uart);
3492 if (np) {
3493 uart = of_get_property(np, "ti,hwmods", NULL);
3494 oh = omap_hwmod_lookup(uart);
3495 if (!oh) {
3496 uart = of_get_property(np->parent,
3497 "ti,hwmods",
3498 NULL);
3499 oh = omap_hwmod_lookup(uart);
3500 }
3501 if (oh)
3502 oh->flags |= DEBUG_OMAPUART_FLAGS;
3503 }
3504 }
3505 }
3506}
3507#endif
3508
3509/**
3510 * omap_hwmod_setup_all - set up all registered IP blocks
3511 *
3512 * Initialize and set up all IP blocks registered with the hwmod code.
3513 * Must be called after omap2_clk_init(). Resolves the struct clk
3514 * names to struct clk pointers for each registered omap_hwmod. Also
3515 * calls _setup() on each hwmod. Returns 0 upon success.
3516 */
3517static int __init omap_hwmod_setup_all(void)
3518{
3519 _ensure_mpu_hwmod_is_setup(NULL);
3520
3521 omap_hwmod_for_each(_init, NULL);
3522#ifdef CONFIG_SERIAL_EARLYCON
3523 omap_hwmod_setup_earlycon_flags();
3524#endif
3525 omap_hwmod_for_each(_setup, NULL);
3526
3527 return 0;
3528}
3529omap_postcore_initcall(omap_hwmod_setup_all);
3530
3531/**
3532 * omap_hwmod_enable - enable an omap_hwmod
3533 * @oh: struct omap_hwmod *
3534 *
3535 * Enable an omap_hwmod @oh. Intended to be called by omap_device_enable().
3536 * Returns -EINVAL on error or passes along the return value from _enable().
3537 */
3538int omap_hwmod_enable(struct omap_hwmod *oh)
3539{
3540 int r;
3541 unsigned long flags;
3542
3543 if (!oh)
3544 return -EINVAL;
3545
3546 spin_lock_irqsave(&oh->_lock, flags);
3547 r = _enable(oh);
3548 spin_unlock_irqrestore(&oh->_lock, flags);
3549
3550 return r;
3551}
3552
3553/**
3554 * omap_hwmod_idle - idle an omap_hwmod
3555 * @oh: struct omap_hwmod *
3556 *
3557 * Idle an omap_hwmod @oh. Intended to be called by omap_device_idle().
3558 * Returns -EINVAL on error or passes along the return value from _idle().
3559 */
3560int omap_hwmod_idle(struct omap_hwmod *oh)
3561{
3562 int r;
3563 unsigned long flags;
3564
3565 if (!oh)
3566 return -EINVAL;
3567
3568 spin_lock_irqsave(&oh->_lock, flags);
3569 r = _idle(oh);
3570 spin_unlock_irqrestore(&oh->_lock, flags);
3571
3572 return r;
3573}
3574
3575/**
3576 * omap_hwmod_shutdown - shutdown an omap_hwmod
3577 * @oh: struct omap_hwmod *
3578 *
3579 * Shutdown an omap_hwmod @oh. Intended to be called by
3580 * omap_device_shutdown(). Returns -EINVAL on error or passes along
3581 * the return value from _shutdown().
3582 */
3583int omap_hwmod_shutdown(struct omap_hwmod *oh)
3584{
3585 int r;
3586 unsigned long flags;
3587
3588 if (!oh)
3589 return -EINVAL;
3590
3591 spin_lock_irqsave(&oh->_lock, flags);
3592 r = _shutdown(oh);
3593 spin_unlock_irqrestore(&oh->_lock, flags);
3594
3595 return r;
3596}
3597
3598/*
3599 * IP block data retrieval functions
3600 */
3601
3602/**
3603 * omap_hwmod_get_pwrdm - return pointer to this module's main powerdomain
3604 * @oh: struct omap_hwmod *
3605 *
3606 * Return the powerdomain pointer associated with the OMAP module
3607 * @oh's main clock. If @oh does not have a main clk, return the
3608 * powerdomain associated with the interface clock associated with the
3609 * module's MPU port. (XXX Perhaps this should use the SDMA port
3610 * instead?) Returns NULL on error, or a struct powerdomain * on
3611 * success.
3612 */
3613struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh)
3614{
3615 struct clk *c;
3616 struct omap_hwmod_ocp_if *oi;
3617 struct clockdomain *clkdm;
3618 struct clk_hw_omap *clk;
3619
3620 if (!oh)
3621 return NULL;
3622
3623 if (oh->clkdm)
3624 return oh->clkdm->pwrdm.ptr;
3625
3626 if (oh->_clk) {
3627 c = oh->_clk;
3628 } else {
3629 oi = _find_mpu_rt_port(oh);
3630 if (!oi)
3631 return NULL;
3632 c = oi->_clk;
3633 }
3634
3635 clk = to_clk_hw_omap(__clk_get_hw(c));
3636 clkdm = clk->clkdm;
3637 if (!clkdm)
3638 return NULL;
3639
3640 return clkdm->pwrdm.ptr;
3641}
3642
3643/**
3644 * omap_hwmod_get_mpu_rt_va - return the module's base address (for the MPU)
3645 * @oh: struct omap_hwmod *
3646 *
3647 * Returns the virtual address corresponding to the beginning of the
3648 * module's register target, in the address range that is intended to
3649 * be used by the MPU. Returns the virtual address upon success or NULL
3650 * upon error.
3651 */
3652void __iomem *omap_hwmod_get_mpu_rt_va(struct omap_hwmod *oh)
3653{
3654 if (!oh)
3655 return NULL;
3656
3657 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
3658 return NULL;
3659
3660 if (oh->_state == _HWMOD_STATE_UNKNOWN)
3661 return NULL;
3662
3663 return oh->_mpu_rt_va;
3664}
3665
3666/*
3667 * XXX what about functions for drivers to save/restore ocp_sysconfig
3668 * for context save/restore operations?
3669 */
3670
3671/**
3672 * omap_hwmod_enable_wakeup - allow device to wake up the system
3673 * @oh: struct omap_hwmod *
3674 *
3675 * Sets the module OCP socket ENAWAKEUP bit to allow the module to
3676 * send wakeups to the PRCM, and enable I/O ring wakeup events for
3677 * this IP block if it has dynamic mux entries. Eventually this
3678 * should set PRCM wakeup registers to cause the PRCM to receive
3679 * wakeup events from the module. Does not set any wakeup routing
3680 * registers beyond this point - if the module is to wake up any other
3681 * module or subsystem, that must be set separately. Called by
3682 * omap_device code. Returns -EINVAL on error or 0 upon success.
3683 */
3684int omap_hwmod_enable_wakeup(struct omap_hwmod *oh)
3685{
3686 unsigned long flags;
3687 u32 v;
3688
3689 spin_lock_irqsave(&oh->_lock, flags);
3690
3691 if (oh->class->sysc &&
3692 (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) {
3693 v = oh->_sysc_cache;
3694 _enable_wakeup(oh, &v);
3695 _write_sysconfig(v, oh);
3696 }
3697
3698 spin_unlock_irqrestore(&oh->_lock, flags);
3699
3700 return 0;
3701}
3702
3703/**
3704 * omap_hwmod_disable_wakeup - prevent device from waking the system
3705 * @oh: struct omap_hwmod *
3706 *
3707 * Clears the module OCP socket ENAWAKEUP bit to prevent the module
3708 * from sending wakeups to the PRCM, and disable I/O ring wakeup
3709 * events for this IP block if it has dynamic mux entries. Eventually
3710 * this should clear PRCM wakeup registers to cause the PRCM to ignore
3711 * wakeup events from the module. Does not set any wakeup routing
3712 * registers beyond this point - if the module is to wake up any other
3713 * module or subsystem, that must be set separately. Called by
3714 * omap_device code. Returns -EINVAL on error or 0 upon success.
3715 */
3716int omap_hwmod_disable_wakeup(struct omap_hwmod *oh)
3717{
3718 unsigned long flags;
3719 u32 v;
3720
3721 spin_lock_irqsave(&oh->_lock, flags);
3722
3723 if (oh->class->sysc &&
3724 (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) {
3725 v = oh->_sysc_cache;
3726 _disable_wakeup(oh, &v);
3727 _write_sysconfig(v, oh);
3728 }
3729
3730 spin_unlock_irqrestore(&oh->_lock, flags);
3731
3732 return 0;
3733}
3734
3735/**
3736 * omap_hwmod_assert_hardreset - assert the HW reset line of submodules
3737 * contained in the hwmod module.
3738 * @oh: struct omap_hwmod *
3739 * @name: name of the reset line to lookup and assert
3740 *
3741 * Some IP like dsp, ipu or iva contain processor that require
3742 * an HW reset line to be assert / deassert in order to enable fully
3743 * the IP. Returns -EINVAL if @oh is null or if the operation is not
3744 * yet supported on this OMAP; otherwise, passes along the return value
3745 * from _assert_hardreset().
3746 */
3747int omap_hwmod_assert_hardreset(struct omap_hwmod *oh, const char *name)
3748{
3749 int ret;
3750 unsigned long flags;
3751
3752 if (!oh)
3753 return -EINVAL;
3754
3755 spin_lock_irqsave(&oh->_lock, flags);
3756 ret = _assert_hardreset(oh, name);
3757 spin_unlock_irqrestore(&oh->_lock, flags);
3758
3759 return ret;
3760}
3761
3762/**
3763 * omap_hwmod_deassert_hardreset - deassert the HW reset line of submodules
3764 * contained in the hwmod module.
3765 * @oh: struct omap_hwmod *
3766 * @name: name of the reset line to look up and deassert
3767 *
3768 * Some IP like dsp, ipu or iva contain processor that require
3769 * an HW reset line to be assert / deassert in order to enable fully
3770 * the IP. Returns -EINVAL if @oh is null or if the operation is not
3771 * yet supported on this OMAP; otherwise, passes along the return value
3772 * from _deassert_hardreset().
3773 */
3774int omap_hwmod_deassert_hardreset(struct omap_hwmod *oh, const char *name)
3775{
3776 int ret;
3777 unsigned long flags;
3778
3779 if (!oh)
3780 return -EINVAL;
3781
3782 spin_lock_irqsave(&oh->_lock, flags);
3783 ret = _deassert_hardreset(oh, name);
3784 spin_unlock_irqrestore(&oh->_lock, flags);
3785
3786 return ret;
3787}
3788
3789/**
3790 * omap_hwmod_for_each_by_class - call @fn for each hwmod of class @classname
3791 * @classname: struct omap_hwmod_class name to search for
3792 * @fn: callback function pointer to call for each hwmod in class @classname
3793 * @user: arbitrary context data to pass to the callback function
3794 *
3795 * For each omap_hwmod of class @classname, call @fn.
3796 * If the callback function returns something other than
3797 * zero, the iterator is terminated, and the callback function's return
3798 * value is passed back to the caller. Returns 0 upon success, -EINVAL
3799 * if @classname or @fn are NULL, or passes back the error code from @fn.
3800 */
3801int omap_hwmod_for_each_by_class(const char *classname,
3802 int (*fn)(struct omap_hwmod *oh,
3803 void *user),
3804 void *user)
3805{
3806 struct omap_hwmod *temp_oh;
3807 int ret = 0;
3808
3809 if (!classname || !fn)
3810 return -EINVAL;
3811
3812 pr_debug("omap_hwmod: %s: looking for modules of class %s\n",
3813 __func__, classname);
3814
3815 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
3816 if (!strcmp(temp_oh->class->name, classname)) {
3817 pr_debug("omap_hwmod: %s: %s: calling callback fn\n",
3818 __func__, temp_oh->name);
3819 ret = (*fn)(temp_oh, user);
3820 if (ret)
3821 break;
3822 }
3823 }
3824
3825 if (ret)
3826 pr_debug("omap_hwmod: %s: iterator terminated early: %d\n",
3827 __func__, ret);
3828
3829 return ret;
3830}
3831
3832/**
3833 * omap_hwmod_set_postsetup_state - set the post-_setup() state for this hwmod
3834 * @oh: struct omap_hwmod *
3835 * @state: state that _setup() should leave the hwmod in
3836 *
3837 * Sets the hwmod state that @oh will enter at the end of _setup()
3838 * (called by omap_hwmod_setup_*()). See also the documentation
3839 * for _setup_postsetup(), above. Returns 0 upon success or
3840 * -EINVAL if there is a problem with the arguments or if the hwmod is
3841 * in the wrong state.
3842 */
3843int omap_hwmod_set_postsetup_state(struct omap_hwmod *oh, u8 state)
3844{
3845 int ret;
3846 unsigned long flags;
3847
3848 if (!oh)
3849 return -EINVAL;
3850
3851 if (state != _HWMOD_STATE_DISABLED &&
3852 state != _HWMOD_STATE_ENABLED &&
3853 state != _HWMOD_STATE_IDLE)
3854 return -EINVAL;
3855
3856 spin_lock_irqsave(&oh->_lock, flags);
3857
3858 if (oh->_state != _HWMOD_STATE_REGISTERED) {
3859 ret = -EINVAL;
3860 goto ohsps_unlock;
3861 }
3862
3863 oh->_postsetup_state = state;
3864 ret = 0;
3865
3866ohsps_unlock:
3867 spin_unlock_irqrestore(&oh->_lock, flags);
3868
3869 return ret;
3870}
3871
3872/**
3873 * omap_hwmod_get_context_loss_count - get lost context count
3874 * @oh: struct omap_hwmod *
3875 *
3876 * Returns the context loss count of associated @oh
3877 * upon success, or zero if no context loss data is available.
3878 *
3879 * On OMAP4, this queries the per-hwmod context loss register,
3880 * assuming one exists. If not, or on OMAP2/3, this queries the
3881 * enclosing powerdomain context loss count.
3882 */
3883int omap_hwmod_get_context_loss_count(struct omap_hwmod *oh)
3884{
3885 struct powerdomain *pwrdm;
3886 int ret = 0;
3887
3888 if (soc_ops.get_context_lost)
3889 return soc_ops.get_context_lost(oh);
3890
3891 pwrdm = omap_hwmod_get_pwrdm(oh);
3892 if (pwrdm)
3893 ret = pwrdm_get_context_loss_count(pwrdm);
3894
3895 return ret;
3896}
3897
3898/**
3899 * omap_hwmod_init - initialize the hwmod code
3900 *
3901 * Sets up some function pointers needed by the hwmod code to operate on the
3902 * currently-booted SoC. Intended to be called once during kernel init
3903 * before any hwmods are registered. No return value.
3904 */
3905void __init omap_hwmod_init(void)
3906{
3907 if (cpu_is_omap24xx()) {
3908 soc_ops.wait_target_ready = _omap2xxx_3xxx_wait_target_ready;
3909 soc_ops.assert_hardreset = _omap2_assert_hardreset;
3910 soc_ops.deassert_hardreset = _omap2_deassert_hardreset;
3911 soc_ops.is_hardreset_asserted = _omap2_is_hardreset_asserted;
3912 } else if (cpu_is_omap34xx()) {
3913 soc_ops.wait_target_ready = _omap2xxx_3xxx_wait_target_ready;
3914 soc_ops.assert_hardreset = _omap2_assert_hardreset;
3915 soc_ops.deassert_hardreset = _omap2_deassert_hardreset;
3916 soc_ops.is_hardreset_asserted = _omap2_is_hardreset_asserted;
3917 soc_ops.init_clkdm = _init_clkdm;
3918 } else if (cpu_is_omap44xx() || soc_is_omap54xx() || soc_is_dra7xx()) {
3919 soc_ops.enable_module = _omap4_enable_module;
3920 soc_ops.disable_module = _omap4_disable_module;
3921 soc_ops.wait_target_ready = _omap4_wait_target_ready;
3922 soc_ops.assert_hardreset = _omap4_assert_hardreset;
3923 soc_ops.deassert_hardreset = _omap4_deassert_hardreset;
3924 soc_ops.is_hardreset_asserted = _omap4_is_hardreset_asserted;
3925 soc_ops.init_clkdm = _init_clkdm;
3926 soc_ops.update_context_lost = _omap4_update_context_lost;
3927 soc_ops.get_context_lost = _omap4_get_context_lost;
3928 soc_ops.disable_direct_prcm = _omap4_disable_direct_prcm;
3929 soc_ops.xlate_clkctrl = _omap4_xlate_clkctrl;
3930 } else if (cpu_is_ti814x() || cpu_is_ti816x() || soc_is_am33xx() ||
3931 soc_is_am43xx()) {
3932 soc_ops.enable_module = _omap4_enable_module;
3933 soc_ops.disable_module = _omap4_disable_module;
3934 soc_ops.wait_target_ready = _omap4_wait_target_ready;
3935 soc_ops.assert_hardreset = _omap4_assert_hardreset;
3936 soc_ops.deassert_hardreset = _am33xx_deassert_hardreset;
3937 soc_ops.is_hardreset_asserted = _omap4_is_hardreset_asserted;
3938 soc_ops.init_clkdm = _init_clkdm;
3939 soc_ops.disable_direct_prcm = _omap4_disable_direct_prcm;
3940 soc_ops.xlate_clkctrl = _omap4_xlate_clkctrl;
3941 } else {
3942 WARN(1, "omap_hwmod: unknown SoC type\n");
3943 }
3944
3945 _init_clkctrl_providers();
3946
3947 inited = true;
3948}
3949
3950/**
3951 * omap_hwmod_get_main_clk - get pointer to main clock name
3952 * @oh: struct omap_hwmod *
3953 *
3954 * Returns the main clock name assocated with @oh upon success,
3955 * or NULL if @oh is NULL.
3956 */
3957const char *omap_hwmod_get_main_clk(struct omap_hwmod *oh)
3958{
3959 if (!oh)
3960 return NULL;
3961
3962 return oh->main_clk;
3963}