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v3.15
 
  1/*
  2 * arch/arm/mach-ixp4xx/vulcan-setup.c
  3 *
  4 * Arcom/Eurotech Vulcan board-setup
  5 *
  6 * Copyright (C) 2010 Marc Zyngier <maz@misterjones.org>
  7 *
  8 * based on fsg-setup.c:
  9 *	Copyright (C) 2008 Rod Whitby <rod@whitby.id.au>
 10 */
 11
 12#include <linux/if_ether.h>
 13#include <linux/irq.h>
 14#include <linux/serial.h>
 15#include <linux/serial_8250.h>
 16#include <linux/io.h>
 17#include <linux/w1-gpio.h>
 
 18#include <linux/mtd/plat-ram.h>
 19#include <asm/mach-types.h>
 20#include <asm/mach/arch.h>
 21#include <asm/mach/flash.h>
 22
 23static struct flash_platform_data vulcan_flash_data = {
 24	.map_name	= "cfi_probe",
 25	.width		= 2,
 26};
 27
 28static struct resource vulcan_flash_resource = {
 29	.flags			= IORESOURCE_MEM,
 30};
 31
 32static struct platform_device vulcan_flash = {
 33	.name			= "IXP4XX-Flash",
 34	.id			= 0,
 35	.dev = {
 36		.platform_data	= &vulcan_flash_data,
 37	},
 38	.resource		= &vulcan_flash_resource,
 39	.num_resources		= 1,
 40};
 41
 42static struct platdata_mtd_ram vulcan_sram_data = {
 43	.mapname	= "Vulcan SRAM",
 44	.bankwidth	= 1,
 45};
 46
 47static struct resource vulcan_sram_resource = {
 48	.flags			= IORESOURCE_MEM,
 49};
 50
 51static struct platform_device vulcan_sram = {
 52	.name			= "mtd-ram",
 53	.id			= 0,
 54	.dev = {
 55		.platform_data	= &vulcan_sram_data,
 56	},
 57	.resource		= &vulcan_sram_resource,
 58	.num_resources		= 1,
 59};
 60
 61static struct resource vulcan_uart_resources[] = {
 62	[0] = {
 63		.start		= IXP4XX_UART1_BASE_PHYS,
 64		.end		= IXP4XX_UART1_BASE_PHYS + 0x0fff,
 65		.flags		= IORESOURCE_MEM,
 66	},
 67	[1] = {
 68		.start		= IXP4XX_UART2_BASE_PHYS,
 69		.end		= IXP4XX_UART2_BASE_PHYS + 0x0fff,
 70		.flags		= IORESOURCE_MEM,
 71	},
 72	[2] = {
 73		.flags		= IORESOURCE_MEM,
 74	},
 75};
 76
 77static struct plat_serial8250_port vulcan_uart_data[] = {
 78	[0] = {
 79		.mapbase	= IXP4XX_UART1_BASE_PHYS,
 80		.membase	= (char *)IXP4XX_UART1_BASE_VIRT + REG_OFFSET,
 81		.irq		= IRQ_IXP4XX_UART1,
 82		.flags		= UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
 83		.iotype		= UPIO_MEM,
 84		.regshift	= 2,
 85		.uartclk	= IXP4XX_UART_XTAL,
 86	},
 87	[1] = {
 88		.mapbase	= IXP4XX_UART2_BASE_PHYS,
 89		.membase	= (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET,
 90		.irq		= IRQ_IXP4XX_UART2,
 91		.flags		= UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
 92		.iotype		= UPIO_MEM,
 93		.regshift	= 2,
 94		.uartclk	= IXP4XX_UART_XTAL,
 95	},
 96	[2] = {
 97		.irq		= IXP4XX_GPIO_IRQ(4),
 98		.irqflags	= IRQF_TRIGGER_LOW,
 99		.flags		= UPF_IOREMAP | UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
100		.iotype		= UPIO_MEM,
101		.uartclk	= 1843200,
102	},
103	[3] = {
104		.irq		= IXP4XX_GPIO_IRQ(4),
105		.irqflags	= IRQF_TRIGGER_LOW,
106		.flags		= UPF_IOREMAP | UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
107		.iotype		= UPIO_MEM,
108		.uartclk	= 1843200,
109	},
110	{ }
111};
112
113static struct platform_device vulcan_uart = {
114	.name			= "serial8250",
115	.id			= PLAT8250_DEV_PLATFORM,
116	.dev = {
117		.platform_data	= vulcan_uart_data,
118	},
119	.resource		= vulcan_uart_resources,
120	.num_resources		= ARRAY_SIZE(vulcan_uart_resources),
121};
122
123static struct eth_plat_info vulcan_plat_eth[] = {
124	[0] = {
125		.phy		= 0,
126		.rxq		= 3,
127		.txreadyq	= 20,
128	},
129	[1] = {
130		.phy		= 1,
131		.rxq		= 4,
132		.txreadyq	= 21,
133	},
134};
135
136static struct platform_device vulcan_eth[] = {
137	[0] = {
138		.name			= "ixp4xx_eth",
139		.id			= IXP4XX_ETH_NPEB,
140		.dev = {
141			.platform_data	= &vulcan_plat_eth[0],
142		},
143	},
144	[1] = {
145		.name			= "ixp4xx_eth",
146		.id			= IXP4XX_ETH_NPEC,
147		.dev = {
148			.platform_data	= &vulcan_plat_eth[1],
149		},
150	},
151};
152
153static struct resource vulcan_max6369_resource = {
154	.flags			= IORESOURCE_MEM,
155};
156
157static struct platform_device vulcan_max6369 = {
158	.name			= "max6369_wdt",
159	.id			= -1,
160	.resource		= &vulcan_max6369_resource,
161	.num_resources		= 1,
162};
163
 
 
 
 
 
 
 
 
164static struct w1_gpio_platform_data vulcan_w1_gpio_pdata = {
165	.pin			= 14,
166	.ext_pullup_enable_pin	= -EINVAL,
167};
168
169static struct platform_device vulcan_w1_gpio = {
170	.name			= "w1-gpio",
171	.id			= 0,
172	.dev			= {
173		.platform_data	= &vulcan_w1_gpio_pdata,
174	},
175};
176
177static struct platform_device *vulcan_devices[] __initdata = {
178	&vulcan_uart,
179	&vulcan_flash,
180	&vulcan_sram,
181	&vulcan_max6369,
182	&vulcan_eth[0],
183	&vulcan_eth[1],
184	&vulcan_w1_gpio,
185};
186
187static void __init vulcan_init(void)
188{
189	ixp4xx_sys_init();
190
191	/* Flash is spread over both CS0 and CS1 */
192	vulcan_flash_resource.start	 = IXP4XX_EXP_BUS_BASE(0);
193	vulcan_flash_resource.end	 = IXP4XX_EXP_BUS_BASE(0) + SZ_32M - 1;
194	*IXP4XX_EXP_CS0 = IXP4XX_EXP_BUS_CS_EN		|
195			  IXP4XX_EXP_BUS_STROBE_T(3)	|
196			  IXP4XX_EXP_BUS_SIZE(0xF)	|
197			  IXP4XX_EXP_BUS_BYTE_RD16	|
198			  IXP4XX_EXP_BUS_WR_EN;
199	*IXP4XX_EXP_CS1 = *IXP4XX_EXP_CS0;
200
201	/* SRAM on CS2, (256kB, 8bit, writable) */
202	vulcan_sram_resource.start	= IXP4XX_EXP_BUS_BASE(2);
203	vulcan_sram_resource.end	= IXP4XX_EXP_BUS_BASE(2) + SZ_256K - 1;
204	*IXP4XX_EXP_CS2 = IXP4XX_EXP_BUS_CS_EN		|
205			  IXP4XX_EXP_BUS_STROBE_T(1)	|
206			  IXP4XX_EXP_BUS_HOLD_T(2)	|
207			  IXP4XX_EXP_BUS_SIZE(9)	|
208			  IXP4XX_EXP_BUS_SPLT_EN	|
209			  IXP4XX_EXP_BUS_WR_EN		|
210			  IXP4XX_EXP_BUS_BYTE_EN;
211
212	/* XR16L2551 on CS3 (Moto style, 512 bytes, 8bits, writable) */
213	vulcan_uart_resources[2].start	= IXP4XX_EXP_BUS_BASE(3);
214	vulcan_uart_resources[2].end	= IXP4XX_EXP_BUS_BASE(3) + 16 - 1;
215	vulcan_uart_data[2].mapbase	= vulcan_uart_resources[2].start;
216	vulcan_uart_data[3].mapbase	= vulcan_uart_data[2].mapbase + 8;
217	*IXP4XX_EXP_CS3 = IXP4XX_EXP_BUS_CS_EN		|
218			  IXP4XX_EXP_BUS_STROBE_T(3)	|
219			  IXP4XX_EXP_BUS_CYCLES(IXP4XX_EXP_BUS_CYCLES_MOTOROLA)|
220			  IXP4XX_EXP_BUS_WR_EN		|
221			  IXP4XX_EXP_BUS_BYTE_EN;
222
223	/* GPIOS on CS4 (512 bytes, 8bits, writable) */
224	*IXP4XX_EXP_CS4 = IXP4XX_EXP_BUS_CS_EN		|
225			  IXP4XX_EXP_BUS_WR_EN		|
226			  IXP4XX_EXP_BUS_BYTE_EN;
227
228	/* max6369 on CS5 (512 bytes, 8bits, writable) */
229	vulcan_max6369_resource.start	= IXP4XX_EXP_BUS_BASE(5);
230	vulcan_max6369_resource.end	= IXP4XX_EXP_BUS_BASE(5);
231	*IXP4XX_EXP_CS5 = IXP4XX_EXP_BUS_CS_EN		|
232			  IXP4XX_EXP_BUS_WR_EN		|
233			  IXP4XX_EXP_BUS_BYTE_EN;
234
 
235	platform_add_devices(vulcan_devices, ARRAY_SIZE(vulcan_devices));
236}
237
238MACHINE_START(ARCOM_VULCAN, "Arcom/Eurotech Vulcan")
239	/* Maintainer: Marc Zyngier <maz@misterjones.org> */
240	.map_io		= ixp4xx_map_io,
241	.init_early	= ixp4xx_init_early,
242	.init_irq	= ixp4xx_init_irq,
243	.init_time	= ixp4xx_timer_init,
244	.atag_offset	= 0x100,
245	.init_machine	= vulcan_init,
246#if defined(CONFIG_PCI)
247	.dma_zone_size	= SZ_64M,
248#endif
249	.restart	= ixp4xx_restart,
250MACHINE_END
v4.17
  1// SPDX-License-Identifier: GPL-2.0
  2/*
  3 * arch/arm/mach-ixp4xx/vulcan-setup.c
  4 *
  5 * Arcom/Eurotech Vulcan board-setup
  6 *
  7 * Copyright (C) 2010 Marc Zyngier <maz@misterjones.org>
  8 *
  9 * based on fsg-setup.c:
 10 *	Copyright (C) 2008 Rod Whitby <rod@whitby.id.au>
 11 */
 12
 13#include <linux/if_ether.h>
 14#include <linux/irq.h>
 15#include <linux/serial.h>
 16#include <linux/serial_8250.h>
 17#include <linux/io.h>
 18#include <linux/w1-gpio.h>
 19#include <linux/gpio/machine.h>
 20#include <linux/mtd/plat-ram.h>
 21#include <asm/mach-types.h>
 22#include <asm/mach/arch.h>
 23#include <asm/mach/flash.h>
 24
 25static struct flash_platform_data vulcan_flash_data = {
 26	.map_name	= "cfi_probe",
 27	.width		= 2,
 28};
 29
 30static struct resource vulcan_flash_resource = {
 31	.flags			= IORESOURCE_MEM,
 32};
 33
 34static struct platform_device vulcan_flash = {
 35	.name			= "IXP4XX-Flash",
 36	.id			= 0,
 37	.dev = {
 38		.platform_data	= &vulcan_flash_data,
 39	},
 40	.resource		= &vulcan_flash_resource,
 41	.num_resources		= 1,
 42};
 43
 44static struct platdata_mtd_ram vulcan_sram_data = {
 45	.mapname	= "Vulcan SRAM",
 46	.bankwidth	= 1,
 47};
 48
 49static struct resource vulcan_sram_resource = {
 50	.flags			= IORESOURCE_MEM,
 51};
 52
 53static struct platform_device vulcan_sram = {
 54	.name			= "mtd-ram",
 55	.id			= 0,
 56	.dev = {
 57		.platform_data	= &vulcan_sram_data,
 58	},
 59	.resource		= &vulcan_sram_resource,
 60	.num_resources		= 1,
 61};
 62
 63static struct resource vulcan_uart_resources[] = {
 64	[0] = {
 65		.start		= IXP4XX_UART1_BASE_PHYS,
 66		.end		= IXP4XX_UART1_BASE_PHYS + 0x0fff,
 67		.flags		= IORESOURCE_MEM,
 68	},
 69	[1] = {
 70		.start		= IXP4XX_UART2_BASE_PHYS,
 71		.end		= IXP4XX_UART2_BASE_PHYS + 0x0fff,
 72		.flags		= IORESOURCE_MEM,
 73	},
 74	[2] = {
 75		.flags		= IORESOURCE_MEM,
 76	},
 77};
 78
 79static struct plat_serial8250_port vulcan_uart_data[] = {
 80	[0] = {
 81		.mapbase	= IXP4XX_UART1_BASE_PHYS,
 82		.membase	= (char *)IXP4XX_UART1_BASE_VIRT + REG_OFFSET,
 83		.irq		= IRQ_IXP4XX_UART1,
 84		.flags		= UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
 85		.iotype		= UPIO_MEM,
 86		.regshift	= 2,
 87		.uartclk	= IXP4XX_UART_XTAL,
 88	},
 89	[1] = {
 90		.mapbase	= IXP4XX_UART2_BASE_PHYS,
 91		.membase	= (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET,
 92		.irq		= IRQ_IXP4XX_UART2,
 93		.flags		= UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
 94		.iotype		= UPIO_MEM,
 95		.regshift	= 2,
 96		.uartclk	= IXP4XX_UART_XTAL,
 97	},
 98	[2] = {
 99		.irq		= IXP4XX_GPIO_IRQ(4),
100		.irqflags	= IRQF_TRIGGER_LOW,
101		.flags		= UPF_IOREMAP | UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
102		.iotype		= UPIO_MEM,
103		.uartclk	= 1843200,
104	},
105	[3] = {
106		.irq		= IXP4XX_GPIO_IRQ(4),
107		.irqflags	= IRQF_TRIGGER_LOW,
108		.flags		= UPF_IOREMAP | UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
109		.iotype		= UPIO_MEM,
110		.uartclk	= 1843200,
111	},
112	{ }
113};
114
115static struct platform_device vulcan_uart = {
116	.name			= "serial8250",
117	.id			= PLAT8250_DEV_PLATFORM,
118	.dev = {
119		.platform_data	= vulcan_uart_data,
120	},
121	.resource		= vulcan_uart_resources,
122	.num_resources		= ARRAY_SIZE(vulcan_uart_resources),
123};
124
125static struct eth_plat_info vulcan_plat_eth[] = {
126	[0] = {
127		.phy		= 0,
128		.rxq		= 3,
129		.txreadyq	= 20,
130	},
131	[1] = {
132		.phy		= 1,
133		.rxq		= 4,
134		.txreadyq	= 21,
135	},
136};
137
138static struct platform_device vulcan_eth[] = {
139	[0] = {
140		.name			= "ixp4xx_eth",
141		.id			= IXP4XX_ETH_NPEB,
142		.dev = {
143			.platform_data	= &vulcan_plat_eth[0],
144		},
145	},
146	[1] = {
147		.name			= "ixp4xx_eth",
148		.id			= IXP4XX_ETH_NPEC,
149		.dev = {
150			.platform_data	= &vulcan_plat_eth[1],
151		},
152	},
153};
154
155static struct resource vulcan_max6369_resource = {
156	.flags			= IORESOURCE_MEM,
157};
158
159static struct platform_device vulcan_max6369 = {
160	.name			= "max6369_wdt",
161	.id			= -1,
162	.resource		= &vulcan_max6369_resource,
163	.num_resources		= 1,
164};
165
166static struct gpiod_lookup_table vulcan_w1_gpiod_table = {
167	.dev_id = "w1-gpio",
168	.table = {
169		GPIO_LOOKUP_IDX("IXP4XX_GPIO_CHIP", 14, NULL, 0,
170				GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN),
171	},
172};
173
174static struct w1_gpio_platform_data vulcan_w1_gpio_pdata = {
175	/* Intentionally left blank */
 
176};
177
178static struct platform_device vulcan_w1_gpio = {
179	.name			= "w1-gpio",
180	.id			= 0,
181	.dev			= {
182		.platform_data	= &vulcan_w1_gpio_pdata,
183	},
184};
185
186static struct platform_device *vulcan_devices[] __initdata = {
187	&vulcan_uart,
188	&vulcan_flash,
189	&vulcan_sram,
190	&vulcan_max6369,
191	&vulcan_eth[0],
192	&vulcan_eth[1],
193	&vulcan_w1_gpio,
194};
195
196static void __init vulcan_init(void)
197{
198	ixp4xx_sys_init();
199
200	/* Flash is spread over both CS0 and CS1 */
201	vulcan_flash_resource.start	 = IXP4XX_EXP_BUS_BASE(0);
202	vulcan_flash_resource.end	 = IXP4XX_EXP_BUS_BASE(0) + SZ_32M - 1;
203	*IXP4XX_EXP_CS0 = IXP4XX_EXP_BUS_CS_EN		|
204			  IXP4XX_EXP_BUS_STROBE_T(3)	|
205			  IXP4XX_EXP_BUS_SIZE(0xF)	|
206			  IXP4XX_EXP_BUS_BYTE_RD16	|
207			  IXP4XX_EXP_BUS_WR_EN;
208	*IXP4XX_EXP_CS1 = *IXP4XX_EXP_CS0;
209
210	/* SRAM on CS2, (256kB, 8bit, writable) */
211	vulcan_sram_resource.start	= IXP4XX_EXP_BUS_BASE(2);
212	vulcan_sram_resource.end	= IXP4XX_EXP_BUS_BASE(2) + SZ_256K - 1;
213	*IXP4XX_EXP_CS2 = IXP4XX_EXP_BUS_CS_EN		|
214			  IXP4XX_EXP_BUS_STROBE_T(1)	|
215			  IXP4XX_EXP_BUS_HOLD_T(2)	|
216			  IXP4XX_EXP_BUS_SIZE(9)	|
217			  IXP4XX_EXP_BUS_SPLT_EN	|
218			  IXP4XX_EXP_BUS_WR_EN		|
219			  IXP4XX_EXP_BUS_BYTE_EN;
220
221	/* XR16L2551 on CS3 (Moto style, 512 bytes, 8bits, writable) */
222	vulcan_uart_resources[2].start	= IXP4XX_EXP_BUS_BASE(3);
223	vulcan_uart_resources[2].end	= IXP4XX_EXP_BUS_BASE(3) + 16 - 1;
224	vulcan_uart_data[2].mapbase	= vulcan_uart_resources[2].start;
225	vulcan_uart_data[3].mapbase	= vulcan_uart_data[2].mapbase + 8;
226	*IXP4XX_EXP_CS3 = IXP4XX_EXP_BUS_CS_EN		|
227			  IXP4XX_EXP_BUS_STROBE_T(3)	|
228			  IXP4XX_EXP_BUS_CYCLES(IXP4XX_EXP_BUS_CYCLES_MOTOROLA)|
229			  IXP4XX_EXP_BUS_WR_EN		|
230			  IXP4XX_EXP_BUS_BYTE_EN;
231
232	/* GPIOS on CS4 (512 bytes, 8bits, writable) */
233	*IXP4XX_EXP_CS4 = IXP4XX_EXP_BUS_CS_EN		|
234			  IXP4XX_EXP_BUS_WR_EN		|
235			  IXP4XX_EXP_BUS_BYTE_EN;
236
237	/* max6369 on CS5 (512 bytes, 8bits, writable) */
238	vulcan_max6369_resource.start	= IXP4XX_EXP_BUS_BASE(5);
239	vulcan_max6369_resource.end	= IXP4XX_EXP_BUS_BASE(5);
240	*IXP4XX_EXP_CS5 = IXP4XX_EXP_BUS_CS_EN		|
241			  IXP4XX_EXP_BUS_WR_EN		|
242			  IXP4XX_EXP_BUS_BYTE_EN;
243
244	gpiod_add_lookup_table(&vulcan_w1_gpiod_table);
245	platform_add_devices(vulcan_devices, ARRAY_SIZE(vulcan_devices));
246}
247
248MACHINE_START(ARCOM_VULCAN, "Arcom/Eurotech Vulcan")
249	/* Maintainer: Marc Zyngier <maz@misterjones.org> */
250	.map_io		= ixp4xx_map_io,
251	.init_early	= ixp4xx_init_early,
252	.init_irq	= ixp4xx_init_irq,
253	.init_time	= ixp4xx_timer_init,
254	.atag_offset	= 0x100,
255	.init_machine	= vulcan_init,
256#if defined(CONFIG_PCI)
257	.dma_zone_size	= SZ_64M,
258#endif
259	.restart	= ixp4xx_restart,
260MACHINE_END