Loading...
1#
2# Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
3#
4# This program is free software; you can redistribute it and/or modify
5# it under the terms of the GNU General Public License version 2 as
6# published by the Free Software Foundation.
7#
8
9config ARC
10 def_bool y
11 select BUILDTIME_EXTABLE_SORT
12 select CLONE_BACKWARDS
13 # ARC Busybox based initramfs absolutely relies on DEVTMPFS for /dev
14 select DEVTMPFS if !INITRAMFS_SOURCE=""
15 select GENERIC_ATOMIC64
16 select GENERIC_CLOCKEVENTS
17 select GENERIC_FIND_FIRST_BIT
18 # for now, we don't need GENERIC_IRQ_PROBE, CONFIG_GENERIC_IRQ_CHIP
19 select GENERIC_IRQ_SHOW
20 select GENERIC_PENDING_IRQ if SMP
21 select GENERIC_SMP_IDLE_THREAD
22 select HAVE_ARCH_KGDB
23 select HAVE_ARCH_TRACEHOOK
24 select HAVE_IOREMAP_PROT
25 select HAVE_KPROBES
26 select HAVE_KRETPROBES
27 select HAVE_MEMBLOCK
28 select HAVE_MOD_ARCH_SPECIFIC if ARC_DW2_UNWIND
29 select HAVE_OPROFILE
30 select HAVE_PERF_EVENTS
31 select IRQ_DOMAIN
32 select MODULES_USE_ELF_RELA
33 select NO_BOOTMEM
34 select OF
35 select OF_EARLY_FLATTREE
36 select PERF_USE_VMALLOC
37 select HAVE_DEBUG_STACKOVERFLOW
38
39config TRACE_IRQFLAGS_SUPPORT
40 def_bool y
41
42config LOCKDEP_SUPPORT
43 def_bool y
44
45config SCHED_OMIT_FRAME_POINTER
46 def_bool y
47
48config GENERIC_CSUM
49 def_bool y
50
51config RWSEM_GENERIC_SPINLOCK
52 def_bool y
53
54config ARCH_FLATMEM_ENABLE
55 def_bool y
56
57config MMU
58 def_bool y
59
60config NO_IOPORT_MAP
61 def_bool y
62
63config GENERIC_CALIBRATE_DELAY
64 def_bool y
65
66config GENERIC_HWEIGHT
67 def_bool y
68
69config STACKTRACE_SUPPORT
70 def_bool y
71 select STACKTRACE
72
73config HAVE_LATENCYTOP_SUPPORT
74 def_bool y
75
76config NO_DMA
77 def_bool n
78
79source "init/Kconfig"
80source "kernel/Kconfig.freezer"
81
82menu "ARC Architecture Configuration"
83
84menu "ARC Platform/SoC/Board"
85
86source "arch/arc/plat-arcfpga/Kconfig"
87source "arch/arc/plat-tb10x/Kconfig"
88#New platform adds here
89
90endmenu
91
92menu "ARC CPU Configuration"
93
94choice
95 prompt "ARC Core"
96 default ARC_CPU_770
97
98config ARC_CPU_750D
99 bool "ARC750D"
100 help
101 Support for ARC750 core
102
103config ARC_CPU_770
104 bool "ARC770"
105 select ARC_CPU_REL_4_10
106 help
107 Support for ARC770 core introduced with Rel 4.10 (Summer 2011)
108 This core has a bunch of cool new features:
109 -MMU-v3: Variable Page Sz (4k, 8k, 16k), bigger J-TLB (128x4)
110 Shared Address Spaces (for sharing TLB entires in MMU)
111 -Caches: New Prog Model, Region Flush
112 -Insns: endian swap, load-locked/store-conditional, time-stamp-ctr
113
114endchoice
115
116config CPU_BIG_ENDIAN
117 bool "Enable Big Endian Mode"
118 default n
119 help
120 Build kernel for Big Endian Mode of ARC CPU
121
122# If a platform can't work with 0x8000_0000 based dma_addr_t
123config ARC_PLAT_NEEDS_CPU_TO_DMA
124 bool
125
126config SMP
127 bool "Symmetric Multi-Processing (Incomplete)"
128 default n
129 help
130 This enables support for systems with more than one CPU. If you have
131 a system with only one CPU, say N. If you have a system with more
132 than one CPU, say Y.
133
134if SMP
135
136config ARC_HAS_COH_CACHES
137 def_bool n
138
139config ARC_HAS_REENTRANT_IRQ_LV2
140 def_bool n
141
142endif
143
144config NR_CPUS
145 int "Maximum number of CPUs (2-4096)"
146 range 2 4096
147 depends on SMP
148 default "2"
149
150menuconfig ARC_CACHE
151 bool "Enable Cache Support"
152 default y
153 # if SMP, cache enabled ONLY if ARC implementation has cache coherency
154 depends on !SMP || ARC_HAS_COH_CACHES
155
156if ARC_CACHE
157
158config ARC_CACHE_LINE_SHIFT
159 int "Cache Line Length (as power of 2)"
160 range 5 7
161 default "6"
162 help
163 Starting with ARC700 4.9, Cache line length is configurable,
164 This option specifies "N", with Line-len = 2 power N
165 So line lengths of 32, 64, 128 are specified by 5,6,7, respectively
166 Linux only supports same line lengths for I and D caches.
167
168config ARC_HAS_ICACHE
169 bool "Use Instruction Cache"
170 default y
171
172config ARC_HAS_DCACHE
173 bool "Use Data Cache"
174 default y
175
176config ARC_CACHE_PAGES
177 bool "Per Page Cache Control"
178 default y
179 depends on ARC_HAS_ICACHE || ARC_HAS_DCACHE
180 help
181 This can be used to over-ride the global I/D Cache Enable on a
182 per-page basis (but only for pages accessed via MMU such as
183 Kernel Virtual address or User Virtual Address)
184 TLB entries have a per-page Cache Enable Bit.
185 Note that Global I/D ENABLE + Per Page DISABLE works but corollary
186 Global DISABLE + Per Page ENABLE won't work
187
188config ARC_CACHE_VIPT_ALIASING
189 bool "Support VIPT Aliasing D$"
190 depends on ARC_HAS_DCACHE
191 default n
192
193endif #ARC_CACHE
194
195config ARC_HAS_ICCM
196 bool "Use ICCM"
197 help
198 Single Cycle RAMS to store Fast Path Code
199 default n
200
201config ARC_ICCM_SZ
202 int "ICCM Size in KB"
203 default "64"
204 depends on ARC_HAS_ICCM
205
206config ARC_HAS_DCCM
207 bool "Use DCCM"
208 help
209 Single Cycle RAMS to store Fast Path Data
210 default n
211
212config ARC_DCCM_SZ
213 int "DCCM Size in KB"
214 default "64"
215 depends on ARC_HAS_DCCM
216
217config ARC_DCCM_BASE
218 hex "DCCM map address"
219 default "0xA0000000"
220 depends on ARC_HAS_DCCM
221
222config ARC_HAS_HW_MPY
223 bool "Use Hardware Multiplier (Normal or Faster XMAC)"
224 default y
225 help
226 Influences how gcc generates code for MPY operations.
227 If enabled, MPYxx insns are generated, provided by Standard/XMAC
228 Multipler. Otherwise software multipy lib is used
229
230choice
231 prompt "ARC700 MMU Version"
232 default ARC_MMU_V3 if ARC_CPU_770
233 default ARC_MMU_V2 if ARC_CPU_750D
234
235config ARC_MMU_V1
236 bool "MMU v1"
237 help
238 Orig ARC700 MMU
239
240config ARC_MMU_V2
241 bool "MMU v2"
242 help
243 Fixed the deficiency of v1 - possible thrashing in memcpy sceanrio
244 when 2 D-TLB and 1 I-TLB entries index into same 2way set.
245
246config ARC_MMU_V3
247 bool "MMU v3"
248 depends on ARC_CPU_770
249 help
250 Introduced with ARC700 4.10: New Features
251 Variable Page size (1k-16k), var JTLB size 128 x (2 or 4)
252 Shared Address Spaces (SASID)
253
254endchoice
255
256
257choice
258 prompt "MMU Page Size"
259 default ARC_PAGE_SIZE_8K
260
261config ARC_PAGE_SIZE_8K
262 bool "8KB"
263 help
264 Choose between 8k vs 16k
265
266config ARC_PAGE_SIZE_16K
267 bool "16KB"
268 depends on ARC_MMU_V3
269
270config ARC_PAGE_SIZE_4K
271 bool "4KB"
272 depends on ARC_MMU_V3
273
274endchoice
275
276config ARC_COMPACT_IRQ_LEVELS
277 bool "ARCompact IRQ Priorities: High(2)/Low(1)"
278 default n
279 # Timer HAS to be high priority, for any other high priority config
280 select ARC_IRQ3_LV2
281 # if SMP, LV2 enabled ONLY if ARC implementation has LV2 re-entrancy
282 depends on !SMP || ARC_HAS_REENTRANT_IRQ_LV2
283
284if ARC_COMPACT_IRQ_LEVELS
285
286config ARC_IRQ3_LV2
287 bool
288
289config ARC_IRQ5_LV2
290 bool
291
292config ARC_IRQ6_LV2
293 bool
294
295endif
296
297config ARC_FPU_SAVE_RESTORE
298 bool "Enable FPU state persistence across context switch"
299 default n
300 help
301 Double Precision Floating Point unit had dedictaed regs which
302 need to be saved/restored across context-switch.
303 Note that ARC FPU is overly simplistic, unlike say x86, which has
304 hardware pieces to allow software to conditionally save/restore,
305 based on actual usage of FPU by a task. Thus our implemn does
306 this for all tasks in system.
307
308config ARC_CANT_LLSC
309 def_bool n
310
311menuconfig ARC_CPU_REL_4_10
312 bool "Enable support for Rel 4.10 features"
313 default n
314 help
315 -ARC770 (and dependent features) enabled
316 -ARC750 also shares some of the new features with 770
317
318config ARC_HAS_LLSC
319 bool "Insn: LLOCK/SCOND (efficient atomic ops)"
320 default y
321 depends on ARC_CPU_770 && !ARC_CANT_LLSC
322
323config ARC_HAS_SWAPE
324 bool "Insn: SWAPE (endian-swap)"
325 default y
326 depends on ARC_CPU_REL_4_10
327
328config ARC_HAS_RTSC
329 bool "Insn: RTSC (64-bit r/o cycle counter)"
330 default y
331 depends on ARC_CPU_REL_4_10
332 depends on !SMP
333
334endmenu # "ARC CPU Configuration"
335
336config LINUX_LINK_BASE
337 hex "Linux Link Address"
338 default "0x80000000"
339 help
340 ARC700 divides the 32 bit phy address space into two equal halves
341 -Lower 2G (0 - 0x7FFF_FFFF ) is user virtual, translated by MMU
342 -Upper 2G (0x8000_0000 onwards) is untranslated, for kernel
343 Typically Linux kernel is linked at the start of untransalted addr,
344 hence the default value of 0x8zs.
345 However some customers have peripherals mapped at this addr, so
346 Linux needs to be scooted a bit.
347 If you don't know what the above means, leave this setting alone.
348
349config ARC_CURR_IN_REG
350 bool "Dedicate Register r25 for current_task pointer"
351 default y
352 help
353 This reserved Register R25 to point to Current Task in
354 kernel mode. This saves memory access for each such access
355
356
357config ARC_MISALIGN_ACCESS
358 bool "Emulate unaligned memory access (userspace only)"
359 select SYSCTL_ARCH_UNALIGN_NO_WARN
360 select SYSCTL_ARCH_UNALIGN_ALLOW
361 help
362 This enables misaligned 16 & 32 bit memory access from user space.
363 Use ONLY-IF-ABS-NECESSARY as it will be very slow and also can hide
364 potential bugs in code
365
366config HZ
367 int "Timer Frequency"
368 default 100
369
370config ARC_METAWARE_HLINK
371 bool "Support for Metaware debugger assisted Host access"
372 default n
373 help
374 This options allows a Linux userland apps to directly access
375 host file system (open/creat/read/write etc) with help from
376 Metaware Debugger. This can come in handy for Linux-host communication
377 when there is no real usable peripheral such as EMAC.
378
379menuconfig ARC_DBG
380 bool "ARC debugging"
381 default y
382
383config ARC_DW2_UNWIND
384 bool "Enable DWARF specific kernel stack unwind"
385 depends on ARC_DBG
386 default y
387 select KALLSYMS
388 help
389 Compiles the kernel with DWARF unwind information and can be used
390 to get stack backtraces.
391
392 If you say Y here the resulting kernel image will be slightly larger
393 but not slower, and it will give very useful debugging information.
394 If you don't debug the kernel, you can say N, but we may not be able
395 to solve problems without frame unwind information
396
397config ARC_DBG_TLB_PARANOIA
398 bool "Paranoia Checks in Low Level TLB Handlers"
399 depends on ARC_DBG
400 default n
401
402config ARC_DBG_TLB_MISS_COUNT
403 bool "Profile TLB Misses"
404 default n
405 select DEBUG_FS
406 depends on ARC_DBG
407 help
408 Counts number of I and D TLB Misses and exports them via Debugfs
409 The counters can be cleared via Debugfs as well
410
411config ARC_BUILTIN_DTB_NAME
412 string "Built in DTB"
413 help
414 Set the name of the DTB to embed in the vmlinux binary
415 Leaving it blank selects the minimal "skeleton" dtb
416
417source "kernel/Kconfig.preempt"
418
419menu "Executable file formats"
420source "fs/Kconfig.binfmt"
421endmenu
422
423endmenu # "ARC Architecture Configuration"
424
425source "mm/Kconfig"
426source "net/Kconfig"
427source "drivers/Kconfig"
428source "fs/Kconfig"
429source "arch/arc/Kconfig.debug"
430source "security/Kconfig"
431source "crypto/Kconfig"
432source "lib/Kconfig"
1#
2# Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
3#
4# This program is free software; you can redistribute it and/or modify
5# it under the terms of the GNU General Public License version 2 as
6# published by the Free Software Foundation.
7#
8
9config ARC
10 def_bool y
11 select ARC_TIMERS
12 select ARCH_HAS_SG_CHAIN
13 select ARCH_SUPPORTS_ATOMIC_RMW if ARC_HAS_LLSC
14 select BUILDTIME_EXTABLE_SORT
15 select CLONE_BACKWARDS
16 select COMMON_CLK
17 select GENERIC_ATOMIC64 if !ISA_ARCV2 || !(ARC_HAS_LL64 && ARC_HAS_LLSC)
18 select GENERIC_CLOCKEVENTS
19 select GENERIC_FIND_FIRST_BIT
20 # for now, we don't need GENERIC_IRQ_PROBE, CONFIG_GENERIC_IRQ_CHIP
21 select GENERIC_IRQ_SHOW
22 select GENERIC_PCI_IOMAP
23 select GENERIC_PENDING_IRQ if SMP
24 select GENERIC_SMP_IDLE_THREAD
25 select HAVE_ARCH_KGDB
26 select HAVE_ARCH_TRACEHOOK
27 select HAVE_FUTEX_CMPXCHG if FUTEX
28 select HAVE_IOREMAP_PROT
29 select HAVE_KPROBES
30 select HAVE_KRETPROBES
31 select HAVE_MEMBLOCK
32 select HAVE_MOD_ARCH_SPECIFIC
33 select HAVE_OPROFILE
34 select HAVE_PERF_EVENTS
35 select HANDLE_DOMAIN_IRQ
36 select IRQ_DOMAIN
37 select MODULES_USE_ELF_RELA
38 select NO_BOOTMEM
39 select OF
40 select OF_EARLY_FLATTREE
41 select OF_RESERVED_MEM
42 select PERF_USE_VMALLOC if ARC_CACHE_VIPT_ALIASING
43 select HAVE_DEBUG_STACKOVERFLOW
44 select HAVE_GENERIC_DMA_COHERENT
45 select HAVE_KERNEL_GZIP
46 select HAVE_KERNEL_LZMA
47
48config MIGHT_HAVE_PCI
49 bool
50
51config TRACE_IRQFLAGS_SUPPORT
52 def_bool y
53
54config LOCKDEP_SUPPORT
55 def_bool y
56
57config SCHED_OMIT_FRAME_POINTER
58 def_bool y
59
60config GENERIC_CSUM
61 def_bool y
62
63config RWSEM_GENERIC_SPINLOCK
64 def_bool y
65
66config ARCH_DISCONTIGMEM_ENABLE
67 def_bool n
68
69config ARCH_FLATMEM_ENABLE
70 def_bool y
71
72config MMU
73 def_bool y
74
75config NO_IOPORT_MAP
76 def_bool y
77
78config GENERIC_CALIBRATE_DELAY
79 def_bool y
80
81config GENERIC_HWEIGHT
82 def_bool y
83
84config STACKTRACE_SUPPORT
85 def_bool y
86 select STACKTRACE
87
88config HAVE_ARCH_TRANSPARENT_HUGEPAGE
89 def_bool y
90 depends on ARC_MMU_V4
91
92source "init/Kconfig"
93source "kernel/Kconfig.freezer"
94
95menu "ARC Architecture Configuration"
96
97menu "ARC Platform/SoC/Board"
98
99source "arch/arc/plat-tb10x/Kconfig"
100source "arch/arc/plat-axs10x/Kconfig"
101#New platform adds here
102source "arch/arc/plat-eznps/Kconfig"
103source "arch/arc/plat-hsdk/Kconfig"
104
105endmenu
106
107choice
108 prompt "ARC Instruction Set"
109 default ISA_ARCOMPACT
110
111config ISA_ARCOMPACT
112 bool "ARCompact ISA"
113 select CPU_NO_EFFICIENT_FFS
114 help
115 The original ARC ISA of ARC600/700 cores
116
117config ISA_ARCV2
118 bool "ARC ISA v2"
119 select ARC_TIMERS_64BIT
120 help
121 ISA for the Next Generation ARC-HS cores
122
123endchoice
124
125menu "ARC CPU Configuration"
126
127choice
128 prompt "ARC Core"
129 default ARC_CPU_770 if ISA_ARCOMPACT
130 default ARC_CPU_HS if ISA_ARCV2
131
132if ISA_ARCOMPACT
133
134config ARC_CPU_750D
135 bool "ARC750D"
136 select ARC_CANT_LLSC
137 help
138 Support for ARC750 core
139
140config ARC_CPU_770
141 bool "ARC770"
142 select ARC_HAS_SWAPE
143 help
144 Support for ARC770 core introduced with Rel 4.10 (Summer 2011)
145 This core has a bunch of cool new features:
146 -MMU-v3: Variable Page Sz (4k, 8k, 16k), bigger J-TLB (128x4)
147 Shared Address Spaces (for sharing TLB entires in MMU)
148 -Caches: New Prog Model, Region Flush
149 -Insns: endian swap, load-locked/store-conditional, time-stamp-ctr
150
151endif #ISA_ARCOMPACT
152
153config ARC_CPU_HS
154 bool "ARC-HS"
155 depends on ISA_ARCV2
156 help
157 Support for ARC HS38x Cores based on ARCv2 ISA
158 The notable features are:
159 - SMP configurations of upto 4 core with coherency
160 - Optional L2 Cache and IO-Coherency
161 - Revised Interrupt Architecture (multiple priorites, reg banks,
162 auto stack switch, auto regfile save/restore)
163 - MMUv4 (PIPT dcache, Huge Pages)
164 - Instructions for
165 * 64bit load/store: LDD, STD
166 * Hardware assisted divide/remainder: DIV, REM
167 * Function prologue/epilogue: ENTER_S, LEAVE_S
168 * IRQ enable/disable: CLRI, SETI
169 * pop count: FFS, FLS
170 * SETcc, BMSKN, XBFU...
171
172endchoice
173
174config CPU_BIG_ENDIAN
175 bool "Enable Big Endian Mode"
176 default n
177 help
178 Build kernel for Big Endian Mode of ARC CPU
179
180config SMP
181 bool "Symmetric Multi-Processing"
182 default n
183 select ARC_MCIP if ISA_ARCV2
184 help
185 This enables support for systems with more than one CPU.
186
187if SMP
188
189config NR_CPUS
190 int "Maximum number of CPUs (2-4096)"
191 range 2 4096
192 default "4"
193
194config ARC_SMP_HALT_ON_RESET
195 bool "Enable Halt-on-reset boot mode"
196 default y if ARC_UBOOT_SUPPORT
197 help
198 In SMP configuration cores can be configured as Halt-on-reset
199 or they could all start at same time. For Halt-on-reset, non
200 masters are parked until Master kicks them so they can start of
201 at designated entry point. For other case, all jump to common
202 entry point and spin wait for Master's signal.
203
204endif #SMP
205
206config ARC_MCIP
207 bool "ARConnect Multicore IP (MCIP) Support "
208 depends on ISA_ARCV2
209 default y if SMP
210 help
211 This IP block enables SMP in ARC-HS38 cores.
212 It provides for cross-core interrupts, multi-core debug
213 hardware semaphores, shared memory,....
214
215menuconfig ARC_CACHE
216 bool "Enable Cache Support"
217 default y
218
219if ARC_CACHE
220
221config ARC_CACHE_LINE_SHIFT
222 int "Cache Line Length (as power of 2)"
223 range 5 7
224 default "6"
225 help
226 Starting with ARC700 4.9, Cache line length is configurable,
227 This option specifies "N", with Line-len = 2 power N
228 So line lengths of 32, 64, 128 are specified by 5,6,7, respectively
229 Linux only supports same line lengths for I and D caches.
230
231config ARC_HAS_ICACHE
232 bool "Use Instruction Cache"
233 default y
234
235config ARC_HAS_DCACHE
236 bool "Use Data Cache"
237 default y
238
239config ARC_CACHE_PAGES
240 bool "Per Page Cache Control"
241 default y
242 depends on ARC_HAS_ICACHE || ARC_HAS_DCACHE
243 help
244 This can be used to over-ride the global I/D Cache Enable on a
245 per-page basis (but only for pages accessed via MMU such as
246 Kernel Virtual address or User Virtual Address)
247 TLB entries have a per-page Cache Enable Bit.
248 Note that Global I/D ENABLE + Per Page DISABLE works but corollary
249 Global DISABLE + Per Page ENABLE won't work
250
251config ARC_CACHE_VIPT_ALIASING
252 bool "Support VIPT Aliasing D$"
253 depends on ARC_HAS_DCACHE && ISA_ARCOMPACT
254 default n
255
256endif #ARC_CACHE
257
258config ARC_HAS_ICCM
259 bool "Use ICCM"
260 help
261 Single Cycle RAMS to store Fast Path Code
262 default n
263
264config ARC_ICCM_SZ
265 int "ICCM Size in KB"
266 default "64"
267 depends on ARC_HAS_ICCM
268
269config ARC_HAS_DCCM
270 bool "Use DCCM"
271 help
272 Single Cycle RAMS to store Fast Path Data
273 default n
274
275config ARC_DCCM_SZ
276 int "DCCM Size in KB"
277 default "64"
278 depends on ARC_HAS_DCCM
279
280config ARC_DCCM_BASE
281 hex "DCCM map address"
282 default "0xA0000000"
283 depends on ARC_HAS_DCCM
284
285choice
286 prompt "MMU Version"
287 default ARC_MMU_V3 if ARC_CPU_770
288 default ARC_MMU_V2 if ARC_CPU_750D
289 default ARC_MMU_V4 if ARC_CPU_HS
290
291if ISA_ARCOMPACT
292
293config ARC_MMU_V1
294 bool "MMU v1"
295 help
296 Orig ARC700 MMU
297
298config ARC_MMU_V2
299 bool "MMU v2"
300 help
301 Fixed the deficiency of v1 - possible thrashing in memcpy scenario
302 when 2 D-TLB and 1 I-TLB entries index into same 2way set.
303
304config ARC_MMU_V3
305 bool "MMU v3"
306 depends on ARC_CPU_770
307 help
308 Introduced with ARC700 4.10: New Features
309 Variable Page size (1k-16k), var JTLB size 128 x (2 or 4)
310 Shared Address Spaces (SASID)
311
312endif
313
314config ARC_MMU_V4
315 bool "MMU v4"
316 depends on ISA_ARCV2
317
318endchoice
319
320
321choice
322 prompt "MMU Page Size"
323 default ARC_PAGE_SIZE_8K
324
325config ARC_PAGE_SIZE_8K
326 bool "8KB"
327 help
328 Choose between 8k vs 16k
329
330config ARC_PAGE_SIZE_16K
331 bool "16KB"
332 depends on ARC_MMU_V3 || ARC_MMU_V4
333
334config ARC_PAGE_SIZE_4K
335 bool "4KB"
336 depends on ARC_MMU_V3 || ARC_MMU_V4
337
338endchoice
339
340choice
341 prompt "MMU Super Page Size"
342 depends on ISA_ARCV2 && TRANSPARENT_HUGEPAGE
343 default ARC_HUGEPAGE_2M
344
345config ARC_HUGEPAGE_2M
346 bool "2MB"
347
348config ARC_HUGEPAGE_16M
349 bool "16MB"
350
351endchoice
352
353config NODES_SHIFT
354 int "Maximum NUMA Nodes (as a power of 2)"
355 default "0" if !DISCONTIGMEM
356 default "1" if DISCONTIGMEM
357 depends on NEED_MULTIPLE_NODES
358 ---help---
359 Accessing memory beyond 1GB (with or w/o PAE) requires 2 memory
360 zones.
361
362if ISA_ARCOMPACT
363
364config ARC_COMPACT_IRQ_LEVELS
365 bool "Setup Timer IRQ as high Priority"
366 default n
367 # if SMP, LV2 enabled ONLY if ARC implementation has LV2 re-entrancy
368 depends on !SMP
369
370config ARC_FPU_SAVE_RESTORE
371 bool "Enable FPU state persistence across context switch"
372 default n
373 help
374 Double Precision Floating Point unit had dedicated regs which
375 need to be saved/restored across context-switch.
376 Note that ARC FPU is overly simplistic, unlike say x86, which has
377 hardware pieces to allow software to conditionally save/restore,
378 based on actual usage of FPU by a task. Thus our implemn does
379 this for all tasks in system.
380
381endif #ISA_ARCOMPACT
382
383config ARC_CANT_LLSC
384 def_bool n
385
386config ARC_HAS_LLSC
387 bool "Insn: LLOCK/SCOND (efficient atomic ops)"
388 default y
389 depends on !ARC_CANT_LLSC
390
391config ARC_HAS_SWAPE
392 bool "Insn: SWAPE (endian-swap)"
393 default y
394
395if ISA_ARCV2
396
397config ARC_HAS_LL64
398 bool "Insn: 64bit LDD/STD"
399 help
400 Enable gcc to generate 64-bit load/store instructions
401 ISA mandates even/odd registers to allow encoding of two
402 dest operands with 2 possible source operands.
403 default y
404
405config ARC_HAS_DIV_REM
406 bool "Insn: div, divu, rem, remu"
407 default y
408
409config ARC_HAS_ACCL_REGS
410 bool "Reg Pair ACCL:ACCH (FPU and/or MPY > 6)"
411 default n
412 help
413 Depending on the configuration, CPU can contain accumulator reg-pair
414 (also referred to as r58:r59). These can also be used by gcc as GPR so
415 kernel needs to save/restore per process
416
417endif # ISA_ARCV2
418
419endmenu # "ARC CPU Configuration"
420
421config LINUX_LINK_BASE
422 hex "Kernel link address"
423 default "0x80000000"
424 help
425 ARC700 divides the 32 bit phy address space into two equal halves
426 -Lower 2G (0 - 0x7FFF_FFFF ) is user virtual, translated by MMU
427 -Upper 2G (0x8000_0000 onwards) is untranslated, for kernel
428 Typically Linux kernel is linked at the start of untransalted addr,
429 hence the default value of 0x8zs.
430 However some customers have peripherals mapped at this addr, so
431 Linux needs to be scooted a bit.
432 If you don't know what the above means, leave this setting alone.
433 This needs to match memory start address specified in Device Tree
434
435config LINUX_RAM_BASE
436 hex "RAM base address"
437 default LINUX_LINK_BASE
438 help
439 By default Linux is linked at base of RAM. However in some special
440 cases (such as HSDK), Linux can't be linked at start of DDR, hence
441 this option.
442
443config HIGHMEM
444 bool "High Memory Support"
445 select ARCH_DISCONTIGMEM_ENABLE
446 help
447 With ARC 2G:2G address split, only upper 2G is directly addressable by
448 kernel. Enable this to potentially allow access to rest of 2G and PAE
449 in future
450
451config ARC_HAS_PAE40
452 bool "Support for the 40-bit Physical Address Extension"
453 default n
454 depends on ISA_ARCV2
455 select HIGHMEM
456 help
457 Enable access to physical memory beyond 4G, only supported on
458 ARC cores with 40 bit Physical Addressing support
459
460config ARCH_PHYS_ADDR_T_64BIT
461 def_bool ARC_HAS_PAE40
462
463config ARCH_DMA_ADDR_T_64BIT
464 bool
465
466config ARC_KVADDR_SIZE
467 int "Kernel Virtual Address Space size (MB)"
468 range 0 512
469 default "256"
470 help
471 The kernel address space is carved out of 256MB of translated address
472 space for catering to vmalloc, modules, pkmap, fixmap. This however may
473 not suffice vmalloc requirements of a 4K CPU EZChip system. So allow
474 this to be stretched to 512 MB (by extending into the reserved
475 kernel-user gutter)
476
477config ARC_CURR_IN_REG
478 bool "Dedicate Register r25 for current_task pointer"
479 default y
480 help
481 This reserved Register R25 to point to Current Task in
482 kernel mode. This saves memory access for each such access
483
484
485config ARC_EMUL_UNALIGNED
486 bool "Emulate unaligned memory access (userspace only)"
487 select SYSCTL_ARCH_UNALIGN_NO_WARN
488 select SYSCTL_ARCH_UNALIGN_ALLOW
489 depends on ISA_ARCOMPACT
490 help
491 This enables misaligned 16 & 32 bit memory access from user space.
492 Use ONLY-IF-ABS-NECESSARY as it will be very slow and also can hide
493 potential bugs in code
494
495config HZ
496 int "Timer Frequency"
497 default 100
498
499config ARC_METAWARE_HLINK
500 bool "Support for Metaware debugger assisted Host access"
501 default n
502 help
503 This options allows a Linux userland apps to directly access
504 host file system (open/creat/read/write etc) with help from
505 Metaware Debugger. This can come in handy for Linux-host communication
506 when there is no real usable peripheral such as EMAC.
507
508menuconfig ARC_DBG
509 bool "ARC debugging"
510 default y
511
512if ARC_DBG
513
514config ARC_DW2_UNWIND
515 bool "Enable DWARF specific kernel stack unwind"
516 default y
517 select KALLSYMS
518 help
519 Compiles the kernel with DWARF unwind information and can be used
520 to get stack backtraces.
521
522 If you say Y here the resulting kernel image will be slightly larger
523 but not slower, and it will give very useful debugging information.
524 If you don't debug the kernel, you can say N, but we may not be able
525 to solve problems without frame unwind information
526
527config ARC_DBG_TLB_PARANOIA
528 bool "Paranoia Checks in Low Level TLB Handlers"
529 default n
530
531endif
532
533config ARC_UBOOT_SUPPORT
534 bool "Support uboot arg Handling"
535 default n
536 help
537 ARC Linux by default checks for uboot provided args as pointers to
538 external cmdline or DTB. This however breaks in absence of uboot,
539 when booting from Metaware debugger directly, as the registers are
540 not zeroed out on reset by mdb and/or ARCv2 based cores. The bogus
541 registers look like uboot args to kernel which then chokes.
542 So only enable the uboot arg checking/processing if users are sure
543 of uboot being in play.
544
545config ARC_BUILTIN_DTB_NAME
546 string "Built in DTB"
547 help
548 Set the name of the DTB to embed in the vmlinux binary
549 Leaving it blank selects the minimal "skeleton" dtb
550
551source "kernel/Kconfig.preempt"
552
553menu "Executable file formats"
554source "fs/Kconfig.binfmt"
555endmenu
556
557endmenu # "ARC Architecture Configuration"
558
559source "mm/Kconfig"
560
561config FORCE_MAX_ZONEORDER
562 int "Maximum zone order"
563 default "12" if ARC_HUGEPAGE_16M
564 default "11"
565
566source "net/Kconfig"
567source "drivers/Kconfig"
568
569menu "Bus Support"
570
571config PCI
572 bool "PCI support" if MIGHT_HAVE_PCI
573 help
574 PCI is the name of a bus system, i.e., the way the CPU talks to
575 the other stuff inside your box. Find out if your board/platform
576 has PCI.
577
578 Note: PCIe support for Synopsys Device will be available only
579 when HAPS DX is configured with PCIe RC bitmap. If you have PCI,
580 say Y, otherwise N.
581
582config PCI_SYSCALL
583 def_bool PCI
584
585source "drivers/pci/Kconfig"
586
587endmenu
588
589source "fs/Kconfig"
590source "arch/arc/Kconfig.debug"
591source "security/Kconfig"
592source "crypto/Kconfig"
593source "lib/Kconfig"
594source "kernel/power/Kconfig"