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1/*
2 * Copyright (C) 1995-2003 Russell King
3 * 2001-2002 Keith Owens
4 *
5 * Generate definitions needed by assembly language modules.
6 * This code generates raw asm output which is post-processed to extract
7 * and format the required data.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 */
13#include <linux/sched.h>
14#include <linux/mm.h>
15#include <linux/dma-mapping.h>
16#ifdef CONFIG_KVM_ARM_HOST
17#include <linux/kvm_host.h>
18#endif
19#include <asm/cacheflush.h>
20#include <asm/glue-df.h>
21#include <asm/glue-pf.h>
22#include <asm/mach/arch.h>
23#include <asm/thread_info.h>
24#include <asm/memory.h>
25#include <asm/procinfo.h>
26#include <asm/suspend.h>
27#include <asm/hardware/cache-l2x0.h>
28#include <linux/kbuild.h>
29
30/*
31 * Make sure that the compiler and target are compatible.
32 */
33#if defined(__APCS_26__)
34#error Sorry, your compiler targets APCS-26 but this kernel requires APCS-32
35#endif
36/*
37 * GCC 3.0, 3.1: general bad code generation.
38 * GCC 3.2.0: incorrect function argument offset calculation.
39 * GCC 3.2.x: miscompiles NEW_AUX_ENT in fs/binfmt_elf.c
40 * (http://gcc.gnu.org/PR8896) and incorrect structure
41 * initialisation in fs/jffs2/erase.c
42 */
43#if (__GNUC__ == 3 && __GNUC_MINOR__ < 3)
44#error Your compiler is too buggy; it is known to miscompile kernels.
45#error Known good compilers: 3.3
46#endif
47
48int main(void)
49{
50 DEFINE(TSK_ACTIVE_MM, offsetof(struct task_struct, active_mm));
51#ifdef CONFIG_CC_STACKPROTECTOR
52 DEFINE(TSK_STACK_CANARY, offsetof(struct task_struct, stack_canary));
53#endif
54 BLANK();
55 DEFINE(TI_FLAGS, offsetof(struct thread_info, flags));
56 DEFINE(TI_PREEMPT, offsetof(struct thread_info, preempt_count));
57 DEFINE(TI_ADDR_LIMIT, offsetof(struct thread_info, addr_limit));
58 DEFINE(TI_TASK, offsetof(struct thread_info, task));
59 DEFINE(TI_EXEC_DOMAIN, offsetof(struct thread_info, exec_domain));
60 DEFINE(TI_CPU, offsetof(struct thread_info, cpu));
61 DEFINE(TI_CPU_DOMAIN, offsetof(struct thread_info, cpu_domain));
62 DEFINE(TI_CPU_SAVE, offsetof(struct thread_info, cpu_context));
63 DEFINE(TI_USED_CP, offsetof(struct thread_info, used_cp));
64 DEFINE(TI_TP_VALUE, offsetof(struct thread_info, tp_value));
65 DEFINE(TI_FPSTATE, offsetof(struct thread_info, fpstate));
66#ifdef CONFIG_VFP
67 DEFINE(TI_VFPSTATE, offsetof(struct thread_info, vfpstate));
68#ifdef CONFIG_SMP
69 DEFINE(VFP_CPU, offsetof(union vfp_state, hard.cpu));
70#endif
71#endif
72#ifdef CONFIG_ARM_THUMBEE
73 DEFINE(TI_THUMBEE_STATE, offsetof(struct thread_info, thumbee_state));
74#endif
75#ifdef CONFIG_IWMMXT
76 DEFINE(TI_IWMMXT_STATE, offsetof(struct thread_info, fpstate.iwmmxt));
77#endif
78#ifdef CONFIG_CRUNCH
79 DEFINE(TI_CRUNCH_STATE, offsetof(struct thread_info, crunchstate));
80#endif
81 BLANK();
82 DEFINE(S_R0, offsetof(struct pt_regs, ARM_r0));
83 DEFINE(S_R1, offsetof(struct pt_regs, ARM_r1));
84 DEFINE(S_R2, offsetof(struct pt_regs, ARM_r2));
85 DEFINE(S_R3, offsetof(struct pt_regs, ARM_r3));
86 DEFINE(S_R4, offsetof(struct pt_regs, ARM_r4));
87 DEFINE(S_R5, offsetof(struct pt_regs, ARM_r5));
88 DEFINE(S_R6, offsetof(struct pt_regs, ARM_r6));
89 DEFINE(S_R7, offsetof(struct pt_regs, ARM_r7));
90 DEFINE(S_R8, offsetof(struct pt_regs, ARM_r8));
91 DEFINE(S_R9, offsetof(struct pt_regs, ARM_r9));
92 DEFINE(S_R10, offsetof(struct pt_regs, ARM_r10));
93 DEFINE(S_FP, offsetof(struct pt_regs, ARM_fp));
94 DEFINE(S_IP, offsetof(struct pt_regs, ARM_ip));
95 DEFINE(S_SP, offsetof(struct pt_regs, ARM_sp));
96 DEFINE(S_LR, offsetof(struct pt_regs, ARM_lr));
97 DEFINE(S_PC, offsetof(struct pt_regs, ARM_pc));
98 DEFINE(S_PSR, offsetof(struct pt_regs, ARM_cpsr));
99 DEFINE(S_OLD_R0, offsetof(struct pt_regs, ARM_ORIG_r0));
100 DEFINE(S_FRAME_SIZE, sizeof(struct pt_regs));
101 BLANK();
102#ifdef CONFIG_CACHE_L2X0
103 DEFINE(L2X0_R_PHY_BASE, offsetof(struct l2x0_regs, phy_base));
104 DEFINE(L2X0_R_AUX_CTRL, offsetof(struct l2x0_regs, aux_ctrl));
105 DEFINE(L2X0_R_TAG_LATENCY, offsetof(struct l2x0_regs, tag_latency));
106 DEFINE(L2X0_R_DATA_LATENCY, offsetof(struct l2x0_regs, data_latency));
107 DEFINE(L2X0_R_FILTER_START, offsetof(struct l2x0_regs, filter_start));
108 DEFINE(L2X0_R_FILTER_END, offsetof(struct l2x0_regs, filter_end));
109 DEFINE(L2X0_R_PREFETCH_CTRL, offsetof(struct l2x0_regs, prefetch_ctrl));
110 DEFINE(L2X0_R_PWR_CTRL, offsetof(struct l2x0_regs, pwr_ctrl));
111 BLANK();
112#endif
113#ifdef CONFIG_CPU_HAS_ASID
114 DEFINE(MM_CONTEXT_ID, offsetof(struct mm_struct, context.id.counter));
115 BLANK();
116#endif
117 DEFINE(VMA_VM_MM, offsetof(struct vm_area_struct, vm_mm));
118 DEFINE(VMA_VM_FLAGS, offsetof(struct vm_area_struct, vm_flags));
119 BLANK();
120 DEFINE(VM_EXEC, VM_EXEC);
121 BLANK();
122 DEFINE(PAGE_SZ, PAGE_SIZE);
123 BLANK();
124 DEFINE(SYS_ERROR0, 0x9f0000);
125 BLANK();
126 DEFINE(SIZEOF_MACHINE_DESC, sizeof(struct machine_desc));
127 DEFINE(MACHINFO_TYPE, offsetof(struct machine_desc, nr));
128 DEFINE(MACHINFO_NAME, offsetof(struct machine_desc, name));
129 BLANK();
130 DEFINE(PROC_INFO_SZ, sizeof(struct proc_info_list));
131 DEFINE(PROCINFO_INITFUNC, offsetof(struct proc_info_list, __cpu_flush));
132 DEFINE(PROCINFO_MM_MMUFLAGS, offsetof(struct proc_info_list, __cpu_mm_mmu_flags));
133 DEFINE(PROCINFO_IO_MMUFLAGS, offsetof(struct proc_info_list, __cpu_io_mmu_flags));
134 BLANK();
135#ifdef MULTI_DABORT
136 DEFINE(PROCESSOR_DABT_FUNC, offsetof(struct processor, _data_abort));
137#endif
138#ifdef MULTI_PABORT
139 DEFINE(PROCESSOR_PABT_FUNC, offsetof(struct processor, _prefetch_abort));
140#endif
141#ifdef MULTI_CPU
142 DEFINE(CPU_SLEEP_SIZE, offsetof(struct processor, suspend_size));
143 DEFINE(CPU_DO_SUSPEND, offsetof(struct processor, do_suspend));
144 DEFINE(CPU_DO_RESUME, offsetof(struct processor, do_resume));
145#endif
146#ifdef MULTI_CACHE
147 DEFINE(CACHE_FLUSH_KERN_ALL, offsetof(struct cpu_cache_fns, flush_kern_all));
148#endif
149#ifdef CONFIG_ARM_CPU_SUSPEND
150 DEFINE(SLEEP_SAVE_SP_SZ, sizeof(struct sleep_save_sp));
151 DEFINE(SLEEP_SAVE_SP_PHYS, offsetof(struct sleep_save_sp, save_ptr_stash_phys));
152 DEFINE(SLEEP_SAVE_SP_VIRT, offsetof(struct sleep_save_sp, save_ptr_stash));
153#endif
154 BLANK();
155 DEFINE(DMA_BIDIRECTIONAL, DMA_BIDIRECTIONAL);
156 DEFINE(DMA_TO_DEVICE, DMA_TO_DEVICE);
157 DEFINE(DMA_FROM_DEVICE, DMA_FROM_DEVICE);
158 BLANK();
159 DEFINE(CACHE_WRITEBACK_ORDER, __CACHE_WRITEBACK_ORDER);
160 DEFINE(CACHE_WRITEBACK_GRANULE, __CACHE_WRITEBACK_GRANULE);
161 BLANK();
162#ifdef CONFIG_KVM_ARM_HOST
163 DEFINE(VCPU_KVM, offsetof(struct kvm_vcpu, kvm));
164 DEFINE(VCPU_MIDR, offsetof(struct kvm_vcpu, arch.midr));
165 DEFINE(VCPU_CP15, offsetof(struct kvm_vcpu, arch.cp15));
166 DEFINE(VCPU_VFP_GUEST, offsetof(struct kvm_vcpu, arch.vfp_guest));
167 DEFINE(VCPU_VFP_HOST, offsetof(struct kvm_vcpu, arch.host_cpu_context));
168 DEFINE(VCPU_REGS, offsetof(struct kvm_vcpu, arch.regs));
169 DEFINE(VCPU_USR_REGS, offsetof(struct kvm_vcpu, arch.regs.usr_regs));
170 DEFINE(VCPU_SVC_REGS, offsetof(struct kvm_vcpu, arch.regs.svc_regs));
171 DEFINE(VCPU_ABT_REGS, offsetof(struct kvm_vcpu, arch.regs.abt_regs));
172 DEFINE(VCPU_UND_REGS, offsetof(struct kvm_vcpu, arch.regs.und_regs));
173 DEFINE(VCPU_IRQ_REGS, offsetof(struct kvm_vcpu, arch.regs.irq_regs));
174 DEFINE(VCPU_FIQ_REGS, offsetof(struct kvm_vcpu, arch.regs.fiq_regs));
175 DEFINE(VCPU_PC, offsetof(struct kvm_vcpu, arch.regs.usr_regs.ARM_pc));
176 DEFINE(VCPU_CPSR, offsetof(struct kvm_vcpu, arch.regs.usr_regs.ARM_cpsr));
177 DEFINE(VCPU_HCR, offsetof(struct kvm_vcpu, arch.hcr));
178 DEFINE(VCPU_IRQ_LINES, offsetof(struct kvm_vcpu, arch.irq_lines));
179 DEFINE(VCPU_HSR, offsetof(struct kvm_vcpu, arch.fault.hsr));
180 DEFINE(VCPU_HxFAR, offsetof(struct kvm_vcpu, arch.fault.hxfar));
181 DEFINE(VCPU_HPFAR, offsetof(struct kvm_vcpu, arch.fault.hpfar));
182 DEFINE(VCPU_HYP_PC, offsetof(struct kvm_vcpu, arch.fault.hyp_pc));
183#ifdef CONFIG_KVM_ARM_VGIC
184 DEFINE(VCPU_VGIC_CPU, offsetof(struct kvm_vcpu, arch.vgic_cpu));
185 DEFINE(VGIC_CPU_HCR, offsetof(struct vgic_cpu, vgic_hcr));
186 DEFINE(VGIC_CPU_VMCR, offsetof(struct vgic_cpu, vgic_vmcr));
187 DEFINE(VGIC_CPU_MISR, offsetof(struct vgic_cpu, vgic_misr));
188 DEFINE(VGIC_CPU_EISR, offsetof(struct vgic_cpu, vgic_eisr));
189 DEFINE(VGIC_CPU_ELRSR, offsetof(struct vgic_cpu, vgic_elrsr));
190 DEFINE(VGIC_CPU_APR, offsetof(struct vgic_cpu, vgic_apr));
191 DEFINE(VGIC_CPU_LR, offsetof(struct vgic_cpu, vgic_lr));
192 DEFINE(VGIC_CPU_NR_LR, offsetof(struct vgic_cpu, nr_lr));
193#ifdef CONFIG_KVM_ARM_TIMER
194 DEFINE(VCPU_TIMER_CNTV_CTL, offsetof(struct kvm_vcpu, arch.timer_cpu.cntv_ctl));
195 DEFINE(VCPU_TIMER_CNTV_CVAL, offsetof(struct kvm_vcpu, arch.timer_cpu.cntv_cval));
196 DEFINE(KVM_TIMER_CNTVOFF, offsetof(struct kvm, arch.timer.cntvoff));
197 DEFINE(KVM_TIMER_ENABLED, offsetof(struct kvm, arch.timer.enabled));
198#endif
199 DEFINE(KVM_VGIC_VCTRL, offsetof(struct kvm, arch.vgic.vctrl_base));
200#endif
201 DEFINE(KVM_VTTBR, offsetof(struct kvm, arch.vttbr));
202#endif
203 return 0;
204}
1/*
2 * Copyright (C) 1995-2003 Russell King
3 * 2001-2002 Keith Owens
4 *
5 * Generate definitions needed by assembly language modules.
6 * This code generates raw asm output which is post-processed to extract
7 * and format the required data.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 */
13#include <linux/compiler.h>
14#include <linux/sched.h>
15#include <linux/mm.h>
16#include <linux/dma-mapping.h>
17#ifdef CONFIG_KVM_ARM_HOST
18#include <linux/kvm_host.h>
19#endif
20#include <asm/cacheflush.h>
21#include <asm/glue-df.h>
22#include <asm/glue-pf.h>
23#include <asm/mach/arch.h>
24#include <asm/thread_info.h>
25#include <asm/memory.h>
26#include <asm/mpu.h>
27#include <asm/procinfo.h>
28#include <asm/suspend.h>
29#include <asm/vdso_datapage.h>
30#include <asm/hardware/cache-l2x0.h>
31#include <linux/kbuild.h>
32#include "signal.h"
33
34/*
35 * Make sure that the compiler and target are compatible.
36 */
37#if defined(__APCS_26__)
38#error Sorry, your compiler targets APCS-26 but this kernel requires APCS-32
39#endif
40/*
41 * GCC 3.0, 3.1: general bad code generation.
42 * GCC 3.2.0: incorrect function argument offset calculation.
43 * GCC 3.2.x: miscompiles NEW_AUX_ENT in fs/binfmt_elf.c
44 * (http://gcc.gnu.org/PR8896) and incorrect structure
45 * initialisation in fs/jffs2/erase.c
46 * GCC 4.8.0-4.8.2: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=58854
47 * miscompiles find_get_entry(), and can result in EXT3 and EXT4
48 * filesystem corruption (possibly other FS too).
49 */
50#ifdef __GNUC__
51#if (__GNUC__ == 3 && __GNUC_MINOR__ < 3)
52#error Your compiler is too buggy; it is known to miscompile kernels.
53#error Known good compilers: 3.3, 4.x
54#endif
55#if GCC_VERSION >= 40800 && GCC_VERSION < 40803
56#error Your compiler is too buggy; it is known to miscompile kernels
57#error and result in filesystem corruption and oopses.
58#endif
59#endif
60
61int main(void)
62{
63 DEFINE(TSK_ACTIVE_MM, offsetof(struct task_struct, active_mm));
64#ifdef CONFIG_CC_STACKPROTECTOR
65 DEFINE(TSK_STACK_CANARY, offsetof(struct task_struct, stack_canary));
66#endif
67 BLANK();
68 DEFINE(TI_FLAGS, offsetof(struct thread_info, flags));
69 DEFINE(TI_PREEMPT, offsetof(struct thread_info, preempt_count));
70 DEFINE(TI_ADDR_LIMIT, offsetof(struct thread_info, addr_limit));
71 DEFINE(TI_TASK, offsetof(struct thread_info, task));
72 DEFINE(TI_CPU, offsetof(struct thread_info, cpu));
73 DEFINE(TI_CPU_DOMAIN, offsetof(struct thread_info, cpu_domain));
74 DEFINE(TI_CPU_SAVE, offsetof(struct thread_info, cpu_context));
75 DEFINE(TI_USED_CP, offsetof(struct thread_info, used_cp));
76 DEFINE(TI_TP_VALUE, offsetof(struct thread_info, tp_value));
77 DEFINE(TI_FPSTATE, offsetof(struct thread_info, fpstate));
78#ifdef CONFIG_VFP
79 DEFINE(TI_VFPSTATE, offsetof(struct thread_info, vfpstate));
80#ifdef CONFIG_SMP
81 DEFINE(VFP_CPU, offsetof(union vfp_state, hard.cpu));
82#endif
83#endif
84#ifdef CONFIG_ARM_THUMBEE
85 DEFINE(TI_THUMBEE_STATE, offsetof(struct thread_info, thumbee_state));
86#endif
87#ifdef CONFIG_IWMMXT
88 DEFINE(TI_IWMMXT_STATE, offsetof(struct thread_info, fpstate.iwmmxt));
89#endif
90#ifdef CONFIG_CRUNCH
91 DEFINE(TI_CRUNCH_STATE, offsetof(struct thread_info, crunchstate));
92#endif
93 BLANK();
94 DEFINE(S_R0, offsetof(struct pt_regs, ARM_r0));
95 DEFINE(S_R1, offsetof(struct pt_regs, ARM_r1));
96 DEFINE(S_R2, offsetof(struct pt_regs, ARM_r2));
97 DEFINE(S_R3, offsetof(struct pt_regs, ARM_r3));
98 DEFINE(S_R4, offsetof(struct pt_regs, ARM_r4));
99 DEFINE(S_R5, offsetof(struct pt_regs, ARM_r5));
100 DEFINE(S_R6, offsetof(struct pt_regs, ARM_r6));
101 DEFINE(S_R7, offsetof(struct pt_regs, ARM_r7));
102 DEFINE(S_R8, offsetof(struct pt_regs, ARM_r8));
103 DEFINE(S_R9, offsetof(struct pt_regs, ARM_r9));
104 DEFINE(S_R10, offsetof(struct pt_regs, ARM_r10));
105 DEFINE(S_FP, offsetof(struct pt_regs, ARM_fp));
106 DEFINE(S_IP, offsetof(struct pt_regs, ARM_ip));
107 DEFINE(S_SP, offsetof(struct pt_regs, ARM_sp));
108 DEFINE(S_LR, offsetof(struct pt_regs, ARM_lr));
109 DEFINE(S_PC, offsetof(struct pt_regs, ARM_pc));
110 DEFINE(S_PSR, offsetof(struct pt_regs, ARM_cpsr));
111 DEFINE(S_OLD_R0, offsetof(struct pt_regs, ARM_ORIG_r0));
112 DEFINE(PT_REGS_SIZE, sizeof(struct pt_regs));
113 DEFINE(SVC_DACR, offsetof(struct svc_pt_regs, dacr));
114 DEFINE(SVC_ADDR_LIMIT, offsetof(struct svc_pt_regs, addr_limit));
115 DEFINE(SVC_REGS_SIZE, sizeof(struct svc_pt_regs));
116 BLANK();
117 DEFINE(SIGFRAME_RC3_OFFSET, offsetof(struct sigframe, retcode[3]));
118 DEFINE(RT_SIGFRAME_RC3_OFFSET, offsetof(struct rt_sigframe, sig.retcode[3]));
119 BLANK();
120#ifdef CONFIG_CACHE_L2X0
121 DEFINE(L2X0_R_PHY_BASE, offsetof(struct l2x0_regs, phy_base));
122 DEFINE(L2X0_R_AUX_CTRL, offsetof(struct l2x0_regs, aux_ctrl));
123 DEFINE(L2X0_R_TAG_LATENCY, offsetof(struct l2x0_regs, tag_latency));
124 DEFINE(L2X0_R_DATA_LATENCY, offsetof(struct l2x0_regs, data_latency));
125 DEFINE(L2X0_R_FILTER_START, offsetof(struct l2x0_regs, filter_start));
126 DEFINE(L2X0_R_FILTER_END, offsetof(struct l2x0_regs, filter_end));
127 DEFINE(L2X0_R_PREFETCH_CTRL, offsetof(struct l2x0_regs, prefetch_ctrl));
128 DEFINE(L2X0_R_PWR_CTRL, offsetof(struct l2x0_regs, pwr_ctrl));
129 BLANK();
130#endif
131#ifdef CONFIG_CPU_HAS_ASID
132 DEFINE(MM_CONTEXT_ID, offsetof(struct mm_struct, context.id.counter));
133 BLANK();
134#endif
135 DEFINE(VMA_VM_MM, offsetof(struct vm_area_struct, vm_mm));
136 DEFINE(VMA_VM_FLAGS, offsetof(struct vm_area_struct, vm_flags));
137 BLANK();
138 DEFINE(VM_EXEC, VM_EXEC);
139 BLANK();
140 DEFINE(PAGE_SZ, PAGE_SIZE);
141 BLANK();
142 DEFINE(SYS_ERROR0, 0x9f0000);
143 BLANK();
144 DEFINE(SIZEOF_MACHINE_DESC, sizeof(struct machine_desc));
145 DEFINE(MACHINFO_TYPE, offsetof(struct machine_desc, nr));
146 DEFINE(MACHINFO_NAME, offsetof(struct machine_desc, name));
147 BLANK();
148 DEFINE(PROC_INFO_SZ, sizeof(struct proc_info_list));
149 DEFINE(PROCINFO_INITFUNC, offsetof(struct proc_info_list, __cpu_flush));
150 DEFINE(PROCINFO_MM_MMUFLAGS, offsetof(struct proc_info_list, __cpu_mm_mmu_flags));
151 DEFINE(PROCINFO_IO_MMUFLAGS, offsetof(struct proc_info_list, __cpu_io_mmu_flags));
152 BLANK();
153#ifdef MULTI_DABORT
154 DEFINE(PROCESSOR_DABT_FUNC, offsetof(struct processor, _data_abort));
155#endif
156#ifdef MULTI_PABORT
157 DEFINE(PROCESSOR_PABT_FUNC, offsetof(struct processor, _prefetch_abort));
158#endif
159#ifdef MULTI_CPU
160 DEFINE(CPU_SLEEP_SIZE, offsetof(struct processor, suspend_size));
161 DEFINE(CPU_DO_SUSPEND, offsetof(struct processor, do_suspend));
162 DEFINE(CPU_DO_RESUME, offsetof(struct processor, do_resume));
163#endif
164#ifdef MULTI_CACHE
165 DEFINE(CACHE_FLUSH_KERN_ALL, offsetof(struct cpu_cache_fns, flush_kern_all));
166#endif
167#ifdef CONFIG_ARM_CPU_SUSPEND
168 DEFINE(SLEEP_SAVE_SP_SZ, sizeof(struct sleep_save_sp));
169 DEFINE(SLEEP_SAVE_SP_PHYS, offsetof(struct sleep_save_sp, save_ptr_stash_phys));
170 DEFINE(SLEEP_SAVE_SP_VIRT, offsetof(struct sleep_save_sp, save_ptr_stash));
171#endif
172 BLANK();
173 DEFINE(DMA_BIDIRECTIONAL, DMA_BIDIRECTIONAL);
174 DEFINE(DMA_TO_DEVICE, DMA_TO_DEVICE);
175 DEFINE(DMA_FROM_DEVICE, DMA_FROM_DEVICE);
176 BLANK();
177 DEFINE(CACHE_WRITEBACK_ORDER, __CACHE_WRITEBACK_ORDER);
178 DEFINE(CACHE_WRITEBACK_GRANULE, __CACHE_WRITEBACK_GRANULE);
179 BLANK();
180#ifdef CONFIG_KVM_ARM_HOST
181 DEFINE(VCPU_GUEST_CTXT, offsetof(struct kvm_vcpu, arch.ctxt));
182 DEFINE(VCPU_HOST_CTXT, offsetof(struct kvm_vcpu, arch.host_cpu_context));
183 DEFINE(CPU_CTXT_VFP, offsetof(struct kvm_cpu_context, vfp));
184 DEFINE(CPU_CTXT_GP_REGS, offsetof(struct kvm_cpu_context, gp_regs));
185 DEFINE(GP_REGS_USR, offsetof(struct kvm_regs, usr_regs));
186#endif
187 BLANK();
188#ifdef CONFIG_VDSO
189 DEFINE(VDSO_DATA_SIZE, sizeof(union vdso_data_store));
190#endif
191 BLANK();
192#ifdef CONFIG_ARM_MPU
193 DEFINE(MPU_RNG_INFO_RNGS, offsetof(struct mpu_rgn_info, rgns));
194 DEFINE(MPU_RNG_INFO_USED, offsetof(struct mpu_rgn_info, used));
195
196 DEFINE(MPU_RNG_SIZE, sizeof(struct mpu_rgn));
197 DEFINE(MPU_RGN_DRBAR, offsetof(struct mpu_rgn, drbar));
198 DEFINE(MPU_RGN_DRSR, offsetof(struct mpu_rgn, drsr));
199 DEFINE(MPU_RGN_DRACR, offsetof(struct mpu_rgn, dracr));
200#endif
201 return 0;
202}