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1/*
2 * Copyright (c) 2015-2016 MediaTek Inc.
3 * Author: Yong Wu <yong.wu@mediatek.com>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 */
14#include <linux/clk.h>
15#include <linux/component.h>
16#include <linux/device.h>
17#include <linux/err.h>
18#include <linux/io.h>
19#include <linux/of.h>
20#include <linux/of_platform.h>
21#include <linux/platform_device.h>
22#include <linux/pm_runtime.h>
23#include <soc/mediatek/smi.h>
24#include <dt-bindings/memory/mt2701-larb-port.h>
25
26#define SMI_LARB_MMU_EN 0xf00
27#define REG_SMI_SECUR_CON_BASE 0x5c0
28
29/* every register control 8 port, register offset 0x4 */
30#define REG_SMI_SECUR_CON_OFFSET(id) (((id) >> 3) << 2)
31#define REG_SMI_SECUR_CON_ADDR(id) \
32 (REG_SMI_SECUR_CON_BASE + REG_SMI_SECUR_CON_OFFSET(id))
33
34/*
35 * every port have 4 bit to control, bit[port + 3] control virtual or physical,
36 * bit[port + 2 : port + 1] control the domain, bit[port] control the security
37 * or non-security.
38 */
39#define SMI_SECUR_CON_VAL_MSK(id) (~(0xf << (((id) & 0x7) << 2)))
40#define SMI_SECUR_CON_VAL_VIRT(id) BIT((((id) & 0x7) << 2) + 3)
41/* mt2701 domain should be set to 3 */
42#define SMI_SECUR_CON_VAL_DOMAIN(id) (0x3 << ((((id) & 0x7) << 2) + 1))
43
44struct mtk_smi_larb_gen {
45 int port_in_larb[MTK_LARB_NR_MAX + 1];
46 void (*config_port)(struct device *);
47};
48
49struct mtk_smi {
50 struct device *dev;
51 struct clk *clk_apb, *clk_smi;
52 struct clk *clk_async; /*only needed by mt2701*/
53 void __iomem *smi_ao_base;
54};
55
56struct mtk_smi_larb { /* larb: local arbiter */
57 struct mtk_smi smi;
58 void __iomem *base;
59 struct device *smi_common_dev;
60 const struct mtk_smi_larb_gen *larb_gen;
61 int larbid;
62 u32 *mmu;
63};
64
65enum mtk_smi_gen {
66 MTK_SMI_GEN1,
67 MTK_SMI_GEN2
68};
69
70static int mtk_smi_enable(const struct mtk_smi *smi)
71{
72 int ret;
73
74 ret = pm_runtime_get_sync(smi->dev);
75 if (ret < 0)
76 return ret;
77
78 ret = clk_prepare_enable(smi->clk_apb);
79 if (ret)
80 goto err_put_pm;
81
82 ret = clk_prepare_enable(smi->clk_smi);
83 if (ret)
84 goto err_disable_apb;
85
86 return 0;
87
88err_disable_apb:
89 clk_disable_unprepare(smi->clk_apb);
90err_put_pm:
91 pm_runtime_put_sync(smi->dev);
92 return ret;
93}
94
95static void mtk_smi_disable(const struct mtk_smi *smi)
96{
97 clk_disable_unprepare(smi->clk_smi);
98 clk_disable_unprepare(smi->clk_apb);
99 pm_runtime_put_sync(smi->dev);
100}
101
102int mtk_smi_larb_get(struct device *larbdev)
103{
104 struct mtk_smi_larb *larb = dev_get_drvdata(larbdev);
105 const struct mtk_smi_larb_gen *larb_gen = larb->larb_gen;
106 struct mtk_smi *common = dev_get_drvdata(larb->smi_common_dev);
107 int ret;
108
109 /* Enable the smi-common's power and clocks */
110 ret = mtk_smi_enable(common);
111 if (ret)
112 return ret;
113
114 /* Enable the larb's power and clocks */
115 ret = mtk_smi_enable(&larb->smi);
116 if (ret) {
117 mtk_smi_disable(common);
118 return ret;
119 }
120
121 /* Configure the iommu info for this larb */
122 larb_gen->config_port(larbdev);
123
124 return 0;
125}
126EXPORT_SYMBOL_GPL(mtk_smi_larb_get);
127
128void mtk_smi_larb_put(struct device *larbdev)
129{
130 struct mtk_smi_larb *larb = dev_get_drvdata(larbdev);
131 struct mtk_smi *common = dev_get_drvdata(larb->smi_common_dev);
132
133 /*
134 * Don't de-configure the iommu info for this larb since there may be
135 * several modules in this larb.
136 * The iommu info will be reset after power off.
137 */
138
139 mtk_smi_disable(&larb->smi);
140 mtk_smi_disable(common);
141}
142EXPORT_SYMBOL_GPL(mtk_smi_larb_put);
143
144static int
145mtk_smi_larb_bind(struct device *dev, struct device *master, void *data)
146{
147 struct mtk_smi_larb *larb = dev_get_drvdata(dev);
148 struct mtk_smi_iommu *smi_iommu = data;
149 unsigned int i;
150
151 for (i = 0; i < smi_iommu->larb_nr; i++) {
152 if (dev == smi_iommu->larb_imu[i].dev) {
153 /* The 'mmu' may be updated in iommu-attach/detach. */
154 larb->mmu = &smi_iommu->larb_imu[i].mmu;
155 return 0;
156 }
157 }
158 return -ENODEV;
159}
160
161static void mtk_smi_larb_config_port(struct device *dev)
162{
163 struct mtk_smi_larb *larb = dev_get_drvdata(dev);
164
165 writel(*larb->mmu, larb->base + SMI_LARB_MMU_EN);
166}
167
168
169static void mtk_smi_larb_config_port_gen1(struct device *dev)
170{
171 struct mtk_smi_larb *larb = dev_get_drvdata(dev);
172 const struct mtk_smi_larb_gen *larb_gen = larb->larb_gen;
173 struct mtk_smi *common = dev_get_drvdata(larb->smi_common_dev);
174 int i, m4u_port_id, larb_port_num;
175 u32 sec_con_val, reg_val;
176
177 m4u_port_id = larb_gen->port_in_larb[larb->larbid];
178 larb_port_num = larb_gen->port_in_larb[larb->larbid + 1]
179 - larb_gen->port_in_larb[larb->larbid];
180
181 for (i = 0; i < larb_port_num; i++, m4u_port_id++) {
182 if (*larb->mmu & BIT(i)) {
183 /* bit[port + 3] controls the virtual or physical */
184 sec_con_val = SMI_SECUR_CON_VAL_VIRT(m4u_port_id);
185 } else {
186 /* do not need to enable m4u for this port */
187 continue;
188 }
189 reg_val = readl(common->smi_ao_base
190 + REG_SMI_SECUR_CON_ADDR(m4u_port_id));
191 reg_val &= SMI_SECUR_CON_VAL_MSK(m4u_port_id);
192 reg_val |= sec_con_val;
193 reg_val |= SMI_SECUR_CON_VAL_DOMAIN(m4u_port_id);
194 writel(reg_val,
195 common->smi_ao_base
196 + REG_SMI_SECUR_CON_ADDR(m4u_port_id));
197 }
198}
199
200static void
201mtk_smi_larb_unbind(struct device *dev, struct device *master, void *data)
202{
203 /* Do nothing as the iommu is always enabled. */
204}
205
206static const struct component_ops mtk_smi_larb_component_ops = {
207 .bind = mtk_smi_larb_bind,
208 .unbind = mtk_smi_larb_unbind,
209};
210
211static const struct mtk_smi_larb_gen mtk_smi_larb_mt8173 = {
212 /* mt8173 do not need the port in larb */
213 .config_port = mtk_smi_larb_config_port,
214};
215
216static const struct mtk_smi_larb_gen mtk_smi_larb_mt2701 = {
217 .port_in_larb = {
218 LARB0_PORT_OFFSET, LARB1_PORT_OFFSET,
219 LARB2_PORT_OFFSET, LARB3_PORT_OFFSET
220 },
221 .config_port = mtk_smi_larb_config_port_gen1,
222};
223
224static const struct of_device_id mtk_smi_larb_of_ids[] = {
225 {
226 .compatible = "mediatek,mt8173-smi-larb",
227 .data = &mtk_smi_larb_mt8173
228 },
229 {
230 .compatible = "mediatek,mt2701-smi-larb",
231 .data = &mtk_smi_larb_mt2701
232 },
233 {}
234};
235
236static int mtk_smi_larb_probe(struct platform_device *pdev)
237{
238 struct mtk_smi_larb *larb;
239 struct resource *res;
240 struct device *dev = &pdev->dev;
241 struct device_node *smi_node;
242 struct platform_device *smi_pdev;
243 const struct of_device_id *of_id;
244
245 if (!dev->pm_domain)
246 return -EPROBE_DEFER;
247
248 of_id = of_match_node(mtk_smi_larb_of_ids, pdev->dev.of_node);
249 if (!of_id)
250 return -EINVAL;
251
252 larb = devm_kzalloc(dev, sizeof(*larb), GFP_KERNEL);
253 if (!larb)
254 return -ENOMEM;
255
256 larb->larb_gen = of_id->data;
257 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
258 larb->base = devm_ioremap_resource(dev, res);
259 if (IS_ERR(larb->base))
260 return PTR_ERR(larb->base);
261
262 larb->smi.clk_apb = devm_clk_get(dev, "apb");
263 if (IS_ERR(larb->smi.clk_apb))
264 return PTR_ERR(larb->smi.clk_apb);
265
266 larb->smi.clk_smi = devm_clk_get(dev, "smi");
267 if (IS_ERR(larb->smi.clk_smi))
268 return PTR_ERR(larb->smi.clk_smi);
269 larb->smi.dev = dev;
270
271 smi_node = of_parse_phandle(dev->of_node, "mediatek,smi", 0);
272 if (!smi_node)
273 return -EINVAL;
274
275 smi_pdev = of_find_device_by_node(smi_node);
276 of_node_put(smi_node);
277 if (smi_pdev) {
278 larb->smi_common_dev = &smi_pdev->dev;
279 } else {
280 dev_err(dev, "Failed to get the smi_common device\n");
281 return -EINVAL;
282 }
283
284 pm_runtime_enable(dev);
285 platform_set_drvdata(pdev, larb);
286 return component_add(dev, &mtk_smi_larb_component_ops);
287}
288
289static int mtk_smi_larb_remove(struct platform_device *pdev)
290{
291 pm_runtime_disable(&pdev->dev);
292 component_del(&pdev->dev, &mtk_smi_larb_component_ops);
293 return 0;
294}
295
296static struct platform_driver mtk_smi_larb_driver = {
297 .probe = mtk_smi_larb_probe,
298 .remove = mtk_smi_larb_remove,
299 .driver = {
300 .name = "mtk-smi-larb",
301 .of_match_table = mtk_smi_larb_of_ids,
302 }
303};
304
305static const struct of_device_id mtk_smi_common_of_ids[] = {
306 {
307 .compatible = "mediatek,mt8173-smi-common",
308 .data = (void *)MTK_SMI_GEN2
309 },
310 {
311 .compatible = "mediatek,mt2701-smi-common",
312 .data = (void *)MTK_SMI_GEN1
313 },
314 {}
315};
316
317static int mtk_smi_common_probe(struct platform_device *pdev)
318{
319 struct device *dev = &pdev->dev;
320 struct mtk_smi *common;
321 struct resource *res;
322 const struct of_device_id *of_id;
323 enum mtk_smi_gen smi_gen;
324
325 if (!dev->pm_domain)
326 return -EPROBE_DEFER;
327
328 common = devm_kzalloc(dev, sizeof(*common), GFP_KERNEL);
329 if (!common)
330 return -ENOMEM;
331 common->dev = dev;
332
333 common->clk_apb = devm_clk_get(dev, "apb");
334 if (IS_ERR(common->clk_apb))
335 return PTR_ERR(common->clk_apb);
336
337 common->clk_smi = devm_clk_get(dev, "smi");
338 if (IS_ERR(common->clk_smi))
339 return PTR_ERR(common->clk_smi);
340
341 of_id = of_match_node(mtk_smi_common_of_ids, pdev->dev.of_node);
342 if (!of_id)
343 return -EINVAL;
344
345 /*
346 * for mtk smi gen 1, we need to get the ao(always on) base to config
347 * m4u port, and we need to enable the aync clock for transform the smi
348 * clock into emi clock domain, but for mtk smi gen2, there's no smi ao
349 * base.
350 */
351 smi_gen = (enum mtk_smi_gen)of_id->data;
352 if (smi_gen == MTK_SMI_GEN1) {
353 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
354 common->smi_ao_base = devm_ioremap_resource(dev, res);
355 if (IS_ERR(common->smi_ao_base))
356 return PTR_ERR(common->smi_ao_base);
357
358 common->clk_async = devm_clk_get(dev, "async");
359 if (IS_ERR(common->clk_async))
360 return PTR_ERR(common->clk_async);
361
362 clk_prepare_enable(common->clk_async);
363 }
364 pm_runtime_enable(dev);
365 platform_set_drvdata(pdev, common);
366 return 0;
367}
368
369static int mtk_smi_common_remove(struct platform_device *pdev)
370{
371 pm_runtime_disable(&pdev->dev);
372 return 0;
373}
374
375static struct platform_driver mtk_smi_common_driver = {
376 .probe = mtk_smi_common_probe,
377 .remove = mtk_smi_common_remove,
378 .driver = {
379 .name = "mtk-smi-common",
380 .of_match_table = mtk_smi_common_of_ids,
381 }
382};
383
384static int __init mtk_smi_init(void)
385{
386 int ret;
387
388 ret = platform_driver_register(&mtk_smi_common_driver);
389 if (ret != 0) {
390 pr_err("Failed to register SMI driver\n");
391 return ret;
392 }
393
394 ret = platform_driver_register(&mtk_smi_larb_driver);
395 if (ret != 0) {
396 pr_err("Failed to register SMI-LARB driver\n");
397 goto err_unreg_smi;
398 }
399 return ret;
400
401err_unreg_smi:
402 platform_driver_unregister(&mtk_smi_common_driver);
403 return ret;
404}
405
406subsys_initcall(mtk_smi_init);